JP5632390B2 - Interface system for COG applications - Google Patents

Description

  The present invention relates to a COG (Chip on Glass) video display device, a current-driven transmitter and receiver that send data in the form of differential current between semiconductor chips through a pair of transmission lines, and a COG application to which this is applied. In particular, an independent current signal capable of independently generating and sending a positive data current and a negative data current for generating a differential current indicating data to be sent. The present invention relates to an interface system for a COG application in which distortion of a transmission signal can be reduced using such a transmitter and receiver.

  In conventional data transmission between semiconductor chips through a transmission line, if data is sent through a differential transmission line pair in the form of a differential voltage at the transmitter, the data is sensed at the receiver and then displayed. It was made in the form of converting to data and using it.

  However, the data transmission method using the voltage difference is easily affected by the transmission line length between the semiconductor chips. In particular, when the distance between the semiconductor chips is increased due to the recent technological trend, the transmission line has a large impedance, and the data transmission method using the voltage difference is not suitable. A data transmission method was proposed.

  That is, the conventional mini low voltage differential signaling (mLVDS) method using a differential voltage is a method in which data and a clock signal are transmitted to a driver IC in a multi-drop form through a printed circuit board. The termination resistor installed at the termination portion of the printed circuit board receives data and a clock signal in the form of voltage. However, in the case of COG applications due to recent slimming, the timing controller and the driver IC are configured in a point-to-point system, and the transmission line is embodied directly on the glass of the panel. Since there is a problem that a very large impedance component exists between driver ICs and waveform distortion becomes severe, LCDS (Low Current Differential Signaling), which is a data transmission method using current, has recently been used. The method is being used.

  In this way, the current driving method for transmitting data using current is performed by transmitting data in a current form through a transmission line at a transmitter and restoring and using the data at the receiver. A single current drive method in which one data bit is transmitted on one transmission line and a differential current drive method in which currents having different sizes are sent to two transmission lines and data is sent through the difference between them. The

  That is, in the differential current driving method, bit data is generated using currents having different magnitudes from each other in a transmitter and is transmitted through two transmission lines, and two transmissions are performed in a receiver. Data is restored using the current difference between the lines. Although the distortion of the transmission signal with respect to noise is smaller than that of the single current driving method, interference between the transmission lines is caused by the physical positions of the two transmission lines and R, L, and C parasitic on the transmission lines. Become. As a result, the transmission signal is distorted, the time constant of the transmission line is increased, the signal transition time is increased, and the transmission speed is lowered.

  As a result, the first base current source for supplying the base current (Icc1) for displaying the base logic state to the true line (TX +) of the transmission line pair as recently disclosed in Patent Document 1. A second base current source for supplying a base current (Icc2) indicating a base logic state to the bar line (TX-) of the transmission line pairs, and a transition logic state in one of the transmission line pairs. A transition current source for generating a transition current (Idc) for displaying the transmission line, an equalization switch for equalizing the potential of the transmission line pair, and the true current or the bar based on the logical value of the data to be transmitted. A transmitter including a transition switch for supplying to a line and a transmission control unit for controlling switching between the equalization switch and the transition switch in response to data to be transmitted Proposed to do.

  In such a transmitter, one transition current source is connected to one of two base current sources, ie, a first base current source and a second base current source, according to a data signal, and two transmission line pairs are connected. The current level difference will be made. However, in this case, the first and second base current sources can create different current values due to factors such as design and process, test environment, and the like. The magnitude of the current applied to the pair changes.

  That is, as shown in FIG. 1, the first base current (Icc1) supplied by the first base current source is Iref + α, and the second base current (Icc2) supplied by the second base current source. Is Iref-α and the transition current supplied by the transition current source is I, the current flowing in the true line (TX +) of the transmission line pair is the sum of the transition current and the first base current. I + Iref + α, and at the same time, the current flowing through the bar line (TX−) becomes Iref−α. However, if data is transitioned, the current flowing in the true line (TX +) of the transmission line pair is Iref + α, and the current flowing in the bar line (TX−) at the same time is the sum of the transition current and the second base current. Since I + Iref−α, there is a problem that the current value becomes unstable every time the data value is changed.

  In addition, the data line current (Irx +) flowing in the true line (TX +) in the transmission line pair is mirrored to generate a true line mirroring current (Irx +), and a bar line (TX−) Mirroring the data signal current (Irx-) flowing through the line, a bar line current mirror for generating a bar line mirroring current (Irx-) and a true line reception voltage having a level corresponding to the true line mirroring current are generated. A true-line IV converter for generating a bar-line received voltage having a level corresponding to the bar-line mirroring current, and a level difference between the true-line received voltage and the bar-line received voltage Receiver including a differential amplifier for performing It proposed.

  However, since such a receiver is provided with respective IV converters for the true line and the bar line, errors of the true line and the bar line are converted into voltages and input to the differential amplifier. Therefore, there is a problem that the distortion of the transmission signal increases. In addition, the two converters required by the receiver have a problem of increasing the size of the receiver and increasing the layout area.

Korean Patent No. 10-0588752

  The technical problem to be solved by the present invention is to generate and send a differential current indicating a logic state of data to be transmitted independently by a difference between a positive data current and a negative data current without an external current. A current-driven transmitter using an independent current signal that can maintain a constant magnitude of the current applied to the transmission line pair without being affected by the design and process causes of the transmission and reception through the transmission line Current-driven receiver using an independent current signal capable of reducing the error between the true line and the bar line by simultaneously converting the current level difference into a voltage level with a single IV converter, and such a transmitter And an interface system for a COG application that can reduce distortion of a transmission signal using a receiver.

  An interface system for a COG application that achieves the above technical problem includes a first data current source that independently generates and supplies a positive data current forming a differential current, and an independent negative data current. A second data current source to be supplied, a first selection switch for supplying the positive data current while switching between the true line and the bar line according to a logic state of data to be transmitted, and the negative data current to the first data switch. A second selection switch for switching between a bar line and a true line, a leveling switch connected between the true line and the bar line and switching to equalize the potential of the transmission line; A transmitter including a switching controller for controlling operation; and the first and second selection switches. A transmission line pair formed by a true line and a bar line that supplies positive data current and negative data current while switching, and a true line received current received by the true line and a bar line received current received by the bar line. It includes a receiver that restores data by simultaneously converting a level difference to a voltage level.

  The receiver of the interface system for the COG application according to the present invention also includes a true line current mirror that receives a current flowing through the true line and generates a true line received current, and a bar that receives the current flowing through the bar line. A bar line current mirror for generating a line reception current; a first resistor having one end connected to a node to which the true line reception current is supplied; and a second resistor having one end connected to a node to which the bar line reception current is supplied. A resistor, a current source commonly connected to the other ends of the first resistor and the second resistor, and a power source for generating a reception voltage level while a true line reception current and a bar line reception current flow in and out by the current source A single IV converter provided with a voltage, and a difference that amplifies upon receipt of a difference in level of the received voltage Characterized in that it is configured to include an amplifier section.

  The receiver of the interface system for the COG application according to the present invention includes a first resistor having one end connected to the true line and receiving a true line reception current, and one end connected to the bar line. A second resistor to which a received current is input, and a current source having one terminal connected in common to the other ends of the first resistor and the second resistor and the other terminal connected to a ground power source. A first terminal connected to the current source, a second terminal forming a common node with the first resistor and a non-inverting terminal of the differential amplifier, and a third terminal. A common voltage generator connected to an inverting terminal of the differential amplifier by forming a common node with one terminal of the second resistor, and a non-inverting terminal for a difference in voltage level converted by the single IV converter. Input to inverting terminal Receiving, characterized in that it is configured to include a differential amplifier for amplifying.

  The present invention makes the difference between the currents applied to the transmission line pair constant by independently generating and sending the logical state of the data to be sent by the difference between the positive data current and the negative data current generated by the reference current. In this way, the difference in the current level received through the transmission line pair is converted into the voltage level by the single IV converter at the same time, so that the error of the differential current transmitted to the true line and the bar line can be reduced. There are advantages.

  In addition, the present invention can reduce the layout area of the transmitter and the receiver, and at the same time, generates a common voltage at the input terminal of the differential amplifier of the receiver to generate various voltage levels. There is an advantage that design information of the voltage differential signal system and the multipoint low voltage differential signal system can be easily applied.

It is an illustration figure of the differential current level applied to a transmission line pair by the conventional differential current drive system. FIG. 4 is a circuit diagram of a current-driven transmitter using an independent current signal according to the present invention. FIG. 6 is an exemplary diagram illustrating a differential current level applied to a transmission line pair by a current driving method using an independent current signal according to the present invention. 1 is a circuit diagram showing a first embodiment of a current-driven receiver using an independent current signal equipped with a single IV converter according to the present invention; FIG. FIG. 6 is a circuit diagram showing a second embodiment of a current drive type receiver using an independent current signal equipped with a single IV converter according to the present invention; 1 is a configuration diagram of a current drive type interface system using a first embodiment of a receiver according to the present invention; FIG. FIG. 5 is a configuration diagram of an interface system of a current driving system using a second embodiment of a receiver according to the present invention.

  Hereinafter, specific embodiments of the present invention will be described in detail with reference to the drawings.

  A current-driven transmitter using an independent current signal according to an embodiment of the present invention includes a first data current source 100 that generates a positive data current, a negative data current, as shown in FIG. A second data current source 200 to be generated, a selection switch for selecting a transmission line to which a positive data current and a negative data current are supplied depending on whether or not the data to be transmitted is transitioned, and a transmission line pair before transmission of new data after data transmission An equalizing switch 400 for equalizing the potential and a switching controller for controlling the switching operation of the selection switch and the equalizing switch according to data to be transmitted are included.

  The first data current source 100 and the second data current source 200 are current mirrors that independently generate a differential current to be sent to a receiver through a transmission line pair formed by a true line (TX +) and a bar line (TX−). In order to independently generate a logic state due to a change in data to be transmitted, the first data current source 100 generates a positive data current indicating one logic state. The second data current source 200 is configured to generate a negative data current indicating another logic state.

  The first data current source 100 includes a second MOS transistor (MM) connected to a first MOS transistor (MR) that supplies a reference current (Iref) to form a current mirror. The second MOS transistor (MM) One terminal is connected to the power supply voltage (VDD), the other one terminal is connected to the first selection switch 310, and the gate is connected to the gate of the first MOS transistor (MR).

  The first data current source 100 configured as described above generates a true line (TX +) by switching the positive data current (I1) mirrored through the first MOS transistor (MR) through the switching operation of the first selection switch 310. ) And the bar line (TX-).

  The second data current source 200 is connected to a first MOS transistor (MR) that supplies a reference current (Iref), and includes a third MOS transistor (MN) that forms a current mirror. The third MOS transistor (MN) One terminal is connected to the power supply voltage (VDD), the other one terminal is connected to the second selection switch 320, and the gate is connected to the gate of the first MOS transistor (MR).

  The second data current source 200 configured as described above is configured such that the negative data current (I2) mirrored through the first MOS transistor (MR) is converted into a bar line (TX) by the switching operation of the second selection switch 320. -) And the true line (TX +) are selectively supplied.

  At this time, the positive data current (I1) supplied from the first data current source (MM) 100 and the negative data current (I2) supplied from the second data current source (MN) 200 are the same first MOS transistor. Since the reference current (Iref) is supplied from (MR), the reference current (Iref) is generated in a constant proportionate magnitude and supplied to the first selection switch 310 and the second selection switch 320, respectively. . That is, the first data current source (MM) and the second data current source (MN) supply a constant differential current to send a logic state of data, for example, 1: a or 1 : b or the like (a and b are natural numbers) is desirable.

  The selection switch includes a first selection switch 310 that supplies a current supplied from the first data current source (MM) 100 while switching between a true line (TX +) and a bar line (TX−); And a second selection switch 320 that supplies the current supplied from the two data current source (MN) 200 while switching between the bar line (TX−) and the true line (TX +).

  The first selection switch 310 has one terminal commonly connected to the first data current source (MM), and a positive data signal (D +) and a negative data signal (D−) applied to the gate. One terminal is connected to the bar line (TX−) and the true line (TX +), respectively, and is switched by the positive data signal (D +) and the negative data signal (D−) to supply the positive data current (I1). It is desirable that the first and second transmission gates 311 and 312 for selecting a transmission line are included.

  At this time, the first transmission gate 311 has one terminal connected to the other terminal of the first data current source (MM) and the other terminal connected to the bar line (TX-). A positive data signal (D +) is applied to the gate of the transistor, and a negative data signal (D−) is applied to the gate of the PMOS transistor.

  The second transmission gate 312 has one terminal connected to the other terminal of the first data current source (MM) and the other terminal connected to the true line (TX +). A positive data signal (D +) is applied to the gate, and a negative data signal (D−) is applied to the gate of the NMOS transistor.

  Accordingly, when the data to be transmitted is transitioned and the positive data signal (D +) is in a logic high state, the first transmission gate 311 is turned on and the second transmission gate 312 is turned off. When the positive data current (I1) supplied from the first data current source (MM) is supplied to the bar line (TX−) and the positive data signal (D +) is in the logic low state, the first transmission gate 311 is turned off, the second transmission gate 312 is turned on, and the positive data current (I1) supplied to the first data current source (MM) is supplied to the true line (TX +).

  The second selection switch 320 has one terminal commonly connected to the second data current source (MN), and positive and negative data signals (D +, D-) are applied to the gates. A transmission line is connected to a true line (TX +) and a bar line (TX−), and is switched by the positive and negative data signals (D +, D−) to supply a negative data current (I2). It is desirable that the third and fourth transmission gates 321 and 322 are selected.

  At this time, the third transmission gate 321 has one terminal connected to the other terminal of the second data current source (MN) and the other terminal connected to the true line (TX +). The positive data signal (D +) is applied to the gate of the PMOS transistor, and the negative data signal (D−) is applied to the gate of the PMOS transistor.

  The fourth transmission gate 322 has one terminal connected to the other terminal of the second data current source (MN) and the other terminal connected to the bar line (TX−). The positive data signal (D +) is applied to the gate of the NMOS transistor, and the negative data signal (D−) is applied to the gate of the NMOS transistor.

  Accordingly, when the data to be transmitted transitions and the positive data signal D + is in a logic high state, the third transmission gate 321 is turned on and the fourth transmission gate 322 is turned off. When the negative data current (I2) supplied from the second data current source (MN) is supplied to the true line (TX +) and the positive data signal (D +) is in a logic low state, the third transmission gate 321 is turned off, the fourth transmission gate 322 is turned on, and the negative data current (I2) supplied to the second data current source (MN) is supplied to the bar line (TX−).

  When the positive data current (I1) is supplied to the bar line (TX−) by the switching operation of the first and second selection switches 310 and 320 thus configured, the negative data current (I2) is true. When the differential data is supplied to the line (TX +) and supplied to the transmitter, and the positive data current (I1) is supplied to the true line (TX +), the negative data current (I2) is converted to the bar line (TX -) To supply differential current to the transmitter.

  The equalization switch 400 is turned on for a predetermined time when a new transition occurs after data transmission, and is turned off after equalizing the levels of the true line (TX +) and the bar line (TX−). Both terminals are connected between the true line (TX +) and the bar line (TX−) to supply a positive data current (I1) and a negative data current (I2), and an equalization control signal is supplied to the gate. It is comprised by the 5th transmission gate applied.

  The switching controller generates the positive data signal (D +) and the negative data signal (D−) according to the logic state of data to be transmitted by the transmitter and whether or not the transition is possible, and the first to fourth transmission gates 311, The transmission line to which the positive data current (I1) and the negative data current (I2) are supplied is selected by applying to the 312, 321, 322, and the equalization control signal is generated according to whether or not the data to be transmitted is transitionable Thus, the current value transmitted is stabilized by equalizing the potentials of the true line (TX +) and the bar line (TX-) by applying the fifth transmission gate.

  The first data current source (MM) is independently supplied to the true line (TX +) and the bar line (TX−) by the switching operation of the first selection switch 310 by the transmitter configured as described above. The second data current source (MN) is independently supplied to the bar line (TX−) and the true line (TX +) by the switching operation of the second selection switch 320. At this time, the differential current transmitted to the receiver through the transmission true line (TX +) and the bar line (TX−) is not affected by an additional current applied to the positive data current (I1). 3 and the negative data current (I2), it is determined independently by a difference between the data and the negative data current (I2), as shown in FIG.

  That is, the difference between the first data current source (MM) and the second data current source (MN), which are two current sources, even if a certain error occurs due to the design of the current source, the cause of the process and the cause of the test environment. The first data current source (MM) indicates an independent logic state according to the level of the positive data current (I1) so that the second data current is generated. The source (MN) can be seen by indicating another independent logic state by the level of the negative data current (I2), and the data to be sent by the transmitter is such an independent positive data current (I1). And the negative data current (I2) can be expressed by a logical state based on a difference in value.

  Next, a current drive type receiver using an independent current signal according to the present invention will be described.

  First, the current-driven receiver using the independent current signal receives the current flowing in the true line (TX +) in the transmission line pair as shown in FIG. 4 showing the first embodiment. A true line current mirror 500, a bar line current mirror 600 that receives a current flowing through the bar line (TX-), and a reception voltage corresponding to the current received by the true line current mirror 500 and the bar line current mirror 600. And a single amplifying unit 700 that amplifies the level of the received voltage.

  The true line current mirror 500 receives a positive data current (I1) and a negative data current (I2) transmitted from the transmitter through a true line (TX +) and generates a true line reception current (Irx +). A first input transistor (MI1) having one terminal and a gate connected to the true line (TX +), another terminal connected to a ground power source, and a gate connected to the gate of the first input transistor. One terminal is connected to a ground power source, and includes a first output transistor (MO1) that outputs a true line reception current (Irx +) that is mirrored through the other terminal.

  The bar line current mirror 600 receives a negative data current (I2) or a positive data current (I1) transmitted from the transmitter through a bar line (TX−), and receives a bar line reception current (Irx−). A second input transistor (MI2) having one terminal and a gate connected to the bar line (TX-) and the other terminal connected to a ground power source, and a gate connected to the second input transistor. And a second output transistor (MO2) that is connected to a ground power source and outputs a bar line received current (Irx-) that is mirrored through the other terminal.

  At this time, the true line current mirror 500 and the bar line current mirror 600 are configured such that the channel widths of the first and second output transistors are equal to the true line and the bar in order to realize optimum performance in a single IV converter described later. The first and second input transistor channel widths are formed to be approximately a multiple of the first and second input transistor channel widths (eg, 1: n) so that the currents transmitted on the line can be increased at a constant rate, respectively, and at a constant magnification. It is desirable to be configured to be mirrorable.

  The single IV converter 700 has a first resistor R1 connected at one end to a node to which the true line received current (Irx +) is supplied and a node to which the bar line received current (Irx−) is supplied. A second resistor (R2) having one end connected thereto, a current source (Is) commonly connected to the other ends of the first resistor and the second resistor, and a true line reception current (Irx +) by the current source And the bar line received current (Irx−) are simultaneously included in the true line received voltage corresponding to the received current and the power supply voltage (VDD) for generating the level of the bar line received voltage.

  Accordingly, the single IV converter 700 simultaneously converts the difference between the current levels generated by the true line current mirror 500 and the bar line current mirror 600 into a voltage level. By converting the current level to the voltage level through the converter, the error between the true line and the bar line can be reduced.

  The levels of the true line reception voltage and the bar line reception voltage, which are converted by the single IV converter 700 through the true line current mirror 500 and the bar line current mirror 600 and are input to the differential amplifier 900, are constant. A common voltage generator 800 may be further included to allow the differential amplifier to operate stably. As a result, a stable operating point can be maintained in the receiver, and the performance of the differential amplifier can be optimized. In this case, the common voltage generator 800 has a first terminal connected to the current source, and a second terminal connected to the true-line current mirror 500 and a connection node of the first resistor (R1). The third terminal is connected to the connection node of the bar line current mirror 600 and the second resistor (R2) and is connected to the inverting terminal of the differential amplifier 900.

  As described above, since the common voltage generator 800 can generate various common voltages, an existing low voltage differential signal (LVDS: Low) which is an interface standard for high-speed data transmission. The design information of the differential amplifier of the voltage differential signal (mini-voltage differential signal) method or the mini low voltage differential signal (m-LVDS) method can be used as it is.

  The differential amplifier 900 receives the true line reception voltage and the bar line reception voltage generated by the single IV converter at the non-inverting terminal and the inverting terminal, and amplifies the difference between the two voltages at a certain level. It is configured to recover the data transmitted from the transmitter.

  Next, as shown in FIG. 5 showing the second embodiment, the current-driven receiver using the independent current signal has a current flowing in the true line (TX +) in the transmission line pair. A single IV converter 710 that receives the current flowing through the bar line (TX−) and converts the level difference between the two currents into a voltage level at the same time, and a differential amplification unit converts the voltage level converted by the single IV converter. A common voltage generator 810 that makes the voltage level constant so that it can operate stably, and a non-inverting terminal and an inverting terminal that convert the voltage level generated by the single IV converter into a stable operating voltage. And a differential amplifier 910 that amplifies the difference between the two voltages and restores the data.

  That is, in the second embodiment, the true line received current (Irx +) and the bar line received current (Irx−) received from the transmission line pair without a separate current mirror are directly converted into voltage levels by the single IV converter 710. The differential amplifier 910 is configured to be supplied to the input terminal.

  Accordingly, the single IV converter 710 includes a third resistor (R3) having one end connected to the true line (TX +) in the transmission line pair and a fourth resistor having one end connected to the bar line (TX−). The resistor (R4) and a current source (Is) having one terminal connected in common to the other ends of the third resistor and the fourth resistor and the other terminal connected to a ground power source are configured. At this time, while the true line received current (Irx +) and the bar line received current (Irx−) simultaneously flow into one terminal of the third resistor and the fourth resistor, a current corresponding thereto flows in and out of the current source. The true line reception voltage and the bar line reception voltage corresponding to each reception current are generated.

  Also, the common voltage generator 810 makes the received voltage level converted by the fine received current directly received by the transmission line pair constant at a level that allows the receiver to operate stably. The first terminal is connected to the current source, the second terminal forms a common node with one terminal of the third resistor, and is connected to the non-inverting terminal of the differential amplifying unit 910. Forms a common node with one terminal of the fourth resistor and is connected to the inverting terminal of the differential amplifier 910.

  As described above, since the second embodiment does not use a separate current mirror that mirrors the reception current at a constant rate for stable operation, the current consumption can be significantly reduced. A stable operation in the device can be realized by maintaining the received voltage level after converting the received current constant by the common voltage generator.

  Next, an interface system for a COG application using a current-driven transmitter and receiver using an independent current signal according to the present invention will be described.

  As shown in FIG. 6, the interface system using the current-driven transmitter and receiver using the independent current signal is true line (TX +) while switching between the positive data current and the negative data current. And a transmitter which generates a differential current indicating a logical state of data to be transmitted, and is composed of the true line and the bar line and received by the transmitter. A transmission line for sending a positive data current and a negative data current, and a receiver for restoring the data by simultaneously converting the level difference between the true line received current and the bar line received current received in the true line and the bar line into a voltage level; It is comprised including.

  At this time, the transmitter generates a logical state of data to be transmitted by a differential current having a certain difference, and a first data current source that supplies a positive data current (I1) indicating one logical state; A second data current source for supplying a negative data current (I2) indicating another logic state, and a transmission line to which a positive data current and a negative data current are supplied according to a value of data to be transmitted. ) And a bar line (TX-), a selection switch that selects while switching, an equalization switch that equalizes the potential of the transmission line pair, and a switching controller that controls the switching operation according to the value of the data to be transmitted. Consists of.

  In addition, the receiver determines a current level difference between the true line received current (Irx +) received through the true line (TX +) and the bar line received current (Irx−) received through the bar line (TX−) as a single IV. A differential amplifying unit that directly converts the voltage level difference by the converter and receives and amplifies the converted voltage level difference may be included.

  That is, as shown in FIG. 6, the receiver receives a current flowing in the true line and generates a true line reception current (Irx +) and a current flowing in the bar line. A bar line current mirror that generates a bar line received current (Irx−), a single IV converter that directly converts a current level difference between the true line received current and the bar line received current by a voltage level difference, and a differential A common voltage generation unit that keeps the levels of the true line reception voltage and the bar line reception voltage converted by the converter constant so that the amplification unit can maintain a stable operating point, and the reception voltage thus converted A differential amplifying unit that receives and amplifies a voltage level to restore data can be configured.

  Further, as shown in FIG. 7, the receiver receives the current flowing through the true line (TX +) and the current flowing through the bar line (TX−), and simultaneously compares the level difference between the two currents to the voltage level. A single IV converter for converting to a single voltage converter, a common voltage generator for making the voltage level converted by the single IV converter constant at a voltage level at which the differential amplifier can stably operate, and a single A differential amplifying unit that receives and amplifies the voltage level converted into a stable operating voltage by the IV converter and restores the data can be configured.

At this time, the detailed description of the transmitter and the receiver will be omitted because they are the same as those described in the first and second embodiments of the current-driven transmitter and receiver using an independent current signal.

  The technical concept of the present invention has been described above with reference to the accompanying drawings. However, this is merely illustrative of a preferred embodiment of the present invention and does not limit the present invention. In addition, it is obvious that any person having ordinary knowledge in the technical field to which the present invention belongs can be variously modified and imitated without departing from the scope of the technical idea of the present invention.

100 First data current source 200 Second data current source 310 First selection switch 311 First transmission gate 312 Second transmission gate 320 Second selection switch 400 Equalization switch

Claims (13)

In a current-driven transmitter that sends the logic state of data by a differential current supplied through a transmission line pair made of true and bar lines,
A first data current source that independently generates and supplies a positive data current forming the differential current;
A second data current source that independently generates and supplies a negative data current forming the differential current;
A first selection switch that supplies a positive data current generated by the first data current source according to a logic state of data to be transmitted while switching between the true line and the bar line;
A second selection switch for supplying a negative data current generated by the second data current source while switching between the bar line and the true line;
An equalization switch connected between the true line and the bar line to equalize the potential by switching, and the first selection switch, the second selection switch, and the equalization depending on whether or not the data to be transmitted is transitionable A current-driven transmitter using an independent current signal, characterized by including a switching controller for controlling the switching operation of the switch. The first data current source is
As a current mirror that is connected to a first MOS transistor that supplies a reference current and independently generates a positive data current, one terminal is connected to a power supply voltage, the other terminal is connected to a first selection switch, and a gate Comprises a second MOS transistor connected to the gate of the first MOS transistor,
The second data current source is
As a current mirror connected to the first MOS transistor to independently generate a negative data current, one terminal is connected to a power supply voltage, the other terminal is connected to a second selection switch, and a gate is connected to the first MOS. 2. The current-driven transmitter using an independent current signal according to claim 1, comprising a third MOS transistor connected to the gate of the transistor. The first selection switch is
One terminal is commonly connected to the first data current source, a positive data signal and a negative data signal are applied to the gate, and the other one terminal is connected to the bar line and the true line, respectively. A first transmission gate and a second transmission gate that select a transmission line to which a current is supplied while switching;
The second selection switch is
One terminal is commonly connected to the second data current source, a positive data signal and a negative data signal are applied to the gate, and the other one terminal is connected to the true line and the bar line, respectively. 2. The current-driven transmitter using an independent current signal according to claim 1, comprising a third and a fourth transmission gate that select while switching a transmission line to which a current is supplied. The first transmission gate has one terminal connected to the first data current source, the other terminal connected to the bar line, a positive data signal applied to the gate of the NMOS transistor, and the gate of the PMOS transistor. Is configured to be applied with a negative data signal,
The second transmission gate has one terminal connected to the first data current source, the other terminal connected to the true line, a positive data signal applied to the gate of the PMOS transistor, and the gate of the NMOS transistor. Is configured to be applied with a negative data signal,
The third transmission gate has one terminal connected to the second data current source, the other terminal connected to the true line, a positive data signal applied to the gate of the NMOS transistor, and the gate of the PMOS transistor. Is configured to be applied with a negative data signal,
The fourth transmission gate has one terminal connected to the second data current source, the other terminal connected to the bar line, a positive data signal applied to the gate of the PMOS transistor, and a gate of the NMOS transistor. 4. The current-driven transmitter using an independent current signal according to claim 3, wherein a negative data signal is applied to the transmitter. In a current driven receiver that restores the logical state of data by receiving differential current with a transmission line pair made of true line and bar line,
A true line current mirror for receiving a current flowing through the true line and generating a true line received current;
A bar line current mirror that receives a current flowing through the bar line and generates a bar line received current;
A single IV converter that simultaneously converts a current level difference between the true line received current and the bar line received current at a voltage level corresponding thereto; and a differential amplifying unit that amplifies the converted received voltage;
The single IV converter
A first resistor having one end connected to the node to which the true line received current is supplied, a second resistor having one end connected to the node to which the bar line received current is supplied, and the first resistor and the second resistor. A current source commonly connected to the other end, a power supply voltage that generates a reception voltage level while a true-line reception current and a bar-line reception current flow in and out by the current source, and a first terminal is the current source The second terminal is connected to the true-line current mirror and the first resistor connection node and is connected to the non-inverting terminal of the differential amplifier, and the third terminal is connected to the bar-line current mirror and the second resistor. A current-driven receiver using an independent current signal, comprising a common voltage generator connected to a resistor connection node and connected to an inverting terminal of a differential amplifier. In a current driven receiver that restores the logical state of data by receiving differential current with a transmission line pair made of true line and bar line,
A third resistor having one end connected to the true line and receiving a true line reception current, a fourth resistor having one end connected to the bar line and receiving a bar line reception current, and one terminal having the first terminal A single IV converter commonly connected to the other ends of the third resistor and the fourth resistor and having a current source whose other terminal is connected to a ground power source; and a voltage converted by the single IV converter. look including a differential amplifier for amplifying receiving an input difference level in the non-inverting terminal inverting terminal,
The single IV converter
A first terminal is connected to the current source, a second terminal is connected to one terminal of the third resistor and a non-inverting terminal of the differential amplifier, and a third terminal is connected to the fourth resistor. A current-driven receiver using an independent current signal, further comprising a common voltage generation unit that forms a common node with one terminal and is connected to the inverting terminal of the differential amplification unit . In the interface system of the differential current drive system that sends the logical state of data by a differential current and receives it to restore the logical state of the data,
A first data current source that independently generates and supplies a positive data current forming a differential current; a second data current source that independently generates and supplies a negative data current; and a logic state of data to be transmitted A first selection switch for supplying the positive data current while switching between the true line and the bar line, and a second selection switch for supplying the negative data current while switching between the bar line and the true line. And an equalization switch connected between the true line and the bar line for switching and equalizing the potential of the transmission line, and a transmitter including a switching controller for controlling the switching operation,
A transmission line pair formed by a true line and a bar line for supplying a positive data current and a negative data current while the first and second selection switches are switched, and a true line reception current received by the true line and the bar line A differential current drive type interface system including a receiver that simultaneously converts the level difference of the received bar line received current into a voltage level to restore data. The first data current source is connected to a first MOS transistor that supplies a reference current and is a current mirror that independently generates a positive data current. One terminal is connected to a power supply voltage and the other terminal is a first one. A second switch transistor connected to a selection switch and having a gate connected to the gate of the first MOS transistor;
The second data current source is connected to the first MOS transistor as a current mirror that independently generates a negative data current. One terminal is connected to a power supply voltage and the other terminal is connected to a second selection switch. 8. The differential current drive type interface system according to claim 7 , wherein a gate is formed of a third MOS transistor connected to a gate of the first MOS transistor. The first selection switch has one terminal commonly connected to the first data current source, a positive data signal and a negative data signal applied to the gate, and another terminal connected to the bar line and the true line, respectively. The first and second transmission gates are connected to select the transmission line to which the positive data current is supplied while switching.
The second selection switch has one terminal commonly connected to the second data current source, a positive data signal and a negative data signal applied to the gate, and another terminal connected to the true line and the bar line, respectively. 8. The differential current drive type interface system according to claim 7 , further comprising third and fourth transmission gates that are connected to select a transmission line to which the negative data current is supplied while switching. . The receiver
A true line current mirror for receiving a current flowing through the true line and generating a true line received current;
A bar line current mirror that receives a current flowing through the bar line and generates a bar line received current;
A first resistor having one end connected to the node to which the true line received current is supplied, a second resistor having one end connected to the node to which the bar line received current is supplied, and the first resistor and the second resistor A single IV converter including a current source connected in common to the ends, and a power supply voltage that generates a level of a reception voltage while a true line reception current and a bar line reception current are flowing in and out by the current source; and 8. The differential current drive type interface system according to claim 7 , further comprising a differential amplifying unit that receives and amplifies a difference in received voltage level. The single IV converter
A first terminal is connected to the current source, a second terminal is connected to the true-line current mirror and a connection node of the first resistor and is connected to a non-inverting terminal of the differential amplifier, and a third terminal is The differential of claim 10 , further comprising a common voltage generator connected to a connection node of the bar line current mirror and the second resistor and connected to an inverting terminal of the differential amplifier. Current-driven interface system. The receiver
A third resistor having one end connected to the true line and receiving a true line received current, a fourth resistor having one end connected to the bar line and receiving a bar line received current, and one terminal having the third resistor A single IV converter connected in common to the other end of the resistor and the fourth resistor and having a current source whose other terminal is connected to a ground power source; and a voltage level converted by the single IV converter 8. The differential current drive type interface system according to claim 7 , further comprising a differential amplifier that receives and amplifies the difference between the non-inverting terminal and the inverting terminal. The single IV converter
A first terminal is connected to the current source, a second terminal is connected to one terminal of the third resistor and a non-inverting terminal of the differential amplifier, and a third terminal is connected to the fourth resistor. The differential current drive type interface system according to claim 12 , further comprising a common voltage generation unit that forms a common node with one terminal and is connected to an inverting terminal of the differential amplification unit.

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