JP5373669B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP5373669B2 JP5373669B2 JP2010049833A JP2010049833A JP5373669B2 JP 5373669 B2 JP5373669 B2 JP 5373669B2 JP 2010049833 A JP2010049833 A JP 2010049833A JP 2010049833 A JP2010049833 A JP 2010049833A JP 5373669 B2 JP5373669 B2 JP 5373669B2
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- polyimide film
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- 239000004065 semiconductor Substances 0.000 title claims description 45
- 238000004519 manufacturing process Methods 0.000 title claims description 14
- 239000007789 gas Substances 0.000 claims description 54
- 238000001020 plasma etching Methods 0.000 claims description 35
- 229920001721 polyimide Polymers 0.000 claims description 32
- 238000000034 method Methods 0.000 claims description 31
- 238000005530 etching Methods 0.000 claims description 18
- 239000000758 substrate Substances 0.000 claims description 13
- 229910052731 fluorine Inorganic materials 0.000 claims description 10
- 239000011737 fluorine Substances 0.000 claims description 10
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 claims description 9
- 239000004020 conductor Substances 0.000 claims description 8
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 claims description 6
- 229910001882 dioxygen Inorganic materials 0.000 claims description 6
- 229910052751 metal Inorganic materials 0.000 claims description 6
- 239000002184 metal Substances 0.000 claims description 6
- 238000006116 polymerization reaction Methods 0.000 claims description 5
- 238000007740 vapor deposition Methods 0.000 claims description 5
- 238000011049 filling Methods 0.000 claims description 4
- 239000011261 inert gas Substances 0.000 claims description 4
- 230000000149 penetrating effect Effects 0.000 claims description 3
- 238000009792 diffusion process Methods 0.000 description 7
- 239000003507 refrigerant Substances 0.000 description 7
- 238000000635 electron micrograph Methods 0.000 description 4
- 238000011068 loading method Methods 0.000 description 4
- 229920002120 photoresistant polymer Polymers 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- 230000010354 integration Effects 0.000 description 3
- 150000002500 ions Chemical class 0.000 description 3
- 239000002994 raw material Substances 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 239000006227 byproduct Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 239000000498 cooling water Substances 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- -1 fluorine ions Chemical class 0.000 description 1
- NBVXSUQYWXRMNV-UHFFFAOYSA-N fluoromethane Chemical compound FC NBVXSUQYWXRMNV-UHFFFAOYSA-N 0.000 description 1
- ANSXAPJVJOKRDJ-UHFFFAOYSA-N furo[3,4-f][2]benzofuran-1,3,5,7-tetrone Chemical compound C1=C2C(=O)OC(=O)C2=CC2=C1C(=O)OC2=O ANSXAPJVJOKRDJ-UHFFFAOYSA-N 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 239000000178 monomer Substances 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
- 238000011144 upstream manufacturing Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5226—Via connections in a multilevel interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
- H01L21/31138—Etching organic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Chemical & Material Sciences (AREA)
- Plasma & Fusion (AREA)
- Drying Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
エッチングガス:O2/Ar/CF4=20/200/100sccm
高周波電力(100MHz/13.56MHz):400W/600W
Claims (4)
- 基板にホールを形成するホール形成工程と、
前記ホール内にポリイミド膜を形成するポリイミド膜形成工程と、
前記基板を、前記ホール内の側壁部の前記ポリイミド膜を覆うマスクを使用せずに異方性エッチングして、前記ホール内の側壁部の前記ポリイミド膜を残したまま、前記ホール内の底部の前記ポリイミド膜の少なくとも一部を除去して貫通させるプラズマエッチング工程と、
前記ホール内に導体金属を充填する導体金属充填工程と
を具備し、
前記プラズマエッチング工程は、
前記基板を載置する載置台を兼ねた下部電極と、当該下部電極に対向するように配置された上部電極との間に高周波電力を印加するプラズマエッチング装置を用い、
フッ素を含むガスと不活性ガスと酸素ガスの混合ガスからなり前記フッ素を含むガスの流量が前記酸素ガスの流量より多いエッチングガスを使用し、
前記下部電極にイオン引き込み用のバイアスを印加した異方性エッチングにより行う
ことを特徴とする半導体装置の製造方法。 - 請求項1記載の半導体装置の製造方法であって、
前記フッ素を含むガスはCF4であり、不活性ガスはArである
ことを特徴とする半導体装置の製造方法。 - 請求項1又は2記載の半導体装置の製造方法であって、
前記下部電極に、第1高周波電力と、前記第1高周波電力より周波数の低いイオン引き込み用の第2高周波電力とを印加する
ことを特徴とする半導体装置の製造方法。 - 請求項1〜3いずれか1項記載の半導体装置の製造方法であって、
前記ポリイミド膜は、蒸着重合によって形成する
ことを特徴とする半導体装置の製造方法。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010049833A JP5373669B2 (ja) | 2010-03-05 | 2010-03-05 | 半導体装置の製造方法 |
KR1020127023268A KR101384589B1 (ko) | 2010-03-05 | 2011-03-04 | 반도체 장치의 제조 방법 |
US13/582,536 US8664117B2 (en) | 2010-03-05 | 2011-03-04 | Method for manufacturing semiconductor device using anisotropic etching |
PCT/JP2011/001280 WO2011108280A1 (ja) | 2010-03-05 | 2011-03-04 | 半導体装置の製造方法 |
CN201180012663.XA CN103155115B (zh) | 2010-03-05 | 2011-03-04 | 半导体装置的制造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010049833A JP5373669B2 (ja) | 2010-03-05 | 2010-03-05 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2011187583A JP2011187583A (ja) | 2011-09-22 |
JP5373669B2 true JP5373669B2 (ja) | 2013-12-18 |
Family
ID=44541949
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2010049833A Expired - Fee Related JP5373669B2 (ja) | 2010-03-05 | 2010-03-05 | 半導体装置の製造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US8664117B2 (ja) |
JP (1) | JP5373669B2 (ja) |
KR (1) | KR101384589B1 (ja) |
CN (1) | CN103155115B (ja) |
WO (1) | WO2011108280A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10297531B2 (en) | 2017-03-29 | 2019-05-21 | Toshiba Memory Corporation | Method for producing semiconductor device and semiconductor device |
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TWI529808B (zh) | 2010-06-10 | 2016-04-11 | Asm國際股份有限公司 | 使膜選擇性沈積於基板上的方法 |
US9112003B2 (en) | 2011-12-09 | 2015-08-18 | Asm International N.V. | Selective formation of metallic films on metallic surfaces |
JP5862459B2 (ja) * | 2012-05-28 | 2016-02-16 | 東京エレクトロン株式会社 | 成膜方法 |
JP5966618B2 (ja) * | 2012-05-28 | 2016-08-10 | 東京エレクトロン株式会社 | 成膜方法 |
TWI686499B (zh) | 2014-02-04 | 2020-03-01 | 荷蘭商Asm Ip控股公司 | 金屬、金屬氧化物與介電質的選擇性沉積 |
US10047435B2 (en) | 2014-04-16 | 2018-08-14 | Asm Ip Holding B.V. | Dual selective deposition |
CN105428306B (zh) * | 2014-09-04 | 2018-11-06 | 北京北方华创微电子装备有限公司 | 一种通孔底部阻挡层的刻蚀方法 |
CN104505366A (zh) * | 2014-10-21 | 2015-04-08 | 华天科技(昆山)电子有限公司 | 防止硅通深孔侧壁刻蚀的底部刻蚀方法 |
US9490145B2 (en) | 2015-02-23 | 2016-11-08 | Asm Ip Holding B.V. | Removal of surface passivation |
US10428421B2 (en) | 2015-08-03 | 2019-10-01 | Asm Ip Holding B.V. | Selective deposition on metal or metallic surfaces relative to dielectric surfaces |
US10566185B2 (en) | 2015-08-05 | 2020-02-18 | Asm Ip Holding B.V. | Selective deposition of aluminum and nitrogen containing material |
US10121699B2 (en) | 2015-08-05 | 2018-11-06 | Asm Ip Holding B.V. | Selective deposition of aluminum and nitrogen containing material |
US10343186B2 (en) | 2015-10-09 | 2019-07-09 | Asm Ip Holding B.V. | Vapor phase deposition of organic films |
US10695794B2 (en) | 2015-10-09 | 2020-06-30 | Asm Ip Holding B.V. | Vapor phase deposition of organic films |
US10814349B2 (en) | 2015-10-09 | 2020-10-27 | Asm Ip Holding B.V. | Vapor phase deposition of organic films |
US9981286B2 (en) | 2016-03-08 | 2018-05-29 | Asm Ip Holding B.V. | Selective formation of metal silicides |
US10204782B2 (en) | 2016-04-18 | 2019-02-12 | Imec Vzw | Combined anneal and selective deposition process |
WO2017184357A1 (en) | 2016-04-18 | 2017-10-26 | Asm Ip Holding B.V. | Method of forming a directed self-assembled layer on a substrate |
US11081342B2 (en) | 2016-05-05 | 2021-08-03 | Asm Ip Holding B.V. | Selective deposition using hydrophobic precursors |
US10373820B2 (en) | 2016-06-01 | 2019-08-06 | Asm Ip Holding B.V. | Deposition of organic films |
US10453701B2 (en) | 2016-06-01 | 2019-10-22 | Asm Ip Holding B.V. | Deposition of organic films |
US9803277B1 (en) | 2016-06-08 | 2017-10-31 | Asm Ip Holding B.V. | Reaction chamber passivation and selective deposition of metallic films |
US10014212B2 (en) | 2016-06-08 | 2018-07-03 | Asm Ip Holding B.V. | Selective deposition of metallic films |
US11430656B2 (en) | 2016-11-29 | 2022-08-30 | Asm Ip Holding B.V. | Deposition of oxide thin films |
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US11501965B2 (en) | 2017-05-05 | 2022-11-15 | Asm Ip Holding B.V. | Plasma enhanced deposition processes for controlled formation of metal oxide thin films |
KR102684628B1 (ko) | 2017-05-16 | 2024-07-15 | 에이에스엠 아이피 홀딩 비.브이. | 유전체 상에 옥사이드의 선택적 peald |
US10900120B2 (en) | 2017-07-14 | 2021-01-26 | Asm Ip Holding B.V. | Passivation against vapor deposition |
KR102487054B1 (ko) | 2017-11-28 | 2023-01-13 | 삼성전자주식회사 | 식각 방법 및 반도체 장치의 제조 방법 |
JP7146690B2 (ja) | 2018-05-02 | 2022-10-04 | エーエスエム アイピー ホールディング ビー.ブイ. | 堆積および除去を使用した選択的層形成 |
JP2020056104A (ja) | 2018-10-02 | 2020-04-09 | エーエスエム アイピー ホールディング ビー.ブイ. | 選択的パッシベーションおよび選択的堆積 |
US11965238B2 (en) | 2019-04-12 | 2024-04-23 | Asm Ip Holding B.V. | Selective deposition of metal oxides on metal surfaces |
US11139163B2 (en) | 2019-10-31 | 2021-10-05 | Asm Ip Holding B.V. | Selective deposition of SiOC thin films |
TW202140833A (zh) | 2020-03-30 | 2021-11-01 | 荷蘭商Asm Ip私人控股有限公司 | 相對於金屬表面在介電表面上之氧化矽的選擇性沉積 |
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JP2008153275A (ja) * | 2006-12-14 | 2008-07-03 | Canon Inc | 半導体基板およびその製造方法 |
US8614151B2 (en) * | 2008-01-04 | 2013-12-24 | Micron Technology, Inc. | Method of etching a high aspect ratio contact |
JP5213496B2 (ja) * | 2008-03-31 | 2013-06-19 | 東京エレクトロン株式会社 | プラズマエッチング方法及びコンピュータ読み取り可能な記憶媒体 |
-
2010
- 2010-03-05 JP JP2010049833A patent/JP5373669B2/ja not_active Expired - Fee Related
-
2011
- 2011-03-04 CN CN201180012663.XA patent/CN103155115B/zh not_active Expired - Fee Related
- 2011-03-04 WO PCT/JP2011/001280 patent/WO2011108280A1/ja active Application Filing
- 2011-03-04 US US13/582,536 patent/US8664117B2/en not_active Expired - Fee Related
- 2011-03-04 KR KR1020127023268A patent/KR101384589B1/ko active IP Right Grant
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10297531B2 (en) | 2017-03-29 | 2019-05-21 | Toshiba Memory Corporation | Method for producing semiconductor device and semiconductor device |
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US8664117B2 (en) | 2014-03-04 |
CN103155115A (zh) | 2013-06-12 |
WO2011108280A1 (ja) | 2011-09-09 |
JP2011187583A (ja) | 2011-09-22 |
US20130052821A1 (en) | 2013-02-28 |
KR20120120405A (ko) | 2012-11-01 |
CN103155115B (zh) | 2016-04-13 |
KR101384589B1 (ko) | 2014-04-11 |
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