JP5087424B2 - Semiconductor device and dimension measurement method thereof - Google Patents

Description

  The present invention relates to a semiconductor device and a dimension measuring method thereof, and more particularly to a semiconductor device having a TEG and a dimension measuring method for measuring a pattern dimension using the TEG.

  With recent miniaturization of semiconductor devices, demands for controllability of wiring dimensions and contact hole dimensions are increasing at an accelerated pace. In semiconductor device manufacturing process lines, by constantly measuring and managing dimensions, it is possible to prevent defective devices from flowing out and to detect abnormalities in manufacturing process equipment such as photolithography and etching at an early stage. It becomes possible. For example, in the gate, it can be said that the dimension width corresponds to the movement distance of electrons in the transistor. That is, the shorter the gate length, the faster the response speed of the transistor. The smaller the target dimension, the greater the effect on device characteristics for dimensional variations. In the contact hole, the dimensional variation greatly affects the wiring resistance. Therefore, it is necessary to tighten the management standard, and accuracy for measurement is also required.

  On the other hand, in the processing process, it is known that a difference in local CD (Critical Dimension) shift (a value obtained by subtracting the resist dimension value from the etching finished dimension value) occurs depending on the density of the resist pattern serving as a mask. Yes. For example, in the case of dry etching, as shown in FIG. 19, the aspect ratio of the dense pattern portion is larger than that of the coarse pattern portion, so that the side surface of the wiring material 31 under the resist 32 is etched from the etching atmosphere. This is caused by, for example, the incidence of the reaction product 33 on the surface and the amount of adhesion being suppressed. That is, when this is the cause, generally, as shown in FIG. 19, the CD shift is smaller in the pattern dense portion than in the pattern coarse portion.

  Since this local difference in CD shift affects device characteristics and wiring resistance, it is necessary to measure dimensions at both the dense pattern portion and the rough portion in order to manage this variation. However, a wide variety of products are manufactured on the production line, and the design dimensions and pattern density differ for each product type. For this reason, measuring only the actual device dimensions is not sufficient to manage the aging of the manufacturing process, which is one of the above-mentioned purposes.

  In order to solve this problem, it is effective to use a TEG (Test Element Group) for dimension management in which a common pattern is arranged (Patent Document 1). In this method, predetermined dimensions and pattern groups are designed and arranged in a gap outside the operation device area of each product type at the mask design stage. This makes it possible to measure dimensions under the same pattern conditions regardless of the type. As one type of the dimension management TEG, as shown in FIG. 20A, a pattern in which a plurality of linear patterns called line-and-space are arranged at an arbitrary interval may be used. The line and space pattern 21 is a TEG pattern assuming a dense pattern portion. In addition, by measuring an isolated pattern 22 as shown in FIG. 20B, it is possible to manage the CD shift difference with respect to the pattern density difference. In addition, as another type of dimension management TEG, as shown in FIG. 21A, a plurality of contact holes arranged at arbitrary intervals may be used. The contact hole pattern 101 is a TEG pattern that assumes a dense pattern portion. Apart from this, by measuring the isolated pattern 102 in which the contact holes are isolated as shown in FIG. 21B, it becomes possible to manage the CD shift difference with respect to the pattern density difference. .

  On the other hand, with the enhancement of automation functions in recent measuring apparatuses, it has become possible to automatically perform alignment of dimension measurement patterns without using humans. This is because the pattern recognition function has come to be used along with the improvement of the movement accuracy of the stage for moving the measurement position and the detection unit including the objective lens of the optical microscope and the CCD camera.

  This pattern recognition function will be described with reference to FIG. FIG. 22 is a diagram for explaining the pattern recognition operation when the measurement pattern is arranged in the measurement visual field of the measurement apparatus. In automatic measurement, a visual field is first moved to arbitrarily set measurement position coordinates on a stage on which a sample is placed according to a set automatic measurement sequence. Next, the pattern recognition function is activated, and a pattern registered in advance and a pattern in the field of view are collated. Then, the position of the matched pattern 15 matched by the collation is read. Next, a position separated by a preset X and Y distance is calculated from the detected position coordinates, and the measurement window 16 is arranged there. Next, edge detection is performed in the measurement window 16, and the distance between the edges obtained thereby is calculated. In this way, the measured dimension value of the target pattern can be obtained.

JP 2004-317793 A

  In pattern matching in the operation of this pattern recognition function, the following problems may occur. In order to perform pattern matching, it is necessary to register a model pattern for position detection corresponding to the pattern of the measurement position in advance. This model pattern needs to be registered in a range smaller than the measurement visual field so that no problem occurs even if a slight positional deviation occurs during the initial coordinate movement.

  Also, if the registration range is large, there is a high possibility that the collation determination will fail if the collation operation takes time or if there is an accidental foreign object. When measuring line and space or the like, there is no characteristic pattern in the measurement visual field 14, so that it is difficult to register a pattern for detecting an arbitrary specific position. That is, even if the model pattern is registered, a plurality of matching pattern 15 candidates that match the matching are generated in the measurement visual field 14 as shown in FIG. 23, so that it is difficult to measure the same position every time. Measuring different positions for each measurement will cause unintended variations in measured values, and the dimensions that should be managed cannot be obtained with high accuracy. As described above, the conventional semiconductor device has a problem in that it cannot accurately measure and manage the pattern dimensions of a plurality of products having various patterns.

  The present invention has been made to solve such problems, and an object thereof is to provide a semiconductor device capable of measuring and managing pattern dimensions with high accuracy, and a method for measuring the dimensions.

  A semiconductor device according to the present invention includes a device region and a TEG region provided outside the device region, and the TEGs provided in the TEG region are regularly arranged at a predetermined interval. Whether the plurality of reference patterns are formed in the same shape, and the unique pattern is formed in a shape different from the reference pattern. Alternatively, the arrangement relationship of the unique pattern with respect to the reference pattern is different from the arrangement between the reference patterns.

  A dimension measuring method according to the present invention is a dimension measuring method for measuring a pattern dimension in a semiconductor device including a device region and a TEG region provided outside the device region. A step of setting a substrate provided with a plurality of reference patterns regularly arranged at intervals and a peculiar pattern arranged in the vicinity of the reference pattern in the dimension measuring device; and a measurement visual field of the dimension measuring device A step of moving into the TEG region, a step of imaging the singular pattern and one or more of the reference patterns in the measurement field of view, and a pattern recognition process on the imaging result to match a pre-registered model pattern Recognizing the matching pattern, measuring the pattern dimension at a measurement position corresponding to the position of the matching pattern, It is as it has.

  ADVANTAGE OF THE INVENTION According to this invention, the semiconductor device which can measure and manage a pattern dimension accurately and its dimension measuring method can be provided.

Embodiment 1 of the Invention
First, the semiconductor device according to the present embodiment will be described with reference to FIG. In this embodiment, a TFT array substrate of a liquid crystal display device will be described as an example of a semiconductor device. FIG. 1 is a front view showing a configuration of a thin film transistor (TFT) array substrate used in a liquid crystal display device.

  The liquid crystal display device according to the present embodiment has a substrate 1. The substrate 1 is, for example, an array substrate such as a TFT array substrate. As the substrate 1, a transparent substrate such as a glass substrate 1 can be used. The substrate 1 is provided with a display area 41 and a frame area 42 provided so as to surround the display area 41. In the display area 41, a plurality of gate lines (scanning signal lines) 43 and a plurality of source lines (display signal lines) 44 are formed. The plurality of gate wirings 43 are provided in parallel. Similarly, the plurality of source lines 44 are provided in parallel. The gate wiring 43 and the source wiring 44 are formed so as to cross each other. The gate wiring 43 and the source wiring 44 are orthogonal to each other. A plurality of common wirings 6 are formed in the display area 41. The plurality of common wirings 6 are provided in parallel. The common wiring 6 is disposed between the adjacent gate wirings 43. The common wiring 6 and the gate wiring 43 are disposed so as to be substantially parallel to each other. A region surrounded by the adjacent gate wiring 43 and source wiring 44 is a pixel 47. Therefore, on the substrate 1, the pixels 47 are arranged in a matrix.

  A scanning signal driving circuit 45 and a display signal driving circuit 46 are provided in the frame region 42 of the substrate 1. The gate line 43 extends from the display area 41 to the frame area 42 and is connected to the scanning signal drive circuit 45 at the end of the substrate 1. Similarly, the source line 44 extends from the display area 41 to the frame area 42 and is connected to the display signal drive circuit 46 at the end of the substrate 1. An external wiring 48 is connected in the vicinity of the scanning signal driving circuit 45. In addition, an external wiring 49 is connected in the vicinity of the display signal driving circuit 46. The external wirings 48 and 49 are wiring boards such as FPC (Flexible Printed Circuit).

  Various external signals are supplied to the scanning signal driving circuit 45 and the display signal driving circuit 46 via the external wirings 48 and 49. The scanning signal driving circuit 45 supplies a gate signal (scanning signal) to the gate wiring 43 based on an external control signal. The gate wiring 43 is sequentially selected by this gate signal. The display signal driving circuit 46 supplies a display signal to the source wiring 44 based on an external control signal or display data. As a result, a display voltage corresponding to the display data can be supplied to each pixel 47.

  In the pixel 47, at least one TFT 50 is formed. The TFT 50 is disposed near the intersection of the source wiring 44 and the gate wiring 43. For example, the TFT 50 supplies a display voltage to the pixel electrode. That is, the TFT 50 which is a switching element is turned on by a gate signal from the gate wiring 43. Thereby, a display voltage is applied from the source wiring 44 to the comb-shaped pixel electrode connected to the drain electrode of the TFT 50. Further, the pixel electrode is disposed so as to face the comb-shaped common electrode (counter electrode). A lateral electric field corresponding to the display voltage is generated between the pixel electrode and the counter electrode. An alignment film (not shown) is formed on the surface of the substrate 1. Further, the pixel 47 is provided with a storage capacitor 23 including a pixel electrode and the common wiring 6.

  Furthermore, a counter substrate is disposed opposite to the substrate 1. The counter substrate is, for example, a color filter substrate, and is disposed on the viewing side. A color filter, a black matrix (BM), an alignment film, and the like are formed on the counter substrate. A liquid crystal layer is sandwiched between the substrate 1 and the counter substrate. That is, liquid crystal is introduced between the substrate 1 and the counter substrate. Furthermore, a polarizing plate, a phase difference plate, and the like are provided on the outer surfaces of the substrate 1 and the counter substrate. A backlight unit or the like is disposed on the non-viewing side of the liquid crystal display panel.

  The liquid crystal is driven by a lateral electric field between the pixel electrode and the counter electrode. That is, the alignment direction of the liquid crystal between the substrates changes. As a result, the polarization state of the light passing through the liquid crystal layer changes. That is, the polarization state of light that has been linearly polarized after passing through the polarizing plate is changed by the liquid crystal layer. Specifically, light from the backlight unit becomes linearly polarized light by the polarizing plate on the array substrate side. As the linearly polarized light passes through the liquid crystal layer, the polarization state changes.

  The amount of light passing through the polarizing plate on the counter substrate side varies depending on the polarization state. That is, the amount of light that passes through the polarizing plate on the viewing side among the transmitted light that passes through the liquid crystal display panel from the backlight unit changes. The alignment direction of the liquid crystal changes depending on the applied display voltage. Therefore, the amount of light passing through the viewing-side polarizing plate can be changed by controlling the display voltage. That is, a desired image can be displayed by changing the display voltage for each pixel.

  Further, the TEG region 10 is provided in the frame region 42 of the substrate 1. That is, the TEG region 10 is disposed outside the display region 41 which is a device region where the TFT 50 is formed. In FIG. 1, the TEG region 10 is formed at one location on the substrate 1, but the TEG region 10 may be formed at two or more locations.

  Next, the configuration of the TEG region 10 will be described with reference to FIG. FIG. 2 is a plan view showing a TEG group provided in the TEG region 10. As shown in FIG. 2, a line and space pattern 21 that is a dimension measuring TEG is formed in the TEG region 10. A plurality of line and space patterns 21 are formed. Here, an example in which six line and space patterns 21 are formed is shown. Specifically, 3 × 2 line and space patterns 21 are arranged. Different line and space patterns 21 have different line pattern densities. That is, in the different line and space patterns 21, the interval and width of the line patterns are different.

  In addition to the line and space pattern 21, an isolated pattern 22 that is a dimension measuring TEG is provided in the TEG region 10. The isolated patterns 22 are arranged between the line and space patterns 21 arranged in the vertical direction. The isolated pattern 22 is arranged sufficiently separated from the line and space pattern 21 so as to be isolated from other patterns. Therefore, when the isolated pattern 22 is imaged by the camera of the dimension measuring device, the other line patterns do not enter the measurement visual field.

  As described above, the TEG region 10 has a collective pattern including TEGs having different dimensions and isolated patterns TEG. By setting it as such a pattern structure, a pattern dimension can be measured and managed to any of a pattern dense part and a pattern rough part. In FIG. 2, the TEG group includes six line and space patterns 21 and six isolated patterns 22, but the number of TEGs included in the TEG group is not limited to this. In addition to managing the CD shift for a plurality of dimensions and a plurality of pattern densities by arranging TEG regions 10 as shown in FIG. It becomes possible to manage at the same time.

  The configuration of the line and space pattern 21 will be described with reference to FIG. 3A is a plan view showing the configuration of the line and space pattern 21, and FIG. 3B is a diagram showing an example of a pattern recognition model pattern 17 registered in the dimension measuring apparatus. In FIG. 3A, the X direction and the Y direction are directions orthogonal to each other, for example, a direction parallel to the edge of the substrate 1. One line and space pattern 21 is provided with five line (straight line) patterns. Of course, the number of line patterns is not limited to this. Each line pattern is formed in a rectangular shape whose longitudinal direction is the Y direction. The line and space pattern 21 which is the dimension measuring TEG in FIG. 3A has line / space = 5/5 μm. That is, the width of the line pattern in the X direction is 5 μm. The width of the line pattern is, for example, a measurement target dimension. Adjacent line patterns are arranged 5 μm apart. That is, the width of the space between adjacent line patterns is 5 μm. As shown in FIG. 3A, line patterns and space patterns are alternately arranged. That is, the line pattern is repeatedly arranged in the X direction. The plurality of line patterns are arranged with the same pitch and the same width. The line patterns are arranged with a constant interval and a constant width within a range of 50 times the dimension width of the measurement target dimension.

  As shown in FIG. 3A, one of the five line patterns has a longer length, and the other four line patterns have the same length. Here, a line pattern that is long in the Y direction is referred to as a peculiar pattern 13, and other line patterns having the same length are referred to as a reference pattern 12. That is, the unique pattern 13 is formed by changing the length of the line pattern from another line pattern. In the Y direction, the end of the unique pattern 13 protrudes on both sides of the end of the reference pattern 12. Further, the positions of the four reference patterns 12 in the Y direction are the same position. That is, in the Y direction, the positions of the ends of the four reference patterns 12 coincide on both sides. Here, the central line pattern is the unique pattern 13, but the position of the unique pattern 13 is not limited to this.

  Dimension measurement is performed using the line and space pattern 21 as described above. Here, the measurement visual field 14 of the dimension measuring apparatus is 40 μm □, and the size of the pattern recognition model pattern 17 is 12 μm □. That is, a pattern included in a square measurement visual field 14 having a side of 40 μm is imaged by a CCD camera or the like of a dimension measuring device. The measurement visual field 14 is preferably larger than the width of the line pattern as the measurement target dimension and 50 times or less. The measurement visual field 14 includes a reference pattern 12 and a unique pattern 13. That is, the unique pattern 13 is arranged in the vicinity of the reference pattern 12 so that the unique pattern 13 and the reference pattern 12 are included in the same measurement visual field 14. The pattern recognition model pattern 17 is preferably smaller than the measurement visual field 14.

  Here, as shown in FIG. 3B, the pattern recognition model pattern 17 is set to a shape including the corners of the unique pattern 13a and the corners of the reference pattern 12a. More specifically, the shape is set such that the upper left corner of the unique pattern 13 a and the upper right corner of the reference pattern 12 a are included in the pattern recognition model pattern 17. In the pattern recognition model pattern 17, the positions of the two corners in the Y direction are shifted. Since the end positions of the reference pattern 12 other than the unique pattern 13 coincide with each other, there is only one such pattern in the line and space pattern 21. That is, the reference patterns 12 other than the unique pattern 13 have the same length and are arranged at the same position in the Y direction. For this reason, the position of the end of the reference pattern 12 in the Y direction is not shifted. In the dimension measurement TEG pattern displayed in the measurement visual field 14, a matching pattern 15 that matches the pattern recognition model pattern is generated by pattern recognition. Such a pattern recognition model pattern 17 is stored in advance in the processing unit of the dimension measuring apparatus.

  When pattern recognition processing (pattern matching operation) is performed, a matching pattern 15 that matches the pattern recognition model pattern 17 is recognized in the measurement visual field 14. Therefore, by registering the pattern recognition model pattern 17 shown in FIG. 3B in advance, the position in the line and space pattern 21 can be specified. That is, there is only one matching pattern 15 that matches the pattern recognition model pattern 17 in the measurement visual field 14. For this reason, the position of the matching pattern 15 can be reliably specified by pattern recognition.

  Based on the position of the matching pattern 15 that matches the pattern recognition model pattern 17, the dimension at an arbitrary measurement position can be measured. In other words, an arbitrary measurement position can be calculated from the X and Y coordinate distances of the coordinates based on the position of the matching pattern 15. For example, a position shifted from the matching pattern 15 by X and Y coordinate distances set in advance in the X and Y directions is the measurement position. Therefore, it becomes possible to measure a desired measurement position with good reproducibility. Specifically, the measurement window 16 is arranged at a position away from the matching pattern 15 by a predetermined X and Y distance. The edge detection function works in the measurement window 16 in the measurement visual field 14 to detect the coordinates of the edge of the line pattern. Here, the width of the line pattern is measured by the unique pattern 13. Edge detection is performed in the measurement window 16, and the distance between the edges obtained thereby is calculated. Thereby, the width dimension of the line pattern can be measured.

The pattern dimensions, the measurement visual field 14 and the size of the pattern recognition model pattern 17 are merely examples, and are not limited to the above values. The measurement target dimension is not limited to 1/50 or more of the measurement visual field, and the size of the pattern recognition model pattern 17 is smaller than the measurement visual field. In addition, the material of the line pattern is not particularly limited, and metal films such as Al, Mo, and Ti, alloy films including these, transparent conductive films such as ITO and IZO, and semiconductor films such as Si Alternatively, the reference pattern 12 and the specific pattern 13 can be formed using an insulating film such as SiO ₂ , SiN, TEOS, or an organic film such as a resist that serves as a mask material for processing these. Of course, the reference pattern 12 and the unique pattern 13 may be formed using any material other than the above.

  In this way, the TEG having the reference pattern 12 and the unique pattern 13 is formed. In the actual dimension measuring method, first, the substrate 1 provided with the TEG region 10 is set in a dimension measuring apparatus. That is, the substrate 1 is placed on the stage of the dimension measuring apparatus. Then, the measurement visual field 14 of the camera provided in the dimension measuring apparatus is moved into the TEG region 10. For example, in the case of a dimension measuring apparatus using an optical microscope, a detection unit such as a CCD camera or a stage is moved to move the measurement visual field 14 to a predetermined position in the TEG region 10. Thereby, the measurement visual field 14 moves to the position shown in FIG. By making the pattern recognition model pattern 17 smaller than the measurement visual field 14, the matching pattern 15 is included in the measurement visual field 14 even if a slight positional deviation occurs during the initial coordinate movement.

  In this state, the unique pattern 13 and the one or more reference patterns 12 are imaged by the CCD camera. At this time, a matching pattern 15 is included in the measurement visual field 14. Pattern recognition processing is performed on the imaging result of the camera, and the matching pattern 15 that matches the pattern recognition model pattern 17 registered in advance is recognized. That is, the matching pattern 15 that matches the pattern recognition model pattern 17 is collated in the image acquired by the CCD camera. As a result, the position (coordinates) of the matching pattern 15 in the measurement visual field 14 is determined. The position of the matching pattern 15 can be specified reliably. Then, the pattern dimension is measured at the measurement position corresponding to the recognized position of the matching pattern 15. For example, the measurement window 16 is arranged at a position shifted from the matching pattern 15 by a predetermined distance. Using this measurement window 16, edge detection is performed on both sides of the line pattern, and the pattern width is measured. Then, dimension measurement is performed on different substrates 1 in the same procedure.

  This makes it possible to measure a desired measurement position with good reproducibility. Even with different substrates 1, the measurement positions in the TEG region 10 can be matched. That is, the dimension measurement can be performed at the same position every time. Thereby, the dispersion | variation in the measured value which arises by measuring a different position can be suppressed. Furthermore, the size of the pattern recognition model pattern 17 can be set to a suitable size. For example, the registration range to be registered as the pattern recognition model pattern 17 can be reduced, and the verification operation time can be shortened. Furthermore, even if there is an accidental foreign object, since the registration range is small, it is possible to prevent the verification determination from failing. Therefore, productivity can be improved. By using the dimension measuring method according to the present embodiment, the dimensions of a plurality of products having various patterns can be measured with high accuracy under the same conditions as much as possible, and the pattern dimensions are accurately measured and managed. be able to. In the above description, the pattern dimension of the substrate 1 used in the liquid crystal display device is measured. However, the pattern dimension formed on a display device other than the liquid crystal display device, an Si wafer, or the like may be measured. Thus, the above-described dimension measuring method is suitable for a semiconductor device manufacturing line that manages minute dimensions.

Embodiment 2 of the Invention
The semiconductor device according to this embodiment will be described with reference to FIG. Since the basic configuration of the semiconductor device according to the present embodiment is the same as that of the semiconductor device of the first embodiment, the description of the same contents is omitted. Further, since the basic configuration of the dimension measuring TEG is the same as that of the first embodiment, the description of the same contents is omitted. In the present embodiment, a line and space pattern 21 which is a dimension measuring TEG is different from the first embodiment. FIG. 4 is a plan view showing the configuration of the line and space pattern 21.

  In the present embodiment, the line and space pattern 21 has the reference pattern 12 and the unique pattern 13 having a length different from that of the reference pattern 12 as in the first embodiment. That is, the unique pattern 13 is provided by changing the length of an arbitrary reference pattern among the plurality of reference patterns 12 arranged. However, in the present embodiment, as shown in FIG. 4, the unique pattern 13 is shorter than the reference pattern. That is, the unique pattern 13 is formed by shortening one of the line patterns. Since the dimension in the Y direction of the unique pattern 13 is shorter than that of the reference pattern 12, the position of the end of the specific pattern 13 is shifted from the position of the end of the reference pattern 12. As a result, a matching pattern 15 that matches the pattern recognition model pattern is generated by pattern recognition in the dimension measurement TEG pattern displayed in the measurement visual field 14. Therefore, the position of the matching pattern 15 can be specified. Based on the position of the matching pattern 15, an arbitrary measurement position can be calculated from the X and Y coordinate distances of coordinates, and a desired measurement position can be measured with good reproducibility. Therefore, the same effect as in the first embodiment can be obtained.

Embodiment 3 of the Invention
The semiconductor device according to this embodiment will be described with reference to FIG. Since the basic configuration of the semiconductor device according to the present embodiment is the same as that of the semiconductor device of the first embodiment, the description of the same contents is omitted. Further, since the basic configuration of the dimension measuring TEG is the same as that of the first embodiment, the description of the same contents is omitted. In the present embodiment, a line and space pattern 21 which is a dimension measuring TEG is different from the first embodiment. FIG. 5 is a plan view showing the configuration of the TEG.

  In the present embodiment, all the line patterns have the same shape, and the positions in the Y direction match. That is, five reference patterns 12 are repeatedly arranged. The position of the reference pattern in the Y direction is the same on both sides. In the present embodiment, the unique pattern 13 is formed in the vicinity of the reference pattern 12. That is, the island-like unique pattern 13 is provided at a position away from the plurality of arranged reference patterns 12 in the Y direction. The unique pattern 13 is disposed on both outer sides of the reference pattern 12 in the Y direction. The unique pattern 13 is formed in a rectangular shape whose longitudinal direction is the X direction. The unique pattern 13 is arranged away from the reference pattern 12. The unique pattern 13 is not limited to a position away from the plurality of arranged reference patterns 12 in the Y direction, and can be provided at a position away from an arbitrary direction.

  Here, the pattern recognition model pattern is set to a shape including, for example, the lower left corner of the singular pattern 13, the upper right corner of the second reference pattern 12 from the left, and the upper left corner of the adjacent reference pattern 12. To do. As a result, a matching pattern 15 that matches the pattern recognition model pattern is generated by pattern recognition in the dimension measurement TEG pattern displayed in the measurement visual field 14. Therefore, the position of the matching pattern 15 can be specified. Based on the position of the matching pattern 15, an arbitrary measurement position can be calculated from the X and Y coordinate distances of coordinates, and a desired measurement position can be measured with good reproducibility. Therefore, the same effect as in the first embodiment can be obtained.

Embodiment 4 of the Invention
The semiconductor device according to this embodiment will be described with reference to FIG. Since the basic configuration of the semiconductor device according to the present embodiment is the same as that of the semiconductor device of the first embodiment, the description of the same contents is omitted. Further, since the basic configuration of the dimension measuring TEG is the same as that of the first embodiment, the description of the same contents is omitted. In the present embodiment, a line and space pattern 21 which is a dimension measuring TEG is different from the first embodiment. FIG. 6 is a plan view showing the configuration of the line and space pattern 21.

  In the present embodiment, all the line patterns have the same width, but the specific pattern 13 is formed by dividing one line pattern in the middle thereof. Therefore, as shown in FIG. 6, the second line pattern from the left is divided into a unique pattern 13. Accordingly, the two unique patterns 13 are arranged side by side in the Y direction. A unique pattern 13 is provided by dividing an arbitrary reference pattern 12 among a plurality of reference patterns 12 arranged in a plurality.

  Here, the pattern pattern for pattern recognition has a shape that includes the lower end of the divided upper specific pattern 13 and the upper end of the lower specific pattern 13. As a result, a matching pattern 15 that matches the pattern recognition model pattern is generated by pattern recognition in the dimension measurement TEG pattern displayed in the measurement visual field 14. Therefore, the position of the matching pattern 15 can be specified. Based on the position of the matching pattern 15, an arbitrary measurement position can be calculated from the X and Y coordinate distances of coordinates, and a desired measurement position can be measured with good reproducibility. Therefore, the same effect as in the first embodiment can be obtained.

Embodiment 5 of the Invention
The semiconductor device according to this embodiment will be described with reference to FIG. Since the basic configuration of the semiconductor device according to the present embodiment is the same as that of the semiconductor device of the first embodiment, the description of the same contents is omitted. Further, since the basic configuration of the dimension measuring TEG is the same as that of the first embodiment, the description of the same contents is omitted. In the present embodiment, a line and space pattern 21 which is a dimension measuring TEG is different from the first embodiment. FIG. 7 is a plan view showing the configuration of the line and space pattern 21.

  In the present embodiment, all line patterns have the same width, but the unique pattern 13 is provided between adjacent line patterns. Two adjacent reference patterns 12 are connected by a unique pattern 13. Here, two reference patterns 12 and one unique pattern are integrally formed in an H shape. The unique pattern 13 is extended from the reference pattern 12.

  The pattern recognition model pattern is set in a shape that includes all of the unique pattern 13 and part of the two reference patterns 12. As a result, a matching pattern 15 that matches the pattern recognition model pattern is generated by pattern recognition in the dimension measurement TEG pattern displayed in the measurement visual field 14. Therefore, the position of the matching pattern 15 can be specified. Based on the position of the matching pattern 15, an arbitrary measurement position can be calculated from the X and Y coordinate distances of coordinates, and a desired measurement position can be measured with good reproducibility. Therefore, the same effect as in the first embodiment can be obtained.

Embodiment 6 of the Invention
The semiconductor device according to this embodiment will be described with reference to FIG. Since the basic configuration of the semiconductor device according to the present embodiment is the same as that of the semiconductor device of the first embodiment, the description of the same contents is omitted. Further, since the basic configuration of the dimension measuring TEG is the same as that of the first embodiment, the description of the same contents is omitted. In the present embodiment, a line and space pattern 21 which is a dimension measuring TEG is different from the first embodiment. FIG. 8 is a plan view showing the configuration of the line and space pattern 21.

  In the present embodiment, all the line patterns have the same shape, but the position in the Y direction is different by only one line pattern. That is, five line patterns having the same shape are arranged, but only one is shifted in the + Y direction. The line pattern shifted in the Y direction becomes the unique pattern 13. The position of the end of the unique pattern 13 in the Y direction is different from the position of the end of the reference pattern 12. Therefore, the arrangement relationship of the unique pattern 13 with respect to the reference pattern is different from the arrangement between the reference patterns 12.

  The pattern recognition model pattern is shaped to include the corners of the unique pattern 13 and the corners of the reference pattern 12. As a result, a matching pattern 15 that matches the pattern recognition model pattern is generated by pattern recognition in the dimension measurement TEG pattern displayed in the measurement visual field 14. Therefore, the position of the matching pattern 15 can be specified. Based on the position of the matching pattern 15, an arbitrary measurement position can be calculated from the X and Y coordinate distances of coordinates, and a desired measurement position can be measured with good reproducibility. Therefore, the same effect as in the first embodiment can be obtained.

Embodiment 7 of the Invention
The semiconductor device according to this embodiment will be described with reference to FIG. Since the basic configuration of the semiconductor device according to the present embodiment is the same as that of the semiconductor device of the first embodiment, the description of the same contents is omitted. In the first embodiment, the case where the line and space pattern is applied to the dimension measuring TEG has been described. In the present embodiment, the case where the contact hole pattern is applied to the dimension measuring TEG will be described. FIG. 9 is a plan view showing a TEG group provided in the TEG region 10.

  As shown in FIG. 9, a contact hole pattern 101 which is a dimension measuring TEG is formed in the TEG region 10. A plurality of contact hole patterns 101 are formed. Here, an example in which six contact hole patterns 101 are formed is shown. Specifically, a contact hole pattern 101 of 3 × 2 is arranged. Different contact hole patterns 101 have different contact hole densities. That is, in the different contact hole patterns 101, the intervals and dimensions of the contact holes are different.

  In addition to the contact hole pattern 101, an isolated pattern 102 that is a dimension measuring TEG is provided in the TEG region 10. The isolated pattern 102 is disposed between the contact hole patterns 101 arranged in the vertical direction. The isolated pattern 102 is disposed sufficiently apart from the contact hole pattern 101 so as to be isolated from other patterns. Therefore, when the isolated pattern 102 is imaged with the camera of the dimension measuring apparatus, the other contact holes do not enter the measurement visual field.

  As described above, the TEG region 10 has a collective pattern including TEGs having different dimensions and isolated patterns TEG. By adopting such a pattern configuration, the contact hole dimension can be measured and managed for both the dense pattern portion and the coarse pattern portion. In FIG. 9, the TEG group includes six contact hole patterns 101 and six isolated patterns 102. However, the number of TEGs included in the TEG group is not limited to this. Further, by arranging the TEG regions 10 as shown in FIG. 9 at a plurality of locations in the surface of the substrate 1, in addition to managing the CD shift with respect to a plurality of dimensions and a plurality of contact hole densities, the variation in the surface of the substrate 1 Can be managed simultaneously.

  The configuration of the contact hole pattern 101 will be described with reference to FIG. FIG. 10A is a plan view showing the configuration of the contact hole pattern 101, and FIG. 10B is a diagram showing an example of a pattern recognition model pattern 17 registered in the dimension measuring apparatus. In FIG. 10A, the X direction and the Y direction are directions orthogonal to each other, for example, a direction parallel to the edge of the substrate 1. One contact hole pattern 101 is provided with 27 hole patterns (contact holes). Of course, the number of hole patterns is not limited to this. Each hole pattern is formed in a circular shape here, for example. The contact hole pattern 101 which is the TEG for dimension measurement in FIG. 10A has a hole / space = 5/5 μm. That is, a hole pattern having a diameter of 5 μm is formed. Therefore, the width of the hole pattern in the X direction and the Y direction is 5 μm. The width of the hole pattern is, for example, a measurement target dimension. Adjacent hole patterns are arranged 5 μm apart. That is, the width of the space between the hole patterns adjacent in the X direction or the Y direction is 5 μm. As shown in FIG. 10A, hole patterns and space patterns are alternately arranged. That is, the hole patterns are repeatedly arranged in the X direction and the Y direction, respectively. The plurality of hole patterns are arranged with the same pitch and the same dimensions. Within the range of 50 times the dimension width of the measurement target dimension, the hole patterns are arranged at regular intervals and at regular dimensions.

  As shown in FIG. 10A, of the 27 hole patterns, 25 hole patterns are arranged in a matrix and constitute a hole pattern arrangement group. Here, 25 hole patterns are arranged in 5 × 5. The remaining two hole patterns are arranged isolated from the hole pattern arrangement group. Here, the hole patterns arranged in a matrix in these groups are referred to as a reference pattern 12, and other isolated hole patterns are referred to as unique patterns 13. That is, a plurality of reference patterns 12 are regularly arranged at a predetermined interval to form a hole pattern arrangement group. A unique pattern 13 is formed by providing a hole pattern arbitrarily isolated from the hole pattern arrangement group in the vicinity of the reference pattern 12. The unique pattern 13 is arranged outside the reference pattern 12 provided on the outermost periphery of the hole pattern arrangement group. That is, the unique pattern 13 having the same shape as the reference pattern 12 is provided at a position away from the arrangement group of the reference patterns 12 in an arbitrary direction. Here, for example, the unique pattern 13 is arranged on both outer sides of the reference pattern 12 arrangement group in the Y direction. The unique pattern 13 is arranged away from the reference pattern 12 arrangement group. Here, the singular pattern 13 is arranged on the extension line of the central row of the reference pattern 12 arrangement group, but the position of the singular pattern 13 is not limited to this. The arrangement relationship of the unique pattern 3 with respect to the reference pattern 12 only needs to be different from the arrangement between the reference patterns 12.

  Dimension measurement is performed using the contact hole pattern 101 as described above. Here, the measurement visual field 14 of the dimension measuring apparatus is 40 μm □, and the size of the pattern recognition model pattern 17 is 12 μm □. That is, a pattern included in a square measurement visual field 14 having a side of 40 μm is imaged by a CCD camera or the like of a dimension measuring device. The measurement visual field 14 is preferably larger than the dimension of the hole pattern, which is the dimension to be measured, and 50 times or less. The measurement visual field 14 includes a reference pattern 12 and a unique pattern 13. That is, the unique pattern 13 is arranged in the vicinity of the reference pattern 12 so that the unique pattern 13 and the reference pattern 12 are included in the same measurement visual field 14. The pattern recognition model pattern 17 is preferably smaller than the measurement visual field 14.

  Here, as shown in FIG. 10B, the pattern recognition model pattern 17 is set to a shape including a part of the unique pattern 13a and a part of the reference patterns 12a and 12b. More specifically, the pattern recognition model pattern 17 includes a part on the upper right side of the reference pattern 12a, a part on the upper left side of the reference pattern 12b, and a part on the lower left side of the unique pattern 13a. Set to shape. Since the reference patterns 12 other than the unique pattern 13 are arranged in a matrix, there is only one such pattern in the contact hole pattern 101. That is, when only the reference pattern 12 is included in the pattern recognition model pattern 17 without including the specific pattern 13, one, two, or four hole patterns are included. Therefore, it is not possible to include three hole patterns in the pattern recognition model pattern 17 using only the reference pattern 12 as described above. In the dimension measurement TEG pattern displayed in the measurement visual field 14, a matching pattern 15 that matches the pattern recognition model pattern is generated by pattern recognition. Such a pattern recognition model pattern 17 is stored in advance in the processing unit of the dimension measuring apparatus.

  When pattern recognition processing (pattern matching operation) is performed, a matching pattern 15 that matches the pattern recognition model pattern 17 is recognized in the measurement visual field 14. Therefore, by registering the pattern recognition model pattern 17 shown in FIG. 10B in advance, the position in the contact hole pattern 101 can be specified. That is, there is only one matching pattern 15 that matches the pattern recognition model pattern 17 in the measurement visual field 14. For this reason, the position of the matching pattern 15 can be reliably specified by pattern recognition.

  Based on the position of the matching pattern 15 that matches the pattern recognition model pattern 17, the dimension at an arbitrary measurement position can be measured. In other words, an arbitrary measurement position can be calculated from the X and Y coordinate distances of the coordinates based on the position of the matching pattern 15. For example, a position shifted from the matching pattern 15 by X and Y coordinate distances set in advance in the X and Y directions is the measurement position. Therefore, it becomes possible to measure a desired measurement position with good reproducibility. Specifically, the measurement window 16 is arranged at a position away from the matching pattern 15 by a predetermined X and Y distance. The edge detection function works in the measurement window 16 in the measurement visual field 14 to detect the edge coordinates of the hole pattern. Here, the width (the dimension in the X direction) of the hole pattern is measured by the third reference pattern 12 from the left and the second from the top of the hole pattern arrangement group. Edge detection is performed in the measurement window 16, and the distance between the edges obtained thereby is calculated. Thereby, the dimension of a hole pattern can be measured.

The pattern dimensions, the measurement visual field 14 and the size of the pattern recognition model pattern 17 are merely examples, and are not limited to the above values. The measurement target dimension is not limited to 1/50 or more of the measurement visual field, and the size of the pattern recognition model pattern 17 is smaller than the measurement visual field. Further, the material of the space pattern, that is, the material formed outside the reference pattern 12 and the specific pattern 13 is not particularly limited, and is a metal film such as Al, Mo, Ti, and an alloy film including these. Using a transparent conductive film such as ITO, ITO, IZO, a semiconductor film such as Si, an insulating film such as SiO ₂ , SiN, TEOS, or an organic film such as a resist as a mask material for processing these Pattern 12 and unique pattern 13 can be formed. Of course, the reference pattern 12 and the unique pattern 13 may be formed using any material other than the above.

  As described above, in the present embodiment, the contact hole pattern 101 has the reference pattern 12 and the unique pattern 13 in the same manner as the line and space pattern 21 of the first embodiment. A peculiar pattern 13 having the same shape as the reference pattern 12 is provided outside a hole pattern arrangement group in which a plurality of reference patterns 12 are regularly arranged at predetermined intervals. That is, the unique pattern 13 is formed by providing one of the hole patterns isolated from the arrangement group of the reference patterns 12. As a result, a matching pattern 15 that matches the pattern recognition model pattern is generated by pattern recognition in the dimension measurement TEG pattern displayed in the measurement visual field 14. Therefore, the position of the matching pattern 15 can be specified. Based on the position of the matching pattern 15, an arbitrary measurement position can be calculated from the X and Y coordinate distances of coordinates, and a desired measurement position can be measured with good reproducibility. Therefore, the same effect as in the first embodiment can be obtained.

Embodiment 8 of the Invention
The semiconductor device according to this embodiment will be described with reference to FIG. Since the basic configuration of the semiconductor device according to the present embodiment is the same as that of the semiconductor device of the first embodiment, the description of the same contents is omitted. Further, since the basic configuration of the dimension measuring TEG is the same as that of the seventh embodiment, the description of the same contents is omitted. In the present embodiment, a contact hole pattern 101 which is a dimension measuring TEG is different from the seventh embodiment. FIG. 11 is a plan view showing the configuration of the contact hole pattern 101.

  In the present embodiment, a hole pattern having a shape different from that of the reference pattern 12 is formed as the unique pattern 13 outside the hole pattern arrangement group in which a plurality of reference patterns 12 are regularly arranged at predetermined intervals. That is, the unique pattern 13 is provided in an arbitrary direction from the arrangement group of the reference patterns 12. For example, a rectangular hole pattern is formed as the unique pattern 13 at a position away from the arrangement group of the reference patterns 12 in the Y direction. Here, the unique pattern 13 is arranged on both outer sides of the reference pattern 12 arrangement group in the Y direction. The unique pattern 13 is formed in a rectangular shape whose longitudinal direction is the X direction. The unique pattern 13 is arranged away from the reference pattern 12.

  Here, the pattern recognition model pattern includes, for example, the lower left corner of the singular pattern 13, the upper right part of the second reference pattern 12 from the left in the first row from the top, and the upper left part of the right reference pattern 12. Set to a shape that includes a part. As a result, a matching pattern 15 that matches the pattern recognition model pattern is generated by pattern recognition in the dimension measurement TEG pattern displayed in the measurement visual field 14. Therefore, the position of the matching pattern 15 can be specified. Based on the position of the matching pattern 15, an arbitrary measurement position can be calculated from the X and Y coordinate distances of coordinates, and a desired measurement position can be measured with good reproducibility. Therefore, the same effect as in the first embodiment can be obtained.

Embodiment 9 of the Invention
The semiconductor device according to this embodiment will be described with reference to FIG. Since the basic configuration of the semiconductor device according to the present embodiment is the same as that of the semiconductor device of the first embodiment, the description of the same contents is omitted. Further, since the basic configuration of the dimension measuring TEG is the same as that of the seventh embodiment, the description of the same contents is omitted. In the present embodiment, a contact hole pattern 101 which is a dimension measuring TEG is different from the seventh embodiment. FIG. 12 is a plan view showing the configuration of the contact hole pattern 101.

  In the present embodiment, a hole pattern having a shape different from the reference pattern 12 is formed as the unique pattern 13 inside the hole pattern arrangement group in which a plurality of reference patterns 12 are regularly arranged at a predetermined interval. That is, in place of at least one reference pattern 12 in the hole pattern arrangement group, a unique pattern 13 having a shape different from that of the reference pattern 12 is provided. Here, instead of the two reference patterns 12, one unique pattern 13 is arranged. The unique pattern 13 is formed in a rectangular shape whose longitudinal direction is the X direction. The unique pattern 13 is formed in such a size that, for example, two hole patterns that are the reference pattern 12 are included in one rectangular hole pattern that is the unique pattern 13. In other words, the unique pattern 13 connects the adjacent reference patterns 12.

  Here, the model pattern for pattern recognition includes, for example, a part of the lower side of the singular pattern 13, a part of the upper right side of the second reference pattern 12 from the left in the third row from the top, and the reference pattern 12 on the right side thereof. The shape is set so as to include a part on the upper left side. As a result, a matching pattern 15 that matches the pattern recognition model pattern is generated by pattern recognition in the dimension measurement TEG pattern displayed in the measurement visual field 14. Therefore, the position of the matching pattern 15 can be specified. Based on the position of the matching pattern 15, an arbitrary measurement position can be calculated from the X and Y coordinate distances of coordinates, and a desired measurement position can be measured with good reproducibility. Therefore, the same effect as in the first embodiment can be obtained.

Embodiment 10 of the Invention
The semiconductor device according to this embodiment will be described with reference to FIG. Since the basic configuration of the semiconductor device according to the present embodiment is the same as that of the semiconductor device of the first embodiment, the description of the same contents is omitted. Further, since the basic configuration of the dimension measuring TEG is the same as that of the seventh embodiment, the description of the same contents is omitted. In the present embodiment, a contact hole pattern 101 which is a dimension measuring TEG is different from the seventh embodiment. FIG. 13 is a plan view showing the configuration of the contact hole pattern 101.

  In the present embodiment, a part of the reference patterns 12 in the hole pattern arrangement group in which the plurality of reference patterns 12 are regularly arranged at predetermined intervals disappears. That is, the unique pattern 13 is provided in part of the hole pattern arrangement group by providing a space pattern instead of the reference pattern 12. Therefore, the distance between the reference patterns 12 adjacent to each other with the unique pattern 13 in between is longer than the interval between the reference patterns 12 regularly arranged at a predetermined interval in the hole pattern arrangement group. That is, the peculiar pattern 13 is formed by making the interval between adjacent reference patterns 12 out of the plurality of reference patterns 12 regularly arranged at a predetermined interval. Here, for example, as shown in FIG. 13, the uppermost and lowermost reference patterns 12 in the center row disappear and unique patterns 13 that are space patterns are respectively arranged.

  Here, the pattern recognition model pattern is set to a shape including, for example, a part of one unique pattern 13 and a part of three reference patterns 12. Specifically, a part of the specific pattern 13, a part of the reference pattern 12 on the left side of the specific pattern 13, a part of the reference pattern 12 on the lower side of the specific pattern 13, and a reference pattern on the lower left of the specific pattern 13 The shape is set so as to include a part of Twelve. As a result, a matching pattern 15 that matches the pattern recognition model pattern is generated by pattern recognition in the dimension measurement TEG pattern displayed in the measurement visual field 14. Therefore, the position of the matching pattern 15 can be specified. Based on the position of the matching pattern 15, an arbitrary measurement position can be calculated from the X and Y coordinate distances of coordinates, and a desired measurement position can be measured with good reproducibility. Therefore, the same effect as in the first embodiment can be obtained.

  In addition, the number and position of the peculiar pattern 13 are not restricted to the said Example. FIG. 14 is a plan view showing a configuration of a contact hole pattern 101 according to another example of the present embodiment. For example, as shown in FIG. 14, the second reference pattern 12 from the top in the second column from the left may be eliminated, and the unique pattern 13 that is a space pattern may be arranged. In this case, the pattern recognition model pattern includes, for example, a part of the specific pattern 13, a part of the reference pattern 12 on the right side of the specific pattern 13, and a part of the reference pattern 12 below the specific pattern 13. The shape can be set so as to include a part of the reference pattern 12 at the lower right of the unique pattern 13.

Embodiment 11 of the Invention
The semiconductor device according to this embodiment will be described with reference to FIG. Since the basic configuration of the semiconductor device according to the present embodiment is the same as that of the semiconductor device of the first embodiment, the description of the same contents is omitted. Further, since the basic configuration of the dimension measuring TEG is the same as that of the seventh embodiment, the description of the same contents is omitted. In the present embodiment, a contact hole pattern 101 which is a dimension measuring TEG is different from the seventh embodiment. FIG. 15 is a plan view showing the configuration of the contact hole pattern 101.

  In the present embodiment, a hole pattern in a layer different from the reference pattern 12 is provided as the unique pattern 13 outside the hole pattern arrangement group in which a plurality of reference patterns 12 are regularly arranged at predetermined intervals. That is, the unique pattern 13 isolated from the arrangement group of the reference patterns 12 is formed by a layer different from the reference pattern 12. Here, a hole pattern having the same shape as the reference pattern 12 is formed as a unique pattern 13 below the reference pattern 12. The unique pattern 13 is formed at a position away from the arrangement group of the reference patterns 12 in an arbitrary direction. For example, the unique pattern 13 is arranged on both outer sides of the reference pattern 12 arrangement group in the Y direction. The unique pattern 13 is arranged away from the reference pattern 12. Therefore, the arrangement relationship of the unique pattern 13 with respect to the reference pattern is different from the arrangement between the reference patterns 12.

  Here, the pattern recognition model pattern includes, for example, the lower left corner of the singular pattern 13, the upper right part of the second reference pattern 12 from the left in the first row from the top, and the upper left part of the right reference pattern 12. Set to a shape that includes a part. As a result, a matching pattern 15 that matches the pattern recognition model pattern is generated by pattern recognition in the dimension measurement TEG pattern displayed in the measurement visual field 14. Therefore, the position of the matching pattern 15 can be specified. Based on the position of the matching pattern 15, an arbitrary measurement position can be calculated from the X and Y coordinate distances of coordinates, and a desired measurement position can be measured with good reproducibility. Therefore, the same effect as in the first embodiment can be obtained.

  Note that the size, shape, position, and number of the unique patterns 13 are not limited to the above embodiment. FIG. 16 is a plan view showing a configuration of a contact hole pattern 101 according to another example of the present embodiment. As shown in FIG. 16, the unique pattern 13 may have a shape different from that of the reference pattern 12. For example, a rectangular hole pattern formed so as to contain the reference pattern 12 may be used as the unique pattern 13. Thereby, the unique pattern 13 can be arranged so as to overlap the reference pattern 12 inside the arrangement group of the reference patterns 12 in which a plurality of hole patterns are arranged in a matrix. At this time, it is preferable to arrange so that the outer shape of the unique pattern 13 does not completely overlap the outer shape of the reference pattern 12. Then, the pattern recognition model pattern can be set to a shape including, for example, a part of the four reference patterns 12 including the reference pattern 12 overlapping the specific pattern 13 and a part of the specific pattern 13. .

Embodiment 12 of the Invention
The semiconductor device according to this embodiment will be described with reference to FIG. Since the basic configuration of the semiconductor device according to the present embodiment is the same as that of the semiconductor device of the first embodiment, the description of the same contents is omitted. Further, since the basic configuration of the dimension measuring TEG is the same as that of the first embodiment, the description of the same contents is omitted. In the present embodiment, a line and space pattern 21 which is a dimension measuring TEG is different from the first embodiment. FIG. 17 is a plan view showing the configuration of the line and space pattern 21.

  In the present embodiment, all the line patterns have the same shape, and the positions in the Y direction match. That is, five reference patterns 12 are repeatedly arranged. The position of the reference pattern in the Y direction is the same on both sides. In the present embodiment, a unique pattern 13 of a layer different from the reference pattern 12 is provided in the vicinity of the reference pattern 12. That is, the island-like unique pattern 13 is formed in a layer different from the reference pattern 12 at a position away from the plurality of reference patterns 12 arranged in an arbitrary direction. For example, the unique pattern 13 is arranged on both outer sides of the reference pattern 12 in the Y direction. The unique pattern 13 is formed in a rectangular shape whose longitudinal direction is the X direction. The unique pattern 13 is arranged away from the reference pattern 12.

  Here, the pattern recognition model pattern is set to a shape including, for example, the lower left corner of the singular pattern 13, the upper right corner of the second reference pattern 12 from the left, and the upper left corner of the adjacent reference pattern 12. To do. As a result, a matching pattern 15 that matches the pattern recognition model pattern is generated by pattern recognition in the dimension measurement TEG pattern displayed in the measurement visual field 14. Therefore, the position of the matching pattern 15 can be specified. Based on the position of the matching pattern 15, an arbitrary measurement position can be calculated from the X and Y coordinate distances of coordinates, and a desired measurement position can be measured with good reproducibility. Therefore, the same effect as in the first embodiment can be obtained.

  The position of the unique pattern 13 is not limited to the above embodiment. FIG. 18 is a plan view showing a configuration of a line and space pattern 21 according to another example of the present embodiment. In the present embodiment, since the unique pattern 13 is formed by a layer different from the reference pattern 12, the unique pattern 13 can be arranged so as to overlap the reference pattern 12, as shown in FIG. At this time, it is preferable to arrange so that the outer shape of the unique pattern 13 does not completely overlap the outer shape of the reference pattern 12. Then, the pattern recognition model pattern is set to a shape including, for example, a part of the four reference patterns 12 including the reference pattern 12 that overlaps with the specific pattern 13 and a part of the specific pattern 13.

Other embodiments.
The pattern shape and dimensions are not limited to those described above. In a semiconductor device comprising a device region and a TEG region provided outside the device region, a plurality of reference patterns regularly arranged at predetermined intervals in the TEG region and a peculiar arrangement arranged in the vicinity of the TEG pattern Forming a pattern. The plurality of reference patterns are formed in the same shape, and the unique pattern is formed in a shape different from the reference pattern, or the arrangement relationship between the unique pattern and the reference pattern is different from the arrangement relationship between the reference patterns. That's fine. For example, the position of the end of the unique pattern 13 in the Y direction is shifted from the position of the end of the reference pattern. In this way, the position of the matching pattern that matches the pattern recognition model pattern is uniquely determined. Therefore, the pattern dimension can be measured at the same position, and the CD shift can be managed. The dimension to be controlled can be measured accurately.

  Further, it is preferable that the reference pattern 12 is repeatedly formed in a range of 50 times or less of the dimension width of the measurement target dimension. That is, the reference pattern 12 having a constant width is repeatedly arranged at constant intervals within a range 50 times the dimension width of the measurement target dimension. Of course, if the position of the matching pattern 15 can be specified, the number of unique patterns 13 is not limited to one, and a plurality of unique patterns 13 may be provided. Furthermore, you may combine each embodiment.

  In the line and space pattern 21, the case where the reference pattern 12 and the unique pattern 13 are left patterns that are left as island-like patterns in the TEG region 10 has been exemplarily described, but the present invention is not limited thereto. is not. In the contact hole pattern 101, the case where the reference pattern 12 and the specific pattern 13 are punched patterns extracted as hole patterns in the TEG region 10 has been exemplarily described. However, the present invention is not limited to this. The reference pattern 12 and the unique pattern 13 can be formed by the remaining pattern, the blank pattern, or both.

  The above description describes the embodiment of the present invention, and the present invention is not limited to the above embodiment. Moreover, those skilled in the art can easily change, add, and convert each element of the above embodiment within the scope of the present invention.

2 is a front view showing a configuration of a TFT array substrate which is an example of a semiconductor device according to the first embodiment. FIG. 4 is a plan view showing a configuration of a TEG region of the semiconductor device according to the first embodiment. FIG. 4 is a plan view showing a configuration of a line and space pattern provided in a TEG region of the semiconductor device according to the first embodiment. FIG. FIG. 6 is a plan view showing a configuration of a line and space pattern provided in a TEG region of a semiconductor device according to a second embodiment. It is a top view which shows the structure of the line and space pattern provided in the TEG area | region of the semiconductor device which concerns on this Embodiment 3. FIG. It is a top view which shows the structure of the line and space pattern provided in the TEG area | region of the semiconductor device which concerns on this Embodiment 4. It is a top view which shows the structure of the line and space pattern provided in the TEG area | region of the semiconductor device which concerns on this Embodiment 5. FIG. It is a top view which shows the structure of the line and space pattern provided in the TEG area | region of the semiconductor device which concerns on this Embodiment 6. FIG. It is a top view which shows the structure of the TEG area | region of the semiconductor device which concerns on this Embodiment 7. FIG. It is a top view which shows the structure of the contact hole pattern provided in the TEG area | region of the semiconductor device which concerns on this Embodiment 7. FIG. It is a top view which shows the structure of the contact hole pattern provided in the TEG area | region of the semiconductor device which concerns on this Embodiment 8. FIG. It is a top view which shows the structure of the contact hole pattern provided in the TEG area | region of the semiconductor device which concerns on this Embodiment 9. FIG. FIG. 38 is a plan view showing a configuration of a contact hole pattern provided in a TEG region of a semiconductor device according to a tenth embodiment. FIG. 38 is a plan view showing a configuration of a contact hole pattern provided in a TEG region of a semiconductor device according to another example of the tenth embodiment. FIG. 38 is a plan view showing a configuration of a contact hole pattern provided in a TEG region of a semiconductor device according to an eleventh embodiment. It is a top view which shows the structure of the contact hole pattern provided in the TEG area | region of the semiconductor device which concerns on another Example of this Embodiment 11. FIG. FIG. 38 is a plan view showing a configuration of a contact hole pattern provided in a TEG region of a semiconductor device according to a twelfth embodiment. FIG. 38 is a plan view showing a configuration of a contact hole pattern provided in a TEG region of a semiconductor device according to another example of Embodiment 12; It is sectional drawing which shows the etching of a pattern dense part and a pattern rough part. It is a figure which shows the TEG pattern of the conventional semiconductor device. It is a figure which shows another TEG pattern of the conventional semiconductor device. It is a top view for demonstrating the dimension measurement using the TEG pattern of the conventional semiconductor device. It is a top view for demonstrating the dimension measurement using the TEG pattern of the conventional semiconductor device.

Explanation of symbols

1 substrate, 6 common wiring, 10 TEG area,
12 reference patterns, 13 unique patterns, 14 fields of measurement, 15 matching patterns,
16 measurement windows, 17 pattern patterns for pattern recognition,
21 line and space pattern, 22 isolated pattern,
23 holding capacity, 31 wiring material, 32 resist, 33 reaction product 41 display area, 42 frame area, 43 gate wiring, 44 source wiring,
45 scanning signal drive circuit, 46 display signal drive circuit,
47 pixels, 48, 49 External wiring, 50 TFT,
101 contact hole pattern, 102 isolated pattern

Claims (13)

A semiconductor device comprising a device region and a TEG region provided outside the device region, the semiconductor device being a measurement target of a measurement device that recognizes a matching pattern included in the TEG region ,
The TEG provided in the TEG region is
A plurality of reference patterns regularly arranged at predetermined intervals;
Having a peculiar pattern arranged in the vicinity of the reference pattern,
The plurality of reference patterns are formed in the same shape,
The specific pattern is formed in a shape different from the reference pattern, or the arrangement relationship of the specific pattern with respect to the reference pattern is different from the arrangement between the reference patterns ,
A semiconductor device that forms the matching pattern in which a part of the reference pattern and a part of the unique pattern exist in only one place in a measurement field of view of the measurement apparatus.   The semiconductor device according to claim 1, wherein the unique pattern is provided by changing the length of an arbitrary reference pattern among the plurality of reference patterns arranged.   3. The semiconductor device according to claim 1, wherein the unique pattern is provided at a position away from a plurality of the reference patterns arranged in an arbitrary direction.   4. The semiconductor device according to claim 1, wherein the specific pattern is provided by dividing an arbitrary reference pattern among the plurality of reference patterns arranged. 5.   The semiconductor device according to claim 1, wherein the singular pattern connects the adjacent reference patterns.   6. The semiconductor device according to claim 1, wherein the unique pattern is formed by shifting a position of an arbitrary reference pattern in an arbitrary direction among the plurality of reference patterns arranged in a row.   7. The unique pattern is formed according to claim 1, wherein the unique pattern is formed by making an interval between adjacent reference patterns out of the plurality of arranged reference patterns different from the predetermined interval. Semiconductor device.   The semiconductor device according to claim 1, wherein the unique pattern is formed of a layer different from the plurality of the reference patterns arranged. A plurality of the TEGs are provided in the TEG region,
The semiconductor device according to claim 1, wherein an interval and a width of the reference pattern are different according to the TEG. A plurality of the TEG regions are provided;
The semiconductor device according to claim 1, wherein the plurality of TEG regions are arranged at different positions of the semiconductor device.   The semiconductor device according to claim 1, wherein the reference pattern and the unique pattern are formed of a metal film, an alloy film, a transparent conductive film, a semiconductor film, an insulating film, or an organic film.   2. The reference pattern and the unique pattern are formed by a left pattern left as an island-like pattern in the TEG region, a blank pattern cut out as a hole pattern in the TEG region, or both. 12. The semiconductor device according to any one of 1 to 11. In a semiconductor device comprising a device region and a TEG region provided outside the device region, a dimension measuring method for measuring a pattern dimension,
In the TEG region, a step of setting a substrate provided with a plurality of reference patterns regularly arranged at predetermined intervals and a peculiar pattern arranged in the vicinity of the reference pattern in a dimension measuring device;
Moving the measurement field of view of the dimension measuring device into the TEG region;
Imaging the singular pattern and the one or more reference patterns in the measurement field;
Performing pattern recognition processing on the imaging result and recognizing a matching pattern that matches a pre-registered model pattern;
Measuring a pattern dimension at a measurement position corresponding to the position of the matching pattern.

Images