JP4894784B2 - 半導体装置とその製造方法 - Google Patents
半導体装置とその製造方法 Download PDFInfo
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- JP4894784B2 JP4894784B2 JP2008046390A JP2008046390A JP4894784B2 JP 4894784 B2 JP4894784 B2 JP 4894784B2 JP 2008046390 A JP2008046390 A JP 2008046390A JP 2008046390 A JP2008046390 A JP 2008046390A JP 4894784 B2 JP4894784 B2 JP 4894784B2
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 46
- 238000004519 manufacturing process Methods 0.000 title claims description 14
- 239000002184 metal Substances 0.000 claims abstract description 123
- 239000011347 resin Substances 0.000 claims description 106
- 229920005989 resin Polymers 0.000 claims description 106
- 238000010438 heat treatment Methods 0.000 claims description 16
- 238000000034 method Methods 0.000 claims description 16
- 238000003466 welding Methods 0.000 claims description 16
- 230000006698 induction Effects 0.000 claims description 14
- 238000002844 melting Methods 0.000 claims description 3
- 230000008018 melting Effects 0.000 claims description 3
- 229920005992 thermoplastic resin Polymers 0.000 abstract 3
- 239000000853 adhesive Substances 0.000 description 8
- 230000001070 adhesive effect Effects 0.000 description 8
- 230000000694 effects Effects 0.000 description 3
- 238000003780 insertion Methods 0.000 description 3
- 230000037431 insertion Effects 0.000 description 3
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 239000000155 melt Substances 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 230000007547 defect Effects 0.000 description 1
- 230000005674 electromagnetic induction Effects 0.000 description 1
- 230000009931 harmful effect Effects 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 230000009191 jumping Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 230000002035 prolonged effect Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/43—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/43—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/852—Applying energy for connecting
- H01L2224/85201—Compression bonding
- H01L2224/85205—Ultrasonic bonding
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/01004—Beryllium [Be]
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- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
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- H01L2924/01015—Phosphorus [P]
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- H—ELECTRICITY
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- H01L2924/01—Chemical elements
- H01L2924/01068—Erbium [Er]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Wire Bonding (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
本実施形態は樹脂ケースにアウトサートされた金属端子と半導体チップのワイヤボンディングを行う半導体装置およびその製造方法に関する。以後、図1を参照して本実施形態の構成を説明する。本実施形態の半導体装置は樹脂ケース12を備える。樹脂ケース12は半導体装置の筐体となるものであり、その内壁側の側面に突起部14を備える。突起部14は樹脂ケース12の側面から突出した先太り形状である。樹脂ケース12はさらにワイヤボンディング面固定部16を備える。ワイヤボンディング面固定部16は後述する金属端子のワイヤボンディング面を固定するための溝を形成するように配置される凸部である。
12 樹脂ケース
20 半導体チップ
22 ワイヤボンディング面
24、25 溶着固定部
40 交流磁場発生装置
52 凹部
Claims (4)
- 樹脂ケースと、
前記樹脂ケース内部に搭載された半導体チップと、
相対するワイヤボンディング面と接触面とを有し、かつ凹部を有する金属端子と、
前記ワイヤボンディング面と前記半導体チップを接続するワイヤとを備え、
前記接触面は前記樹脂ケース内部に溶着固定により面接合され、
前記凹部には前記樹脂ケースの樹脂が浸入していることを特徴とする半導体装置。 - 前記金属端子は前記樹脂ケースと接触する全ての部分において前記樹脂ケースに溶着固定されていることを特徴とする請求項1に記載の半導体装置。
- 凹部が形成された金属端子を樹脂ケース内部の所定位置に取り付ける工程と、
取り付けられた前記金属端子を誘導加熱により前記樹脂ケースの融点以上まで加熱し、 前記凹部に前記樹脂ケースの樹脂を浸入させ、かつ前記金属端子を前記樹脂ケースと接触する部分において前記樹脂ケースに溶着固定する工程と、
前記樹脂ケース内部に半導体チップを搭載する工程と、
溶着固定された前記金属端子と前記半導体チップをワイヤボンディングにより接続する工程とを備えることを特徴とする半導体装置の製造方法。 - 前記金属端子として、相対するワイヤボンディング面と接触面とを有するものを用い、
前記ワイヤボンディング面に前記ワイヤボンディングを行い、
前記樹脂ケース内部に交流磁場発生装置を導入し、前記交流磁場発生装置を用いた誘導加熱により、前記接触面を前記樹脂ケース内部の底部に溶着固定することを特徴とする請求項3に記載の半導体装置の製造方法。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008046390A JP4894784B2 (ja) | 2008-02-27 | 2008-02-27 | 半導体装置とその製造方法 |
DE102008050010.0A DE102008050010B4 (de) | 2008-02-27 | 2008-10-01 | Herstellungsverfahren für eine Halbleitervorrichtung |
US12/247,515 US8399976B2 (en) | 2008-02-27 | 2008-10-08 | Resin sealed semiconductor device and manufacturing method therefor |
CN200810183920A CN101521186A (zh) | 2008-02-27 | 2008-12-08 | 半导体装置及其制造方法 |
US13/757,231 US8785252B2 (en) | 2008-02-27 | 2013-02-01 | Resin sealed semiconductor device and manufacturing method therefor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008046390A JP4894784B2 (ja) | 2008-02-27 | 2008-02-27 | 半導体装置とその製造方法 |
Publications (2)
Publication Number | Publication Date |
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JP2009206269A JP2009206269A (ja) | 2009-09-10 |
JP4894784B2 true JP4894784B2 (ja) | 2012-03-14 |
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Application Number | Title | Priority Date | Filing Date |
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JP2008046390A Active JP4894784B2 (ja) | 2008-02-27 | 2008-02-27 | 半導体装置とその製造方法 |
Country Status (4)
Country | Link |
---|---|
US (2) | US8399976B2 (ja) |
JP (1) | JP4894784B2 (ja) |
CN (1) | CN101521186A (ja) |
DE (1) | DE102008050010B4 (ja) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
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DE102010000942B4 (de) * | 2010-01-15 | 2022-08-25 | Infineon Technologies Ag | Verfahren zur Herstellung eines Leistungshalbleitermoduls |
DE102010038727B4 (de) * | 2010-07-30 | 2015-07-16 | Infineon Technologies Ag | Leistungshaltleitermodul und Verfahren zur Herstellung eines Leistungshalbleitermoduls |
CN103210489B (zh) * | 2010-11-16 | 2016-06-15 | 富士电机株式会社 | 半导体装置 |
WO2012124209A1 (ja) * | 2011-03-16 | 2012-09-20 | 富士電機株式会社 | 半導体モジュールおよびその製造方法 |
JP5598414B2 (ja) * | 2011-04-26 | 2014-10-01 | 三菱電機株式会社 | 半導体装置の製造方法 |
US9949375B2 (en) | 2013-11-15 | 2018-04-17 | Wonder Future Corporation | Method for manufacturing an electric product |
JP6755197B2 (ja) * | 2017-01-19 | 2020-09-16 | 三菱電機株式会社 | 半導体装置およびその製造方法 |
WO2024002466A1 (en) * | 2022-06-28 | 2024-01-04 | Hitachi Energy Ltd | Housing unit and method for manufacturing a housing unit for a semiconductor power module and semiconductor power module |
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2008
- 2008-02-27 JP JP2008046390A patent/JP4894784B2/ja active Active
- 2008-10-01 DE DE102008050010.0A patent/DE102008050010B4/de active Active
- 2008-10-08 US US12/247,515 patent/US8399976B2/en active Active
- 2008-12-08 CN CN200810183920A patent/CN101521186A/zh active Pending
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2013
- 2013-02-01 US US13/757,231 patent/US8785252B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US20090212411A1 (en) | 2009-08-27 |
JP2009206269A (ja) | 2009-09-10 |
US8399976B2 (en) | 2013-03-19 |
DE102008050010A1 (de) | 2009-09-10 |
US8785252B2 (en) | 2014-07-22 |
CN101521186A (zh) | 2009-09-02 |
DE102008050010B4 (de) | 2014-07-03 |
US20130143365A1 (en) | 2013-06-06 |
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