JP4659634B2 - フリップチップ実装方法 - Google Patents
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Description
実装基板10が反った状態で実装され、実装基板10のチップ搭載面の中央部で実装基板10と半導体チップ14との面間隔が狭くなると、半導体チップ14の熱膨張係数にマッチングさせるために樹脂材12に添加されているアルミナあるいはシリカといったフィラーが実装基板10と半導体チップ14とによって挟圧され、半導体チップ14の回路面が損傷し、回路面に形成された配線が断線するといった問題が生じる。
すなわち、チップ搭載面に樹脂材を供給した状態で実装基板をステージに支持し、加圧・加熱ヘッドにより半導体チップを実装基板に向けて押圧することにより、実装基板に半導体チップを接合するとともに、前記樹脂材を熱硬化させて半導体チップを実装する半導体チップのフリップチップ実装方法において、前記ステージの前記実装基板を支持する支持面における前記半導体チップのバンプ形成領域を除いて該半導体チップの中央領域に対応する領域に凹部を設け、前記加圧・加熱ヘッドにより半導体チップを実装基板に向けて押圧することにより、前記実装基板を前記凹部側に湾曲させた状態で半導体チップを実装基板に接合することを特徴とする。
また、前記ステージに、前記凹部の底面に連通する吸引孔を設け、記加圧・加熱ヘッドにより前記半導体チップを実装基板に接合する際に、前記吸引孔から前記実装基板を真空吸引し、前記実装基板を強制的に前記凹部側に湾曲させた状態で接合することを特徴とする。
図1は、本発明に係るフリップチップ実装方法の第1の実施の形態を示す。本実施形態においては、実装基板10のチップ搭載面にあらかじめ樹脂材12を塗布しておき、加圧・加熱ヘッド20により半導体チップ14を吸着支持し、実装基板10に半導体チップ14を位置決めして実装する。
本実施形態では、実装基板10を支持するステージ24の実装基板10の支持面に、凹部24aを形成し、ステージ24に凹部24aの内底面に連通する吸引孔25を設け、吸引孔25を真空吸引装置(不図示)に接続している。凹部24aは、半導体チップ14のバンプ14aが形成されている領域の内側領域に形成される。
すなわち、実装基板10に樹脂材12を供給した後、加圧・加熱ヘッド20により半導体チップ14を吸着支持して半導体チップ14を実装基板10に向けて押圧すると、樹脂材12を介して実装基板10が凹部24a側に湾曲する。フリップチップ実装する際に実装基板10をさほど大きく湾曲させなくても、樹脂材12に含まれるフィラーによって半導体チップ14が損傷を受けない場合には、装置の構成が簡易となるから、このような方法が有効である。
図2は、本発明に係るフリップチップ実装方法の第2の実施の形態を示す。本実施形態におけるフリップチップ実装方法は、実装基板10を支持する支持面が平坦面に形成されたステージ22を使用し、加圧・加熱ヘッド26として、半導体チップ14の吸着面に、半導体チップ14を実装基板10のチップ実装面から離間する向きに湾曲させる凹面26aを設け、凹面26aの中央位置に吸引孔27を連通させて設けたものを使用することを特徴とする。吸引孔27は真空吸引装置(不図示)に連通されている。
本実施形態のフリップチップ実装方法においては、半導体チップ14を上に凸となるように湾曲した状態で実装するから、実装後に半導体チップ14と実装基板10との面間隔が過度に狭くなることを防止して実装することができる。これによって、樹脂材12に含まれるフィラーによって半導体チップ14の回路面が損傷を受けるという問題を回避することができる。なお、樹脂材12に含まれるフィラーは、30〜40重量%程度混入されており、樹脂材12中でかなりの分量を占めるものとなっている。
図3は、本発明に係るフリップチップ実装方法の第3の実施の形態を示す。本実施形態におけるフリップチップ実装方法は、実装基板10のチップ搭載面に、半導体チップ14を実装基板10から離間させて支持するためのスペーサ11をあらかじめ設けておき、スペーサ11を実装基板10と半導体チップ14との間に介在させる配置として半導体チップ14を実装することを特徴とする。
図4は、本発明に係るフリップチップ実装方法の第4の実施の形態を示す。本実施形態におけるフリップチップ実装方法は、実装基板10にスペーサ11を形成するかわりに、半導体チップ14の回路面、すなわち実装した際に実装基板10に対向する面にスペーサ13を形成することを特徴とする。
このように、半導体チップ14の実装基板10に対向する面にスペーサ13を設けてフリップチップ実装することにより、半導体チップ14を損傷することなく確実に実装基板10に実装することができる。
11、13 スペーサ
12 樹脂材
13 スペーサ
14 半導体チップ
14a バンプ
17 吸引孔
20、26 加圧・加熱ヘッド
22、24 ステージ
24a 凹部
25 吸引孔
26 加圧・加熱ヘッド
26a 凹面
27 吸引孔
Claims (2)
- チップ搭載面に樹脂材を供給した状態で実装基板をステージに支持し、加圧・加熱ヘッドにより半導体チップを実装基板に向けて押圧することにより、実装基板に半導体チップを接合するとともに、前記樹脂材を熱硬化させて半導体チップを実装する半導体チップのフリップチップ実装方法において、
前記ステージの前記実装基板を支持する支持面における前記半導体チップのバンプ形成領域を除いて該半導体チップの中央領域に対応する領域に凹部を設け、
前記加圧・加熱ヘッドにより半導体チップを実装基板に向けて押圧することにより、前記実装基板を前記凹部側に湾曲させた状態で半導体チップを実装基板に接合することを特徴とする半導体チップのフリップチップ実装方法。 - 前記ステージに、前記凹部の底面に連通する吸引孔を設け、
前記加圧・加熱ヘッドにより前記半導体チップを実装基板に接合する際に、前記吸引孔から前記実装基板を真空吸引し、前記実装基板を強制的に前記凹部側に湾曲させた状態で接合することを特徴とする請求項1記載の半導体チップのフリップチップ実装方法。
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JP2006031652A JP4659634B2 (ja) | 2006-02-08 | 2006-02-08 | フリップチップ実装方法 |
US11/435,851 US7670873B2 (en) | 2006-02-08 | 2006-05-18 | Method of flip-chip mounting |
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JP2006031652A JP4659634B2 (ja) | 2006-02-08 | 2006-02-08 | フリップチップ実装方法 |
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US7834442B2 (en) * | 2007-12-12 | 2010-11-16 | International Business Machines Corporation | Electronic package method and structure with cure-melt hierarchy |
WO2009119427A1 (ja) * | 2008-03-26 | 2009-10-01 | 日本電気株式会社 | 半導体装置およびその製造方法 |
JP2010067922A (ja) * | 2008-09-12 | 2010-03-25 | Sony Chemical & Information Device Corp | 熱圧着装置及び電気部品の実装方法 |
US8354300B2 (en) * | 2010-02-23 | 2013-01-15 | Qualcomm Incorporated | Reducing susceptibility to electrostatic discharge damage during die-to-die bonding for 3-D packaged integrated circuits |
US8766426B2 (en) * | 2010-09-24 | 2014-07-01 | Stats Chippac Ltd. | Integrated circuit packaging system with warpage control and method of manufacture thereof |
TW201826333A (zh) * | 2016-11-16 | 2018-07-16 | 日商尼康股份有限公司 | 保持構件、接合裝置、及接合方法 |
US10470290B2 (en) * | 2017-05-08 | 2019-11-05 | International Business Machines Corporation | Coating for limiting substrate damage due to discrete failure |
Citations (8)
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JPS63220532A (ja) * | 1987-03-09 | 1988-09-13 | Seiko Instr & Electronics Ltd | 半導体装置及び製造方法 |
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JPH05129369A (ja) * | 1991-11-07 | 1993-05-25 | Sony Corp | 接着材層厚の規制構造 |
JPH11135568A (ja) * | 1997-10-28 | 1999-05-21 | Nec Corp | 半導体装置及びその製造方法 |
JP2002170848A (ja) * | 2000-11-30 | 2002-06-14 | Kyocera Corp | 回路基板 |
JP2002261125A (ja) * | 2001-03-05 | 2002-09-13 | Shibuya Kogyo Co Ltd | ボンディング装置 |
JP2004221319A (ja) * | 2003-01-15 | 2004-08-05 | Matsushita Electric Ind Co Ltd | 半導体装置の製造方法 |
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JPS57176738A (en) | 1981-04-23 | 1982-10-30 | Seiko Epson Corp | Connecting structure for flip chip |
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JP2001257239A (ja) * | 2000-03-13 | 2001-09-21 | Matsushita Electric Ind Co Ltd | 半導体装置の製造方法 |
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- 2006-02-08 JP JP2006031652A patent/JP4659634B2/ja not_active Expired - Fee Related
- 2006-05-18 US US11/435,851 patent/US7670873B2/en not_active Expired - Fee Related
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JP2007214291A (ja) | 2007-08-23 |
US7670873B2 (en) | 2010-03-02 |
US20070184582A1 (en) | 2007-08-09 |
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