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JP4473147B2 - Phase line and duplexer - Google Patents

Phase line and duplexer Download PDF

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JP4473147B2
JP4473147B2 JP2005019279A JP2005019279A JP4473147B2 JP 4473147 B2 JP4473147 B2 JP 4473147B2 JP 2005019279 A JP2005019279 A JP 2005019279A JP 2005019279 A JP2005019279 A JP 2005019279A JP 4473147 B2 JP4473147 B2 JP 4473147B2
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phase line
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JP2006211183A (en
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治 江口
宏之 天野
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Kyocera Crystal Device Corp
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Description

本発明は、インピーダンス整合用の位相線路、及び位相線路を用いた分波器に関するものである。   The present invention relates to a phase line for impedance matching and a duplexer using the phase line.

分波器(デュプレクサ)は、主にCDMA(Code Division Multiple Access )方式の携帯電話などの無線通信システムにおいて使用される。CDMA方式の無線システムでは、1本のアンテナを用いて送信と受信が同時に行われるため、送信信号と受信信号とを分離し、かつ互いの信号が相互に影響しないようにする分波器が必要となる(例えば、特許文献1参照)。携帯電話機に搭載される分波器の一般的構成を図5に示す。   A duplexer is mainly used in a radio communication system such as a CDMA (Code Division Multiple Access) mobile phone. In a CDMA wireless system, transmission and reception are performed simultaneously using a single antenna, so a demultiplexer is required to separate the transmission signal and the reception signal and prevent the signals from affecting each other. (For example, refer to Patent Document 1). FIG. 5 shows a general configuration of a duplexer mounted on a mobile phone.

図5に示すように、分波器は、図示しない送信回路からの送信信号のみを通過させてアンテナ4に供給する中心周波数f1の帯域通過フィルタである送信用フィルタ1と、アンテナ4で受信された高周波信号のうち所定の受信信号のみを通過させる中心周波数f2(f1≠f2)の帯域通過フィルタである受信用フィルタ2と、アンテナ4と受信用フィルタ2の入力端子との間に設けられたインピーダンス整合用の分波回路3とから構成される。送信回路は、送信すべき音声信号やデータ信号等を基に高周波の送信信号を生成して送信用フィルタ1に出力する。受信回路は、受信用フィルタ2から出力された受信信号を復調して音声信号やデータ信号等を取り出す。   As shown in FIG. 5, the duplexer is received by the antenna 4 and the transmission filter 1, which is a bandpass filter having a center frequency f <b> 1 that passes only a transmission signal from a transmission circuit (not shown) and supplies the signal to the antenna 4. The reception filter 2 is a band pass filter having a center frequency f2 (f1 ≠ f2) that passes only a predetermined reception signal among the high-frequency signals, and is provided between the antenna 4 and the input terminal of the reception filter 2. And a branching circuit 3 for impedance matching. The transmission circuit generates a high-frequency transmission signal based on the audio signal or data signal to be transmitted, and outputs it to the transmission filter 1. The reception circuit demodulates the reception signal output from the reception filter 2 and extracts an audio signal, a data signal, and the like.

送信用フィルタ1及び受信用フィルタ2には、SAW(Surface Acoustic Wave )フィルタあるいは圧電薄膜を用いたBAW(Bulk Acoustic Wave)フィルタなどが用いられる。分波回路3は、送信用フィルタ1と受信用フィルタ2の相互の干渉による特性劣化を防止する。この分波回路3には、電気長がぼぼλ/4(λは携帯電話機で使用される電磁波の波長)の位相線路が多用されている。位相線路は、ストリップラインで構成され、送信用フィルタ1と受信用フィルタ2と共にセラミックパッケージに搭載される。   As the transmission filter 1 and the reception filter 2, a SAW (Surface Acoustic Wave) filter or a BAW (Bulk Acoustic Wave) filter using a piezoelectric thin film is used. The branching circuit 3 prevents characteristic deterioration due to mutual interference between the transmission filter 1 and the reception filter 2. A phase line having an electrical length of about λ / 4 (λ is the wavelength of an electromagnetic wave used in a mobile phone) is frequently used in the branching circuit 3. The phase line is formed of a strip line and is mounted on the ceramic package together with the transmission filter 1 and the reception filter 2.

図6は従来の位相線路(ストリップライン)の構成を示す断面図である。位相線路は、GND導体101で挟まれた誘電体102内に信号導体103を設けたものである。通常、位相線路の特性インピーダンスは50Ωであるため、誘電体102の誘電率や厚み、信号導体103の幅を位相線路の特性インピーダンスが50Ωとなるように設計する。   FIG. 6 is a cross-sectional view showing a configuration of a conventional phase line (strip line). The phase line is obtained by providing a signal conductor 103 in a dielectric 102 sandwiched between GND conductors 101. Since the characteristic impedance of the phase line is usually 50Ω, the dielectric constant and thickness of the dielectric 102 and the width of the signal conductor 103 are designed so that the characteristic impedance of the phase line is 50Ω.

携帯電話機の小型化・薄型化に伴い、分波器も小型化・薄型化が要求されている。分波器を構成する要素のうち最も体積が大きい要素は、分波回路3である。位相線路を分波回路3として動作させるためには、前述のように位相線路の電気長をλ/4とする必要がある。例えば、800MHzの電磁波の真空中における1/4波長は、およそ94mmである。この94mmの電気長を比誘電率7の誘電体102を用いて実現しようとすると、35mmの線路長が必要となる。線路長を短くするためには、比誘電率が大きな誘電体102を用いれば良いが、比誘電率を大きくすると、特性インピーダンスを50Ωとするための誘電体102の厚みが厚くなり、薄型化への要求に反してしまう。   As mobile phones become smaller and thinner, duplexers are also required to be smaller and thinner. The element having the largest volume among the elements constituting the branching filter is the branching circuit 3. In order to operate the phase line as the branching circuit 3, it is necessary to set the electrical length of the phase line to λ / 4 as described above. For example, the quarter wavelength of the 800 MHz electromagnetic wave in vacuum is approximately 94 mm. If this electric length of 94 mm is to be realized by using the dielectric 102 having a relative dielectric constant of 7, a line length of 35 mm is required. In order to shorten the line length, it is sufficient to use the dielectric 102 having a large relative dielectric constant. However, if the relative dielectric constant is increased, the thickness of the dielectric 102 for setting the characteristic impedance to 50Ω is increased, and the thickness is reduced. Contrary to the request.

信号導体103の幅を小さくすることにより、誘電体102の厚みを変えずに、位相線路の特性インピーダンスを50Ωとすることができるが、信号導体103の加工可能な線幅に限界があるため、実用的でない。また、位相線路の線路間の距離を小さくし、位相線路の占める面積を小さくしようとすると、線路間の結合により、インピーダンスの低下が生じ、特性インピーダンスが50Ωから外れてしまう。また、図6に示す位相線路を上下に2つ重ねることによって面積を小さくすることができるが、位相線路の厚みが増すという問題がある。
そこで、GND導体間に、3層の信号導体を配置することにより、位相線路を小型化することが提案されている(例えば、特許文献2参照)。
By reducing the width of the signal conductor 103, the characteristic impedance of the phase line can be set to 50Ω without changing the thickness of the dielectric 102. However, because the line width that can be processed by the signal conductor 103 is limited, Not practical. Further, when the distance between the phase lines is reduced and the area occupied by the phase line is reduced, the impedance is lowered due to the coupling between the lines, and the characteristic impedance is deviated from 50Ω. Moreover, although the area can be reduced by overlapping two phase lines shown in FIG. 6 on the top and bottom, there is a problem that the thickness of the phase line increases.
Thus, it has been proposed to reduce the size of the phase line by arranging three layers of signal conductors between the GND conductors (see, for example, Patent Document 2).

なお、出願人は、本明細書に記載した先行技術文献情報で特定される先行技術文献以外には、本発明に関連する先行技術文献を出願時までに発見するには至らなかった。
特開平10−126213号公報 特開2002−176337号公報
The applicant has not yet found prior art documents related to the present invention by the time of filing other than the prior art documents specified by the prior art document information described in this specification.
JP-A-10-126213 JP 2002-176337 A

特許文献2に開示された位相線路によれば、小型化が可能となるが、挿入損失(インサーションロス)が大きいという問題点があった。
本発明は、上記課題を解決するためになされたもので、小型で、かつ挿入損失が小さい位相線路、及び位相線路を用いた分波器を提供することを目的とする。
According to the phase line disclosed in Patent Document 2, it is possible to reduce the size, but there is a problem that the insertion loss (insertion loss) is large.
The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a small-sized phase line with a small insertion loss and a duplexer using the phase line.

本発明の位相線路は、2層のGND導体で挟まれた誘電体の内部に、前記誘電体によって互いに隔てられ、かつ電気的に直列に接続された複数層の信号導体を有し、前記複数層の信号導体が平面視同一形状で、かつ前記複数層の信号導体の水平方向の位置が同一であることを特徴とするものである。
また、本発明の位相線路の1構成例は、前記誘電体と前記複数層の信号導体とからなる単位構造を、前記2層のGND導体の間に複数積層して、各単位構造の間を前記2層のGND導体とは別のGND導体で分離し、各単位構造の信号導体を電気的に直列に接続したものである。
また、本発明の位相線路の1構成例において、前記複数層の信号導体は2層である。
The phase line of the present invention has a plurality of signal conductors separated from each other by the dielectric and electrically connected in series inside a dielectric sandwiched between two layers of GND conductors. The signal conductors of the layers have the same shape in plan view, and the horizontal positions of the signal conductors of the plurality of layers are the same.
Further, in one configuration example of the phase line of the present invention, a plurality of unit structures each including the dielectric and the plurality of layers of signal conductors are stacked between the two layers of GND conductors, and each unit structure is interposed between the unit structures. The two layers of GND conductors are separated by another GND conductor, and signal conductors of each unit structure are electrically connected in series.
In one configuration example of the phase line of the present invention, the signal conductors of the plurality of layers are two layers.

また、本発明は、送信回路からの送信信号のみを通過させてアンテナに供給する送信用フィルタと、前記アンテナで受信された高周波信号のうち所定の受信信号のみを通過させて受信回路に供給する受信用フィルタと、前記アンテナと前記受信用フィルタの入力端子との間に設けられたインピーダンス整合用の位相線路とからなる分波器において、前記位相線路が、2層のGND導体で挟まれた誘電体の内部に、前記誘電体によって互いに隔てられ、かつ電気的に直列に接続された複数層の信号導体を有し、前記複数層の信号導体が平面視同一形状で、かつ前記複数層の信号導体の水平方向の位置が同一であることを特徴とするものである。
また、本発明の分波器の1構成例において、前記位相線路は、前記誘電体と前記複数層の信号導体とからなる単位構造を、前記2層のGND導体の間に複数積層して、各単位構造の間を前記2層のGND導体とは別のGND導体で分離し、各単位構造の信号導体を電気的に直列に接続したものである。
また、本発明の分波器の1構成例において、前記複数層の信号導体は2層である。
The present invention also provides a transmission filter that passes only a transmission signal from a transmission circuit and supplies the signal to an antenna, and passes only a predetermined reception signal among high-frequency signals received by the antenna and supplies the reception circuit to the reception circuit In a duplexer comprising a receiving filter and an impedance matching phase line provided between the antenna and the input terminal of the receiving filter, the phase line is sandwiched between two layers of GND conductors. A plurality of signal conductors separated from each other by the dielectric and electrically connected in series are provided inside the dielectric, and the signal conductors of the plurality of layers have the same shape in plan view, and The position of the signal conductor in the horizontal direction is the same.
Further, in one configuration example of the duplexer of the present invention, the phase line is formed by laminating a plurality of unit structures composed of the dielectric and the plurality of signal conductors between the two GND conductors, Each unit structure is separated by a GND conductor different from the two layers of GND conductors, and signal conductors of each unit structure are electrically connected in series.
In one configuration example of the duplexer of the present invention, the signal conductors of the plurality of layers are two layers.

本発明によれば、2層のGND導体で挟まれた誘電体の内部に複数層の信号導体を設けることにより、GND導体間の信号導体が1層である従来の構造に対して、位相線路を小型化することができ、また位相線路を用いる分波器を小型化することができる。また、複数層の信号導体を平面視同一形状とし、かつ複数層の信号導体の水平方向の位置を同一とすることにより、位相線路による挿入損失の増加を抑制することができる。また、本発明では、各線路間の水平方向の距離を小さくすることなく、線路長を増やすことができるため、線路間の結合によるインピーダンス低下を避けることができる。また、線路間の距離が大きいことから、線路間にビアホールを多数形成することができるため、2層のGND導体間の不要なインダクタンス成分を減らすことができる。さらに、本発明では、複数層の信号導体を平面視同一形状とすることにより、位相線路の作製時に各信号導体層の形成が容易になるという効果が得られる。   According to the present invention, by providing a plurality of layers of signal conductors inside a dielectric sandwiched between two layers of GND conductors, a phase line can be used as compared with the conventional structure in which the signal conductors between the GND conductors are one layer. The duplexer using the phase line can be miniaturized. Further, by making the signal conductors of the plurality of layers have the same shape in plan view and making the positions in the horizontal direction of the signal conductors of the plurality of layers the same, an increase in insertion loss due to the phase line can be suppressed. Further, in the present invention, the line length can be increased without reducing the horizontal distance between the lines, so that impedance reduction due to coupling between lines can be avoided. In addition, since the distance between the lines is large, a large number of via holes can be formed between the lines, so that an unnecessary inductance component between the two GND conductors can be reduced. Furthermore, in the present invention, by making the signal conductors of the plurality of layers have the same shape in plan view, it is possible to obtain an effect that the formation of each signal conductor layer is facilitated when the phase line is manufactured.

また、本発明では、誘電体と複数層の信号導体とからなる単位構造を、2層のGND導体の間に複数積層することにより、単位構造当たりの線路長を短くすることができ、位相線路の面積を大幅に削減することができる。   Further, in the present invention, the line length per unit structure can be shortened by laminating a plurality of unit structures composed of a dielectric and a plurality of layers of signal conductors between two layers of GND conductors. Can be significantly reduced.

また、本発明では、2層のGND導体で挟まれた誘電体の内部に設ける信号導体を2層とすることにより、位相線路の特性インピーダンスの調整を容易にすることができる。   In the present invention, the characteristic impedance of the phase line can be easily adjusted by using two signal conductors provided inside the dielectric sandwiched between two layers of GND conductors.

[第1の実施の形態]
以下、本発明の実施の形態について図面を参照して説明する。図1(A)は本発明の第1の実施の形態となる分波器のパッケージ(以下、PKGとする)の概略構成を示す平面図、図1(B)は図1(A)の分波器のA−A線断面図である。本実施の形態においても、分波器としての構成は図5に示したとおりである。
[First Embodiment]
Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1A is a plan view showing a schematic configuration of a duplexer package (hereinafter referred to as PKG) according to a first embodiment of the present invention, and FIG. 1B is a diagram of FIG. It is an AA line sectional view of a waver. Also in the present embodiment, the configuration as a duplexer is as shown in FIG.

図1(A)の分波器のGND導体11aを上から透視した図を図2(A)に示し、信号導体13aを上から透視した図を図2(B)に示し、信号導体13bを上から透視した図を図2(C)に示し、GND導体11bを上から透視した図を図2(D)に示す。
図1(A)に示す面は、チップダイボンド面であり、このチップダイボンド面に送信用フィルタ1及び受信用フィルタ2が搭載され、図示しないワイヤーあるいはバンプによりパッド15,16及びその他のパッドに適切に接続される。
FIG. 2A shows a perspective view of the GND conductor 11a of the duplexer in FIG. 1A from above, FIG. 2B shows a perspective view of the signal conductor 13a from above, and shows the signal conductor 13b. FIG. 2C shows a view seen through from above, and FIG. 2D shows a view seen through the GND conductor 11b from above.
The surface shown in FIG. 1A is a chip die-bonding surface, and the transmitting filter 1 and the receiving filter 2 are mounted on the chip die-bonding surface, and suitable for the pads 15 and 16 and other pads by wires or bumps (not shown). Connected to.

本実施の形態の分波器で用いる位相線路(分波回路3)は、2層のGND導体11a,11bで挟まれた誘電体12の内部に、誘電体12によって互いに隔てられ、かつ電気的に直列に接続された複数層の信号導体13a,13bを設け、複数層の信号導体13a,13bを平面視同一形状とし、かつ信号導体13a,13bの水平方向(図2における紙面と平行な方向)の位置を同一としたものである。図1において、14はGND導体11a上に形成された誘電体、15,16は誘電体14上に形成された、導体からなるチップ接続用パッドである。   The phase line (demultiplexing circuit 3) used in the duplexer of the present embodiment is separated from each other by the dielectric 12 inside the dielectric 12 sandwiched between the two layers of the GND conductors 11a and 11b, and is electrically The signal conductors 13a and 13b connected in series to each other are provided, the signal conductors 13a and 13b in the plurality of layers have the same shape in plan view, and the horizontal direction of the signal conductors 13a and 13b (direction parallel to the paper surface in FIG. 2) ) In the same position. In FIG. 1, 14 is a dielectric formed on the GND conductor 11a, and 15 and 16 are chip connection pads formed on the dielectric 14 and made of a conductor.

図1(B)、図2(B)、図2(C)に示すように、信号導体13aと13bの各々の一端はビアホール17により互いに接続され、信号導体13aの他端はビアホール18によりパッド15に接続され、信号導体13bの他端はビアホール19によりパッド16に接続されている。パッド15は受信用フィルタ2の入力端子と接続され、パッド16は図示しないアンテナ及び送信用フィルタ1の出力端子と接続される。また、GND導体11aと11bとはビアホール20により互いに接続されている。   As shown in FIGS. 1B, 2B, and 2C, one end of each of the signal conductors 13a and 13b is connected to each other by a via hole 17, and the other end of the signal conductor 13a is padded by a via hole 18. 15 and the other end of the signal conductor 13 b is connected to the pad 16 by a via hole 19. The pad 15 is connected to an input terminal of the reception filter 2, and the pad 16 is connected to an antenna (not shown) and an output terminal of the transmission filter 1. The GND conductors 11 a and 11 b are connected to each other by a via hole 20.

以上のような分波器のPKGは、GND導体11bからパッド15,16までの各層を順次積層した後に焼成して、その後に送信用フィルタ1及び受信用フィルタ2をチップダイボンド面に搭載することにより、作製される。   In the duplexer PKG as described above, the layers from the GND conductor 11b to the pads 15 and 16 are sequentially stacked and then fired, and then the transmitting filter 1 and the receiving filter 2 are mounted on the chip die bond surface. Is produced.

PKGの基材となる誘電体12,14としては比誘電率9.6の低温焼成セラミックス(LTCC)を用い、GND導体11a,11b、信号導体13a,13b及びパッド15,16を構成する導体材料としてはCuを用いた。
本実施の形態では、800MHz帯のCDMA用分波器を想定し、位相線路の電気長を規定するための基準周波数を880MHzとしている。そして、位相線路の特性インピーダンスが50Ωとなるように、GND導体11aと信号導体13aとの間の誘電体12の厚さt1、信号導体13aと13bとの間の誘電体12の厚さt2、信号導体13bとGND導体11bとの間の誘電体12の厚さt3をそれぞれ150μmとし、信号導体13a,13bの幅を75μmとした。
As the dielectrics 12 and 14 serving as the base material of the PKG, a low-temperature fired ceramic (LTCC) having a relative dielectric constant of 9.6 is used, and a conductor material constituting the GND conductors 11a and 11b, the signal conductors 13a and 13b, and the pads 15 and 16 Cu was used.
In this embodiment, an 800 MHz band CDMA duplexer is assumed, and the reference frequency for defining the electrical length of the phase line is 880 MHz. The thickness t1 of the dielectric 12 between the GND conductor 11a and the signal conductor 13a, the thickness t2 of the dielectric 12 between the signal conductors 13a and 13b, so that the characteristic impedance of the phase line is 50Ω. The thickness t3 of the dielectric 12 between the signal conductor 13b and the GND conductor 11b was 150 μm, and the width of the signal conductors 13a and 13b was 75 μm.

本実施の形態では、誘電体12の比誘電率が9.6であることを考慮して、電気長がλ/4となるように線路長(信号導体13aと13bの合計の長さ)を27.5mmに設定している。また、線路間の結合を防ぐため、信号導体13a,13bの各線路間の水平方向の距離(図2(B)、図2(C)のD)を十分離して配置した。   In the present embodiment, considering that the relative permittivity of the dielectric 12 is 9.6, the line length (total length of the signal conductors 13a and 13b) is set so that the electrical length is λ / 4. It is set to 27.5 mm. Further, in order to prevent coupling between the lines, the horizontal distances (D in FIGS. 2B and 2C) between the lines of the signal conductors 13a and 13b are arranged sufficiently separated.

発明者は、特許文献2に開示されたように信号導体を3層にすると、位相線路の特性インピーダンスの調整が難しくなることをシミュレーションにより確認した。このため、特許文献2に開示された位相線路では、信号導体の形状を各層毎に変えて、特性インピーダンスを調整するようにしている。しかし、信号導体の形状を各層毎に変えると、位相線路による挿入損失(インサーションロス)が大きくなるという問題がある。   The inventor has confirmed through simulation that it is difficult to adjust the characteristic impedance of the phase line when the signal conductor has three layers as disclosed in Patent Document 2. For this reason, in the phase line disclosed in Patent Document 2, the characteristic impedance is adjusted by changing the shape of the signal conductor for each layer. However, if the shape of the signal conductor is changed for each layer, there is a problem that insertion loss (insertion loss) due to the phase line increases.

そこで、本実施の形態では、複数層の信号導体を平面視同一形状とし、かつこの複数層の信号導体の水平方向の位置を同一としたものである。これにより、本実施の形態では、挿入損失の増加を抑制することができる。そして、本実施の形態では、信号導体を13aと13bの2層とした。信号導体を2層にすれば、位相線路の特性インピーダンスを50Ωに調整することが容易になることはシミュレーションにより確認した。位相線路の特性インピーダンスに関係のあるパラメータは、誘電体12,14の比誘電率と、誘電率12の厚さt1,t2,t3と、信号導体13a,13bの幅と、信号導体13a,13bの厚さと、線路長である。   Therefore, in the present embodiment, the signal conductors in the plurality of layers have the same shape in plan view, and the horizontal positions of the signal conductors in the plurality of layers are the same. Thereby, in this Embodiment, the increase in insertion loss can be suppressed. In this embodiment, the signal conductor has two layers 13a and 13b. It was confirmed by simulation that it is easy to adjust the characteristic impedance of the phase line to 50Ω by using two signal conductors. Parameters related to the characteristic impedance of the phase line are the relative permittivity of the dielectrics 12, 14, the thickness t1, t2, t3 of the permittivity 12, the width of the signal conductors 13a, 13b, and the signal conductors 13a, 13b. And the line length.

本実施の形態では、2層のGND導体で挟まれた誘電体の内部に2層の信号導体を設けることにより、GND導体間の信号導体が1層である従来の構造に対して、ほぼ同じ厚さの誘電体を用いて、2倍の長さの線路長を同じ面積内に形成することができる。言い換えると、GND導体間の信号導体が1層である従来の構造では、本実施の形態と同じ線路長を同じ面積で実現しようとすると、図6に示した構成を図3のように積層する必要がある。   In this embodiment, by providing two layers of signal conductors inside a dielectric sandwiched between two layers of GND conductors, the structure is almost the same as that of the conventional structure in which the signal conductor between the GND conductors is one layer. Using a dielectric having a thickness, a double line length can be formed in the same area. In other words, in the conventional structure in which the signal conductor between the GND conductors is a single layer, the configuration shown in FIG. 6 is laminated as shown in FIG. There is a need.

図3において、101a,101b,101cはGND導体、102a,102b,104は誘電体、103a,103bは信号導体、105,106はチップ接続用のパッド、107は信号導体103aと103bの一端を接続するビアホール、108は信号導体103aの他端とパッド105とを接続するビアホール、109は信号導体103bの他端とパッド106とを接続するビアホール、120はGND導体101aと101bと101cとを接続するビアホールである。図1(B)と図3とを比較すると、図1(B)における誘電体14の上面からGND導体11bまでの厚さが、図3における誘電体104の上面からGND導体101bまでの厚さとほぼ同じである。したがって、本実施の形態では、GND導体間の信号導体が1層である従来の構造と比べて位相線路を小型化することができ、また位相線路を用いる分波器を小型化することができる。   In FIG. 3, 101a, 101b and 101c are GND conductors, 102a, 102b and 104 are dielectrics, 103a and 103b are signal conductors, 105 and 106 are pads for chip connection, and 107 is one end of signal conductors 103a and 103b. 108 is a via hole that connects the other end of the signal conductor 103a and the pad 105, 109 is a via hole that connects the other end of the signal conductor 103b and the pad 106, and 120 is a connection between the GND conductors 101a, 101b, and 101c. It is a via hole. Comparing FIG. 1B and FIG. 3, the thickness from the top surface of the dielectric 14 to the GND conductor 11b in FIG. 1B is the same as the thickness from the top surface of the dielectric 104 to the GND conductor 101b in FIG. It is almost the same. Therefore, in this embodiment, the phase line can be reduced in size as compared with the conventional structure in which the signal conductor between the GND conductors is a single layer, and the duplexer using the phase line can be reduced in size. .

また、本実施の形態では、複数層の信号導体を平面視同一形状(正確にはビアホール18,19の箇所が異なるので略同一形状)とし、かつ複数層の信号導体の水平方向の位置を同一とすることにより、特許文献2に開示された位相線路と比べて挿入損失の増加を抑制することができ、さらに信号導体を2層とすることで、位相線路の特性インピーダンスの調整を容易にすることができる。また、本実施の形態では、各線路間の水平方向の距離Dを小さくすることなく、線路長を増やすことができるため、線路間の結合によるインピーダンス低下を避けることができる。また、線路間の距離Dが大きいことから、線路間にビアホール20を多数形成することができるため、GND導体11aと11b間の不要なインダクタンス成分を減らすことができる。さらに、本実施の形態では、複数層の信号導体を平面視同一形状とすることにより、位相線路の作製時に各信号導体層の形成が容易になるという効果が得られる。   In the present embodiment, the signal conductors in the plurality of layers have the same shape in plan view (precisely, since the positions of the via holes 18 and 19 are different), and the horizontal positions of the signal conductors in the plurality of layers are the same. By doing so, an increase in insertion loss can be suppressed as compared with the phase line disclosed in Patent Document 2, and the characteristic impedance of the phase line can be easily adjusted by using two signal conductors. be able to. In the present embodiment, the line length can be increased without reducing the horizontal distance D between the lines, so that impedance reduction due to coupling between lines can be avoided. In addition, since the distance D between the lines is large, a large number of via holes 20 can be formed between the lines, so that unnecessary inductance components between the GND conductors 11a and 11b can be reduced. Furthermore, in the present embodiment, by making the signal conductors of the plurality of layers have the same shape in plan view, it is possible to obtain an effect that each signal conductor layer can be easily formed when the phase line is manufactured.

なお、本実施の形態では、位相線路を内蔵するPKGの基材(誘電体12,14)としてLTCCを用いたが、これに限るものではなく、アルミナや樹脂を用いてもよい。また、GND導体11a,11b、信号導体13a,13b及びパッド15,16を構成する導体材料としてCuを用いたが、タングステンやAgなどを用いてもよい。また、これらの導体には酸化防止用のNiAuメッキ等の表面処理をしてもよい。また、誘電体12や信号導体13a,13bの厚さ、信号導体13a,13bの幅、線路長などは、使用する基材の比誘電率と使用する周波数及び要求特性により設定すればよく、上記の値には限定されない。   In this embodiment, LTCC is used as the base material (dielectric bodies 12 and 14) of the PKG incorporating the phase line. However, the present invention is not limited to this, and alumina or resin may be used. Further, although Cu is used as a conductor material constituting the GND conductors 11a and 11b, the signal conductors 13a and 13b, and the pads 15 and 16, tungsten, Ag, or the like may be used. These conductors may be subjected to a surface treatment such as NiAu plating for preventing oxidation. Further, the thickness of the dielectric 12 and the signal conductors 13a and 13b, the width of the signal conductors 13a and 13b, the line length, etc. may be set according to the relative dielectric constant of the base material used, the frequency used and the required characteristics. It is not limited to the value of.

[第2の実施の形態]
図4は本発明の第2の実施の形態となる分波器のPKGの概略構成を示す断面図であり、図1、図2と同一の構成には同一の符号を付してある。第1の実施の形態で説明した誘電体と複数層の信号導体とからなる単位構造を、GND導体11aと11bの間に複数積層するようにしてもよい。図4の例は、単位構造を2層積層したものである。
[Second Embodiment]
FIG. 4 is a sectional view showing a schematic configuration of the PKG of the duplexer according to the second embodiment of the present invention. The same configurations as those in FIGS. 1 and 2 are denoted by the same reference numerals. A plurality of unit structures composed of the dielectric and the plurality of layers of signal conductors described in the first embodiment may be stacked between the GND conductors 11a and 11b. In the example of FIG. 4, two unit structures are stacked.

誘電体12a及び信号導体13a,13bからなる単位構造と、誘電体12b及び信号導体13c,13dからなる単位構造とは、GND導体11cにより分離される。第1の実施の形態と同様に、信号導体13aと13bの各々の一端はビアホール17により互いに接続され、また信号導体13cと13dの各々の一端はビアホール21により互いに接続されている。そして、図4では図示していないが、信号導体13bの他端と信号導体13cの他端との間、信号導体13aの他端とパッド15との間、信号導体13dの他端とパッド16との間、GND導体11aと11bと11cとの間が、それぞれ図示しないビアホールにより接続されている。   The unit structure composed of the dielectric 12a and the signal conductors 13a and 13b and the unit structure composed of the dielectric 12b and the signal conductors 13c and 13d are separated by the GND conductor 11c. Similarly to the first embodiment, one end of each of the signal conductors 13 a and 13 b is connected to each other by a via hole 17, and one end of each of the signal conductors 13 c and 13 d is connected to each other by a via hole 21. Although not shown in FIG. 4, the other end of the signal conductor 13b and the other end of the signal conductor 13c, the other end of the signal conductor 13a and the pad 15, and the other end of the signal conductor 13d and the pad 16 are provided. The GND conductors 11a, 11b, and 11c are connected to each other by via holes (not shown).

これにより、本実施の形態では、PKGが厚くなる代わりに、単位構造当たりの線路長を短くすることができるので、PKGの面積を大幅に削減することができる。
なお、1つの単位構造内にある信号導体13a,13b(あるいは13c,13d)については水平方向の位置が同一であることが必要となるが、異なる単位構造の間では信号導体の水平方向の位置がずれていても構わない。
また、第1、第2の実施の形態では、各層のGND導体をそれぞれ単一の板で構成しているが、これに限るものではなく、各層のGND導体をそれぞれ複数に分割してもよい。同一層の複数のGND導体を外部で互いに接続すれば、単一の板と同等の構成になる。
Thereby, in this Embodiment, since the line length per unit structure can be shortened instead of thickening PKG, the area of PKG can be reduced significantly.
The signal conductors 13a and 13b (or 13c and 13d) in one unit structure need to have the same horizontal position, but the signal conductors in the horizontal direction are different between different unit structures. May be off.
In the first and second embodiments, the GND conductor of each layer is configured by a single plate. However, the present invention is not limited to this, and the GND conductor of each layer may be divided into a plurality of parts. . If a plurality of GND conductors in the same layer are connected to each other externally, the configuration is equivalent to that of a single plate.

本発明は、インピーダンス整合用の位相線路、及び位相線路を用いた分波器に適用することができる。   The present invention can be applied to a phase line for impedance matching and a duplexer using the phase line.

本発明の第1の実施の形態となる分波器のパッケージの概略構成を示す平面図(A)及び断面図(B)である。1A and 1B are a plan view and a cross-sectional view showing a schematic configuration of a duplexer package according to a first embodiment of the present invention. 図1の分波器の上層のGND導体を上から透視した図(A)、上層の信号導体を上から透視した図(B)、下層の信号導体を上から透視した図(C)、及び下層のGND導体を上から透視した図(D)である。FIG. 1A is a perspective view of the upper layer GND conductor of FIG. 1 from above, FIG. 2B is a perspective view of the upper signal conductor, FIG. 1C is a perspective view of the lower signal conductor from above, and FIG. It is the figure (D) which saw through the GND conductor of the lower layer from the top. 図1の位相線路と同特性の位相線路をGND導体間の信号導体が1層の構造で実現した場合の断面図である。It is sectional drawing when the signal conductor between GND conductors implement | achieves the phase line of the same characteristic as the phase line of FIG. 1 by the structure of one layer. 本発明の第2の実施の形態となる分波器のパッケージの概略構成を示す断面図である。It is sectional drawing which shows schematic structure of the package of the duplexer used as the 2nd Embodiment of this invention. 分波器の一般的構成を示すブロック図である。It is a block diagram which shows the general structure of a splitter. 従来の位相線路の構成を示す断面図である。It is sectional drawing which shows the structure of the conventional phase track.

符号の説明Explanation of symbols

1…送信用フィルタ、2…受信用フィルタ、3…分波回路、11a、11b、11c…GND導体、12、12a、12b、14…誘電体、13a、13b、13c、13d…信号導体、15、16…パッド、17、18、19、20、21…ビアホール。
DESCRIPTION OF SYMBOLS 1 ... Transmission filter, 2 ... Reception filter, 3 ... Demultiplexing circuit, 11a, 11b, 11c ... GND conductor, 12, 12a, 12b, 14 ... Dielectric, 13a, 13b, 13c, 13d ... Signal conductor, 15 , 16 ... pads, 17, 18, 19, 20, 21 ... via holes.

Claims (6)

2層のGND導体で挟まれた誘電体の内部に、前記誘電体によって互いに隔てられ、かつ電気的に直列に接続された複数層の信号導体を有し、
前記複数層の信号導体が平面視同一形状で、かつ前記複数層の信号導体の水平方向の位置が同一であることを特徴とする位相線路。
In a dielectric sandwiched between two layers of GND conductors, a plurality of signal conductors separated from each other by the dielectric and electrically connected in series,
The phase line, wherein the signal conductors of the plurality of layers have the same shape in plan view, and the horizontal positions of the signal conductors of the plurality of layers are the same.
請求項1記載の位相線路において、
前記誘電体と前記複数層の信号導体とからなる単位構造を、前記2層のGND導体の間に複数積層して、各単位構造の間を前記2層のGND導体とは別のGND導体で分離し、各単位構造の信号導体を電気的に直列に接続したことを特徴とする位相線路。
The phase line according to claim 1,
A plurality of unit structures composed of the dielectric and the plurality of layers of signal conductors are stacked between the two layers of GND conductors, and each unit structure is separated by a GND conductor different from the two layers of GND conductors. A phase line characterized in that the signal conductors of each unit structure are separated and electrically connected in series.
請求項1又は2記載の位相線路において、
前記複数層の信号導体は2層であることを特徴とする位相線路。
In the phase line according to claim 1 or 2,
2. The phase line according to claim 1, wherein the signal conductors of the plurality of layers are two layers.
送信回路からの送信信号のみを通過させてアンテナに供給する送信用フィルタと、前記アンテナで受信された高周波信号のうち所定の受信信号のみを通過させて受信回路に供給する受信用フィルタと、前記アンテナと前記受信用フィルタの入力端子との間に設けられたインピーダンス整合用の位相線路とからなる分波器において、
前記位相線路は、2層のGND導体で挟まれた誘電体の内部に、前記誘電体によって互いに隔てられ、かつ電気的に直列に接続された複数層の信号導体を有し、前記複数層の信号導体が平面視同一形状で、かつ前記複数層の信号導体の水平方向の位置が同一であることを特徴とする分波器。
A transmission filter that passes only a transmission signal from the transmission circuit and supplies the antenna to the antenna; a reception filter that passes only a predetermined reception signal among the high-frequency signals received by the antenna and supplies the reception circuit; and In the duplexer consisting of an impedance matching phase line provided between the antenna and the input terminal of the reception filter,
The phase line includes a plurality of signal conductors separated from each other by the dielectric and electrically connected in series inside a dielectric sandwiched between two layers of GND conductors. A duplexer, wherein the signal conductors have the same shape in plan view, and the signal conductors in the plurality of layers have the same horizontal position.
請求項4記載の分波器において、
前記位相線路は、前記誘電体と前記複数層の信号導体とからなる単位構造を、前記2層のGND導体の間に複数積層して、各単位構造の間を前記2層のGND導体とは別のGND導体で分離し、各単位構造の信号導体を電気的に直列に接続したものであることを特徴とする分波器。
The duplexer according to claim 4, wherein
The phase line is formed by laminating a plurality of unit structures composed of the dielectric and the signal conductors of the plurality of layers between the two layers of GND conductors, and between the unit structures, the two layers of GND conductors. A duplexer that is separated by another GND conductor and in which the signal conductors of each unit structure are electrically connected in series.
請求項4又は5記載の分波器において、
前記複数層の信号導体は2層であることを特徴とする分波器。
The duplexer according to claim 4 or 5,
The duplexer is characterized in that the signal conductors of the plurality of layers are two layers.
JP2005019279A 2005-01-27 2005-01-27 Phase line and duplexer Expired - Fee Related JP4473147B2 (en)

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