JP3999222B2 - フリップチップ実装方法およびフリップチップ実装構造 - Google Patents
フリップチップ実装方法およびフリップチップ実装構造 Download PDFInfo
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- JP3999222B2 JP3999222B2 JP2004273680A JP2004273680A JP3999222B2 JP 3999222 B2 JP3999222 B2 JP 3999222B2 JP 2004273680 A JP2004273680 A JP 2004273680A JP 2004273680 A JP2004273680 A JP 2004273680A JP 3999222 B2 JP3999222 B2 JP 3999222B2
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- Prior art keywords
- flip chip
- wiring board
- printed wiring
- bump
- chip mounting
- Prior art date
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16237—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area disposed in a recess of the surface of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
Landscapes
- Wire Bonding (AREA)
Description
216 樹脂層
218 導体パッド
220 半導体チップ(フリップチップ)
222 金バンプ
224 接着剤
Claims (7)
- フリップチップのバンプをプリント配線板の導体パッドに位置合わせしてフリップチップを熱硬化型非導電性接着剤で固定するフリップチップ実装方法において、
a)導体パッドを除いて前記プリント配線板の少なくとも前記フリップチップの固定領域に、前記バンプよりも熱膨張率が大きく、かつ前記バンプの高さ(h)と導体パッドの厚さ(t)との和(h+t)よりも僅かに薄い樹脂層を形成する;
b)前記プリント配線板のフリップチップ実装位置に熱硬化型非導電性接着剤を供給する;
c)フリップチップのバンプをプリント配線板の導体パッドに位置合わせし、フリップチップを所定の圧力でプリント配線板に押圧して保持する;
d)プリント配線板を加熱し前記熱硬化型非導電性接着剤を硬化させる;
e)冷却する;
f)フリップチップの押圧力を除く;
以上の各工程を順次行うフリップチップ実装方法。 - 工程a)で形成する樹脂層は感光性樹脂である請求項1のフリップチップ実装方法。
- 工程a)で形成する樹脂層は、ガラス転移温度が接着剤の硬化温度よりも低いエポキシ系樹脂である請求項1のフリップチップ実装方法。
- フリップチップのバンプはワイヤーボンディングにより形成された金バンプである請求項1〜3のいずれかのフリップチップ実装方法。
- 請求項1〜4のいずれかにおいて、工程c)と工程d)を同時に行うフリップチップ実装方法。
- フリップチップのバンプをプリント配線板の導体パッドに位置合わせしてフリップチップを熱硬化型非導電性接着剤で固定するフリップチップ実装方法において、
a)導体パッドを除いて前記プリント配線板の少なくとも前記フリップチップの固定領域に前記バンプよりも熱膨張率が大きく、かつ前記バンプの高さ(h)と導体パッドの厚さ(t)との和(h+t)よりも僅かに薄い樹脂層を形成する;
b)前記プリント配線板のフリップチップ実装位置に熱硬化型非導電性接着剤を供給する;
c)フリップチップのバンプをプリント配線板の導体パッドに位置合わせし、フリップチップを所定の圧力でプリント配線板に押圧して保持する;
d)プリント配線板を加熱し前記熱硬化型非導電性接着剤を硬化させる;
e′)フリップチップの押圧力を除く;
f′)冷却する;
以上の各工程を順次行うフリップチップ実装方法。 - フリップチップのバンプをプリント配線板の導体パッドに位置合わせしてフリップチップを熱硬化型非導電性接着剤で固定したフリップチップ実装構造において、
導体パッドを除いて前記プリント配線板の少なくとも前記フリップチップの固定領域に前記バンプよりも熱膨張率が大きくかつ前記バンプの高さ(h)と導体パッドの厚さ(t)との和(h+t)よりも僅かに薄く形成された樹脂層と、前記プリント配線板とフリップチップとの間に供給され硬化された熱硬化型非導電性接着剤と、を備え、
前記樹脂層の収縮量と前記バンプの収縮量との差によって前記バンプと前記導体パッドとの間に接触圧を発生させたことを特徴とするフリップチップ実装構造。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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JP2004273680A JP3999222B2 (ja) | 2000-05-31 | 2004-09-21 | フリップチップ実装方法およびフリップチップ実装構造 |
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JP2000161924 | 2000-05-31 | ||
JP2004273680A JP3999222B2 (ja) | 2000-05-31 | 2004-09-21 | フリップチップ実装方法およびフリップチップ実装構造 |
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JP2000229507A Division JP2002057186A (ja) | 2000-05-31 | 2000-07-28 | フリップチップ実装方法およびプリント配線板 |
Publications (2)
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JP2004356662A JP2004356662A (ja) | 2004-12-16 |
JP3999222B2 true JP3999222B2 (ja) | 2007-10-31 |
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JP2004273680A Expired - Lifetime JP3999222B2 (ja) | 2000-05-31 | 2004-09-21 | フリップチップ実装方法およびフリップチップ実装構造 |
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Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
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KR100601487B1 (ko) | 2004-12-20 | 2006-07-18 | 삼성전기주식회사 | 열팽창 필름을 이용한 플립칩 본딩 방법 |
JP4687273B2 (ja) * | 2005-06-23 | 2011-05-25 | 住友電気工業株式会社 | 電子部品の実装方法 |
JP2007071980A (ja) * | 2005-09-05 | 2007-03-22 | Mitsubishi Electric Corp | 光モジュール |
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