JP3487204B2 - Liquid crystal display device and active matrix substrate for liquid crystal display device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly to a structure technology of a light shielding layer such as a black matrix formed on the side of an active matrix substrate.

[0002]

2. Description of the Related Art In a liquid crystal display device which is a typical flat panel type display, as shown in FIGS. 28 and 29, a data line (source line) for supplying an image signal.
.. and gate lines 503a, 503b ... For transmitting scanning signals are arranged in a grid pattern, and one side transparent substrate in which each pixel region 501aa, 501ab .. A liquid crystal 540 is enclosed between the common electrode 533 and the other transparent substrate 530 (counter substrate) on the other side, and the common electrode 533 and the pixel electrodes 515506 of the respective pixel regions 501aa, 501ab.
The pixel regions 501aa, 501 are controlled by controlling the potential applied between them and the thin film transistor (TFT) 508.
The liquid crystal alignment state is changed for each ab. In such a liquid crystal display device, for example, as shown in FIG. 29, a data line 502a and a pixel electrode 506 are provided.
There is a problem that light leakage (shown by an arrow A) from the gap between and deteriorates the display quality. Further, a reverse tilt domain region in which the alignment state of the liquid crystal is disturbed due to the influence of the electric field between the data line 502a and the pixel electrode 506 is generated inside the outer edge of the pixel electrode 506, and due to the region, a display tilt is generated. There is also a problem that the quality is degraded. Therefore, for the purpose of increasing the saturation of the display for each pixel,
The other side transparent substrate 530 on which the common electrode 533 is formed
A black matrix 531 having a light-shielding property is formed corresponding to the boundary area between the pixel areas, and the two transparent substrates 509 and 530 are opposed to each other so that the black matrix 531 is located in the boundary area between the pixel areas. The display quality is secured. Here, if a positional deviation occurs between the boundary area between the respective picture areas and the black matrix 531, the display quality deteriorates, and therefore the above-mentioned positional deviation is caused by providing a margin in the width of the black matrix 531. It prevents it from happening.

[0003]

However, in the liquid crystal display device, under the circumstances where the display size is increased and the display quality is improved, the width of the black matrix is reduced as in the conventional case. The widening with a margin causes a problem that the aperture ratio (area ratio of the displayable region) in the pixel region is lowered and the improvement of the display quality is hindered. Therefore, the inventor of the present application prevents the misalignment between the boundary area between the pixel areas and the black matrix by forming a black matrix on the side of the transparent substrate on which the matrix array is formed, and reduces the width of the black matrix. It is proposed that the width can be set to the minimum necessary. Along with this proposal, what the present inventor first devised is a liquid crystal display device shown as a comparative example in FIGS. 30 and 31. In these figures, the data lines 502a, 502b ... On the front surface side of the transparent substrate 509.
.. and gate lines 503a, 503b ... Are arranged in a grid pattern to form pixel regions 501aa, 501ab ... By partitioning these pixel regions 501aa, 501ab.
A black matrix 517 is formed along the boundary region of 501ab. Here, the black matrix 517 is, for example, in the pixel region 501bb,
Interlayer insulating films 513 and 51 are formed on the front surface side of a TFT 508 formed by a source 504 conductively connected to the data line 502a, a gate electrode 505 conductively connected to the gate line 503a, and a drain 507 conductively connected to the pixel electrode 506.
5, the data line 502a, the gate line 503a, and the pixel electrode 506 are insulated and separated from each other. In the liquid crystal display device having such a configuration, each pixel region and the black matrix 517 can be aligned with high accuracy without providing an unnecessary margin in the width of the black matrix 517, so that the aperture ratio of the liquid crystal display device is increased. Not sacrificial. However,
This liquid crystal display device has the following new problems. Since no potential is applied to the black matrix 517 and it is in a floating state,
The potential of the black matrix 517 fluctuates depending on the operation state of the liquid crystal display device, and the fluctuation of the potential disturbs the alignment state of the liquid crystal existing between the pixel electrode 506 and the common electrode of the transparent substrate on the other side, thereby causing a display failure. It reduces the quality. In addition, any of the pixel regions 501aa and 501ab
Since the black matrix 517 for ... Is also common, for example, the black matrix 517 is the pixel electrode 506 of the image region 501bb and the data lines 502a, 50.
If it is short-circuited with 2b or the gate lines 503a, 503b, etc., the liquid crystal display device as a whole becomes defective in display.

[0004]

[Means for Solving the Problems] In view of the above problems,
In the present invention, by optimizing the structure of the black matrix formed on the same substrate as the matrix array, without sacrificing display quality or reliability,
For the purpose of realizing a liquid crystal display device capable of improving the aperture ratio, the following means are taken for the liquid crystal display device.

According to the present invention, a plurality of gate lines, a plurality of data lines intersecting with the plurality of gate lines, the gate lines and thin film transistors provided corresponding to the data lines, and the plurality of gate lines. A liquid crystal display device having a pixel region formed of the plurality of data lines, wherein the data line is in a layer above the thin film transistor and is connected to a source of the thin film transistor, and is in the same layer as the data line. And a conductive connection layer connected to the drain of the thin film transistor, and two adjacent scan lines and two adjacent scan lines that are above the conductive connection layer and that are connected to the conductive connection layer and that form the pixel region. A conductive light-shielding layer that overlaps the data line and a pixel electrode that is conductively connected to the conductive light-shielding layer are provided.

[0006]

[0007]

[0008]

[0009]

[0010]

[0011]

[0012]

[0013]

[0014]

[0015]

[0016]

[0017]

[0018]

DESCRIPTION OF THE PREFERRED EMBODIMENTS (Embodiment 1) FIG. 1 is a plan view showing a part of a matrix array of a liquid crystal display device according to Embodiment 1 of the present invention, and FIG. 2 is a sectional view taken along the line I--I. Is.

In the liquid crystal display device of this example, as shown in FIG. 1, the vertical data lines 102a, 102b ...
-(Signal line) and horizontal gate lines 103a and 103
b (scanning lines) are arranged in a grid pattern, and the pixel regions 101aa, 101ab, 101ac, 1
01ba, 101bb, ... Are sectioned.

The structure of the pixel area 101bb (first pixel area) will be described below as an example. Here, in the pixel area 101bb, the pixel areas 101ab, 101ba,
101cb and 101bc (second pixel region) are adjacent to each other, and a source 104 to which the data line 102a is conductively connected, a gate electrode 105 to which the gate line 103b is conductively connected, and a pixel electrode 106 are conductively connected to the pixel region 101bb. The TFT 107 is configured by the drain 107 that operates. Here, the pixel electrode 106 is a transparent electrode made of ITO and is formed over substantially the entire surface of the pixel region 101bb.

As shown in FIG. 2, the TFT 108 has a sectional structure of a transparent substrate 109 for supporting the entire liquid crystal display device.
A polycrystalline silicon layer 110 is formed on the surface side of
Except for the channel region 111 which is an intrinsic polycrystalline silicon region, phosphorus as an n-type impurity is introduced into the polycrystalline silicon layer 110 to form a source 104 and a drain 107. Here, the introduction of phosphorus is
Ion implantation using the gate electrode 105 on the gate electrode oxide film 112 formed on the surface side of the polycrystalline silicon layer 110 as a mask is used so that the source 104 and the drain 107 are self-aligned. A lower interlayer insulating film 113 made of a silicon oxide film is deposited on the front surface side of the TFT 108, and a first connecting hole 113a and a second connecting hole 113b are opened in the lower interlayer insulating film 113. The data line 102a made of a low resistance metal layer, for example, an aluminum layer or an alloy layer containing aluminum is conductively connected to the source 104 through the first connection hole 113a. On the other hand, the pixel electrode 106 is drained to the drain 107 via the second connection hole 113b.
Conductive connection to.

Further, in this liquid crystal display device, the upper layer side interlayer insulating film 115 is provided on the surface side of the transparent substrate 109.
It has a chromium layer 116bb (conductive light shielding layer) formed on the surface side thereof and having light shielding properties and conductivity. here,
The chrome layer 116bb is T in the pixel region 101bb.
The position diagonal to the formation region of FTl 08, that is, the pixel region 101bb and the pixel regions 101ab, 101ac, 10
1 pixel is electrically connected to the pixel electrode 106 through the connection hole 115a of the upper interlayer insulating film 115 at the end portion on the side in contact with 1bc. The outer edge 116x of the chrome layer 116bb has a pixel region 101bb and a pixel region 101a.
b, 101ba, 101cb, 101bc, the data lines 102a, 102b and the gate lines 103a, 103b are formed so as to be located directly above the boundary regions with the data lines 102a, 102b and the gate lines 103a, 103b. It is in a state of being insulated and separated through the interlayer insulating film 113115. In addition, the chrome layer 116
A conductive light-shielding layer such as bb is similarly formed in any pixel region, but both are in a state of being insulated and separated from the chrome layer in the adjacent pixel region. For example, the outer edge 116x of the chrome layer 116bb and the chrome layer 116a
Outer edge 11 of b, 116ba, 116cb, 116bc
6x refers to a state in which the data lines 102a and 102b and the gate lines 103a and 103b are directly insulated from each other. Therefore, any of the chrome layers, for example, the chrome layer 116bb, is used for the pixel regions 101ab, 101ba, 101.
Since each of the pixel electrodes cb and 101cc is insulatively isolated, the same pixel region 10 is formed in the chromium layer 116bb.
Even if the potential is applied from the 1 bb pixel electrode 106, the potential is not applied from the pixel electrodes in the other pixel regions. In addition, the interlayer insulating film 115 and the chrome layers 116bb and 116 are formed on the entire surface of the data line 102a.
It is covered with the end portion of ba so that the potential applied to the data line 102a does not affect the liquid crystal on the surface side. Also, the chrome layer 116bb
Are formed with a large overlapping area on the side of the gate line 103a in the previous stage, and the chrome layer 116bb is
Since it is conductively connected to 06, it is in a state of forming a storage capacitor.

In this example, the transparent substrate 10 on which the black matrix 116 is formed in addition to the matrix array.
9 and a transparent substrate (not shown) on the other side, on which the color filter and the common electrode are formed, liquid crystal is sealed,
A liquid crystal display device is configured. Then, the data line 102
a, 102b ... And gate lines 103a, 103b
The potential transmitted between the common electrode and each pixel electrode 106 is controlled by the signal transmitted by ..., The alignment state of the liquid crystal in each pixel region is changed, and information is displayed.

Here, in the conventional liquid crystal display device,
A black matrix corresponding to the boundary region of the pixel region of the transparent substrate 109 is formed on the transparent substrate on which the common electrode is formed. In the liquid crystal display device of this example, each chrome scrap, for example, the chrome layer 116bb. Is the pixel area 10
By utilizing the fact that it is formed in the boundary region between 1bb and the surrounding pixel region, each chrome layer 116bb, 116ab,
Since 116ba, 116cb, 116cc ... Are used as the black matrix, it is not necessary to form the black matrix on the side of the transparent substrate on which the common electrode is formed. Therefore, when the two transparent substrates are opposed to each other as in the conventional case, the alignment accuracy between the boundary area of each pixel area and the black matrix 116 does not matter, so that the width of the black matrix 116 is set to the width of each pixel area. Boundary area, that is, the data lines 102a, 102b ...
The width can be set to the minimum width corresponding to the width of the gate lines 103a and 103b. Therefore, the aperture ratio of the liquid crystal display device can be improved.

The chrome layer 116bb is formed on the data line 1
02a, 102b, gate lines 103a, 103b, and adjacent pixel regions 101ab, 101ba, 101c.
While the pixels are electrically isolated from the pixel electrodes of b and 101bc, they are conductively connected to the pixel electrode 106 of the same pixel region 101bb. Therefore, the potential of the chrome layer 116bb is always constant regardless of the operating state of the liquid crystal display device. Pixel electrode 106
The same potential as is applied. Therefore, the potential of the chrome layer 116bb does not disturb the alignment state of the liquid crystal existing between the pixel electrode 106 and the common electrode in the pixel region 101bb, so that high display quality can be obtained. In addition, the black matrix 116 has a pixel region 101bb.
Chrome layer 1 in an electrically independent state for each pixel area
16 bb ... Therefore, for example, in the pixel region 101 bb, the chrome layer 116 bb is formed.
Even if the data line 102a and the data line 102a are short-circuited, only the pixel region 101bb cannot be displayed, that is, the influence thereof is limited to the generation of the point defect of the display, so that the reliability of the liquid crystal display device is high.

(Embodiment 2) FIG. 3 is a plan view showing a part of a matrix array of a liquid crystal display device according to Embodiment 2 of the present invention, and FIG. 4 is a sectional view taken along line II-II thereof.
Here, parts having a function corresponding to each part of the liquid crystal display device according to the first embodiment are denoted by the same reference numerals, and detailed description thereof will be omitted.

Also in the liquid crystal display device according to this embodiment, the vertical data lines 102a, 102b. ...
And the gate lines 103a, 103b, ... In the horizontal direction are arranged in a grid pattern to form each pixel region 101a.
a, 101ab, 101ac, 101ba, 101bb
Of the pixel area 101bb (first pixel area), the TF is formed on the front surface side of the transparent substrate 109.
Tl 08 are formed, and a lower layer side interlayer insulating film 113 made of a silicon oxide film is deposited on the surface side thereof. Then, the data line 102a is conductively connected to the source 104 via the first connection hole 113a. Further, an upper layer side interlayer insulating film 115 is also formed on the surface side thereof, and these first and upper layer side interlayer insulating films 11 are formed.
Through the connection hole 115a penetrating the 3115, the light-shielding and conductive chromium layer 116bb (conductive light-shielding layer) is conductively connected to the drain 107. Then, the pixel electrode 1 to which a potential should be applied via the drain 107
06 is formed on the front surface side of the upper interlayer insulating film 115 and is conductively connected to the chromium layer 116bb. Here, the chrome layer 116bb has its outer edge 11 as in the first embodiment.
6x is a pixel region 101bb and pixel regions 101ab, 101ba 101cb, 101cb (second
Border area), that is, the data line 102
a, 102b and gate lines 103a, 103b are formed immediately above the formation regions, and these data lines 102a, 102b and gate lines 103a, 103a,
103b is in a state of being insulated and separated by the interlayer insulating film 113115. Further, a conductive light-shielding layer such as the chrome layer 116bb is formed on the chrome layer 11 in every pixel region.
6ab, 116ba, ..., However, all the chrome layers are in a state of being insulated and separated from the chrome layers of the adjacent pixel regions. For example, chrome layer 116bb
Are pixel regions 101ab, 101ba, 101bc, 1
It is in a state of being insulated and separated from each pixel electrode 106 of 01cb. Therefore, a potential is applied to the chrome layer 116bb only through the pixel electrode 106 in the same pixel region 101bb. The surface side of the data line 102a has an interlayer insulating film 115 and chromium layers 116bb, 11b.
It is covered by the end portion of 6ba so that the potential applied to the data line 102a does not affect the liquid crystal on the surface side.

Also in the liquid crystal display device having such a structure, as in the liquid crystal display device according to the first embodiment, the transparent substrate 1 is used.
On the side of 09, in addition to the matrix array, the black matrix 116 is formed corresponding to the boundary area of each pixel area, so that the width of the black matrix 116 can be set to the minimum necessary width. The liquid crystal display device has a high aperture ratio. Further, since the chrome layer 116bb is conductively connected only to the pixel electrode 106 in the same pixel region 101bb, the same potential as that of the pixel electrode 106 is applied to the chrome layer 116bb regardless of the operating state of the liquid crystal display device. In this state, the potential of the chrome layer 116bb does not disturb the alignment state of the liquid crystal existing between the pixel electrode 106 and the common electrode. In addition, since each chrome layer is electrically independent for each pixel region, even if the chrome layer and the data line are short-circuited in one pixel region 101bb, the effect thereof causes a point defect of display. Therefore, the reliability of the liquid crystal display device remains high.

(Embodiment 3) FIG. 5 is a plan view showing a part of a matrix array of a liquid crystal display device according to Embodiment 3 of the present invention, and FIG. 6 is a sectional view taken along line III-III thereof. Here, parts having a function corresponding to each part of the liquid crystal display device according to the first embodiment are denoted by the same reference numerals, and detailed description thereof will be omitted.

Also in the liquid crystal display device according to this embodiment, for example, the pixel region 101bb (first pixel region) is used.
In the same manner as in the first embodiment, the data line 102a is provided to the TFT 108 formed on the front surface side of the transparent substrate 109.
Is conductively connected to the source 104 via the connection hole 113a of the lower interlayer insulating film 113, while the pixel electrode 106 is conductively connected to the drain 107 via the upper interlayer insulating film 113b. The pixel electrode 106 has a chromium layer 116 formed on the surface side of the upper interlayer insulating film 115.
bb is conductively connected through the connection hole 115a.

In this example, the chromium layer 116bb has an outer edge 116x at the data line 102a and the gate line 1.
03a, adjacent pixel regions 101ba, 101
It is extended to the inside of cb. On the other hand, the pixel area 10
The chrome layer 116bb is not formed on the boundary region side of the pixel regions 101bc and 101ab in 1bb, and the chrome layer 116bb is L-shaped on the adjacent boundary regions. Then, on the boundary region side of the pixel region 101bb with the pixel region 101bc, the pixel region 101
The edge of the chrome layer 116bc formed in bc extends beyond the data line 102b and inside the pixel region 101bb. In addition, on the boundary region side of the pixel region 101bb with the pixel region 101ab, the pixel region 101a
The edge of the chrome layer 116ab formed on the gate line 1b is the gate line 1
It extends beyond 03b to the inside of the pixel region 101bb. As a result, the pixel region 101bb is in a state of being partitioned by the chrome layer 116bb formed corresponding to itself and the chrome layers 116bc and 116ab formed corresponding to the adjacent pixel regions 101bc and 101ab. .

In the present example, these chrome layers 116
bb, 116bc, 116ab ... Are each pixel region 10
By utilizing the fact that 1 bb ... Is partitioned and formed, the chrome layers 116bb ...
Use as 16.

Therefore, in the liquid crystal display device of this example, as in the first embodiment, the aperture ratio of the liquid crystal display device is increased, and since the black matrix 116 is not in the floating state, its potential is the liquid crystal. Does not cause disorder. Further, the black matrix 116 is provided with the chrome layers 116bb and 116b that are electrically independent for each pixel region.
Since it is composed of c, 116ab, ..., The influence of the short circuit in one pixel region of the chrome layers 116bb, 116bc, 116ab ,.

Further, in the present example, unlike the liquid crystal display devices of the first and second embodiments, the chromium layer 116b is used.
The end portions of b, 116bc, 116ab ... Are connected to the data lines 102a, 102b ... And the gate lines 103a.
103b ... Not arranged close to each other over a wide range. Therefore, in the process of forming the black matrix 116, the chromium layer 11 can be formed with normal accuracy.
Even if 6bb, 116bc, 116ab ... are formed,
They also do not short-circuit each other. Further pixel area 1
06 is formed on the surface of the interlayer insulating film 113, and the chromium layers 116bb, 116bc, 116ab, ... Are formed on the surface of the interlayer insulating film 115. That is, the pixel region 106 and the chrome layer 116bb of the adjacent pixel region,
Since 116bc, 116ab, ... Are formed on different layers, they are not short-circuited even if they are arranged close to each other. Therefore, it is possible to easily form the black matrix 116 including the chrome layers 116bb, 116bc, 116ab, ... Which are electrically independent for each pixel region.

In the third embodiment, the chromium layers 116bb and 116bc as the conductive light-shielding layers are provided on the side of two adjacent boundary regions among the boundary regions with the adjacent pixel regions.
116ab ... is arranged, this chrome layer and the other 2
Although the pixel region is divided from the adjacent pixel regions by the chrome layers of the pixel regions adjacent to each other on one boundary region side, as a modification of the third embodiment, as shown in FIG. 116 are chromium layers 118ab and 118bc as conductive light-shielding layers on the two boundary area sides facing each other in the boundary area with the adjacent pixel area.
119ab, 119bc ... May be formed by changing the direction in which they belong to adjacent pixel regions. In this case, the chrome layers 118ab, 118bc, 119
ab, 119bc, ... Are pixel regions 101aa, 101ab, 101ac in the directions indicated by “→” in the figure, respectively.
The pixel electrode of ... Is conductively connected.

Here, the shape, structure, material, etc. of each element constituting the liquid crystal display device have properties that should be set to predetermined conditions depending on the size, application, etc. of the liquid crystal display device to be manufactured. There is no limit.

In each of the embodiments, the chromium layer is used as the conductive light-shielding layer forming the black matrix. However, the material is not limited, and any material having conductivity and light-shielding property may be used. Alternatively, a metal layer such as aluminum or aluminum, a silicon layer, a silicite compound such as molybdenum silicide, or tungsten silicide can be used.

(Embodiment 4) FIG. 8 is a schematic plan view showing a part of an active matrix substrate used in a liquid crystal display device according to Embodiment 4 of the present invention, and FIG. 9 is a sectional view taken along line IV-IV thereof. Is.

Also in the liquid crystal display device of this example, Example 1
Like the liquid crystal display device according to the present invention, the vertical data lines 20
2a, 202b ... (Signal lines) and horizontal gate lines 203a, 203b ..
., b, 201ac ... Are sectioned and formed, and the structure thereof will be described below by taking the pixel region 201bb (first pixel region) as an example. Here, the counter substrate 230 shown in FIG.
The color filter 232 for enabling color display, the common electrode 233, and the counter substrate side alignment film 234 are provided on the side of
Are formed. Further, the counter substrate-side black matrix 231 is formed on the counter substrate 230 side, but in the liquid crystal display device of the present example, as described later,
A black matrix is also formed on the active matrix substrate side, and the counter substrate-side black matrix 23 is formed.
1 is provided for the purpose of complementing the black matrix on the active matrix substrate side.

As shown in FIG. 8, the pixel area 201bb
The (first pixel area) includes pixel areas 201ab and 201b.
a, 201cb, 201bc (second pixel area) are adjacent to each other, and in the pixel area 201bb, the data line 2
02a is conductively connected to the source 204 and the gate line 203b
Gate electrode 205 and pixel electrode 206 that are conductively connected to each other
The TFT 208 is connected by the drain 207 that is conductively connected to
Is configured. Here, the pixel electrode 206 is a transparent electrode made of ITO as a conductive and light-transmissive material, and is formed over substantially the entire surface of the pixel region 201bb, and its ends are provided with the data lines 202a and 202b and the gate. It is expanded until it is located directly above the lines 203a and 203b. Each of the pixel electrodes 206 has a large overlapping area on the side of the gate line 203a in the previous stage.

As shown in FIG. 9, the cross-sectional structure of this TFT 208 is a transparent substrate 209 supporting the entire liquid crystal display device.
A polycrystalline silicon layer 210 is formed on the surface side of
In the polycrystalline silicon layer 210, a source 204 and a drain 207 are formed by introducing phosphorus as an n-type impurity, except for the channel region 211 which is an intrinsic polycrystalline silicon region. On the front surface side of the TFT 208, a lower layer side interlayer insulating film 213 made of a silicon oxide film is formed.
The first connection hole 213a is opened therein, and the data line 202a made of an aluminum layer is conductively connected to the source 204 through the first connection hole 213a.

Further, in the liquid crystal display device of this example,
An upper layer side interlayer insulating film 215 is formed on the surface side of the lower layer side interlayer insulating film 213, and this upper layer side interlayer insulating film 215 is formed.
The second connection hole 215 is formed in the lower interlayer insulating film 213.
a is opened. The pixel electrode 206 is conductively connected to the drain 207 through the second connection hole 215a. Here, the pixel electrode 206 has a pixel region 201bb.
And pixel regions 201ab, 201ba, 2 adjacent to it
In the boundary region with 01bc and 201cb, the outer edge 206x is formed so as to be located directly above the data lines 202a and 202b and the gate lines 203a and 203b.

Further, in the liquid crystal display device of this example, the pixel electrode 206 is on the front surface side of the upper interlayer insulating film 215.
A molybdenum silicide layer 216bb (conductive light shielding layer) having a light blocking property and a conductivity is formed on the lower layer side of the pixel region 201bb and the pixel region 201a adjacent to the pixel region 201bb.
b, 201ba, 201cb, 201bc, the outer edge 216x of the data line 202a, 2b
02b and the gate lines 203a and 203b, and is formed right above the pixel line 206, and also coincides with the outer edge 206x of the pixel electrode 206. Here, the conductive light-shielding layer such as the molybdenum silicide layer 216bb is similarly formed in any of the pixel regions, but any of the molybdenum silicide layers 216ab, 216b in the adjacent pixel regions 201ab, 201ba, 201cb, and 201bc.
a, 216cb and 216bc, the molybdenum silicide layer 216bb is connected to the data line 202.
a, 202b and gate lines 203a, 203b are in a state of being insulated and separated just above the gate lines. Therefore, the molybdenum silicide layer 216bb may be applied with a potential from the pixel electrode 206 of the same pixel region 201bb.
The potential is not applied from the pixel electrodes in the other pixel regions. In addition, substantially the entire surface of the data line 202a on the surface side is covered with the interlayer insulating film 215, the molybdenum silicide layer 216bb,
Since it is covered by the end of 216ba and the end of the pixel electrode 206, the potential applied to the data line 202a does not affect the liquid crystal on the surface side.

With such a structure, the transparent substrate 209
In the active matrix formed on the surface side of the counter substrate 2 with the orientation side 220 formed on the surface side of the pixel electrode 206 and the molybdenum silicide layer 216bb.
A liquid crystal is filled between 30 and 30 to enable a display utilizing the alignment of the liquid crystal.

In the liquid crystal display device having such a structure, each molybdenum silicide layer 216bb, 216a is formed.
Since b, 216ba ... Are used as the black matrix 216, the black matrix is not required on the side of the counter substrate 230 if the data line and the gate line have a light-shielding property, or the data line or the gate line. Does not have a light-shielding property, it suffices to form them complementarily like the counter substrate side black matrix 231 shown in FIG. 9 in consideration of the alignment accuracy when the two transparent substrates are opposed to each other. It is not necessary to unnecessarily increase the width of the black matrix 216 or the counter substrate side black matrix 231. Here, each molybdenum silicide layer 21
6bb, 216ab, ... Are pixel regions 201bb, 20b.
Since the same transparent substrate 209 as that of 1ab ...
2a, 202b ... And gate lines 203a, 203
Since the minimum width can be set in correspondence with the width such as b, the aperture ratio of the liquid crystal display device can be increased. Further, since the potential of the molybdenum silicide layer 216bb is always the same as that of the pixel electrode 206, the potential of the molybdenum silicide layer 216bb does not disturb the alignment state of the liquid crystal, and thus high display quality can be obtained. ..

Moreover, even if both the pixel electrode 206 and the black matrix 216 act as electrodes, the outer peripheral range of the pixel electrode 206 and the outer peripheral range of the black matrix 216 can be made to coincide with each other. A region (reverse tilt domain region) in which the alignment of the liquid crystal is disturbed due to the potential getting around can be reliably covered with the black matrix 216. Further, since the black matrix 216 is composed of the molybdenum silicide layers 216bb ... Which are electrically independent for each pixel region, for example, the pixel region 201.
In bb, even if the molybdenum silicide layer 216bb and the data line 202a are in a short-circuited state, only the point defects in the pixel region 201bb are left, so that the liquid crystal display device has high reliability.

Further, as the liquid crystal display device becomes finer, the pixel region 201bb is miniaturized, so that the display capacitance in the pixel region 201bb is reduced, and the TFT 208 having a high off resistance is formed to reduce the leak current. However, the display voltage tends to decrease during the non-selection period of the gate line 203b, and the display retention characteristics tend to deteriorate. However, in the liquid crystal display device of this example, the pixel electrode 2
The end of 06 is located above the gate line 203a in the previous stage,
A charge storage capacitor is formed between them. For this reason,
During the selection period of the pixel region 201bb, the gate line 2 of the previous stage is
It is also possible to improve the retention characteristic of the liquid crystal applied voltage of the pixel region 201bb by utilizing the fact that the reference potential is applied to the gate line 203a in the non-selection period 03a and by utilizing the reference potential. .

Next, a part of the method of manufacturing the liquid crystal display device of this example will be described with reference to the left side area of the areas shown in FIGS. 10A to 10C are process cross-sectional views showing a part of the method for manufacturing the liquid crystal display device of this example.

Here, as shown in FIG. 10A, since well-known methods can be adopted for the steps until the TFT 208 is formed on the transparent substrate 209, the description thereof will be omitted, but the TFT 208 is omitted. After the formation, the lower interlayer insulating film 213 is first formed. Next, a first connection hole 213a is formed, a data line 202a made of an aluminum layer is formed therein, and the data line 202a is connected to the TFT.
Conductively connected to the source 204 of 208. Next, after forming an upper layer side interlayer insulating film 215 on the surface side of the lower layer side interlayer insulating film 213, a second connection hole 215a is formed in this upper layer side interlayer insulating film 215.

Next, after depositing a molybdenum silicide layer, it is patterned as shown in FIG. 10B to form a molybdenum silicide layer 216a.
In this state, the molybdenum silicide layer 216a is still
Are not in a state of being patterned to the pattern forming the black matrix 216.

Next, the molybdenum silicide layer 216a is formed.
After forming the ITO layer 206a on the surface side of the
The TO layer 206a is patterned to form a pixel electrode 206 as shown in FIG. After that, the molybdenum silicide layer 216bb that forms the black matrix 216 is formed by patterning the molybdenum silicide layer 216a using the mask that is used when the pixel electrode 206 is patterned or using the pixel electrode 206 itself as a mask. Form. As described above, in the patterning process for the lower layer of the pixel electrode 206 and the molybdenum silicide layer 216bb,
Patterning is performed using the outer edge of the layer on the upper layer side or the mask used for patterning the layer on the upper layer side as a mask.

As a result, the outer edge 206 of the pixel electrode 206
x and the outer edge 216x of the molybdenum silicide layer 216bb
, And both are in the structure immediately above the data line 202a. Note that, for the subsequent steps, since well-known steps can be adopted, description thereof will be omitted.

As described above, according to the method of manufacturing the liquid crystal display device of this example, when the pixel electrode 206 is patterned, the molybdenum silicide layer 216a is provided on the lower side of the pixel electrode 206 to protect the lower side. For this reason,
When a chlorine-based etchant is used to pattern the ITO layer 206a, even if there are pits or the like in the upper interlayer insulating film 215, the etchant will attack the data line 202a formed of the lower aluminum layer. Never. Therefore, the data line 202a is not broken, so that the reliability of the liquid crystal display device is improved.

The process cross-sectional views shown in the right side region of the regions shown in FIGS. 10A to 10C are modifications of the above manufacturing method.

That is, as shown in FIG. 10B, the molybdenum silicide layer 216a is left inside the second connection hole 215a. Therefore, FIG.
As shown in (c), after the pixel electrode 206 is formed, the pixel electrode 206 made of the ITO layer is conductively connected to the drain region 207 made of silicon through the molybdenum silicide layer 216bb. Compared with the case where 206 and the drain region 107 are directly connected, the contact resistance there can be reduced,
It is also possible to improve the display quality.

In the active matrix substrate formed by the manufacturing method shown on either side of the left side region and the right side region of FIGS. 13A to 13C, the pixel region 206 is on the upper layer side of the black matrix 216. However, the pixel area 206 and the black matrix 216 are not limited to this.
It is also possible to have a structure in which the upper limit relationship with and is opposite.

(Fifth Embodiment) FIG. 11 shows a fifth embodiment of the present invention.
FIG. 12 is a schematic plan view showing a part of an active matrix substrate used in the liquid crystal display device according to the present invention, and FIG. 12 is a sectional view taken along line VV thereof. Here, parts having functions corresponding to those of the liquid crystal display device according to the fourth embodiment shown in FIGS. 8 and 9 are designated by the same reference numerals, and detailed description thereof will be omitted.

Also in the liquid crystal display device of this example, the pixel region 201bb (first pixel region) has a pixel region 201a.
b, 201ba, 201cb, and 201bc (second pixel region) are adjacent to each other. Here, in the pixel region 201bb, the source 204, the gate electrode 205, and the drain 2 are provided.
The TFT 208 is composed of 07.
On the surface side of the FT 208, a lower layer side interlayer insulating film 213 made of a silicon oxide film is deposited. A first connection hole 213a and a second connection hole 213b are opened in this lower layer side interlayer insulating film 213, and the first connection hole 21 of them is formed.
Data line 202 made of an aluminum layer through 3a
a is conductively connected to the source 204, and the second connection hole 213b
The pixel electrode 206 made of the ITO layer is conductively connected to the drain 207 via the.

Here, the pixel electrode 206 is the pixel region 20.
1bb and the pixel regions 201ab and 201 adjacent to 1bb
It is formed up to the vicinity of the boundary area with the ba, 201bc, and 201cb, and the outer edge 206x is formed on the data line 202.
a, 202b and gate lines 203a, 203b are located inside. Further, also in the liquid crystal display device of the present example, the molybdenum silicide layer 216bb (conductive light shielding layer) having a light shielding property and a conductivity is provided on the surface side of the pixel electrode 206, and the molybdenum silicide layer 216bb is provided.
Also the pixel area 201bb and the pixel area 2 adjacent to the pixel area 201bb.
01ab, 201ba, 201bc, 201cb is formed up to the vicinity of the boundary area, and its outer edge 216x
Are the data lines 202a and 202b and the gate line 203.
the pixel electrode 2 located inside the formation position of a and 203b.
It coincides with the outer edge 206x of 06. Here, regarding the width of the molybdenum silicide layer 216bb, it is preferable that the width in the pixel region 201bb where liquid crystal orientation is likely to be disturbed is wide and the width in which the disorder is unlikely to occur is narrow. Therefore, in the liquid crystal display device of this example, in order to shield the reverse tilt domain region in which the alignment of the liquid crystal is disturbed on the data line 202a side due to the influence of the charge of the data line 202a, the molybdenum silicide layer 216bb on the data line 202a side is shielded. The width W1 is set to be thicker than the width W2 on the data line 202b side, and even if misalignment occurs, the reverse tilt domain region is surely covered to maintain high display quality. The minimum aperture ratio is kept to a minimum.

Since the molybdenum silicide layers 216bb ... Are used as a black matrix also in the liquid crystal display device having such a structure, the active matrix substrate side formed on the transparent substrate 209 side and the counter substrate 230 side. The molybdenum silicide layer 216bb is formed on the opposite substrate side when facing the black matrix 2 on the opposite substrate side.
The alignment accuracy of 31 is a margin, and the alignment accuracy does not matter. Further, since the potential of the molybdenum silicide layer 216bb is the same as that of the pixel electrode 206, the alignment state of the liquid crystal is not disturbed, so that high display quality can be obtained. Further, since the black matrix 216 is composed of the molybdenum silicide layer 216bb ... Which is electrically independent for each pixel, the molybdenum silicide layer 216bb and the data line 202a are short-circuited in the pixel region 201bb. However, since the display is limited to the point defect of the display only in the pixel region 201bb, the reliability of the liquid crystal display device is high.

Next, referring to the left side area of the areas shown in FIGS. 13A to 13D, part of the method of manufacturing the liquid crystal display device of this example will be explained. 13A to 13D are process cross-sectional views showing a part of the method for manufacturing the liquid crystal display device of this example.

Here, as shown in FIG. 13A, as the steps up to the formation of the TFT 208 on the transparent substrate 209, well-known methods can be adopted, so that the description thereof will be omitted. After forming, first
After depositing the lower layer side interlayer insulating film 213, the first connection hole 213a and the second connection hole 213b are formed in the lower layer side interlayer insulating film 213. Next, the ITO layer 206a on which the pixel electrode 206 is to be formed is formed by sputtering.

Next, as shown in FIG. 13B, after depositing the molybdenum silicide layer 216a, only the molybdenum silicide layer 216a is patterned. In this state, the molybdenum silicide layer 216a is still
While the pattern forming the black matrix 216 is not patterned, the ITO layer 20 is not formed.
6a is also in a state where it is not patterned into the pattern forming the pixel electrode 206.

Next, as shown in FIG. 13C, IT
Prior to patterning the O layer 206a, the edge of the molybdenum silicide layer 216a is patterned to form the molybdenum silicide layer 2 forming a black matrix.
After forming 16bb, the ITO layer 206a is patterned using the same mask as it is to form the pixel electrode 206.
To form. Here, in order to secure high etching accuracy, CF is applied to the molybdenum silicide layer 216a.
While performing plasma etching with ₄ gases, ITO
For layer 206a, molybdenum silicide layer 216
Following the plasma etching for a, anisotropic dry etching is performed using a mixed gas of CH ₄ gas and H ₂ gas. As a result, the outer edges 206x and 216x of the pixel electrode 206 and the molybdenum silicide layer 216bb are
In each case, the pixel area 201bb and the pixel areas 201ab, 201ba, 201bc, 201cb adjacent to the pixel area 201bb
The structure is the same in the vicinity of the boundary area between The plasma etching using CF ₄ gas can be performed in the same manner by using a molybdenum silicide layer or a tungsten silicide layer instead of the molybdenum silicide layer 216a.

Next, after forming an aluminum layer for forming the data lines 202a and 202b, FIG.
As shown in FIG.
a is formed.

Well-known steps can be adopted for the subsequent steps, and the description thereof will be omitted.

As described above, according to the method for manufacturing the liquid crystal display device of this example, even if both the pixel electrode 206 and the black matrix 216 act as electrodes, the outer peripheral range of the pixel electrode 206 and the outer periphery of the black matrix 216. Since the ranges can be matched, the black matrix 216 can surely cover the alignment disorder that the potential from these electrodes exerts on the liquid crystal.

The process sectional views shown in the right side region of the regions shown in FIGS. 13A to 13D are modified examples of the above manufacturing method.

That is, as shown in FIG. 13B, the ITO layer 206a is formed on the surface side of the lower interlayer insulating film 213 in the regions a-1 and a-2 after the lower interlayer insulating film 213 is formed. After forming the first connection hole 21
3a and a second pier hole 213b are formed.

Next, as shown in FIG. 13B, a molybdenum silicide layer 216a is formed. As a result, T
The molybdenum silicide layer 216a is conductively connected to the source 204 and the drain 207 of the FT 208.

Next, as shown in FIG. 13C, the molybdenum silicide layer 216a is patterned to form a molybdenum silicide layer 216bb forming the black matrix 216, and the regions c-1 and c-2 are formed.
In, the molybdenum silicide layers 216b and 216c are left inside the first connection holes 213a and 213b. After that, the ITO layer 206a is patterned using the end portion of the molybdenum silicide layer 216bb as a mask to form the pixel electrode 206. As a result, the pixel electrode 20
6 and the outer edge 20 of the molybdenum silicide layer 16bb
6x and 216x are all pixel regions 201bb and adjacent pixel regions 201ab, 201ba, 201b.
The structures are the same in the vicinity of the boundary area between bc and 201cb.

Then, as shown in FIG. 13 (d),
The data line 202a is formed on the surface side of the molybdenum silicide layer 216b in the region d-1, and the data line 202a is conductively connected to the source 204 through the molybdenum silicide layer 216bb.

Well-known steps can be adopted for the subsequent steps, and the description thereof will be omitted.

According to such a manufacturing method, the data line 202a, which is an aluminum layer, is connected to the source 204 made of silicon through the molybdenum silicide layer 206b, so that silicon is included by the eutectic reaction with aluminum. Since it can prevent the TFT 208 from being formed from a thin silicon thin film, its ON / OFF
The ratio can be improved.

Further, in the region d-2 in FIG. 13D, the pixel electrode 206 made of the ITO layer and the drain 207 made of silicon are the molybdenum silicide layer 2.
Since the conductive connection is made via 06a, the pixel electrode 206
The contact resistance can be reduced as compared with the case where the drain 207 and the drain 207 are directly connected, and the display quality can be improved.

Incidentally, in the manufacturing method shown on either side of the left side region and the right side region of FIGS.
The case where the pixel region 206 is on the lower layer side of the black matrix 216 has been described, but the present invention is not limited to this, and the reverse structure is also possible.

(Sixth Embodiment) FIG. 14 shows a fourth embodiment of the present invention.
FIG. 15 is a schematic plan view showing a part of an active matrix substrate used in the liquid crystal display device according to the present invention, and FIG. 15 is a sectional view taken along line VI-VI thereof.

The liquid crystal display device of this example has the same basic structure as that of the liquid crystal display device according to the fourth embodiment. Since only the types are different, corresponding parts are designated by the same reference numerals and detailed description thereof is omitted.

In these figures, the liquid crystal display device of this example also has the same pixel area 2 as the liquid crystal display device of the fourth embodiment.
01 bb has a molybdenum silicide layer 216 bb (conductive light shielding layer) having a light shielding property and a conductivity on the surface side of the pixel electrode 206.
6bb is a pixel area 201bb and pixel areas 201ab, 201ba, 201bc, 201cb adjacent to the pixel area 201bb.
The outer edge 216x in the boundary area with the data lines 202a, 202b and the gate lines 203a, 203
Immediately above b, it coincides with the outer edge 206x of the pixel electrode 206.

A counter substrate 230 is arranged so as to face the active matrix substrate having such a structure, and liquid crystal 241 is filled between these substrates. Here, in the liquid crystal display device of the present example, since the polymer dispersed liquid crystal is filled, no alignment film is formed on the surface side of the active matrix substrate and the counter substrate 230. Other configurations are similar to those of the liquid crystal display device according to the fourth embodiment.

Also in the liquid crystal display device of this example, Example 4
Although the type of liquid crystal is different from that of the liquid crystal display device according to the present invention, each molybdenum silicide layer 216bb, 216ab, 216
Since ba ... is used as the black matrix 216, no black matrix is required on the side of the counter substrate 230, or as shown in FIG. 15, the counter substrate side black matrix 231 is only formed complementarily. Since it is good, the positioning accuracy when the transparent substrates of the two canes are opposed to each other does not matter. Therefore, it is not necessary to unnecessarily provide a margin for the widths of the black matrix 216 and the counter substrate-side black matrix 231, so that the aperture ratio of the liquid crystal display device can be increased and the like as in the liquid crystal display device according to the fourth embodiment. Has a great effect.

(Seventh Embodiment) FIG. 16 shows a seventh embodiment of the present invention.
FIG. 17 is a schematic plan view showing a part of an active matrix substrate used in the liquid crystal display device according to FIG.
It is sectional drawing in the I line.

Also in the liquid crystal display device of this example, the vertical data lines 302a, 302b ... (Signal lines) and the horizontal gate lines 303a, 303b ... (Scanning lines).
In any of the pixel regions defined by and, the source 311 conductively connected to the data line 302a like the pixel region 301bb (first pixel region).
a, the gate electrode 30 to which the gate line 303b is conductively connected
5, and the drain 31 to which the pixel electrode 306 is conductively connected
The TFT 308 is composed of 1b. Here, the TFT 308 is functionally similar to the TFT or the like of the liquid crystal display device of the first embodiment, but in the liquid crystal display device of the present example, it is configured as a so-called inverted stagger type TFT. That is, the insulating film is formed on the surface side of the transparent substrate 309 supporting the entire liquid crystal display device, and the gate electrode 305 is formed on the surface thereof. Further, on the surface side thereof, the gate electrode insulating film 305a, the non-doped amorphous silicon layer 310, and the amorphous silicon layer (sources 311a, 31) into which n-type impurities are introduced.
1b) is formed, and the source electrode 304a is formed on the amorphous silicon layer (sources 311a and 311b).
And a drain electrode 307a is formed. Among them, for the drain electrode 307a, the interlayer insulating film 31
The pixel electrode 306 is electrically conductively connected via 3.

Further, also in the liquid crystal display device of this example,
On the surface side of the interlayer insulating film 313, a molybdenum silicide layer 316bb (conductive light-shielding layer) having a light-shielding property and a conductivity is provided below the pixel electrode 306. The molybdenum silicide layer 316bb is provided in the pixel region 301bb.
And pixel regions 301ab, 301ba,
The outer edge 306x is formed so as to be located immediately above the data lines 302a and 302b and the gate lines 303a and 303b in the boundary region with the 301bc and 301cb. Here, the molybdenum silicide layer 316b
A conductive light-shielding layer such as b is formed similarly in any pixel region, but both are in a state of being insulated and separated from the picture electrode and the molybdenum silicide layer in the adjacent pixel regions. The other parts of the configuration are similar to those of the liquid crystal display device according to the fourth embodiment, and therefore, corresponding parts will be denoted by the same reference numerals and description thereof will be omitted.

In the liquid crystal display device having such a structure, although there is a structural difference due to the difference in the structure of the TFT 308 from the liquid crystal display device according to the fourth embodiment, the display principle is the same. The same effect as the liquid crystal display device according to the fourth embodiment is obtained. For example, each pixel region 301b
The molybdenum silicide layer 316bb formed in
, Are used as the black matrix 316, a black matrix is not required on the side of the counter substrate 330, or the data lines 302a, 30 are provided like the counter substrate side active matrix 331 shown in FIG.
It is only necessary to form a complementary one that blocks only the light passing through 3a, and the width of the black matrix 316 or the counter substrate side active matrix 331 in consideration of the alignment accuracy when the two cane transparent substrates are opposed to each other. Need not be unnecessarily wide. Moreover, since the molybdenum silicide layers 316bb ... Are formed on the same surface side of the transparent substrate 309 as the pixel regions 301bb ..., The positional relationship is high, and the data lines 302a, 302 are provided.
Since the minimum width can be set corresponding to the widths of b ... And the gate lines 303a and 303b, the aperture ratio of the liquid crystal display device can be increased. Further, since the potential of the molybdenum silicide layer 316bb does not disturb the alignment state of the liquid crystal, high display quality can be obtained. Moreover, since the outer peripheral range of the pixel electrode 306 and the outer peripheral range of the black matrix 316 can be made to coincide with each other, it is possible to surely cover the disturbance of the alignment caused by the potential from these electrodes on the liquid crystal with the black matrix 316. Produce an effect.

(Embodiment 8) FIG. 18 shows an embodiment 8 of the present invention.
FIG. 19 is a schematic plan view showing a part of an active matrix substrate used in the liquid crystal display device according to FIG.
It is sectional drawing in the III line. Here, parts having functions corresponding to those of the liquid crystal display device according to the fourth embodiment shown in FIGS. 8 and 9 are denoted by the same reference numerals.

Also in the liquid crystal display device of this example, as shown in FIG. 18, in the pixel region 201bb (first pixel region), the source 204 to which the data line 202a is conductively connected and the gate to which the gate line 203b is conductively connected. A TFT 208 is composed of the drain 207 to which the electrode 205 and the pixel electrode 206 are conductively connected. Here, the pixel electrode 206 is made of ITO, which is a conductive and light-transmissive material.
And is formed over substantially the entire surface of the pixel region 201bb, and its end portion is the data line 20.
2a and 202b and the gate lines 203a and 203b are directly extended. Each of the pixel electrodes 206 has a large overlapping area on the side of the gate line 203a in the previous stage.

As shown in FIG. 19, the cross sectional structure of the pixel region 201bb has a polycrystalline silicon layer 210 formed on the surface side of a transparent substrate 209 supporting the entire liquid crystal display device.
Except for the channel region 211, phosphorus as an n-type impurity is introduced to the source 204 and the drain 20.
7 are formed. On the surface side of this TFT 208,
A lower layer-side interlayer insulating film 213 made of a silicon oxide film is deposited, and a first connecting hole 213a and a second connecting hole 213b are opened therein. The data line 202a made of an aluminum layer is conductively connected to the source 204 through the first connection hole 213a.

On the other hand, via the second connection hole 213b,
Like the pixel electrode 206, a stacked electrode layer 214 made of ITO as a conductive and light-transmissive material is conductively connected to the drain 207. Here, the surface of the lower interlayer insulating film 213 reflects irregularities corresponding to the shape of the TFT 208, but the stacked electrode layer 214 is formed by the TFT 2
08 is not formed on the flat region 208a (TFT
It is extended to the non-formation area 208). Therefore, the stacked electrode layer 21 on this region 208a is
The surface of No. 4 is flat.

Further, in this liquid crystal display device, the upper side interlayer insulating film 215 made of a silicon oxide film is formed on the surface side of the transparent substrate 209, and the pixel electrode 206 is formed on the surface side. Here, the pixel electrode 20
6 is conductively connected to the stacked electrode layer 214 through the connection hole 215a of the upper interlayer insulating film 215, and the connection hole 215a is formed on the flat region 208a where the TFT 208 is not formed. Therefore, the pixel electrode 206 is conductively connected to the flat region of the stacked electrode layer 214. The surface of the upper interlayer insulating film 215 may be flattened by using a polyimide layer or the like to further enhance the orientation of the liquid crystal.

In this example, liquid crystal is sealed between a transparent substrate 209 having a matrix array formed thereon and a transparent substrate (not shown) on the other side having a color filter and a common electrode formed thereon, thereby providing a liquid crystal display. The device is configured. The potential generated between the common electrode and each pixel electrode 206 is controlled by the signals transmitted by the data lines 202a, 202b ... And the gate lines 203a, 203b. Information is displayed by changing the orientation state of. Here, the pixel electrode 20
An electric potential is applied to 6 through the drain 207 of the TFT 208 and the stacked electrode layer 215.

Further, in the liquid crystal display device of this example, the pixel electrode 206 is on the front surface side of the upper interlayer insulating film 215.
A molybdenum silicide layer 216bb (conductive light shielding layer) having a light blocking property and a conductivity is formed on the lower layer side of the pixel region 201bb and the pixel region 201a adjacent to the pixel region 201bb.
In the boundary area with b, 201ba, 201bc, and 201cb, the outer edge 216x is the data line 202a, 2b.
02b and the gate lines 203a, 203b, and the outer edge 206x of the pixel electrode 206. Here, the conductive light-shielding layer such as the molybdenum silicide layer 216bb is similarly formed in any of the pixel regions, but any of the molybdenum silicide layers 216ab, 216b in the adjacent pixel regions 201ab, 201ba, 201cb, and 201bc.
a, 216bc, 216cb and the outer edge 216x of the molybdenum silicide layer 216bb, the data line 202
a, 202b and gate lines 203a, 203b are in a state of being insulated and separated just above the gate lines.

Since the molybdenum silicide layers 216bb ... Are used as the black matrix in the liquid crystal display device of this example having such a structure, the active substrate formed on the transparent substrate 209 side as shown in FIG. When the matrix substrate side and the counter substrate 230 side are opposed to each other, the molybdenum silicide layer 216bb serves as a margin for the alignment of the counter substrate side black matrix 231, and the alignment accuracy does not matter. Further, since the potential of the molybdenum silicide layer 216bb is the same as that of the pixel electrode 206, the alignment state of the liquid crystal is not disturbed, so that high display quality can be obtained. The black matrix 216 is a molybdenum silicide layer 216 in an electrically independent state for each pixel.
Since it is composed of bb ...
In 1bb, even if the molybdenum silicide layer 216bb and the data line 202a are in a short-circuited state, the display is limited to the point defect of only the pixel region 201bb, so that the reliability of the liquid crystal display device is high.

In the liquid crystal display device of this example, the data line 202a is formed on the lower interlayer insulating film 213 and is electrically connected to the source 204 of the thin film transistor 208 through the first connection hole 213a. On the other hand, the pixel electrode 206 is formed on the upper layer-side interlayer insulating film 215 while being stacked on the stacked electrode layer 214 as a pad. That is, since the data line 202a and the pixel electrode 206 are formed on different layers,
There is no risk of short circuit. Therefore, since the end portion 206x of the pixel electrode 206 can be arranged above the data line 202a, the vicinity of the data line 202a can also be used as a display portion. Therefore, the aperture ratio of the pixel region 201bb is high.

Further, the pixel electrode 206 is the data line 202.
Since the shielding effect against a is exerted, the data line 20
The potential of 2a does not disturb the alignment of the liquid crystal. Therefore, the display quality is improved. Furthermore, the stacked electrode layer 214
Has conductivity, so that it does not hinder the formation of a matrix array, and unlike the case where a metal layer is used as a stacked electrode layer, the stacked electrode layer 214 made of ITO has a light-transmitting property. Therefore, the pixel area 206
Even if the stacked electrode layers 214 are formed so as to be easily conductively connected, the aperture ratio of the pixel region 201bb is not sacrificed. In addition, since the pixel electrodes 206 are stacked via the stacked electrode layer 214, the connection holes 2 of the lower-layer-side and upper-layer-side interlayer insulating films 213 and 215 are formed.
Since 13b and 215a each have a structure with a low aspect ratio, the reliability of the conductive connection portion inside the connection holes 213b and 215a is high.

Further, in this example, the stacked electrode layer 2
Since ITO is used for the pixel electrode 206 as in the pixel electrode 206, the connection resistance between the stacked electrode layer 214 and the pixel electrode 206 is low. Therefore, the resistance component between the drain 207 and the pixel electrode 206 can maintain a low level. Further, the stacked electrode layer 214 and the upper layer side interlayer insulating film 215 have surface irregularities reflecting the shape of the TFT 208, but the connection hole 215a of the upper layer side interlayer insulating film 215 is
Since the FT 208 is formed on the flat region 208a where the FT 208 is not formed, the reliability of the contact between the stacked electrode layer 214 and the pixel electrode 206 is high and the contact resistance is low. Further, such a connection structure also has an effect of raising the flat portion to flatten the surface of the pixel electrode 206 and improving the alignment state of the liquid crystal.

Further, as the liquid crystal display device becomes finer, the pixel region 201bb is miniaturized, so that the display capacitance in the pixel region 201bb is reduced, and the TFT 208 having a high off resistance is formed to reduce the leakage current. However, the display voltage is likely to drop during the non-selection period of the gate line 203b, and the display retention characteristics tend to deteriorate. However, in the liquid crystal display device of this example, the pixel electrode 2
The end of 06 is located above the gate line 203a in the previous stage,
A charge storage capacitor is formed between them. For this reason,
During the selection period of the pixel region 201bb, the gate line 2 of the previous stage is
It is also possible to improve the retention characteristic of the liquid crystal applied voltage of the pixel region 201bb by utilizing the fact that the reference potential is applied to the gate line 203a in the non-selection period 03a and by utilizing the reference potential. . Moreover, in this example,
Since the pixel electrode 206 is formed so as to have a wide overlapping area on the side of the gate electrode 203a in the previous stage, the effect of improving the retention characteristic is remarkable.

Example 9 FIG. 20 shows Example 9 of the present invention.
FIG. 21 is a schematic plan view showing a part of an active matrix substrate used in the liquid crystal display device according to the present invention, and FIG. 21 is a sectional view taken along line IX-IX thereof. Here, the liquid crystal display device according to the fourth embodiment shown in FIGS. 8 and 9 or FIGS.
Parts having functions corresponding to those of the liquid crystal display device according to the eighth embodiment shown in FIG. 9 are designated by the same reference numerals, and detailed description thereof will be omitted.

In these figures, the pixel area 201bb
Includes a source 204 to which the data line 202a is conductively connected,
A TFT 208 is composed of a gate electrode 205 that is conductively connected to the gate line 203b and a drain 207 that is conductively connected to the pixel electrode 206. Here, the pixel electrode 206 is made of IT as a conductive and light transmissive material.
The transparent electrode is made of O and is formed over substantially the entire surface of the pixel region 201bb, and the end portion thereof is the data line 2
02a, 202b and the gate lines 203a, 203b are directly extended. Each of the pixel electrodes 206 has a large overlapping area on the side of the gate line 203a in the previous stage.

The cross-sectional structure of this pixel region 201bb is the polycrystalline silicon layer 2 formed on the front surface side of the transparent substrate 209.
A source 204 and a drain 207 are formed on the substrate 10 except the channel region 211. This TFT 208
A lower interlayer insulating film 213 made of a silicon oxide film is deposited on the surface side of the first contact hole 21.
3a and the second connection hole 213b are opened. The data line 202a made of an aluminum layer is conductively connected to the source 204 through the first connection hole 213a.

On the other hand, via the second connection hole 213b,
The stacked electrode layer 214 is conductively connected to the drain 207. Here, the surface of the lower interlayer insulating film 213 is formed of TF.
Although the unevenness is reflected corresponding to the shape of T208, the stacked electrode layer 215 is extended and formed on the flat region 208a where the TFT 208 is not formed (on the region where the TFT 208 is not formed). Therefore, this area 20
The surface of the stacked electrode layer 214 on 8a is flat. An upper interlayer insulating film 215 made of a silicon oxide film is formed on the surface side of the transparent substrate 209, and a pixel electrode 206 is formed on the surface side. The pixel electrode 206 is conductively connected to the stacked electrode layer 214 via the connection hole 215a of the upper interlayer insulating film 215, and the connection hole 215a is formed on the flat region 208a where the TFT 208 is not formed. ing. Therefore, the pixel electrode 206 is conductively connected to the flat region of the stacked electrode layer 214.

In the liquid crystal display device of this example, the data line 202a is the first layer on the lower layer side formed of the aluminum layer.
Of the data line 202a ₁ and the second data line 202a ₂ of the upper layer formed of the molybdenum silicide layer have a redundant wiring structure. On the other hand, the stacked electrode layer 214 is also composed of a lower first stacked electrode layer 214a composed of an aluminum layer and an upper second stacked electrode layer 214b composed of a molybdenum silicide layer. Moreover, the source layer 202a and the stacked electrode layer 214 are in the same layer, and the first data line 20
2a ₁ and the first stacked electrode layer 214a are simultaneously formed, and the second data line 202a ₂ and the second stacked electrode layer 214b are simultaneously formed. As the material for forming the second data line 202a ₂ and the second stacked electrode layer 214b, titanium silicide, other than molybdenum silicide, may be used as a material that does not dissolve in the etchant used for patterning the pixel electrode 206. Tungsten silicide, tantalum silicide, titanium, tungsten, tantalum, titanium nitride, or the like can be used.

Further, in the liquid crystal display device of this example, the pixel electrode 206 is on the surface side of the upper interlayer insulating film 215.
A molybdenum silicide layer 216bb (conductive light shielding layer) having a light blocking property and a conductivity is formed on the lower layer side of the pixel region 201bb and the pixel region 201a adjacent to the pixel region 201bb.
In the boundary area with b, 201ba, 201bc, and 201cb, the outer edge 216x is the data line 202a, 2b.
02b and the gate lines 203a, 203b, and the outer edge 206x of the pixel electrode 206. Here, the conductive light-shielding layer such as the molybdenum silicide layer 216bb is similarly formed in any of the pixel regions, but any of the molybdenum silicide layers 216ab, 216b in the adjacent pixel regions 201ab, 201ba, 201cb, and 201bc.
a, 216cb and 216bc, the molybdenum silicide layer 216bb is connected to the data line 202.
a, 202b and gate lines 203a, 203b are in a state of being insulated and separated just above the gate lines.

Since the molybdenum silicide layers 216bb ... Are used as a black matrix in the liquid crystal display device of this example having such a configuration, the transparent substrate 20 is used.
9 side of the active matrix substrate, and
When facing the opposite substrate side, the alignment accuracy does not matter. In addition, the molybdenum silicide layer 216
Since the potential of bb is the same as that of the pixel electrode 206, the alignment state of the liquid crystal is not disturbed, and high display quality can be obtained. Further, since the black matrix 216 is composed of the molybdenum silicide layer 216bb ... Which is electrically independent for each pixel, the molybdenum silicide layer 216bb and the data line 202a are short-circuited in the pixel region 201bb. However, since the display is limited to the point defect of the display only in the pixel region 201bb, the reliability of the liquid crystal display device is high.

Further, in the liquid crystal display device of this example, the data line 202a has a redundant wiring structure, so that the reliability thereof is high. Moreover, the stacked electrode layer 214 is also the first stacked electrode layer 214a formed of an aluminum layer.
And the second stacked electrode layer 214b formed of a molybdenum silicide layer, the pixel electrode 206 formed of an ITO layer is formed of an aluminum layer via the second stacked electrode layer 214b formed of a molybdenum silicide layer. Since the molybdenum silicide layer functions as a contact layer between the ITO layer and the aluminum layer because it is conductively connected to the configured first stacked electrode layer 214a, the contact resistance there is reduced. Moreover, since the upper second stacked electrode layer 214b is made of molybdenum silicide, the stacked electrode layer 214 is not attacked by the etchant when the pixel electrode 206 is formed by etching.

Further, the data line 202a and the pixel electrode 20
Since 6 is formed on a layer different from each other, there is no risk of short circuit. Therefore, since the end portion 206x of the pixel electrode 206 can be arranged above the data line 202a, the aperture ratio can be secured as much as possible. Further, since the pixel electrode 206 exerts a shielding effect on the data line 202a, the potential of the data line 202a does not disturb the alignment of the liquid crystal. Therefore, the display quality is improved.

Further, since the pixel electrodes 206 are stacked via the stacked electrode layer 214, the connection holes 213 of the lower and upper interlayer insulating films 213 and 215 are formed.
Since each of b and 215a has a structure having a low aspect ratio, the reliability of the conductive connection portion inside the connection holes 213b and 215a is high. Moreover, the surface side of the stacked electrode layer 214 and the upper interlayer insulating film 215 is T
Although the shape of the FT 208 is reflected to have unevenness, the connection hole 215a of the upper-layer side interlayer insulating film 215 is provided with the TFT 20.
Since 8 is formed on the flat region 208a where it is not formed, the reliability of the contact between the stacked electrode layer 214 and the pixel electrode 206 is high, and the contact resistance is also low. Further, such a connection structure also has an effect of raising the flat portion to flatten the surface of the pixel electrode 206 and improving the alignment state of the liquid crystal.

Further, in the liquid crystal display device of this example,
Since the end portion of the pixel electrode 206 is located above the gate line 203a in the previous stage and the pixel electrode 206 is formed to have a wide overlapping area on the side of the gate electrode 203a in the previous stage, the retention characteristic is improved. The effect is remarkable.

(Embodiment 10) FIG. 22 is a schematic plan view showing a part of an active matrix substrate used in a liquid crystal display device according to Embodiment 10 of the present invention, and FIG. 23 is a sectional view taken along line XX thereof. Is. Here, parts having functions corresponding to those of the liquid crystal display device according to the first embodiment shown in FIGS. 1 and 2 are denoted by the same reference numerals, and detailed description thereof will be omitted.

Also in the liquid crystal display device of this example, the vertical data lines 102a, 102b ... (Signal lines) and the horizontal gate lines 103a, 103b ... (Scanning lines).
And are arranged in a grid pattern, and the pixel regions 101 are arranged between them.
aa, 101ab, 101ac, 101ba, 101b
b ... are partitioned to form a matrix array. Among them, in the pixel area 101bb,
With the source 104 conductively connected to the data line 102a, the gate electrode 105 conductively connected to the gate line 103b, and the drain 107 conductively connected to the pixel electrode 106,
The TFT 108 is configured. Here, the pixel electrode 10
Reference numeral 6 denotes a transparent electrode made of ITO, which is a conductive and light-transmissive material, and is formed over substantially the entire surface of the pixel region 101bb. Here, the lower interlayer insulating film 11 made of a silicon oxide film is formed on the surface side of the TFT 108.
3 is piled up, and the 1st connection hole 113a and the 2nd connection hole 113b are opened in it. The data line 102a made of an aluminum layer is conductively connected to the source 104 through the first connection hole 113a.
On the other hand, through the second connection hole 113b, the pixel electrode 10
6 is conductively connected to the drain 107. Further, an upper interlayer insulating film 115 made of a silicon oxide film is formed on the front surface side of the transparent substrate 109, and a molybdenum silicide layer 116bb is formed on the front surface side. Here, the molybdenum silicide layer 116bb is formed on the pixel electrode 106 through the connection hole 115a of the upper interlayer insulating film 115.
Is electrically connected to the TFTl.
The flat region 108a in which the 08 is not formed is formed at a position diagonal to the formation position of the TFT 108 in the pixel region 102bb. Therefore, the molybdenum silicide layer 116bb is conductively connected to the flat region of the pixel electrode 106.

Further, in the liquid crystal display device of this example,
The gate electrode 105 is 1 × 10 ^{20 on the} polycrystalline silicon layer.
/ Cm ³ or less of phosphorus diffused into a lower layer gate electrode layer 105a having a thickness of 1500 Å or less and an upper gate electrode layer 105b made of a molybdenum silicide layer having a thickness of 2000 Å or less to form a two-layer structure. Has become. Such a two-layer structure gate electrode is
First, after a polycrystalline silicon film is formed to a thickness of 1000 angstrom, it is diffused in an oxygen and nitrogen atmosphere using phosphorus oxychloride at a temperature of 850 ° C. to form a lower gate electrode layer 105a. , 200
A molybdenum silicide layer having a thickness of 0 angstrom is formed by sputtering, and the upper gate electrode layer 105b is stacked, and is dry-etched using a CF ₄ -O ₂ -based gas. Here, when the composition formula of molybdenum silicide forming the upper-layer side gate electrode 105b is represented by MoSix, the value of X is preferably set to 2.0 to 3.5, and a value larger than this range. In this case, the resistance value becomes large, and the resistance value near 2.5 is suitable for preventing the occurrence of cracks. Note that tungsten silicide or titanium silicide can be used instead of molybdenum silicide.

In the liquid crystal display device of this example having such a configuration, since each molybdenum silicide layer 116bb ... When facing the counter substrate side, the molybdenum silicide layer 116bb serves as a margin in the alignment of the counter substrate side black matrix, and the alignment accuracy does not matter. Further, since the potential of the molybdenum silicide layer 116bb is the same as that of the pixel electrode 106, the alignment state of the liquid crystal is not disturbed, so that high display quality can be obtained. Further, since the black matrix 116 is in an electrically independent state for each pixel, even if the molybdenum silicide layer 116bb and the data line 102a are short-circuited in the pixel region 101bb, only a point defect of display is achieved.

Further, in the liquid crystal display device of the present example, the gate electrode 105 has a lower gate electrode layer 105a having a thickness of 1500 angstroms or less obtained by diffusing phosphorus in the polycrystalline silicon layer and a thickness of 2000 angstroms or less. Although the polycide structure with the upper gate electrode layer 105b composed of the molybdenum silicide layer is adopted, the film thickness and the amount of impurities introduced are optimized to prevent the occurrence of cracks. The resistance of the gate lines 103a and 103b is reduced.
Further, it is possible to prevent the lower layer side interlayer insulating film 113 and the upper layer side interlayer insulating film 115 from being cracked.

Further, in this example, the surface side of the upper interlayer insulating film 115 has irregularities reflecting the shape of the TFT 108, but the connection hole 1 of the upper interlayer insulating film 115 is not formed.
Reference numeral 15a denotes a flat area 108a in which the TFT 108 is not formed, which is a TFT area in the pixel area 102bb.
Since it is formed at a diagonal position with respect to the formation position of 08,
The reliability of contact between the molybdenum silicide layer 116bb and the pixel electrode 106 is high.

(Embodiment 11) FIG. 24 is a schematic plan view showing a part of an active matrix substrate used in a liquid crystal display device according to Embodiment 11 of the present invention, and FIG. 25 is its XI-X section.
It is sectional drawing in the I line. Here, FIG. 18 and FIG.
The parts having the functions corresponding to those of the liquid crystal display device according to the eighth embodiment shown in FIG.

Also in the liquid crystal display device of this example, phosphorus as an n-type impurity is introduced into the polycrystalline silicon layer 210 formed on the surface side of the transparent substrate 209 in the pixel region 201bb except for the channel region 211. Thus, the source 204 and the drain 207 are formed. A lower layer side interlayer insulating film 213 made of a silicon oxide film is deposited on the surface side of the TFT 208, and the lower layer side interlayer insulating film 213 is formed on the lower layer side interlayer insulating film 213.
The connection hole 213a and the second connection hole 213b are opened. The data line 202a is conductively connected to the source 204 through the first connection hole 213a.

On the other hand, via the second connection hole 213b,
A stacked electrode layer 214 made of a chromium layer as a metal wiring layer having acid resistance is conductively connected to the drain 207. Here, the formation position of the connection hole 213b and the connection hole 21
Regarding the relationship with the formation position of 5a, the connection hole 215a is
It is located between 13b and the gate electrode 205.

Further, in the liquid crystal display device of this example, the pixel electrode 206 is on the surface side of the upper interlayer insulating film 215.
A molybdenum silicide layer 216bb (conductive light shielding layer) having a light blocking property and a conductivity is formed on the lower layer side of the pixel region 201bb and the pixel region 201a adjacent to the pixel region 201bb.
In the boundary area with b, 201ba, 201bc, and 201cb, the outer edge 216x is the data line 202a, 2b.
02b and the gate lines 203a, 203b, and the outer edge 206x of the pixel electrode 206. Here, the conductive light-shielding layer such as the molybdenum silicide layer 216bb is similarly formed in any of the pixel regions, but any of the molybdenum silicide layers 216ab, 216b in the adjacent pixel regions 201ab, 201ba, 201cb, and 201bc.
a, 216cb and 216bc, the molybdenum silicide layer 216bb is connected to the data line 202.
a, 202b and gate lines 203a, 203b are in a state of being insulated and separated just above the gate lines.

Further, in the liquid crystal display device of this example, a drive circuit for driving the active matrix array is also formed on the front surface side of the transparent substrate 209 with a CMOS circuit as shown in FIGS. . Here, FIG. 26 is a cross-sectional view of the CMOS circuit of the driver circuit, and FIG.
Is a plan view thereof.

In these figures, n-channel TFT
Although the 410 and the p-channel TFT 420 are formed simultaneously with the active matrix side, the gate electrode 205 and the data line 202 are formed on the active matrix side.
By utilizing the fact that the a and the pixel electrode 206 have the lower-layer side interlayer insulating film 213 or the upper-layer side interlayer insulating film 215 between the respective layers, the multilayer wiring structure is formed also on the drive circuit side. That is, the drive circuit side and the active matrix side are the drive circuit side gate electrode 441, the drive circuit side gate electrode wiring layer 442, and the lower layer side interlayer insulating film 21.
Up to the formation step of 3, the respective steps are used to form each other, and thereafter, the source lines 411 and 421 on the drive circuit side are formed.
After forming, the upper sacrificial insulating film 215 is formed.
Then, connection holes 415a and 415b are formed in the upper layer side interlayer insulating film 215 and the lower layer side interlayer insulating film 213,
The aluminum wiring layer 430 is conductively connected to the drains 417 and 427 of the n-channel TFT 410 and the p-channel TFT 420 via the connection holes 415a and 415b. The aluminum wiring layer 4
Formed on the surface side of 30 is a surface protective layer 230.
Is.

In the liquid crystal display device of this example having such a configuration, since each molybdenum silicide layer 216bb ... Is used as the black matrix, the same effect as that of the liquid crystal display device according to the eighth embodiment is obtained. The following effects are also achieved. That is, on the active matrix side, the gate electrode 205, the data line 202a, and the pixel electrode 206 have the lower interlayer insulating film 2 between the respective layers.
13 or the upper interlayer insulating film 215 is used to form the aluminum wiring layer 430 for the drains 417 and 427 of the n-channel TFT 410 and the p-channel TFT 420 with a multilayer wiring structure. Problems such as short circuit between wiring layers do not occur. In addition, since it has a multilayer wiring structure, it is an n-channel TF.
The area required to form a driver circuit including the T410 and the p-channel TFT 420 can be small, and if the area of the substrate is the same, the pixel region can be expanded, and if the area on the pixel side is the same, the substrate can be expanded. The whole, that is, the liquid crystal display device can be downsized.

[0122]

As described above, according to the present invention, since the conductive light-shielding layer has the pixel potential, even if the conductive light-shielding layer is on the data line or the gate line, it is affected by the potential fluctuation of the data line or the gate line in the conventional floating state. It can be reduced.

[0123]

[0124]

[0125]

[0126]

[0127]

[Brief description of drawings]

FIG. 1 is a plan view showing a part of a matrix array of a liquid crystal display device according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view taken along the line II of FIG.

FIG. 3 is a plan view showing a part of a matrix array of a liquid crystal display device according to a second embodiment of the present invention.

FIG. 4 is a sectional view taken along line II-II in FIG.

FIG. 5 is a plan view showing a part of a matrix array of a liquid crystal display device according to a third embodiment of the present invention.

6 is a cross-sectional view taken along the line III-III in FIG.

FIG. 7 is a schematic plan view of a matrix array of a liquid crystal display device according to a modification of Example 3 of the present invention.

FIG. 8 is a plan view showing a part of a matrix array of a liquid crystal display device according to a fourth embodiment of the present invention.

9 is a sectional view taken along line IV-IV in FIG.

10A to 10C are process cross-sectional views showing a part of the method for manufacturing the liquid crystal display device shown in FIG.

FIG. 11 is a plan view showing a part of a matrix array of a liquid crystal display device according to a fifth embodiment of the present invention.

12 is a cross-sectional view taken along line VV of FIG.

13A to 13D are process cross-sectional views showing a part of the method for manufacturing the liquid crystal display device shown in FIG.

FIG. 14 is a plan view showing a part of a matrix array of a liquid crystal display device according to a sixth embodiment of the present invention.

15 is a cross-sectional view taken along line VI-VI in FIG.

FIG. 16 is a plan view showing one of matrix arrays of a liquid crystal display device according to a seventh embodiment of the present invention.

17 is a cross-sectional view taken along the line VII-VII of FIG.

FIG. 18 is a plan view showing a part of the matrix array of the liquid crystal display device according to the eighth embodiment of the present invention.

19 is a cross-sectional view taken along the line VIII-VIII in FIG.

FIG. 20 is a plan view showing a part of a matrix array of a liquid crystal display device according to Embodiment 9 of the present invention.

21 is a cross-sectional view taken along the line IX-IX in FIG.

FIG. 22 is a plan view showing a part of a matrix array of a liquid crystal display device according to Embodiment 10 of the present invention.

23 is a cross-sectional view taken along line XX of FIG.

FIG. 24 is a plan view showing a part of a matrix array of a liquid crystal display device according to Embodiment 11 of the present invention.

25 is a cross-sectional view taken along the line XI-XI of FIG.

FIG. 26 is a cross-sectional view showing the configuration of part of a drive circuit formed on the same substrate as the matrix array of the liquid crystal display device according to Example 11 of the present invention.

FIG. 27 is a plan view showing the configuration of part of the drive circuit formed on the same substrate as the matrix array of the liquid crystal display device according to Example 11 of the present invention.

FIG. 28 is a plan view showing a part of a matrix array of a conventional liquid crystal display device.

29 is a sectional view taken along line XII-XII in FIG. 28.

FIG. 30 is a plan view showing a part of a matrix array of a liquid crystal display device according to a comparative example.

31 is a cross-sectional view taken along line XIIII-XIIII in FIG.

─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Kazuo Yudasaka 3-3-5 Yamato, Suwa City, Nagano Seiko Epson Co., Ltd. (72) Inventor Takashi Inoue 3-3.5 Yamato, Suwa City, Nagano Prefecture Seiko Epson Corporation (56) Reference JP-A-64-68729 (JP, A) JP-A-5-257164 (JP, A) JP-A-5-34679 (JP, A) JP-A-4-291240 (JP, A) JP-A-3-288824 (JP, A) JP-A-3-271720 (JP, A) JP-A-2-245741 (JP, A) JP-A-2-234122 (JP, A) Actual Kai 59-194783 (JP, U) Actual Kaihei 1-104051 (JP, U) International publication 93/011455 (WO, A1) (58) Fields investigated (Int.Cl. ⁷ , DB name) G02F 1 / 13-1/141

Claims (4)

(57) [Claims] 1. A plurality of gate lines, a plurality of data lines intersecting with the plurality of gate lines, a thin film transistor provided corresponding to the gate lines and the data lines, the plurality of gate lines and the plurality of gate lines. A liquid crystal display device having a pixel region formed of the data line, wherein the data line is in a layer above the thin film transistor and connected to the source of the thin film transistor, and in the same layer as the data line, A conductive connection layer connected to the drain of the thin film transistor, two adjacent scan lines and two adjacent data lines that are above the conductive connection layer and that are connected to the conductive connection layer and that form the pixel region. A liquid crystal display device comprising: a conductive light-shielding layer that overlaps a line; and a pixel electrode that is conductively connected to the conductive light-shielding layer. 2. The liquid crystal display device according to claim 1, wherein the conductive light shielding layer overlaps a channel region of a thin film transistor. 3. A plurality of gate lines, a plurality of data lines intersecting with the plurality of gate lines, a thin film transistor provided corresponding to the gate lines and the data lines, the plurality of gate lines and the plurality of thin film transistors. An active matrix substrate for a liquid crystal display device having a pixel region formed of the data line, wherein the data line is in a layer above the thin film transistor and is connected to a source of the thin film transistor. A conductive connection layer that is connected to the drain of the thin film transistor in the same layer as the data line, and two adjacent scans that are above the conductive connection layer and that are connected to the conductive connection layer and that form the pixel region. A conductive line and a conductive light-shielding layer overlapping the two adjacent data lines, and a pixel electrode conductively connected to the conductive light-shielding layer. Active matrix substrate for liquid crystal display devices . 4. The active matrix substrate for a liquid crystal display device according to claim 3, wherein the conductive light shielding layer overlaps a channel region of a thin film transistor.