JP3365068B2 - Image processing device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [0001] BACKGROUND OF THE INVENTION The present invention relates to a color image processing apparatus.
Font information coded from the host device,
High resolution by receiving graphic information and image information
Related to an image processing apparatus for forming full-color images
It is. [0002] BACKGROUND OF THE INVENTION Coded phones containing color information
Information, graphic information and image information.
Page Description Language
Lower PDL) Form color image using data as input data
When decoding PDL data, full page image
The image is developed in a memory, and an image is formed based on the image. Obedience
Heretofore, in such an image processing device, each pixel has a color image.
Color components (cyan, magenta) corresponding to the color material that forms the image
, Yellow, black), a plurality of bits (for example, 8
Bit). High color images like this
As a technology to form quickly, memory elements are allocated for each color component.
To configure the image memory,
Write multiple color component data at the same time while
Techniques have been proposed that can be incorporated. FIG. 15 shows an image in a conventional image processing apparatus.
FIG. 3 is a block diagram illustrating a configuration of an image memory. Figure 15
And 5_cIs the memory element for cyan, 5_MIs a note for magenta
Re-element, 5_YIs the memory element for yellow, 5_KIs black
Memory device. Each memory element 5_c, 5_M, 5_Y,
5_KThus, an image memory for one page is configured. Ma
Each memory element 5_c, 5_M, 5_Y, 5_KHas a common
Given the address Ad, at the position specified by it
In addition, each 8-bit color component data corresponding to one pixel
TA PD_C, PD_M, PD_Y, PD_KWriting, or
Reading is performed. The signal WE is a write enable signal.
Bull signal. Here, when writing data to the image memory,
The operation of FIG. 15 will be described by taking a case as an example. Each note
Re-element 5_c, 5_M, 5_Y, 5_KThe color component data
Data PD_C, PD_M, PD_Y, PD_KWhile giving
When the dress Ad and the write enable signal WE are given,
One image at the position specified by the address Ad of the memory element
The original data is written. Next, the color component data PD
_C, PD_M, PD_Y, PD_KAnd the address Ad to the next pixel
And a write enable signal WE is given.
Then, the data of the next pixel is written to the address.
If such operations are repeated for the required number of pixels,
Is developed in the image memory. [0005] It is to be noted that such an image processing apparatus has a problem.
Conventional documents include, for example, Japanese Patent Application Laid-Open No. 4-27781.
There is an official gazette. [0006] SUMMARY OF THE INVENTION
In the prior art, one address output outputs one pixel of data.
Data can only be read and written. Therefore, 400 dpi
For high-resolution full-color printers such as
Percentage of image memory access time in DL processing time
Increase the performance overhead
The problem is remarkable, and there is a problem that efficiency is deteriorated. Book
The invention aims to solve such a problem.
Things. [0007] Means for Solving the Problems To solve the above problems,
In the image processing apparatus of the present invention, the input page description
Page description language processing means for decoding language data;
Based on the output of the page description language processing meansShould be deployed
Image development position and pixel data for each line according to the type of image
DataImage developing means for generatingPixel data of each pixel
Pixel data of a plurality of pixels by a plurality of memories each storing
Data at the same address, and write
ControllableImage memory,Varies by pixel
An image generated by the image developing means.
Pixel data sequentially taken in based on the development position,
A package that packs and holds pixel data for each of the plurality of pixels.
King means and graphic and font images
The pixel data generated by the image developing means
Register means for holding a plurality of pixels;
And sequentially generating addresses in units of the plurality of pixels.
In addition, the packing of the packing is controlled by controlling the writing of each memory.
Pixel data held in the register means or the register means
Is written to the image memoryImage memory control means
Was decided. [0008] [Function] A page description of input page description language data
Decoded by language processing means, and by image development meansImage to expand
Image development position and pixel data for each line according to the type of
And generate And an image that changes in pixel units
For the image, the packing data is used to store the pixel data
Pack graphics and font images.
The pixel data is held by the register means for the plurality of pixels.
I do. After that, the image memory control means uses the image development means.
Packing means based on the developed position of the generated image
Or pixel data of a plurality of pixels held in the register means
At the same address by a plurality of memories. Thus, the image is developed in the image memory.
ThoughControl the writing to multiple memories
Address for an image developed for each input
Generate images and pack images
ProcessingSo high resolution full color pre
Image memos during PDL processing time
Of the access time of the
Absent. [0010] BRIEF DESCRIPTION OF THE DRAWINGS FIG.
Will be described. FIG. 1 is a schematic configuration of an image processing apparatus according to the present invention.
It is a block diagram showing composition. In FIG. 1, reference numeral 1 denotes an external input.
Interface, 2 is a PDL processing unit, 3 is an image development unit,
4 is an image memory controller, 5 is an image memory, and 6 is output control
The device 7 is an output device. The external interface 1 is a SCSI (Sma
ll Computer System Interface)
Source, communication LSI (Large Scale Integration)
Or various buses that are tightly coupled to the host computer.
You. The PDL processing unit 2 receives the data through the external interface 1.
Page description language data into images and graphics
And convert them to data for image development by classifying fonts and fonts.
Replace. The image developing unit 3 receives the image received from the PDL processing unit 2.
Performs drawing based on the data for image development, and displays the result.
The image data is passed to the image memory controller 4. [0012] The image memory control unit 4
Based on the received data, multiple at one address output
Each color component data of the pixel is written into the image memory 5. Real truth
In the present embodiment, each color component for 32 pixels is output by one address output.
Data is written to the image memory 5. image
The memory 5 has a structure in which 32 pixels are designated by the same address.
Which of the 32 pixels is overwritten,
It is determined by the write enable signal WE. That is,
Pixels to which the write enable signal WE is not supplied
Data is output to the data bus, but data is
Data writing does not occur. The output control device 6 is an image memo.
Output control when outputting the data of the file 5 from the output device 7.
Do. FIG. 2 shows an image in the image processing apparatus of the present invention.
FIG. 3 is a block diagram illustrating a configuration of an image memory. Figure 2
And 50_C~ 531_CIs the memory that stores the cyan color component
Element, 50_M~ 531_MIs a method that stores the magenta color component.
Moly element, 50_Y~ 531_YStores the yellow color component
Memory element, 50_K~ 531_KIs the color component of black
It is a memory element to be stored. Also, four memory elements 5
0_C, 50_M, 50_Y, 50_KTo store data for one pixel.
I have. The address terminal of each memory element is
Are connected by a dress line and one address Ad is
Is to be given. Also, Light Enable
Signals WE0 to WE31 are collectively provided for each pixel.
You. Also, the data terminal of each memory element has 8 bits.
Color component data PD_C0 to PD_KEach corresponding to 31
There are eight. FIG. 3 shows an image in the image processing apparatus of the present invention.
FIG. 3 is a conceptual diagram of data storage on an image memory. d0, d1, ...
.., DN correspond to one pixel each, and each pixel
For cyan C, magenta M, yellow Y and black K
Each of the four types of color component data has eight bits. Soshi
In the first pixel corresponding portion d0, four types of color component data P
D_C0, PD_M0, PD_Y0, PD_K0 is stored and the next
The pixel component d1 has color component data PD_C1, PD_M
1, PD_Y1, PD_K1 is stored, and so on.
The four types of color component data are stored in the pixel corresponding portions of the pixel data. Soshi
Therefore, the writing and reading are performed for 32 pixels, for example.
For example, the pixel corresponding parts d0 to d31 are designated by one address.
It is done by doing. Hereinafter, the configuration of each part of the image processing apparatus of the present invention.
Will be described in detail. FIG. 4 is a schematic configuration of a PDL processing unit.
FIG. Reference numeral 1 corresponds to that of FIG.
20 is a CPU (Central Processing Unit), 21 is a PDL
ROM (Read Only Memory), 22 is a work RAM (Ran
dom Access Memory), 23a is the image command register
Star 23b is an image data FIFO (First In Firs
t Out), 23c is the image status register, 24a
Is the graphic command register and 24b is the graphic command register.
Data FIFO, 24c is graphic status
Register, 25a is the font command register,
25b is the font data FIFO, 25c is the font data FIFO
Status register. The CPU 20 is a CPU for code processing.
The PDL code ROM 21 stores a processing program for the CPU 20.
Ram is stored. The work RAM 22 is
Work area. CPU 20 is a PDL code ROM
External interface 1 according to 21 processing programs
Images and graphics from PDL data received from
To the data for image expansion of font and font, respectively
Is transferred to the image developing unit 3. It
Are transferred to the image command register 23a,
Image data FIFO 23b, Graphic command
Register 24a, graphic data FIFO 24b
 , Font command register 25a, font
Data FIFO 25b. An example of these commands and data is shown below.
And the following: For images, <100,100,200,400, cmyk, 0,255,122,4, ............> fi
llImage This is an image with a width of 200 and a height of 400 centered on the coordinates (100,100).
The image data is drawn in the color specified for each pixel.
Means the color composition of each pixel
`` 0,255,122,4, ............ '' indicating minutes
The data is stored in the image data FIFO 23b. In the case of graphics, <100,100,200,200, cmyk 0,255,122,4> fillBOX This is the length with the coordinates (100,100) and (200,200) as diagonal lines.
The inside of the rectangle is represented by the color components cmyk0, 255, 122, 4
It means to fill, but among the above commands,
"100,100,200,200" is the graphic data
Data FIFO 24b. For fonts, <100,100,10, GothicFont, abcd, cmyk 0,255,122,4> Prin
tfont This means that at the coordinates (100,100) the 10 Gothic string "ab
cd ”with color components cmyk0, 255, 122, 4
Characters in the above command.
Column “abcd” is font data FIFO 25 as data
b. FIG. 5 shows the processing in the PDL processing unit.
It is a flowchart. Step 1: PDL data from external interface 1
To receive. Step 2: Analyze the received command. Step 3: Determine what command the received command is
I do. Step 4: The received command is an image
If it is a drawing command, process the previously issued image drawing command.
Has been completed and the image data FIFO 23b is empty.
To determine if it is okay to issue the next command.
Bell. Step 5: If it's OK, the image will be drawn
The area of the image memory 5 and the graph already issued to the image
Fic, font drawing command area does not overlap
Check whether or not. Step 6: If they do not overlap, the image processing unit 31 (FIG.
Issue a command to 1). Step 7: Graphic drawing in step 3
If it is a graphic command,
Processing is completed and graphic data FIFO 24b is empty
And is it safe to issue the next command?
Find out what. Step 8: If OK, the graphic is drawn
Area of the image memory 5 which has already been issued to the image developing unit 3
Image and font drawing command area does not overlap
Check whether or not. Step 9: Non-overlapping or overlapping phases
If the hand is the same color font, the graphic processing unit 32
(FIG. 1). Note that the overlapping
Reasons that areas can overlap if it is a color font
Is the same regardless of which one is drawn first.
You. Step 10: Font drawing in step 3
If it is a command, the processing of the previously issued font drawing command
Finished, the font data FIFO 25b is empty,
Check if it is okay to issue the following command
You. Step 11: If OK, the font is drawn
The area of the image memory 5 and the area already issued to the image
The image and graphic drawing command area do not overlap
Check if it is. Step 12: Do not overlap or overlap even if they overlap
If the other party is a graphic of the same color, the font processing unit 33
(FIG. 1). Step 13: The output instruction in step 3
If you want, image, graphic, font drawing command
Are all processed, and the drawing to the image memory 5 is completed.
To determine if it is safe to issue an output command.
You. Step 14: If it is okay, go to the image memory control unit 4.
Issue an output command. Step 15: Other instructions in Step 3
If so, process the command. Step 16: Have all PDL data been processed?
It is determined whether or not it is not completed, and if it is not completed yet, the process proceeds to step 1.
Return. Next, a detailed configuration of the image developing unit 3 will be described.
You. The image developing unit 3 is composed of an image processing unit 31 and a graphic
It is divided into a processing unit 32 and a font processing unit 33. FIG.
Is a block diagram showing a schematic configuration of each part of the image developing unit.
FIG. 6A shows the configuration of the image processing unit 31 and FIG.
(B) shows the configuration of the graphic processing unit 32, FIG.
Shows the configuration of the font processing unit 33. Figure 6
310, 320, 330 are CPU, 311 is for image development
ROM, 312, 322, 332 RAM for work, 313
Image buffer, 314 is an image command FIFO,
315 is a color data FIFO, 316 and 324 are start point FIFOs
O, 317 and 325 are end point FIFOs, 321 is a graphic exhibition
Open ROM, 323 is a graphic command FIFO,
331 is font development ROM, 333 is font data
ROM, 334 is font command FIFO, 335 is font
Point data FIFO. The CPU 310 of the image processing unit 31
CPU for image expansion processing, RO for image expansion
M311 is an image expansion processing program for CPU310
Is stored. The work RAM 312 is
Work area, image buffer 313 is CP
The image image developed by U310 is temporarily stored. The CPU 310 sends an image from the PDL processing unit 2 to the
Command register 23a and image data FIFO
Image drawing command and image drawing via O23b
When data is received, it follows the image development processing program.
Expands the image into the image buffer 313
You. Then, the image from the PDL processing unit 2 to the image memory 5 is stored.
When the transfer instruction is received, the work RAM 312 and the image
Based on the data stored in the buffer 313, FIG.
As shown in FIG. 11B, a command as shown in FIG.
Such pixel data as shown in FIGS.
Issue point and end point position data to the image memory control unit 4
You. The issuance is performed by the image command FIFO 314,
Color data FIFO 315, start point FIFO 316 and end point F
This is performed via the IFO 317. The graphic processing unit 32 shown in FIG.
And the font processing unit 33 shown in FIG.
Processing is performed and the graphic command FIFO 323
 , Start FIFO 324, end FIFO 325, font
Command FIFO 334, font data FIFO 335
Command and data to the image memory control unit 4 via
hand over. The commands and data are graphical
In the case of, for example, as shown in FIGS.
In the case of a font, for example, FIG.
3 (a) and (b). Next, the detailed configuration of the image memory control unit 4 will be described.
explain. FIG. 7 shows a schematic configuration of the image memory control unit.
FIG. The reference numerals correspond to those in FIG.
Is the image memory controller, 41 is the graphic memory
Control unit, 42 is a font memory control unit, 43 is a data
Locking section, 44 is a data selector, 45 is an address
46, a memory access controller, 47
Write enable selector, 48 is graphic color
Data register, 49 is font / color data register
It is a star. The image memory control unit 40 includes an image development unit
3 data rasterized by the image processing unit 31
Of the image memory 5 in which the (x, y) coordinates are transformed based on
Generation of address AdI, write enable signal WEI and
And memory access request signal / memory access completion signal R
Generate AI. Similarly, graphics memory
The control unit 41 and the font memory control unit also
Raster processing by the font processing unit 32 and the font processing unit 33.
Address AdG, AdF,
Write enable signals WEG, WEF and memory access
Request signal / memory access completion signal RAG, RAF
Generate. Note that the memory access completion signal is a memo
When the re-access controller 46
For the requester that issued the request signal, the cycle of the request is
This is a signal for notifying completion. The memory access controller 46 is shown in FIG.
The image processing unit 31 of the image developing unit 3 shown in FIG.
Memory access from memory processor 32 and font processor 33
Request signal and from the internal refresh timer.
Arbitrate with the DRAM refresh request and
Ras for AM^*, Cas^*Generate Also the address
・ Output the address Ad selected by the selector 45, and
Data selector 44 and write enable selector 47
Selection signal S₀, S₁, S_Two, S_ThreeIs output. The address selector 45 is a memory access
Image controller according to the instructions from the controller 46.
Memory controller 40, graphic memory controller 41, phone
Address generation units 401, 411, 421 of the memory control unit 42 for
Of the addresses AdI, AdG, AdF output from
Select one and output. In addition, the write enable
Lector 47 is provided from memory access controller 46.
According to the instruction, the image memory control unit 40, the graphic
Memory control unit 41 and font memory control unit 42
Output from the enable enable generators 402, 412, and 422.
One of the write enable signals WEI, WEG, and WEF
Select and output. The data packing unit 43 includes the image developing unit 3
Color data FIFO 31 of the image processing unit 31 (FIG. 1)
5 Receiving the color data from (Fig. 6 (a)) one pixel at a time.
And store the data to collect data for 32 pixels.
And output them all at once. That way, each pixel
Packing data to the maximum access width of image memory
In the image processing, the color changes in pixel units
Should not be a bottleneck in accessing image memory.
You. In the case of graphics and fonts, one image
Pack the data like this because the image is monochromatic
No need, color data is directly graphic color
Data register 48, font color data register
To 49. The data selector 44 is a memory access
Data packing according to the instruction of the controller 46
Color data PDI and graph of the image from unit 43
Graphics from the Quick Color Data Register 48
Image color data PDG and font / color data
・ Font image color data PDF from register 49
And outputs one of them. Next, in the image memory control unit 4, x,
The address Ad and the write enable signal WE are calculated from the y coordinate.
An example of the configuration of the generation unit is the image memory control unit 40.
This will be explained. FIG. 8 is a block diagram of the image memory controller.
A block diagram showing an example of a dress generation unit and a write enable generation unit.
It is a lock figure. Reference numerals 316 and 317 are those of FIGS.
, 403 is the start point register, 404 is the end point register,
405 and 408 are comparators, 406 is a control unit, and 407 and 4072 are additions
And 409, a drawing mask generator. The start point register 403 and the end point register 404 are:
Each time the scanning line changes, the start point FIFO 316 and end point FI
From the FO317, the start and end points on the scan line are read.
Rarely set. Start address register 40
70 is the y coordinate y1 indicating the first scan line and the image memo.
The number of words X in the x direction of the file 5_WProduct y1 × X_WHold
You. The value is stored in the image processing unit 40 of the image memory.
It is set by the processing control unit 400 (FIG. 7). The image memory 5 is stored in the width register 4071 in the x direction.
The number of words X in the x direction_WAnd the adder 407
First, the value of the start address register 4070 is
After being set, each time the scan line changes,
Word number X of star 4071_WIs added. That is, addition
The head 407 of each scanning line (the position of x = 0)
Is set. On the other hand, the load counter 4032
Each time the port changes, the start point register 403
The upper bit is set and one word is
Counts up by one each time data is written
Is done. Then, the value of the load counter 4032 is
The value is input to the adder 4072 together with the value of 407, and the sum is added.
The output of the unit 4072 is the address AdI of the image memory 5.
Here, the pair of the x and y coordinates of the image and the image memory address
FIG. 14 is a conceptual diagram showing the response. The value of the load counter 4032 is
Input to the destination device 405, where the upper
Is compared to the Then, the comparator 405
The value of the upper bit of the destination register 404.
When it exceeds, the control unit 406 is notified. The control unit 406
Memory access from memory access controller 46 (Fig. 7)
When the access completion signal RAI is sent, the drawing mask
Outputs count-up clock CC to component section 409
However, after receiving the above notification from the comparator 405,
The output of the top clock CC is stopped. The drawing mask generation unit 409 is provided in the starting point register 40
3, lower 5 bits 4031 and 4041 of end point register 404 and control
By the count-up clock CC from the control unit 406,
A write enable signal WEI is generated. That is,
Lower 5 bits 403 of point register 403 and end register 404
According to 1,4041, out of 32 pixels processed at a time,
Specify the pixel to be written to the memory 5 and
Pixel indicated by start point register 403 and end point register 404
Write enable signal W for a pixel between
Output EI. The above processing is performed by setting the first scanning line as the initial value.
The y-coordinate of the image is set, then the image memory
The image processing control unit 400 (FIG. 7) of the control unit 40
The value of the current scan line register 4080 to be incremented is
The last line level where the y coordinate of the last scan line is set
This is repeated until the value of the register 4081 is reached. The graph
Memory controller 41 for fonts and memory controller 42 for fonts
In this case, the same processing is performed. Next, the configuration of the data packing unit 43 will be described.
I will tell. FIG. 9 shows an example of the configuration of the data packing unit.
FIG. The reference numerals correspond to those in FIGS.
430 is the data latch section, 431 to 433 are pixel data
Latch 434 is a latch address encoder.
You. The pixel data latches 431 to 433
, Magenta, yellow, and black color components
A total of 32 bits of data are latched by 8 bits.
Latch address encoder 434 is an image memo
Based on the lower 5 bits of the load counter 4032 of the
Then, specify the pixel data latch sequentially, and
The pixel data latches 431 to 433
Latches the data given from the FIFO 315
You. Next, the configuration of the data selector 44 will be described.
You. FIG. 10 is a block diagram showing an example of the configuration of the data selector.
It is a lock figure. In FIG. 10, 441 to 444 are 4 inputs.
One output selector. 4 input 1 output selector 441 to 444
Indicates cyan, magenta, yellow, and black for each pixel.
There are a total of 32, 8 for each color component of the
There are 32 pixels for a total of 1024 pixels.
You. Each of the four-input one-output selectors 441 to 444 has four
Image and group to three of the three input terminals.
1 bit for each image data of graphic and font
And select and output one of them. The election
Select from the memory access controller 46 (Figure 7)
Select signal S applied₀, S₁It is performed by An example
For example, select signal S₀, S₁When both are “0”,
Image data is output and the select signal S₀Is “0”
And select signal S₁Is “1”, the graphic data
Data is output and the select signal S₀Is selected with "1"
Signal S₁Is "0", font data is output
You. The write enable register 47 in FIG.
Address selector 45 has the same configuration as data selector
It can be realized with. However, the number of 4-input / 1-output selectors
Is the address once in the write enable register 47.
The number corresponding to the number of pixels to be written simultaneously in the output (32
Address selector 45), the number of address bits
Is the number corresponding to. The image memory controller 4 as described above
In the example shown in FIG.
Draw command, data and start and end points are input
And the running from y1 to y1 + 3, as shown in FIG.
Each starting point X on the inspection line_s1, X_s2, ... and each end point
X_e1, X_e2, ..., color data pixel (
X_s1, y₁), pixel (X_s1+ 1, y₁), ... are specified individually
An image filled with pixels of the different colors is obtained. Also, as shown in FIGS.
Graphic drawing command and start and end points are input
And, as in the case of FIG. 11 (e), from y1 to y1 + 3.
Each starting point X on the scan line_s1, X_s2, ..., and each end point X
_e1, X_e2, ..., the image is filled.
You. However, each pixel is specified by "set cmyk 0,255,0,0".
Colors, that is, magenta, all have the same color. Further, FIGS. 13 (a) and 13 (b) show
Font drawing commands and bitmap data
When input, the width W and the height H as shown in FIG.
As shown in FIG. 13 (d), characters of size
The coordinates (x₀, Y₀) Is developed from the starting point.
And the color is the color specified by "cmyk 0,255,122,4"
Becomes In the above embodiment, the color space is CMYK
, But not necessarily limited to other colors
Space, for example, RGB, CIE based color space
Is also good. [0051] As described above, the image processing apparatus of the present invention
Now, to expand the image in the image memoryPer, multiple
Controls writing to memory and expands image for each line.
Addresses are sequentially generated for each image in units of multiple pixels.
In addition, pack the image
Was. Therefore, high-resolution full-color printers
Even access to image memory during PDL processing time
The percentage of time did not increase and the efficiency did not decrease.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram illustrating a schematic configuration of an image processing apparatus according to the present invention. FIG. 2 is a block diagram illustrating a configuration of an image memory in the image processing apparatus according to the present invention. FIG. 4 is a block diagram showing a schematic configuration of a PDL processing unit. FIG. 5 is a flowchart showing processing in the PDL processing unit. FIG. 6 is a block diagram showing processing in the PDL processing unit. FIG. 7 is a block diagram showing a schematic configuration of the image memory control unit. FIG. 8 is a block diagram showing an example of an address generation unit and a write enable generation unit in the image memory control unit. FIG. 10 is a block diagram illustrating an example of a configuration of a data packing unit. FIG. 10 is a block diagram illustrating an example of a configuration of a data selector. FIG. 11 is provided to an image data control unit. FIG. 12 is a diagram showing an example of data and an image corresponding thereto. FIG. 12 is a diagram showing an example of data provided to a graphic data control unit. FIG. 13 is an example of data provided to a font data control unit and an image corresponding thereto. FIG. 14 is a conceptual diagram showing a correspondence relationship between x and y coordinates and an image memory address. FIG. 15 is a block diagram showing a configuration of an image memory in a conventional image processing apparatus. 2 ... PDL processing unit, 20,
310, 320, 330 ... CPU, 21 ... PDL code ROM, 22 ... work RAM, 3 ... image developing unit, 31
... Image processing unit, 311 ... Image development ROM, 3
12 ... work RAM, 313 ... image buffer,
32: Graphic processing unit, 321: Graphic development ROM, 322: Work RAM, 33: Font processing unit, 331: Font development ROM, 332: Work RAM, 333: Font data ROM, 4: Image memory control Unit, 40... Image memory control unit, 403
... Start point register, 404 ... End point register, 405, 40
8 comparator, 406 control unit, 407, 4072 adder, 4070 start address register, 407
1 Word number register, 4080 Current scan line register, 4081 Last line register, 409 Drawing mask generator, 41 Memory controller for graphics, 4
2: Font memory control unit, 43: Data packing unit, 430: Pixel data latch unit, 434: Latch address encoder, 44: Data selector, 4
41 to 444... 4 input 1 output selector, 45.
Selector, 46 ... memory access controller, 4
7 ... write enable selector, 48 ... graphics color data register, 49 ... font color data register, 5 ... image memory, 5c~5 _K, 50 _{C
~531 C, 50 M ~531 M,} 50 Y ~531 Y, 5
0 _K ~531 _K ... memory device, 6 ... output control apparatus 7 ...
Output device

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H04N 1/21 B41J 2/525 G06F 3/12

Claims (1)

(57) [Claims] 1. A page description language processing means for decoding input page description language data , and develops based on an output of the page description language processing means .
Image development position and image for each line according to the type of image to be
Image developing means for generating raw data, and a plurality of memories each storing pixel data of each pixel.
Store pixel data of multiple pixels at the same address
In an image memory capable of controlling writing for each memory, the image developed for images that change in units of pixels
Means for generating pixel data based on the development position.
And sequentially captures the pixel data for each of the plurality of pixels.
Packing means for holding and packing, and image development for graphic images and font images
Holding the pixel data generated by the means for the plurality of pixels
Register means for sequentially addressing the plurality of pixels based on the development position.
And write control of each memory
And held in the packing means or the register means
An image memory control unit for writing the pixel data thus obtained into the image memory .