JP2991388B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device having a multi-layer wiring.

[0002]

2. Description of the Related Art As shown in FIG. 2A, a conventional semiconductor device has a silicon substrate 1 on which transistors and elements are formed.
A lower wiring 3 for forming a circuit connecting elements is selectively formed on a silicon oxide film 2 provided thereon, and an interlayer insulating film 4 is formed on a surface including the wiring 3. Here, the interlayer insulating film 4 is a three-layer composite interlayer insulating film formed by sequentially depositing a silicon nitride film formed by a plasma CVD method, a silicon oxide film formed by a spin-on coating method, and a silicon nitride film formed by a plasma CVD method. I have. Next, an aluminum layer 9 for forming an upper wiring is deposited to a thickness of 4 μm on the interlayer insulating film 4 by a sputtering method. Here, the thickness of the aluminum layer 9 is set to 4 μm in order to reduce the resistance of the wiring itself and to reduce the voltage drop due to the current flow.
In a portion where is close, a sparse region 9a where an aluminum layer is sparsely deposited may occur due to a step in the interlayer insulating film 4.

Next, as shown in FIG. 2B, a photoresist film 6 is applied on the aluminum layer 9 and patterned by photolithography to form a circuit forming pattern. Next, about half of the thickness of the aluminum layer 9 is removed by a wet etching method using a solution containing acetic acid as a main component using the photoresist film 6 as a mask.

Next, as shown in FIG. 2C, the remaining portion of the aluminum layer 9 is removed by anisotropic dry etching with a corrosive gas containing carbon tetrachloride as a main component again using the photoresist film 6 as a mask. Then, the wiring 5 in the upper layer of the desired circuit pattern is formed. Here, the combination of the wet etching method and the dry etching method is used.
This is because the processing accuracy cannot be obtained only by the wet etching method, and the thickness of the aluminum wiring to be processed has an upper limit in the dry etching method. Here, the steep slope of the aluminum layer 9 formed at the time of the wet etching may be left by the dry etching to form the conductive protrusion 7.

Next, as shown in FIG. 3, after removing the photoresist film 6, a protective film 8 such as a silicon oxide film is formed on the surface including the wiring 5 by a plasma CVD method.

[0006]

In the conventional method of manufacturing a semiconductor device, when an upper layer wiring is formed by a sputtering method, a region sandwiched between lower layer wirings arranged close to each other is formed. As shown in FIG. 2 (b), a sparse region 9a which is shadowed at the time of sputtering, hardly adheres to the aluminum layer, is sparsely deposited and has a high etching rate is formed, and the sparse region 9a disappears at the stage of wet etching. There is a steep slope. After that, when dry etching is performed, the steep slope is protected due to anisotropic etching, so that 1.5
A conductive protrusion 7 having a size of about μm is formed. Thereafter, when the protective film 5 is formed by the plasma CVD method, the substantially sparse protective film 8 abnormally grows around the protrusion 7 as shown in FIG. 3, and the sparse portion of the protective film 8 has poor moisture resistance. There has been a problem that the quality and reliability of the semiconductor device are reduced.

[0007]

According to the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of: providing a lower wiring on a semiconductor substrate; forming an interlayer insulating film on a surface including the lower wiring; scan a metal layer mainly composed of aluminum on
Depositing by a putter method , applying and patterning a photoresist film on the metal layer, and removing the upper portion of the metal layer by wet etching using the photoresist film as a mask, and then removing the photoresist again. Forming the upper layer wiring by removing the metal layer by dry etching using the film as a mask, and wet etching.
The steep slope of the metal layer formed during
The interlayer insulating film formed by being left by etching.
The method includes a step of removing the upper conductive protrusions with an acid solution , and a step of forming an insulating film on a surface including the upper wiring after removing the photoresist film.

[0008]

Next, the present invention will be described with reference to the drawings.

FIGS. 1A to 1C are sectional views of a semiconductor chip shown in the order of steps for explaining an embodiment of the present invention.

First, as shown in FIG.
(A) to (c), an interlayer insulating film 4 is formed on the surface including the lower wiring 3 in the same process as the conventional example described above, and an aluminum layer is deposited on the interlayer insulating film 4 by a sputtering method. Using the photoresist film 6 patterned and provided on the layer as a mask, wet etching and dry etching are sequentially performed to form the upper wiring 5. At this time, a steep slope generated by wet etching of the sparse region of the aluminum layer remains by anisotropic dry etching, and a conductive projection 7 mainly containing aluminum is formed.

Next, as shown in FIG. 1B, a surface treatment is performed for a few seconds with a solution containing acetic acid as a main component, and the projections 7 are removed.

Next, as shown in FIG. 1C, after removing the photoresist film 6, a protective film 8 such as a silicon oxide film or a silicon nitride film is formed on the surface including the wiring 5 by a plasma CVD method.
Is deposited. Here, since the protrusions 7 are removed, abnormal growth does not occur at the time of forming the protective film by plasma CVD, and the occurrence of a sparse portion of the protective film which is a factor of reducing the moisture resistance is prevented, thereby improving the reliability of the semiconductor device. Can be improved.

[0013]

As described above, according to the present invention, the protrusion formed when patterning the upper layer wiring by a combination of the wet etching method and the dry etching method is removed by an acid solution, and the subsequent protective film is formed. This has the effect of preventing abnormal growth and sparse portions caused by the formation of the semiconductor layer, thereby improving moisture resistance, and improving the quality and reliability of the semiconductor device.

[Brief description of the drawings]

FIG. 1 is a sectional view of a semiconductor chip shown in the order of steps for explaining an embodiment of the present invention.

FIG. 2 is a cross-sectional view of a semiconductor chip shown in a process order for describing a conventional method of manufacturing a semiconductor device.

FIG. 3 is a cross-sectional view of a semiconductor chip shown in a process order for describing a conventional method of manufacturing a semiconductor device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Silicon substrate 2 Silicon oxide film 3,5 wiring 4 Interlayer insulating film 6 Photoresist film 7 Projection 8 Protective film 9 Aluminum layer 9a Sparse area

Claims (2)

(57) [Claims] A step of forming a lower layer wiring on a semiconductor substrate and forming an interlayer insulating film on a surface including the lower layer wiring; and forming a metal layer containing aluminum as a main component on the interlayer insulating film by a sputtering method. Depositing, and applying and patterning a photoresist film on the metal layer,
Forming an upper wiring by removing the metal layer by dry etching again the photoresist film after removing the upper portion of the metal layer by wet etching using the photoresist film as a mask as a mask, Wettoe
The steep slope of the metal layer formed during the etching
The interlayer insulation formed by remaining by light etching
Removing the conductive protrusions on the edge film with an acid solution ,
Removing the photoresist film and then forming an insulating film on the surface including the upper layer wiring. 2. The method according to claim 1, wherein the acid solution is an etching solution containing acetic acid as a main component.