JP2010073893A5 - - Google Patents
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- Publication number
- JP2010073893A5 JP2010073893A5 JP2008239751A JP2008239751A JP2010073893A5 JP 2010073893 A5 JP2010073893 A5 JP 2010073893A5 JP 2008239751 A JP2008239751 A JP 2008239751A JP 2008239751 A JP2008239751 A JP 2008239751A JP 2010073893 A5 JP2010073893 A5 JP 2010073893A5
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- lead frame
- opening
- lead
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
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- 239000004065 semiconductor Substances 0.000 claims 46
- 238000004519 manufacturing process Methods 0.000 claims 4
- 239000000463 material Substances 0.000 claims 4
- 230000002093 peripheral Effects 0.000 claims 4
- 238000007789 sealing Methods 0.000 claims 3
- 239000000758 substrate Substances 0.000 claims 3
- 230000000875 corresponding Effects 0.000 claims 2
- 239000011347 resin Substances 0.000 claims 2
- 229920005989 resin Polymers 0.000 claims 2
- 239000002313 adhesive film Substances 0.000 claims 1
- 238000010030 laminating Methods 0.000 claims 1
- 238000003475 lamination Methods 0.000 claims 1
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2008239751A JP5207896B2 (ja) | 2008-09-18 | 2008-09-18 | 半導体装置及びその製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2008239751A JP5207896B2 (ja) | 2008-09-18 | 2008-09-18 | 半導体装置及びその製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2010073893A JP2010073893A (ja) | 2010-04-02 |
| JP2010073893A5 true JP2010073893A5 (ru) | 2011-08-18 |
| JP5207896B2 JP5207896B2 (ja) | 2013-06-12 |
Family
ID=42205410
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2008239751A Active JP5207896B2 (ja) | 2008-09-18 | 2008-09-18 | 半導体装置及びその製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP5207896B2 (ru) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5100715B2 (ja) * | 2009-07-13 | 2012-12-19 | 株式会社東芝 | 半導体装置及び半導体装置の製造方法 |
| KR101131447B1 (ko) * | 2010-10-05 | 2012-03-29 | 앰코 테크놀로지 코리아 주식회사 | 반도체 패키지 제조 방법 |
| KR101297015B1 (ko) * | 2011-11-03 | 2013-08-14 | 주식회사 네패스 | 리드프레임을 이용한 팬-아웃 반도체 패키지 제조방법, 이에 의한 반도체 패키지 및 패키지 온 패키지 |
| JP5924110B2 (ja) * | 2012-05-11 | 2016-05-25 | 株式会社ソシオネクスト | 半導体装置、半導体装置モジュールおよび半導体装置の製造方法 |
| KR101999114B1 (ko) * | 2013-06-03 | 2019-07-11 | 에스케이하이닉스 주식회사 | 반도체 패키지 |
| US10103128B2 (en) | 2013-10-04 | 2018-10-16 | Mediatek Inc. | Semiconductor package incorporating redistribution layer interposer |
| US10074628B2 (en) | 2013-10-04 | 2018-09-11 | Mediatek Inc. | System-in-package and fabrication method thereof |
| KR101819558B1 (ko) * | 2015-09-04 | 2018-01-18 | 주식회사 네패스 | 반도체 패키지 및 그 제조방법 |
| KR101809521B1 (ko) * | 2015-09-04 | 2017-12-18 | 주식회사 네패스 | 반도체 패키지 및 그 제조방법 |
| EP3151275A3 (en) * | 2015-09-11 | 2017-04-19 | MediaTek Inc. | System-in-package and fabrication method thereof |
| KR101944007B1 (ko) * | 2015-12-16 | 2019-01-31 | 주식회사 네패스 | 반도체 패키지 및 그 제조방법 |
| JP7096741B2 (ja) | 2018-09-11 | 2022-07-06 | 株式会社東芝 | 半導体装置の製造方法 |
| JP2023082375A (ja) * | 2021-12-02 | 2023-06-14 | ソニーセミコンダクタソリューションズ株式会社 | 半導体装置及び電子機器 |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000294722A (ja) * | 1999-04-01 | 2000-10-20 | Nec Corp | 積層化チップ半導体装置 |
| JP3649064B2 (ja) * | 1999-11-10 | 2005-05-18 | 松下電器産業株式会社 | 半導体装置の製造方法 |
| JP4321758B2 (ja) * | 2003-11-26 | 2009-08-26 | カシオ計算機株式会社 | 半導体装置 |
| JP5378643B2 (ja) * | 2006-09-29 | 2013-12-25 | ピーエスフォー ルクスコ エスエイアールエル | 半導体装置及びその製造方法 |
| JP2008187203A (ja) * | 2008-04-25 | 2008-08-14 | Sanyo Electric Co Ltd | 半導体装置の製造方法 |
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2008
- 2008-09-18 JP JP2008239751A patent/JP5207896B2/ja active Active
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