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JP2004112002A - Nitride semiconductor device - Google Patents

Nitride semiconductor device Download PDF

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JP2004112002A
JP2004112002A JP2004006964A JP2004006964A JP2004112002A JP 2004112002 A JP2004112002 A JP 2004112002A JP 2004006964 A JP2004006964 A JP 2004006964A JP 2004006964 A JP2004006964 A JP 2004006964A JP 2004112002 A JP2004112002 A JP 2004112002A
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nitride semiconductor
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JP2004112002A5 (en
JP3903988B2 (en
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Yoshikatsu Fukuda
福田 芳克
Akira Fujioka
藤岡 陽
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Nichia Chemical Industries Ltd
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Nichia Chemical Industries Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a nitride semiconductor light emitting element having a low leakage current and a high electrostatic withstand voltage. <P>SOLUTION: The nitride semiconductor element having an active layer made of a nitride semiconductor between a p-side layer and an n-side layer, both being made of two or more nitride semiconductor layers, respectively, wherein the p-side layer includes a p-type contact layer as a layer for forming an ohmic electrode and the p-type contact layer is made up of the p-type nitride semiconductor layers and the n-type nitride semiconductor layers stacked alternately. <P>COPYRIGHT: (C)2004,JPO

Description

 本発明は、発光ダイオード(LED)、レーザダイオード(LD)、太陽電池、光センサー等の発光素子、受光素子、あるいはトランジスタ、パワーデバイス等の電子デバイスに使用される窒化物半導体(例えば、InaAlbGa1-a-bN、0≦a、0≦b、a+b≦1)を用いた窒化物半導体素子に関する。 The present invention relates to a light emitting element such as a light emitting diode (LED), a laser diode (LD), a solar cell, a light sensor, a light receiving element, or a nitride semiconductor (for example, InaAlbGa1-) used for an electronic device such as a transistor or a power device. a-bN, 0 ≦ a, 0 ≦ b, a + b ≦ 1).

 窒化物半導体は青色発光素子(LED,LD)、純緑色発光素子を構成することができる半導体材料として注目されて、活発に研究開発が進められている。現在、この窒化物半導体を用いた素子として、高輝度青色LED、純緑色LED等がフルカラーLEDディスプレイ、交通信号灯、イメージスキャナー光源等の光源として実用化されているが、今後ますます幅広い用途に使用されることが期待される。これらのLED素子は基本的に、サファイア基板上にGaNよりなるバッファ層と、SiドープGaNよりなるn側コンタクト層と、単一量子井戸構造(SQW:Single-Quantum- Well)のInGaN、あるいはInGaNを有する多重量子井戸構造(MQW:Multi-Quantum-Well)の活性層と、MgドープAlGaNよりなるp側クラッド層と、MgドープGaNよりなるp側コンタクト層とが順に積層された構造を有しており、例えば、20mAにおいて、発光波長450nmの青色LEDで5mW、外部量子効率9.1%、520nmの緑色LEDで3mW、外部量子効率6.3%と非常に優れた特性を示す。
特開2000−101142号公報
Nitride semiconductors are attracting attention as semiconductor materials capable of forming blue light-emitting devices (LEDs, LDs) and pure green light-emitting devices, and are being actively researched and developed. At present, high-intensity blue LEDs, pure green LEDs, etc. have been put to practical use as light sources for full-color LED displays, traffic lights, image scanner light sources, etc. as devices using this nitride semiconductor. It is expected to be. These LED elements basically include a buffer layer made of GaN on a sapphire substrate, an n-side contact layer made of Si-doped GaN, InGaN having a single quantum well structure (SQW: Single-Quantum-Well), or InGaN. And a p-side cladding layer made of Mg-doped AlGaN and a p-side contact layer made of Mg-doped GaN are sequentially stacked. For example, at 20 mA, a blue LED with an emission wavelength of 450 nm has an excellent characteristic of 5 mW, an external quantum efficiency of 9.1%, and a green LED of 520 nm has an excellent external quantum efficiency of 3 mW and 6.3%.
JP 2000-101142 A

 しかしながら、今後窒化物半導体素子の用途が広がるに従って、発光強度及び発光効率に加え、リーク電流の低減や静電耐圧の向上がさらに望まれることが予想される。 However, as the use of nitride semiconductor devices expands in the future, it is expected that further reduction in leakage current and improvement in electrostatic withstand voltage in addition to emission intensity and emission efficiency are desired.

 そこで、本発明はリーク電流が低くかつ静電耐圧の高い窒化物半導体発光素子を提供することを目的とする。 Therefore, an object of the present invention is to provide a nitride semiconductor light emitting device having a low leakage current and a high electrostatic withstand voltage.

 以上の目的を達成するために、本発明に係る窒化物半導体素子は、それぞれ複数の窒化物半導体層からなるp側層とn側層の間に窒化物半導体からなる活性層を有する窒化物半導体素子であって、前記p側層はpオーミック電極を形成する層としてp型コンタクト層を含み、該p型コンタクト層はp型窒化物半導体層とn型窒化物半導体層とが交互に積層されてなり、前記p型コンタクト層と上記活性層の間に、p−AlGaNからなる第1層とp−InGaNもしくはp−GaNからなる第2層とを交互に形成してなる超格子p型層をさらに有することを特徴とする。
 このように構成された本発明に係る窒化物半導体発光素子において、上記p型コンタクト層がp型窒化物半導体層とn型窒化物半導体層とを交互に積層することにより形成されているので、p側が負でn側が正の逆方向に電圧が印加された場合に、静電破壊電圧(静電耐圧)を高くできかつリーク電流を小さくできる。これは、主として上記p型コンタクト層内のpn接合に逆バイアス電圧が印加されることによるものと考えられる。
 また、本発明に係る窒化物半導体素子では、前記p型窒化物半導体層はMgがドープされていてもよい。
 また、本発明に係る窒化物半導体素子では、前記超格子p型層の第1層と第2層にはそれぞれ、前記p型窒化物半導体層より多くのMgがドープされていることが好ましい。
 また、本発明に係る窒化物半導体素子では、前記超格子p型層と前記p型コンタクト層とが接していてもよい。
 さらに、本発明に係る窒化物半導体素子では、前記第1層の膜厚と前記第2層の膜厚は、前記n型窒化物半導体層膜厚及び前記p型窒化物半導体層の膜厚より薄いことが好ましい。
 さらに、本発明に係る窒化物半導体素子において、前記pオーミック電極は、前記p型コンタクト層上のほぼ全面に形成され、前記p型オーミック電極上の一部にpパッド電極が形成されていてもよい。
To achieve the above object, a nitride semiconductor device according to the present invention has a nitride semiconductor having an active layer made of a nitride semiconductor between a p-side layer and an n-side layer each made of a plurality of nitride semiconductor layers. An element, wherein the p-side layer includes a p-type contact layer as a layer forming a p-ohmic electrode, and the p-type contact layer is formed by alternately stacking p-type nitride semiconductor layers and n-type nitride semiconductor layers. And a superlattice p-type layer formed by alternately forming a first layer made of p-AlGaN and a second layer made of p-InGaN or p-GaN between the p-type contact layer and the active layer. Is further provided.
In the nitride semiconductor light emitting device according to the present invention thus configured, since the p-type contact layer is formed by alternately stacking the p-type nitride semiconductor layer and the n-type nitride semiconductor layer, When a voltage is applied in the negative direction on the p-side and positive in the n-side, the electrostatic breakdown voltage (electrostatic breakdown voltage) can be increased and the leak current can be reduced. It is considered that this is mainly because a reverse bias voltage is applied to the pn junction in the p-type contact layer.
In the nitride semiconductor device according to the present invention, the p-type nitride semiconductor layer may be doped with Mg.
Further, in the nitride semiconductor device according to the present invention, it is preferable that each of the first layer and the second layer of the superlattice p-type layer is doped with more Mg than the p-type nitride semiconductor layer.
In the nitride semiconductor device according to the present invention, the superlattice p-type layer may be in contact with the p-type contact layer.
Further, in the nitride semiconductor device according to the present invention, the thickness of the first layer and the thickness of the second layer are larger than the thickness of the n-type nitride semiconductor layer and the thickness of the p-type nitride semiconductor layer. Preferably, it is thin.
Furthermore, in the nitride semiconductor device according to the present invention, the p-type ohmic electrode may be formed on substantially the entire surface of the p-type contact layer, and a p-pad electrode may be formed on a part of the p-type ohmic electrode. Good.

 本発明に係る窒化物半導体素子において、前記n型窒化物半導体層に対するp型窒化物半導体層の膜厚比(p型窒化物半導体層の膜厚/n型窒化物半導体層の膜厚)が1以上で9以下に設定されていることが好ましい。 In the nitride semiconductor device according to the present invention, the thickness ratio of the p-type nitride semiconductor layer to the n-type nitride semiconductor layer (the thickness of the p-type nitride semiconductor layer / the thickness of the n-type nitride semiconductor layer) is It is preferable that the number is set to 1 or more and 9 or less.

 また、本発明に係る窒化物半導体素子において、順方向電圧を上昇させないように、前記n型窒化物半導体層の膜厚が60Å以下であることが好ましい。 {In the nitride semiconductor device according to the present invention, it is preferable that the thickness of the n-type nitride semiconductor layer is 60 ° or less so as not to increase a forward voltage.

 さらに、本発明に係る窒化物半導体素子において、良好なn型導電性を得るために前記n型窒化物半導体層にはSiがドープされ、良好なp型導電性を得るために前記p型窒化物半導体層にはMgがドープされていることが好ましい。 Further, in the nitride semiconductor device according to the present invention, the n-type nitride semiconductor layer is doped with Si in order to obtain good n-type conductivity, and the p-type nitride semiconductor layer is obtained in order to obtain good p-type conductivity. It is preferable that the material semiconductor layer is doped with Mg.

 また、本発明に係る窒化物半導体素子において、前記n型窒化物半導体層はSiがドープされたGaNからなり、前記p型窒化物半導体層はMgがドープされたGaNからなることが好ましく、これによりp型コンタクト層の抵抗率をより低くできる。
 また、本発明に係る窒化物半導体素子において、前記n型窒化物半導体層はアンドープ層であり、前記p型窒化物半導体層にはMgがドープされていてもよい。この場合、前記n型窒化物半導体層はアンドープGaNからなり、前記p型窒化物半導体層はMgがドープされたGaNからなることが好ましい。
In the nitride semiconductor device according to the present invention, preferably, the n-type nitride semiconductor layer is made of GaN doped with Si, and the p-type nitride semiconductor layer is made of GaN doped with Mg. Thereby, the resistivity of the p-type contact layer can be further reduced.
In the nitride semiconductor device according to the present invention, the n-type nitride semiconductor layer may be an undoped layer, and the p-type nitride semiconductor layer may be doped with Mg. In this case, it is preferable that the n-type nitride semiconductor layer is made of undoped GaN, and the p-type nitride semiconductor layer is made of GaN doped with Mg.

 以上、詳細に説明したように、本発明に係る窒化物半導体素子は、上記p型コンタクト層内にpn接合が形成されているので、正の逆方向に電圧が印加された場合における静電破壊電圧(静電耐圧)を高くできかつリーク電流を小さくできる。
 これにより、より高い静電耐圧が要求される用途に適用することが可能になる。
As described above in detail, in the nitride semiconductor device according to the present invention, since the pn junction is formed in the p-type contact layer, electrostatic breakdown when a voltage is applied in the positive and reverse directions. Voltage (electrostatic withstand voltage) can be increased and leak current can be reduced.
This makes it possible to apply the present invention to applications requiring higher electrostatic withstand voltage.

 以下、図面を参照しながら、本発明に係る実施の形態の窒化物半導体素子について説明する。
 図1は、本発明の一実施の形態である窒化物半導体素子(LED素子)の構造を示す模式的断面図であり、本実施の形態の窒化物半導体素子はサファイア基板1の上に、
 (1)AlGaNよりなるバッファ層2、
 (2)アンドープGaN層3、
 (3)SiドープGaNよりなるn型コンタクト層4、
 (4)アンドープGaN層5、
 (5)SiドープGaN層6、
 (6)アンドープGaN層7、
 (7)GaN/InGaN超格子n型層8、
 (8)InGaN層を井戸層としGaN層を障壁層とする多重量子井戸構造の活性層9、
 (9)p−AlGaN/p−InGaN超格子p型層10、
 (10)MgドープGaN/SiドープGaN変調ドープp側コンタクト層11、
 が順に積層された構造を有し、以下のようにp側及びn側の電極が形成されて構成されている。
Hereinafter, a nitride semiconductor device according to an embodiment of the present invention will be described with reference to the drawings.
FIG. 1 is a schematic cross-sectional view showing the structure of a nitride semiconductor device (LED device) according to an embodiment of the present invention. The nitride semiconductor device according to this embodiment has a structure on a sapphire substrate 1.
(1) AlGaN buffer layer 2,
(2) undoped GaN layer 3,
(3) n-type contact layer 4 made of Si-doped GaN,
(4) undoped GaN layer 5,
(5) Si-doped GaN layer 6,
(6) undoped GaN layer 7,
(7) GaN / InGaN superlattice n-type layer 8,
(8) an active layer 9 having a multiple quantum well structure in which an InGaN layer is a well layer and a GaN layer is a barrier layer;
(9) p-AlGaN / p-InGaN superlattice p-type layer 10,
(10) Mg-doped GaN / Si-doped GaN modulation-doped p-side contact layer 11,
Are sequentially laminated, and are formed by forming p-side and n-side electrodes as follows.

 nオーミック電極21は、例えば、素子の隅部においてp側コンタクト層11からアンドープGaN層5までをエッチングにより除去して、n型コンタクト層4の一部を露出させ、露出させたn型コンタクト層4上に形成する。
 また、p側の電極としては、p側コンタクト層11上のほぼ全面にpオーミック電極22を形成し、そのpオーミック電極22上の一部にpパッド電極23を形成している。
 ここで、特に本実施の形態の窒化物半導体素子は、p側コンタクト層11をMgドープGaN層11aとSiドープGaN層11bとを交互に積層した変調ドープ層により構成したことを特徴とし、これによりリーク電流を低減しかつ静電耐圧を向上させている。
 本実施の形態において、p側コンタクト層11(SiドープGaN層11b)における好ましいSiのドープ量としては1×1017/cm〜1×1021/cm、さらに好ましくは1×1018/cm〜5×1019/cmの範囲に調整する。1×1017/cm以上とすることで、リーク電流を小さくする効果が顕著に現れ、1×1021/cmより大きくなると結晶性が悪くなり、発光効率が低下する傾向にあるからである。
The n-ohmic electrode 21 is formed, for example, by removing the portion from the p-side contact layer 11 to the undoped GaN layer 5 at the corner of the element by etching, exposing a part of the n-type contact layer 4, and exposing the exposed n-type contact layer. 4 is formed.
As the p-side electrode, a p-ohmic electrode 22 is formed on almost the entire surface of the p-side contact layer 11, and a p-pad electrode 23 is formed on a part of the p-ohmic electrode 22.
Here, in particular, the nitride semiconductor device of the present embodiment is characterized in that the p-side contact layer 11 is constituted by a modulation doping layer in which an Mg-doped GaN layer 11a and a Si-doped GaN layer 11b are alternately stacked. This reduces the leakage current and improves the electrostatic withstand voltage.
In the present embodiment, the preferable doping amount of Si in the p-side contact layer 11 (Si-doped GaN layer 11b) is 1 × 10 17 / cm 3 to 1 × 10 21 / cm 3 , and more preferably 1 × 10 18 / cm 3 . Adjust to a range of cm 3 to 5 × 10 19 / cm 3 . When the concentration is 1 × 10 17 / cm 3 or more, the effect of reducing the leakage current becomes remarkable, and when it is larger than 1 × 10 21 / cm 3 , the crystallinity is deteriorated and the luminous efficiency tends to decrease. is there.

 また、p側コンタクト層11(MgドープGaN層11a)における好ましいMgのドープ量としては、1×1018/cm〜1×1021/cm、さらに好ましくは1×1019/cm〜3×1020/cmとする。1×1018/cm以上とすることで、pオーミック電極とより良好なオーミック接触が得られ、また、1×1021/cmより大きくすると、多量にSiをドープする場合と同様、結晶性が悪くなってしまうからである。 Further, the preferable doping amount of Mg in the p-side contact layer 11 (Mg-doped GaN layer 11a) is 1 × 10 18 / cm 3 to 1 × 10 21 / cm 3 , and more preferably 1 × 10 19 / cm 3 . 3 × 10 20 / cm 3 . By setting it to 1 × 10 18 / cm 3 or more, a better ohmic contact with the p-ohmic electrode can be obtained, and if it is larger than 1 × 10 21 / cm 3 , as in the case where a large amount of Si is doped, the crystal becomes This is because the sex becomes worse.

 また、本発明において、p−AlGaN/p−InGaN超格子p型層10は、クラッド層として機能し、光の閉じこめ、および活性層への正孔が注入される層となる。
 このp−AlGaN/p−InGaN超格子p型層10はp型とするために、p型不純物、例えば、Mgがドープされるが、p−AlGaN層に対するMgのドープ量とp−InGaN層に対するMgのドープ量は同一であっても異なっていても良いが、それぞれp側コンタクト層のMgドープGaN層11aのMgのドープ量よりも少ない量に設定することが好ましく、これによりVf(順方向電圧)をより低くできる。
 また、p−AlGaN/p−InGaN超格子p型層10のp−InGaN層はMgドープのGaN層で構成することもできる。
In the present invention, the p-AlGaN / p-InGaN superlattice p-type layer 10 functions as a cladding layer and serves as a layer for confining light and injecting holes into the active layer.
The p-AlGaN / p-InGaN superlattice p-type layer 10 is doped with a p-type impurity, for example, Mg in order to be p-type. The doping amount of Mg may be the same or different, but is preferably set to an amount smaller than the doping amount of Mg in the Mg-doped GaN layer 11a of the p-side contact layer, thereby setting Vf (forward direction). Voltage).
Further, the p-InGaN layer of the p-AlGaN / p-InGaN superlattice p-type layer 10 can also be constituted by a Mg-doped GaN layer.

 また、p−AlGaN/p−InGaN(p−GaN)超格子p型層10において、p−AlGaN層及びp−InGaN(p−GaN)層の各膜厚は、100Å以下、より好ましくは70Å以下、よりいっそう好ましくは10〜40Åの範囲に設定する。この場合、p−AlGaN層の膜厚とp−InGaN(p−GaN)層の膜厚は、同一であっても異なっていても良い。超格子p型層10は、p−AlGaN層とp−InGaN(p−GaN)層を交互に成長させて形成するが、例えば、p−AlGaN層から積層してp−AlGaN層で終わってもよく、p−InGaN(p−GaN)層から始めてp−InGaN(p−GaN)層で終わってもよい。しかしながら、InGaN層は熱分解しやすいので、InGaN層の表面が長時間、高温雰囲気中に曝されないように、p−AlGaN層で終わっていることが好ましい。 In the p-AlGaN / p-InGaN (p-GaN) superlattice p-type layer 10, the thickness of each of the p-AlGaN layer and the p-InGaN (p-GaN) layer is 100 ° or less, more preferably 70 ° or less. , More preferably in the range of 10 to 40 °. In this case, the thickness of the p-AlGaN layer and the thickness of the p-InGaN (p-GaN) layer may be the same or different. The superlattice p-type layer 10 is formed by alternately growing a p-AlGaN layer and a p-InGaN (p-GaN) layer. For example, even if the p-AlGaN layer is stacked from the p-AlGaN layer and ends with the p-AlGaN layer. Often, one may start with a p-InGaN (p-GaN) layer and end with a p-InGaN (p-GaN) layer. However, since the InGaN layer is easily thermally decomposed, it is preferable that the surface of the InGaN layer be terminated with the p-AlGaN layer so as not to be exposed to a high-temperature atmosphere for a long time.

 さらに、p−AlGaN/p−InGaN(p−GaN)超格子p型層10の総膜厚は、発光出力を高くしかつVfを低くするために、2000Å以下に設定することが好ましく、より好ましくは1000Å以下、さらに好ましくは500Å以下に設定する。
 また、p−AlGaN/p−InGaN(p−GaN)超格子p型層10の各膜厚は、p型コンタクト層の各膜厚よりも薄くすることが好ましい。すなわち、多層膜のp型コンタクト層に隣接する層を超格子層とし、各膜厚をp型コンタクト層のn型層及びp型層のそれぞれの膜厚よりも薄くすることで、さらに静電耐圧の高い窒化物半導体素子を構成できる。
Further, the total thickness of the p-type AlGaN / p-InGaN (p-GaN) superlattice p-type layer 10 is preferably set to 2000 ° or less, more preferably, to increase the light emission output and lower the Vf. Is set at 1000 ° or less, more preferably at 500 ° or less.
In addition, it is preferable that each film thickness of the p-AlGaN / p-InGaN (p-GaN) superlattice p-type layer 10 be smaller than each film thickness of the p-type contact layer. That is, the layer adjacent to the p-type contact layer of the multilayer film is a superlattice layer, and each film thickness is made smaller than the respective film thicknesses of the n-type layer and the p-type layer of the p-type contact layer. A nitride semiconductor device having a high withstand voltage can be configured.

 又、本実施の形態では、p−AlGaN/p−InGaN超格子p型層10を用いた形について説明したが、本発明はこれに限られるものではなく、少なくとも、AlGaNを有していれば良く、AlGaN単一層でもよい。p−AlGaN/p−InGaN超格子とすることで、AlGaN単一層と比べて結晶性が良くなり、抵抗率がさらに低下しVが低下する傾向にある。 Further, in the present embodiment, the form using the p-AlGaN / p-InGaN superlattice p-type layer 10 has been described, but the present invention is not limited to this, and at least AlGaN Alternatively, a single AlGaN layer may be used. By using a p-AlGaN / p-InGaN superlattice, the crystallinity becomes better than that of an AlGaN single layer, and the resistivity further decreases, and Vf tends to decrease.

 以上の実施の形態では、Vfを低くするために、好ましい形態として、p型コンタクト層をそれぞれGaNからなるn型窒化物半導体層(SiドープGaN層)とp型窒化物半導体層(MgドープGaN層)により構成したが、本発明はこれに限られるものではない。また、微量のInを含むInGaNもしくは微量のAlを含むAlGaNであれば、実質的にGaNと同様の効果が得られる。また、その他の微量の元素(In,Al以外の元素)がGaNに含まれていても同様、GaNと同等の効果が得られる。 In the above embodiment, in order to reduce Vf, as a preferable mode, the p-type contact layer is preferably formed of an n-type nitride semiconductor layer made of GaN (Si-doped GaN layer) and a p-type nitride semiconductor layer (Mg-doped GaN layer). Layer), but the present invention is not limited to this. In addition, in the case of InGaN containing a small amount of In or AlGaN containing a small amount of Al, substantially the same effect as GaN can be obtained. Further, even if other trace elements (elements other than In and Al) are contained in GaN, the same effect as GaN can be obtained.

 また、上述の実施の形態では、p型コンタクト層を構成するn型窒化物半導体層としてSiドープGaN層を用いたが、本発明はこれに限られるものではなく、n型窒化物半導体層はアンドープ層のn型層で構成してもよい。すなわち、本発明では、アンドープの窒化物半導体層がn型の導電性を示すことを利用して、n型窒化物半導体層としてアンドープの窒化物半導体層を用いても良い。尚、n型窒化物半導体層としてアンドープの窒化物半導体層を用いる場合、アンドープのGaN層を用いることが好ましい。より好ましくは、アンドープのGaN層とMgドープのGaN層とを組み合わせて、p型コンタクト層を構成する。 Further, in the above embodiment, the Si-doped GaN layer was used as the n-type nitride semiconductor layer constituting the p-type contact layer. However, the present invention is not limited to this. It may be composed of an undoped n-type layer. That is, in the present invention, an undoped nitride semiconductor layer may be used as the n-type nitride semiconductor layer by utilizing the fact that the undoped nitride semiconductor layer exhibits n-type conductivity. When an undoped nitride semiconductor layer is used as the n-type nitride semiconductor layer, it is preferable to use an undoped GaN layer. More preferably, the p-type contact layer is formed by combining the undoped GaN layer and the Mg-doped GaN layer.

 以下、実施例を用いて本発明についてより具体的に説明する。
 まず、実施例1として、p側コンタクト層11におけるMgドープGaN層11aとSiドープGaN層11bの膜厚比を変えた3種類のサンプルを作製して、逆方向の静電耐圧特性をそれぞれ評価した。
 本実施例1において、各半導体層の膜厚は表1に示すように設定し、各サンプルのp側コンタクト層11におけるMgドープGaN層11aとSiドープGaN層11bの膜厚の比は表2に示すようにした。
Hereinafter, the present invention will be described more specifically with reference to examples.
First, as Example 1, three types of samples in which the thickness ratio of the Mg-doped GaN layer 11a and the Si-doped GaN layer 11b in the p-side contact layer 11 were changed were manufactured, and the electrostatic withstand voltage characteristics in the opposite directions were evaluated. did.
In the first embodiment, the thickness of each semiconductor layer is set as shown in Table 1, and the ratio of the thickness of the Mg-doped GaN layer 11a to the thickness of the Si-doped GaN layer 11b in the p-side contact layer 11 of each sample is shown in Table 2. As shown.

表1

Figure 2004112002
Table 1
Figure 2004112002

表2

Figure 2004112002
 尚、本実施例1において、GaN層11aのMgドープ量は1×1020cm−3とし、GaN層11bのSiドープ量は5×1018cm−3とした。
 また、各サンプルは1つのGaN層11aと1つのGaN層11bとを1周期として10周期とした。 Table 2
Figure 2004112002
In the first embodiment, the Mg doping amount of the GaN layer 11a was 1 × 10 20 cm −3, and the Si doping amount of the GaN layer 11b was 5 × 10 18 cm −3 .
In each sample, one cycle of one GaN layer 11a and one GaN layer 11b was set to 10 cycles.

 以上のようにして作製したサンプル1〜3においてそれぞれ静電破壊電圧を評価した結果を図2のグラフに示す。
 尚、図2のグラフの縦軸は基準サンプル(比較例)の静電破壊電圧により規格化した値で示している。この基準サンプルはp側コンタクト層をMgが1×1020cm−3ドープされたGaNからなる単層とした以外は実施例1と同様に構成されている。
 図2のグラフに示すように、本実施例1のサンプル1〜3のいずれのサンプルについても、静電破壊電圧が比較例より向上していることが確認された。
 また、これにより膜厚比を7:3とすることで、静電破壊電圧を最も高くできることが確認された。
FIG. 2 is a graph showing the results of evaluating the electrostatic breakdown voltages of the samples 1 to 3 manufactured as described above.
The vertical axis of the graph in FIG. 2 is a value normalized by the electrostatic breakdown voltage of the reference sample (comparative example). This reference sample was configured in the same manner as in Example 1 except that the p-side contact layer was a single layer of GaN doped with Mg at 1 × 10 20 cm −3 .
As shown in the graph of FIG. 2, it was confirmed that the electrostatic breakdown voltage of each of Samples 1 to 3 of Example 1 was higher than that of Comparative Example.
It was also confirmed that the electrostatic breakdown voltage can be maximized by setting the film thickness ratio to 7: 3.

 実施例1の変形例
 実施例1では、超格子p型層と、p型コンタクト層11の間に、不純物濃度が低いAlGaN又はGaN層を形成することができ、これにより、より静電耐圧を高くできる。この低濃度AlGaN又はGaN層は好ましくは0.5μm以下、例えば、0.2μmの膜厚で形成する。この層は、アンドープで形成してもよく、p型不純物、例えばMgをドープしながら形成しても良いが、Mgをドープしながら形成する場合は、隣接する層のMg濃度よりも低くなるようにする。このようにすると、実施例1の素子に比較して、より静電耐圧を高くできる。
Modification of First Embodiment In the first embodiment, an AlGaN or GaN layer having a low impurity concentration can be formed between the superlattice p-type layer and the p-type contact layer 11, whereby the electrostatic breakdown voltage can be further reduced. Can be higher. This low concentration AlGaN or GaN layer is preferably formed with a thickness of 0.5 μm or less, for example, 0.2 μm. This layer may be formed undoped, or may be formed while doping with a p-type impurity, for example, Mg. However, in the case where the layer is formed while doping with Mg, the Mg concentration of the adjacent layer is lower than that of the adjacent layer. To By doing so, the electrostatic withstand voltage can be made higher than that of the device of the first embodiment.

 実施例1のサンプル1〜3に、MgドープGaN層11aの膜厚を36ÅとしSiドープGaN層11bの膜厚を84Åとしたサンプル4を加え、各サンプルについてそれぞれ、SiドープGaN層11bにおけるSiドープ量を0〜1.5×1019cm−3まで変化させて各サンプルについて、順方向電圧と発光出力を評価した。
 その結果を図3、図4に示す。
 この図3に示すように、サンプル1〜3においては、順方向電圧を上昇させることがないことが確認され、図4に示すように発光出力についてはサンプル1〜4はいずれも基準サンプルと同等又はそれ以上であることが確認された。
 尚、図4のE+18及びE+19は、それぞれ(×1018)及び(×1019)を意味するものであり、単位はcm−3である。
Samples 4 in which the thickness of the Mg-doped GaN layer 11a was 36 ° and the thickness of the Si-doped GaN layer 11b was 84 ° were added to the samples 1 to 3 of Example 1, and the Si in the Si-doped GaN layer 11b was changed for each sample. The forward voltage and the light emission output were evaluated for each sample while changing the doping amount from 0 to 1.5 × 10 19 cm −3 .
The results are shown in FIGS.
As shown in FIG. 3, it was confirmed that the forward voltage was not increased in Samples 1 to 3, and as shown in FIG. 4, the light emission output of Samples 1 to 4 was equivalent to that of the reference sample. Or more.
In addition, E + 18 and E + 19 in FIG. 4 mean (× 10 18 ) and (× 10 19 ), respectively, and the unit is cm −3 .

 実施例3では、MgドープGaN層11aとSiドープGaN層11bとの積層周期を10周期と固定し、MgドープGaN層11aの膜厚を84ÅとしSiドープGaN層11bの膜厚を36Åとしたサンプルにおいて、SiドープGaN層11bのSiドープ量を、1.0×1018/cm、2.5×1018/cm、5×1018/cmとした3種類のサンプルを作製して、その静電破壊電圧を測定した。
 その結果を、図5に示す。
 図5に示すように、SiドープGaN層11bにおけるSiドープ量が増加するほど、静電破壊電圧が向上することが確認された。
In the third embodiment, the lamination period of the Mg-doped GaN layer 11a and the Si-doped GaN layer 11b is fixed to 10 periods, the thickness of the Mg-doped GaN layer 11a is set to 84 °, and the thickness of the Si-doped GaN layer 11b is set to 36 °. Three types of samples were prepared in which the Si doping amount of the Si-doped GaN layer 11b was 1.0 × 10 18 / cm 3 , 2.5 × 10 18 / cm 3 , and 5 × 10 18 / cm 3. Then, the electrostatic breakdown voltage was measured.
The result is shown in FIG.
As shown in FIG. 5, it was confirmed that the electrostatic breakdown voltage was improved as the Si doping amount in the Si-doped GaN layer 11b was increased.

 実施例4では、MgドープGaN層11aとSiドープGaN層11bとの膜厚比を7:3に固定し、その周期を変えた、以下の表3の5種類のサンプルを作製して、それぞれ順方向電圧、発光出力及び静電破壊電圧について測定した。
表3

Figure 2004112002

 ここで、SiドープGaN層11bのSiドープ量は、5×1018/cmとした。
 その結果を、図6、図7及び図8に示す。
 図6及び図7に示すように、順方向電圧及び発光出力は積層周期数にはほぼ依存しないことが確認された。
 また、図8に示すように、静電破壊電圧は、10周期の場合が最も高くなり、次は15周期の場合であった。 In Example 4, five types of samples shown in Table 3 below were manufactured by fixing the thickness ratio of the Mg-doped GaN layer 11a and the Si-doped GaN layer 11b to 7: 3 and changing the period. The forward voltage, light emission output, and electrostatic breakdown voltage were measured.
Table 3
Figure 2004112002

Here, the Si doping amount of the Si-doped GaN layer 11b was 5 × 10 18 / cm 3 .
The results are shown in FIGS. 6, 7 and 8.
As shown in FIGS. 6 and 7, it was confirmed that the forward voltage and the light emission output were almost independent of the number of lamination cycles.
As shown in FIG. 8, the electrostatic breakdown voltage was highest in the case of 10 periods, and was next in the case of 15 periods.

 実施例5では、MgドープGaN層11aの膜厚(84Å)とSiドープGaN層11bの膜厚(36Å)の比を7:3とし、それを1周期として10周期繰り返して構成したコンタクト層において、SiドープGaN層11bのSiドープ量を0〜1.5×1019/cmの範囲で種々変化させて順方向電圧と発光出力を評価した。
 その結果を図9、図10に示す。
 図9に示すように、発光出力及び順方向電圧はSiドープGaN層11bのSiドープ量にはほとんど依存しないことが確認された。
In the fifth embodiment, the ratio of the film thickness (84 °) of the Mg-doped GaN layer 11a to the film thickness (36 °) of the Si-doped GaN layer 11b is set to 7: 3, and this is repeated for 10 periods, and the contact layer is repeated. The forward voltage and the light emission output were evaluated by variously changing the Si doping amount of the Si-doped GaN layer 11b in the range of 0 to 1.5 × 10 19 / cm 3 .
The results are shown in FIGS.
As shown in FIG. 9, it was confirmed that the light emission output and the forward voltage hardly depended on the Si doping amount of the Si-doped GaN layer 11b.

 実施例6では、MgドープGaN層11aの膜厚(84Å)とSiドープGaN層11bの膜厚(36Å)の比を7:3とし、それを1周期として10周期繰り返して構成したコンタクト層において、SiドープGaN層11bのSiドープ量を0〜1.5×1019/cmの範囲で種々変化させた各サンプルにおいて、ホール測定を熱アニールの前後で行った。
 尚、熱処理は、650℃、0.5時間で行った。
 その結果を図11に示す。
 その結果、SiドープGaN層11bに、5×1018/cm、1×1019/cmの比較的ドープ量の多いサンプルについては、熱アニールにより抵抗率の減少が顕著であることが確認された。
また、これらの抵抗率は、p−コンタクト層をp−GaNの単層膜で構成した場合の抵抗率である10Ω・cmより低い値であり、本願のMgドープGaN層11aとSiドープGaN層11bとが交互に積層されてなるコンタクト層は低抵抗化にも有効であることが確認された。
In the sixth embodiment, the ratio of the film thickness (84 °) of the Mg-doped GaN layer 11a to the film thickness (36 °) of the Si-doped GaN layer 11b is set to 7: 3, and this is repeated for 10 periods. In each of the samples in which the Si doping amount of the Si-doped GaN layer 11b was variously changed within the range of 0 to 1.5 × 10 19 / cm 3 , the hole measurement was performed before and after the thermal annealing.
The heat treatment was performed at 650 ° C. for 0.5 hour.
The result is shown in FIG.
As a result, it was confirmed that the thermal annealing significantly reduced the resistivity of the sample with a relatively large doping amount of 5 × 10 18 / cm 3 and 1 × 10 19 / cm 3 in the Si-doped GaN layer 11b. Was done.
These resistivity values are lower than 10 Ω · cm, which is the resistivity when the p-contact layer is formed of a single layer film of p-GaN, and the Mg-doped GaN layer 11 a and the Si-doped GaN layer It has been confirmed that a contact layer formed by alternately stacking 11b and 11b is also effective for lowering the resistance.

本発明に係る実施の形態の窒化物半導体素子の模式的な断面図である。FIG. 1 is a schematic sectional view of a nitride semiconductor device according to an embodiment of the present invention. 本発明に係る実施例1の各サンプルの静電破壊電圧を示すグラフである。4 is a graph showing the electrostatic breakdown voltage of each sample of Example 1 according to the present invention. 本発明に係る実施例2の各サンプルの順方向電圧を示すグラフである。9 is a graph showing the forward voltage of each sample of Example 2 according to the present invention. 実施例2の各サンプルの発光出力を示すグラフである。7 is a graph showing the light emission output of each sample of Example 2. 本発明に係る実施例3の各サンプルの静電破壊電圧を示すグラフである。9 is a graph showing the electrostatic breakdown voltage of each sample of Example 3 according to the present invention. 本発明に係る実施例4の各サンプルの順方向電圧を示すグラフである。14 is a graph showing the forward voltage of each sample of Example 4 according to the present invention. 実施例4の各サンプルの発光出力を示すグラフである。14 is a graph showing the light emission output of each sample of Example 4. 実施例4の各サンプルの静電破壊電圧を示すグラフである。13 is a graph showing the electrostatic breakdown voltage of each sample of Example 4. 本発明に係る実施例5の各サンプルの順方向電圧を示すグラフである。14 is a graph showing the forward voltage of each sample of Example 5 according to the present invention. 実施例5の各サンプルの発光出力を示すグラフである。15 is a graph showing the light emission output of each sample of Example 5. 本発明に係る実施例6の各サンプルの熱処理前後の抵抗率を示すグラフである。It is a graph which shows the resistivity before and after the heat treatment of each sample of Example 6 concerning this invention.

符号の説明Explanation of reference numerals

1…サファイア基板、
2…バッファ層、
3…アンドープGaN層、
4…n型コンタクト層、
5…アンドープGaN層、
6…SiドープGaN層、
7…アンドープGaN層、
8…GaN/InGaN超格子n型層、
9…多重量子井戸構造の活性層、
10…p−AlGaN/p−InGaN超格子p型層、
11…MgドープGaN/SiドープGaN変調ドープp側コンタクト層、
11a…MgドープGaN層、
11b…SiドープGaN層、
21…nオーミック電極、
22…pオーミック電極、
23…pパッド電極。
1: Sapphire substrate,
2 ... buffer layer,
3 ... undoped GaN layer,
4 ... n-type contact layer,
5 ... undoped GaN layer
6 ... Si-doped GaN layer,
7 ... undoped GaN layer,
8 ... GaN / InGaN superlattice n-type layer,
9: an active layer having a multiple quantum well structure,
10 ... p-AlGaN / p-InGaN superlattice p-type layer,
11: Mg-doped GaN / Si-doped GaN modulation-doped p-side contact layer,
11a: Mg-doped GaN layer,
11b: Si-doped GaN layer,
21 ... n ohmic electrode,
22 ... p ohmic electrode,
23 ... p pad electrode.

Claims (6)

 それぞれ複数の窒化物半導体層からなるp側層とn側層の間に窒化物半導体からなる活性層を有する窒化物半導体素子であって、
 前記p側層はpオーミック電極を形成する層としてp型コンタクト層を含み、該p型コンタクト層はp型窒化物半導体層とn型窒化物半導体層とが交互に積層されてなり、
 前記p型コンタクト層と上記活性層の間に、p−AlGaNからなる第1層とp−InGaNもしくはp−GaNからなる第2層とを交互に形成してなる超格子p型層をさらに有することを特徴とする窒化物半導体素子。
A nitride semiconductor device having an active layer made of a nitride semiconductor between a p-side layer and a n-side layer each made of a plurality of nitride semiconductor layers,
The p-side layer includes a p-type contact layer as a layer forming a p-ohmic electrode, and the p-type contact layer is formed by alternately stacking a p-type nitride semiconductor layer and an n-type nitride semiconductor layer,
A superlattice p-type layer formed by alternately forming a first layer made of p-AlGaN and a second layer made of p-InGaN or p-GaN between the p-type contact layer and the active layer; A nitride semiconductor device characterized by the above-mentioned.
 前記p型窒化物半導体層はMgがドープされている請求項1記載の窒化物半導体素子。 The nitride semiconductor device according to claim 1, wherein the p-type nitride semiconductor layer is doped with Mg.  前記超格子p型層の第1層と第2層にはそれぞれ、前記p型窒化物半導体層より少ない量のMgがドープされている請求項2記載の窒化物半導体素子。 3. The nitride semiconductor device according to claim 2, wherein the first layer and the second layer of the superlattice p-type layer are each doped with a smaller amount of Mg than the p-type nitride semiconductor layer.  前記超格子p型層と前記p型コンタクト層とが接している請求項1〜3のうちのいずれか1つに記載の窒化物半導体素子。 4. The nitride semiconductor device according to claim 1, wherein the superlattice p-type layer is in contact with the p-type contact layer. 5.  前記第1層の膜厚と前記第2層の膜厚は、前記n型窒化物半導体層膜厚及び前記p型窒化物半導体層の膜厚より薄い請求項1〜4のうちのいずれか1つに記載の窒化物半導体素子。 The film thickness of the first layer and the film thickness of the second layer are smaller than the film thickness of the n-type nitride semiconductor layer and the film thickness of the p-type nitride semiconductor layer. 6. A nitride semiconductor device according to any one of the above.  前記pオーミック電極は、前記p型コンタクト層上のほぼ全面に形成され、前記p型オーミック電極上の一部にpパッド電極が形成されている請求項1〜5のうちのいずれか1つに記載の窒化物半導体素子。
6. The p-type ohmic electrode according to claim 1, wherein the p-type ohmic electrode is formed on substantially the entire surface of the p-type contact layer, and a p-pad electrode is formed on a part of the p-type ohmic electrode. The nitride semiconductor device as described in the above.
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US7196347B2 (en) 2003-08-06 2007-03-27 Rohm Co., Ltd. Semiconductor light emitting device
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US7462884B2 (en) 2005-10-31 2008-12-09 Nichia Corporation Nitride semiconductor device
US8946764B2 (en) 2007-07-03 2015-02-03 Sony Corporation Gallium nitride-based semiconductor element, optical device using the same, and image display apparatus using optical device
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JP4640427B2 (en) * 2008-03-14 2011-03-02 ソニー株式会社 GaN-based semiconductor light-emitting device, light-emitting device assembly, light-emitting device, method for manufacturing GaN-based semiconductor light-emitting device, driving method for GaN-based semiconductor light-emitting device, and image display device
US7928452B2 (en) 2008-03-14 2011-04-19 Sony Corporation GaN-based semiconductor light-emitting element, light-emitting element assembly, light-emitting apparatus, method of manufacturing GaN-based semiconductor light-emitting element, method of driving GaN-based semiconductor light-emitting element, and image display apparatus
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