JP2003046081A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device which enables full exhibiting the performance of a semiconductor layer. SOLUTION: The semiconductor device is provided in a multilayered structure, which consists of the semiconductor layer 11 formed by epitaxial growth and an oxide barrier layer 12 which is formed on the semiconductor layer 11 by epitaxial growth, and has a larger band gap than the semiconductor layer 11. By applying a voltage between the semiconductor layer 11 and the oxide barrier layer 12, a carrier gas of a high mobility is generated on the interface of the semiconductor layer 11, which is in contact with the oxide barrier layer 12.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION The present invention relates to semiconductor devices.

[0002]

2. Description of the Related Art Conventionally, in electronic devices having various functions, IV group semiconductors represented by Si and GaA
III-V group compound semiconductors such as s have been widely used.
Particularly in recent years, crystal growth of wide-gap semiconductors and device technology have been rapidly developed for the purpose of manufacturing semiconductor devices of higher added value for industrial use. Such semiconductor materials include 6H—SiC, ZnSe, GaN, etc., and any of them has a band gap exceeding 3 eV, and devices having characteristics such as withstand voltage and short wavelength light emission are being put to practical use.

On the other hand, an oxide material has many functions that cannot be realized by conventional semiconductor materials such as dielectric properties, magnetism, and superconductivity, and there is a possibility that the characteristics of existing materials may be supplemented as a semiconductor material. Have Among the oxide materials, zinc oxide (ZnO) is a transparent conductive oxide having practical carrier mobility and conductivity controllability, and has been conventionally used as a transparent conductive film, and recently, the present inventor. The transparent transistor invented by K. et al.
It is expected that this will contribute to higher performance of display devices such as liquid crystals.

ZnO is a direct transition type semiconductor having a bandgap (about 3.2 eV) corresponding to the ultraviolet region, its exciton binding energy is as high as 60 meV, and exciton emission is observed even at room temperature. By using this, a light emitting device with higher efficiency and lower power consumption than GaN or ZnSe currently in practical use can be realized.

Conventionally, it has been difficult to control the p-type conductivity of ZnO, but a technique for obtaining low resistance p-ZnO by the co-doping method invented by Yamamoto et al.
48698.

Xin-Li Guo et al. Applied p-ZnO doped with acceptor using N ₂ O plasma to obtain Zn.
O homojunction light emitting diode is being manufactured (Jpn.J.App
l.Phys. Vol.40 (2001) pp.L177).

By the way, in manufacturing ZnO devices, a glass substrate or a sapphire substrate has been generally used. However, since the glass substrate is an amorphous substrate and the film forming temperature is limited, it is not possible to obtain a flat and high quality single crystal thin film. Further, even when the sapphire substrate is used, the gap between the ZnO thin film and the ZnO thin film is about 1
Since there is a lattice mismatch of 8%, there are crystal grain boundaries and orientation fluctuations, and it has been difficult to obtain a high-quality single crystal thin film.

Conventionally, as a semiconductor device in which the crystallinity of such a ZnO thin film is improved, Japanese Patent Laid-Open No. 2000-277 has been known.
There is one disclosed in Japanese Patent No. 534. This JP-A-200
The semiconductor device of 0-277534 is a semiconductor device having excellent crystallinity and characteristics in which wide-gap semiconductors such as ZnO and GaN are formed on a substrate having a very small lattice mismatch.

[0009]

By the way, in the field effect transistor and the pn junction light emitting element which are examples of the conventional semiconductor element, not only the crystallinity but also the quality of the junction interface involved in the generation and transport of carriers is considered. Has become important. However, since the quality of the bonding interface has not been sufficiently improved, there has been a problem that the performance originally possessed by ZnO cannot be fully exhibited.

Regarding the light emitting device, the characteristics of the p-type ZnO and the light emitting diode shown in the above conventional example are as follows.
It is hard to say that the mobility, conductivity control, and reproducibility in the manufacturing process are at a practical level for industrial use.

Therefore, an object of the present invention is to provide a semiconductor element capable of sufficiently exhibiting the performance of the semiconductor layer.

[0012]

In order to solve the above-mentioned problems, a semiconductor device of the present invention comprises a zinc oxide-based or nitride-based semiconductor layer formed by epitaxial growth and an epitaxial growth formed on the semiconductor layer. The semiconductor layer includes a stacked structure including an oxide barrier layer having a band gap wider than that of the semiconductor layer, and the semiconductor layer is in contact with the oxide barrier layer by applying a voltage between the semiconductor layer and the oxide barrier layer. It is characterized by generating a high mobility carrier gas at the interface of.

According to the semiconductor device having the above structure, since the interface of the semiconductor layer in contact with the oxide barrier layer is formed by epitaxial growth, it is difficult to generate an interface state due to a defect or the like, and the semiconductor layer and the oxide are prevented. The interface with the barrier layer becomes clean. Therefore, a carrier gas having a high concentration and a high mobility can be generated at the interface of the semiconductor layer in contact with the oxide barrier layer, and the performance of the semiconductor layer can be sufficiently exhibited.

Further, since the characteristics of the semiconductor layer can be fully utilized, the added value can be increased.

In the semiconductor device of one embodiment, the semiconductor layer is made of ZnO, Mg _X Zn _1-X O and Cd _X Zn.
It is a zinc oxide based semiconductor layer made of at least one oxide of _{1-X 2} O.

In the semiconductor device of one embodiment, the semiconductor layer is GaN, Al _X Ga _1-X N, In _X Ga _1-X N.
And a nitride-based semiconductor layer made of a nitride of at least one of Al _X In _1-X N.

The semiconductor device of one embodiment has a lattice mismatch ratio of 5 at the interface between the semiconductor layer and the oxide barrier layer.
% Or less.

According to the semiconductor element of the above embodiment, the lattice mismatch rate at the interface between the semiconductor layer and the oxide barrier layer is 5% or less, so that a laminated structure having a clean interface can be manufactured. I can.

In the semiconductor device of one embodiment, the oxide barrier layer contains LiGaO ₂ .

In the semiconductor device according to one embodiment, the oxide barrier layer has at least one selected from RABO ₄ or RAO ₃ (BO) _n R: Sc and In: A: Al, Fe and Ga. At least one selected: B: An insulator having a structure represented by at least one selected from Mg, Mn, Fe, Co, Cu, Zn, and Cd is included.

According to the semiconductor element of the above embodiment, when the semiconductor layer is made of ZnO, for example, the oxide barrier layer is RABO ₄ or RAO ₃ (BO) _n.
Since it includes the insulator having the structure represented by, the lattice mismatch ratio between the semiconductor layer and the oxide barrier layer can be 3% or less.

The semiconductor device of one embodiment is the RABO described above.
₄ is ScAlMgO ₄ , ScGaMgO ₄ , ScAl
MnO ₄ , ScGaCoO ₄ , ScAlCoO ₄ , Sc
It is one selected from GaZnO ₄ and ScAlZnO ₄ , and RAO ₃ (BO) _n is ScGaO ₃
It is one selected from (ZnO) _n and ScAlO ₃ (ZnO) _n .

According to the semiconductor device of the above embodiment,
When the semiconductor layer is made of ZnO, for example, the above RABO
_FourBut ScAlMgO_Four, ScGaMgO_Four, ScAl
MnO_Four, ScGaCoO_Four, ScAlCoO_Four, Sc
GaZnO_FourAnd ScAlZnO_FourSelected from
One and above RAO_Three(BO)_nBut ScGaO _Three
(ZnO)_nAnd ScAlO_Three(ZnO)_nSelect from
Since it is one selected, the case of the semiconductor layer and the oxide barrier layer
The child mismatch rate can be reduced to 1% or less.

In the semiconductor device of one embodiment, the oxide barrier layer is made of ZnO, Mg _X Zn _1-X O and Cd _X Zn.
It is a semiconductor layer made of any _{one of 1-X 2} O.

Further, the semiconductor device of the present invention comprises: an oxide semiconductor channel layer formed by epitaxial growth; an oxide gate insulating layer formed on the oxide semiconductor channel layer; and an oxide gate insulating layer formed on the oxide gate insulating layer. The oxide having a formed gate electrode, a source electrode formed on the oxide semiconductor channel layer, and a drain electrode formed on the oxide semiconductor channel layer, the oxide being in contact with the oxide gate insulating layer It is characterized in that a field effect type transistor operation is obtained by controlling the flow of a high mobility two-dimensional carrier gas generated at the interface of the semiconductor channel layer.

According to the semiconductor device having the above structure, since the interface of the oxide semiconductor channel layer in contact with the oxide gate insulating layer is formed by epitaxial growth, it is difficult to generate an interface level due to a defect or the like, and oxidation is caused. The interface between the semiconductor channel layer and the oxide gate insulating layer is cleaned. Therefore, a carrier gas with high concentration and high mobility can be generated at the interface of the oxide semiconductor channel layer which is in contact with the oxide gate insulating layer and the performance of the oxide semiconductor channel layer can be sufficiently exhibited. Can be done.

Further, since the characteristics of the oxide semiconductor channel layer can be fully utilized, the added value can be increased.

When the above semiconductor device is applied to a semiconductor switching device such as a field effect transistor, the mobility of the two-dimensional carrier gas generated at the interface of the oxide semiconductor channel layer due to the field effect is dramatically improved. It is possible to enable high-speed switching operation.

Further, since a clean interface with reduced defect levels can be formed, the applied gate voltage can be lowered and power consumption can be reduced.

In the semiconductor device of the present invention, the semi-insulating oxide semiconductor channel layer formed by epitaxial growth and the oxide semiconductor channel layer formed on the oxide semiconductor channel layer and doped with impurities. An oxide semiconductor barrier layer having a larger bandgap, a gate electrode formed on the oxide semiconductor barrier layer, in Schottky contact with the oxide semiconductor barrier layer, and formed on the oxide semiconductor barrier layer, A source electrode in ohmic contact with the oxide semiconductor barrier layer; and a drain electrode formed on the oxide semiconductor barrier layer in ohmic contact with the oxide semiconductor barrier layer, and in contact with the oxide semiconductor barrier layer. By controlling the flow of a highly mobile two-dimensional carrier gas generated at the interface of the oxide semiconductor channel layer, a field effect transistor It is characterized by obtaining a data operation.

According to the semiconductor device having the above structure, since the interface of the oxide semiconductor channel layer that is in contact with the oxide semiconductor barrier layer is formed by epitaxial growth, it is difficult to generate an interface state due to a defect or the like, and oxidation is caused. The interface between the object semiconductor channel layer and the oxide semiconductor barrier layer is cleaned. Therefore, a high concentration and high mobility carrier gas can be generated at the interface of the oxide semiconductor channel layer in contact with the oxide semiconductor barrier layer, and the performance of the oxide semiconductor channel layer can be sufficiently exhibited. Can be done.

Further, since the characteristics of the oxide semiconductor channel layer can be fully utilized, the added value can be increased.

When the above semiconductor device is applied to a semiconductor switching device such as a field effect transistor, the mobility of the two-dimensional carrier gas generated at the interface of the oxide semiconductor channel layer due to the field effect is dramatically improved. The high speed switching operation can be performed.

Further, since a clean interface with a reduced defect level can be formed, the applied gate voltage can be lowered and power consumption can be reduced.

In the semiconductor device of the present invention, the semi-insulating oxide semiconductor channel layer formed by epitaxial growth and the oxide semiconductor channel layer formed on the oxide semiconductor channel layer and doped with impurities are used. An oxide semiconductor barrier layer having a larger band gap, an oxide gate insulating layer formed on the oxide semiconductor barrier layer, a gate electrode formed on the oxide gate insulating layer, and the oxide semiconductor A high mobility generated at an interface of the oxide semiconductor channel layer, which includes a source electrode formed on the barrier layer and a drain electrode formed on the oxide semiconductor barrier layer, and is in contact with the oxide semiconductor barrier layer. It is characterized in that a field effect type transistor operation is obtained by controlling the flow of the two-dimensional carrier gas.

According to the semiconductor device having the above structure, since the interface of the oxide semiconductor channel layer in contact with the oxide semiconductor barrier layer is formed by epitaxial growth, it is difficult to generate an interface level due to a defect or the like, and oxidation is caused. The interface between the object semiconductor channel layer and the oxide semiconductor barrier layer is cleaned. Therefore, a high concentration and high mobility carrier gas can be generated at the interface of the oxide semiconductor channel layer in contact with the oxide semiconductor barrier layer, and the performance of the oxide semiconductor channel layer can be sufficiently exhibited. Can be done.

Further, since the characteristics of the oxide semiconductor channel layer can be fully utilized, the added value can be increased.

When the above semiconductor device is applied to a semiconductor switching device such as a field effect transistor, the mobility of the two-dimensional carrier gas generated at the interface of the oxide semiconductor channel layer due to the field effect is dramatically improved. It is possible to enable high-speed switching operation.

Further, since a clean interface with reduced defect levels can be formed, the applied gate voltage can be lowered and power consumption can be reduced.

The semiconductor device of one embodiment, the oxide semiconductor channel layer, _ZnO, is composed of at least one oxide semiconductor of Mg _{X Zn 1-X} O and _{Cd X Zn 1-X} O.

When the semiconductor element of the above embodiment is used for a display device having a high aperture ratio, for example, the oxide semiconductor channel layer has ZnO, Mg _x Zn _1-X.
O and Cd x _Zn 1-X from _O consists of at least one oxide semiconductor of a high aperture ratio display device can be operated at high speed.

In the semiconductor device of one embodiment, the oxide semiconductor channel layer and the oxide semiconductor barrier layer are made of Zn.
It is composed of at least one oxide semiconductor of O, Mg _X Zn _1-X O, and Cd _X Zn _1-X O.

The semiconductor device of the above embodiment, for example, when used in high aperture ratio display device, the oxide semiconductor channel layer and the oxide semiconductor barrier _{layer, ZnO, Mg X Zn 1-} X O and Cd _X Zn
_Since it is made of at least one oxide semiconductor of _{1-X 2} O, a display device having a high aperture ratio can be operated at high speed.

In the semiconductor device of one embodiment, the oxide semiconductor channel layer, the oxide semiconductor barrier layer, and the oxide gate insulating layer are ZnO, Mg _X Zn _1-X O, and Cd _X Zn _1-X O. Of at least one of the oxide semiconductors.

When the semiconductor device of the above embodiment is used for a display device having a high aperture ratio, for example, the oxide semiconductor channel layer, the oxide semiconductor barrier layer, and the oxide gate insulating layer are made of ZnO, Mg _X. Zn
_Since it is made of at least one oxide semiconductor of _1-X O and Cd _X Zn _1-X O, a display device having a high aperture ratio can be operated at high speed.

The semiconductor device of the present invention further comprises an oxide semiconductor light emitting layer formed by epitaxial growth, an oxide gate insulating layer formed on the oxide semiconductor light emitting layer,
A gate electrode formed on the oxide gate insulating layer,
A first electrode and a second electrode formed on the oxide semiconductor light emitting layer, wherein the interface of the oxide semiconductor light emitting layer in contact with the oxide gate insulating layer is in an inverted state. By applying a voltage to the first electrode and applying a voltage to the gate electrode and the second electrode such that the interface of the oxide semiconductor light emitting layer in contact with the oxide gate insulating layer is in an accumulated state, It is characterized in that electrons and hole gases are injected into a light emitting region in the oxide semiconductor light emitting layer to obtain light emission.

According to the semiconductor device having the above structure, since the interface of the oxide semiconductor light emitting layer in contact with the oxide gate insulating layer is formed by epitaxial growth, it is difficult to generate an interface level due to a defect or the like, and oxidation is caused. The interface between the semiconductor light emitting layer and the oxide gate insulating layer is cleaned. Therefore, the performance of the oxide semiconductor light emitting layer can be sufficiently exhibited.

Further, since the characteristics of the above oxide semiconductor light emitting layer can be fully utilized, the added value can be increased.

When the semiconductor element is applied to a semiconductor light emitting element such as a light emitting diode or a laser diode, an inversion state is formed by an electric field effect at the interface of the oxide semiconductor light emitting layer in contact with the oxide gate insulating layer, High mobility carriers having different conductivity types from those of the oxide semiconductor light emitting layer can be generated at high density.

In addition, the carrier generation by such an inversion layer is a semiconductor in which both conductivity types are difficult to produce even though it has optical characteristics such as ZnO having a high added value for industrial use. It is extremely effective for materials.

Further, the semiconductor device of the present invention includes an oxide gate insulating layer, an oxide semiconductor light emitting layer formed by epitaxial growth on the oxide gate insulating layer, and the oxide semiconductor in the oxide gate insulating layer. A gate electrode formed under the surface opposite to the light emitting layer, a first electrode formed on the oxide semiconductor light emitting layer, and a first electrode formed on the oxide gate insulating layer, A second electrode adjacent to a side surface, and by applying a voltage to the gate electrode and the first electrode so that an interface of the oxide semiconductor light emitting layer in contact with the oxide gate insulating layer is in an inverted state, By generating a carrier gas having a conductivity type opposite to that of the oxide semiconductor light emitting layer and applying a voltage between the first electrode and the second electrode, a light emitting region in the oxide semiconductor light emitting layer is generated. By injecting electrons and holes is characterized by obtaining light emission in.

According to the semiconductor device having the above structure, since the interface of the oxide semiconductor light emitting layer that is in contact with the oxide gate insulating layer is formed by epitaxial growth, it is difficult to generate an interface state due to a defect or the like, and the oxide is not oxidized. The interface between the object gate insulating layer and the oxide semiconductor light emitting layer is cleaned. Therefore, the performance of the oxide semiconductor light emitting layer can be sufficiently exhibited.

Further, since the characteristics of the oxide semiconductor light emitting layer can be fully utilized, the added value can be increased.

When the semiconductor element is applied to a semiconductor light emitting element such as a light emitting diode or a laser diode, an inversion state is formed by an electric field effect at the interface of the oxide semiconductor light emitting layer in contact with the oxide gate insulating layer, High mobility carriers having different conductivity types from those of the oxide semiconductor light emitting layer can be generated at high density.

Further, the carrier generation by such an inversion layer is a semiconductor in which it is difficult to produce a dual conductivity type, although it has optical characteristics such as ZnO having a high added value for industrial use. It is extremely effective for materials.

Further, the semiconductor device of the present invention comprises an oxide semiconductor light emitting layer formed by epitaxial growth, an oxide gate insulating layer formed on the oxide semiconductor light emitting layer,
A gate electrode formed on the oxide gate insulating layer,
A first electrode formed under the surface of the oxide semiconductor light emitting layer opposite to the oxide gate insulating layer; and a first electrode formed under the surface of the oxide semiconductor light emitting layer opposite the oxide gate insulating layer. A second electrode having an area larger than that of the first electrode, and the gate electrode and the first electrode so that an interface of the oxide semiconductor light emitting layer in contact with the oxide gate insulating layer is in an inverted state. By applying a voltage to the substrate, a carrier gas having a conductivity type opposite to that of the oxide semiconductor light emitting layer is generated, and the first electrode and the second electrode are formed.
By applying a voltage between the electrodes, electrons and holes are injected into a light emitting region in the oxide semiconductor light emitting layer to obtain light emission.

According to the semiconductor device having the above structure, the interface of the oxide semiconductor light emitting layer in contact with the oxide gate insulating layer is formed by epitaxial growth. The interface between the semiconductor light emitting layer and the oxide gate insulating layer is cleaned. Therefore, the performance of the oxide semiconductor light emitting layer can be sufficiently exhibited.

Further, since the characteristics of the oxide semiconductor light emitting layer can be fully utilized, the added value can be increased.

When the above semiconductor device is applied to a semiconductor light emitting device such as a light emitting diode or a laser diode, an inversion state is formed by an electric field effect at the interface of the oxide semiconductor light emitting layer in contact with the oxide gate insulating layer, High mobility carriers having different conductivity types from those of the oxide semiconductor light emitting layer can be generated at high density.

In addition, the carrier generation by such an inversion layer is a semiconductor in which both conductivity types are difficult to be manufactured, although it has optical characteristics such as ZnO having a high added value for industrial use. It is extremely effective for materials.

In the semiconductor device of one embodiment, the first electrode has a disk shape, the second electrode is formed so as to surround the first electrode, and the area of the second electrode is the first electrode. It is 10 times or more the area of the electrode.

The semiconductor device of one embodiment is a surface-emitting type, and the first electrode has a multi-layer structure for reflecting the light emitted from the oxide semiconductor light-emitting layer, and the first electrode and the The oxide gate insulating layer has a lower refractive index than the oxide semiconductor light emitting layer, the gate electrode is transparent to light emitted from the oxide semiconductor light emitting layer, and is emitted from the oxide semiconductor light emitting layer. The emitted light is resonantly amplified between the first electrode and the oxide gate insulating layer and emitted from the gate electrode.

The semiconductor device of one embodiment is a surface-emitting type, and is a conductive multi-layer structure that reflects light of the oxide semiconductor light emitting layer in a region of the oxide semiconductor light emitting layer near the first electrode. The first electrode and the oxide gate insulating layer have a lower refractive index than the oxide semiconductor light emitting layer, and the gate electrode is transparent to light emitted from the oxide semiconductor light emitting layer. The light emitted from the oxide semiconductor light emitting layer is resonantly amplified between the first electrode and the oxide gate insulating layer and emitted from the gate electrode.

The semiconductor device of one embodiment is of an edge emission type and has a pair of resonator faces parallel to the side surfaces of the oxide semiconductor light emitting layer, and the resonator face is formed from the oxide semiconductor light emitting layer. The light emitted from the oxide semiconductor light emitting layer is resonance-amplified on the resonator surface and emitted from at least one of the reflection films by adjoining a reflection film for the emission of light.

The semiconductor device of one embodiment is characterized in that the oxide semiconductor light emitting layer has a multilayer structure having a light or carrier confinement mechanism.

The semiconductor device of one embodiment is characterized in that the multilayer structure of the oxide semiconductor light emitting layer includes a quantum well structure including a well layer and a barrier layer.

The semiconductor device of one embodiment is the above oxide semi-conductor.
The conductor light emitting layer is ZnO, Mg_XZn _1-XO and Cd
_XZn_1-XO oxide semiconductor layer
ing.

The semiconductor device of one embodiment is LiGaO ₂
It is provided with an insulating substrate.

The semiconductor device of one embodiment has at least one selected from RABO ₄ or RAO ₃ (BO) _n R: Sc and In A: at least one selected from Al, Fe and Ga B: It has an insulating substrate which is an insulating compound having a structure represented by at least one selected from Mg, Mn, Fe, Co, Cu, Zn and Cd.

In the semiconductor device of one embodiment, the RABO ₄ showing the structure of the insulator compound is ScAlMg.
O ₄ , ScGaMgO ₄ , ScAlMnO ₄ , ScGa
It is one selected from CoO ₄ , ScAlCoO ₄ , ScGaZnO _4, and ScAlZnO ₄ , and RAO ₃ (BO) _n , which represents the structure of the insulator compound, is S
cGaO ₃ (ZnO) _n and ScAlO ₃ (ZnO) _n
It is one selected from.

[0071]

BEST MODE FOR CARRYING OUT THE INVENTION The semiconductor device of the present invention will be described in detail below with reference to the embodiments shown in the drawings.

(Embodiment 1) FIG. 1 shows a schematic sectional view of an optical element according to Embodiment 1 of the present invention. This semiconductor element
The semiconductor layer 11 formed by epitaxial growth and the oxide barrier layer 12 formed by epitaxial growth on the semiconductor layer 11 are provided. The band gap of the oxide barrier layer 12 is wider than that of the semiconductor layer 11. Further, the semiconductor element includes an ohmic electrode 14 in contact with the lower surface of the semiconductor layer 11 in the drawing and a gate electrode 13 in contact with the upper surface of the oxide barrier layer 12 in the drawing.

In the semiconductor device having the above structure, when a voltage is applied to the semiconductor layer 11 and the oxide barrier layer 12 via the ohmic electrode 14 and the gate electrode 13, the semiconductor layer 11 in contact with the oxide barrier layer 12 is caused by the electric field effect. 3A, 3B, 4A, 4B and 5A, 5B are formed at the interface of FIG. 3 (a), 4 (a) and 5 (a) show the case of a p-type semiconductor, and FIGS. 3 (b), 4 (b) and 5 (b) show an n-type semiconductor. Indicate the case.

As shown in FIGS. 3A and 3B, when a positive voltage is applied, majority carriers of the semiconductor layer 11 accumulate at the interface of the semiconductor layer 11.

As shown in FIGS. 4A and 4B, when a negative voltage is applied, a depletion layer is formed at the interface of the semiconductor layer 11.

As shown in FIGS. 5A and 5B, when a large negative voltage is applied, an inversion layer due to minority carriers of the semiconductor layer 11 is formed at the interface of the semiconductor layer 11.

Here, the case where the ohmic electrode 14 has the same polarity as that of the semiconductor layer 11 is defined as a positive voltage, and the majority carrier in the accumulated state and the minority carrier in the inverted state are both called carrier gas. I'm out.

The carrier gas generated by such an electric field effect is hardly affected by scattering, and the mobility is dramatically improved.

Next, the constituent material of each layer of the semiconductor element will be described.

In order to generate a carrier gas having high mobility as described above, it is necessary to reduce the interface state caused by defects such as carrier trapping as much as possible. For that purpose, it is important to select a combination of the semiconductor layer 11 and the oxide barrier layer 12 in which the lattice mismatch in the stacking plane is as small as possible, and to form the interface of the semiconductor layer 11 by epitaxial growth.

FIG. 2 shows an example of a semiconductor material used as the semiconductor layer 11 and a lattice constant. The semiconductor material applicable as the semiconductor material of the semiconductor layer 11 is not limited to this. Z is added to the semiconductor layer 11.
When nO or GaN is used, LiGaO ₂ having a wurtzite crystal structure with a band gap of 5.6 eV and a lattice mismatch of 3% or less can be used as the oxide barrier layer 12. Since ZnO is an oxide semiconductor, it has a high affinity with the oxide barrier layer 12, and is particularly preferable.

Further, as the oxide barrier layer 12, R
An oxide crystal having a structure of ABO ₄ or RAO ₃ (BO) _n can be used. FIG. 6 and FIG. 7 show the relationship between the lattice constant and the ionic radius of the oxide crystal having the structure of RABO ₄ or RAO ₃ (BO) _n .
As can be seen from FIGS. 6 and 7, the element R is selected from the group consisting of Sc and In, the element A is selected from the group consisting of Al, Fe, and Ga, and the element B is Mg, Mn, Fe, and
By selecting from the group consisting of Co, Cu, Zn, and Cd, the lattice mismatch rate with ZnO can be 3% or less. That is, the oxide barrier layer 12 includes at least one selected from RABO ₄ or RAO ₃ (BO) _n R: Sc and In, at least one selected from Al, Fe, and Ga, and B: Mg. The lattice mismatching ratio between the oxide barrier layer 12 and ZnO is 3% or less when the insulator has a structure represented by at least one selected from the group consisting of Al, Mn, Fe, Co, Cu, Zn and Cd. You can

More preferably, the RABO ₄ is Sc
AlMgO ₄ , ScGaMgO ₄ , ScAlMnO ₄ ,
ScGaCoO ₄ , ScAlCoO ₄ , ScGaZnO
₄ and ScAlZnO ₄ , one of the above RAO ₃ (BO) _n is ScGaO ₃ (Zn).
It is one selected from O) _n and ScAlO ₃ (ZnO) _n . In this case, the oxide barrier layer 12 and ZnO
The lattice mismatch rate with

Also, the potential barrier can be formed by forming the semiconductor layer 11 using, for example, Mg _X Zn _1-X O having a band gap larger than ZnO.
Also in this case, the oxide barrier layer 12 and the Mg _X
The lattice mismatch rate with Zn _1-X O can be set to 1% or less.

The combination as described above is not limited to the above, and when Cd _X Zn _1-X O having a smaller band gap than ZnO is used to form the semiconductor layer 11, ZnO is oxidized. It can be used as the material barrier layer 12. That is, the oxide barrier layer 12 can be formed of ZnO.

The semiconductor layer 11 has the same crystal structure as ZnO and has a close lattice constant, such as GaN and Al _X Ga.
_{1-X N, In X Ga} 1-X N, may be a nitride semiconductor such as Al _{X In 1-X} N. Even in this case, by selecting an oxide barrier layer having a lattice mismatch of 5% or less with respect to the nitride semiconductor, a high concentration and a high concentration can be obtained at the interface of the nitride semiconductor layer in contact with the oxide barrier layer. A carrier gas with mobility can be generated.

Next, the device structure and carrier gas generation region of the semiconductor device of the present invention will be described.

FIGS. 8A, 8B and 8C show modified examples of the element structure of the semiconductor element. In actual device manufacturing, the laminated structure has insulating support substrates 20, 30, 40.
Formed on. By using the same oxide insulator crystal as the oxide barrier layers 22 and 32 as the support substrate 20, the oxide semiconductor layers 21 and 3 having higher crystallinity are used.
1, 41 can be grown, and the cleanliness at the laminated interface is improved, which is preferable.

In the device structure shown in FIG. 8A, the oxide barrier layer 22 is formed on the oxide semiconductor layer 21, and the oxide barrier layer 22 and a desired gap are formed on the oxide semiconductor layer 21. To form the ohmic electrode 24. A gate electrode 23 is formed on the oxide barrier layer 22 so that the ohmic electrode 24 and the gate electrode 23 are parallel to each other. In such a structure, the carrier gas region 25 is formed immediately below the oxide barrier layer 22. That is, the oxide semiconductor layer 21 in contact with the oxide barrier layer 22.
A carrier gas region 25 is formed at the interface.

In the device structure shown in FIG. 8B, the oxide barrier layer 32 has a dot-shaped circular shape, and the ohmic electrode 34 is formed so as to surround it. More specifically, the dot disk-shaped oxide barrier layer 3 is formed on the oxide semiconductor layer 31.
2 is formed, and on the oxide semiconductor layer 31,
The ohmic electrode 34 surrounds the oxide barrier layer 32.
Is formed. On the oxide barrier layer 32, a dot disk-shaped gate electrode 33 is formed. In such a structure, the carrier gas region 35 has the oxide barrier layer 3
A circular shape is formed immediately below 2. That is, a circular carrier gas region 35 is formed at the interface of the oxide semiconductor layer 31 in contact with the oxide barrier layer 32. In this case, the carrier gas concentration in the carrier gas region 35 becomes uniform, which is preferable.

In the device structure shown in FIG. 8C, the supporting substrate 40 also serves as an oxide barrier layer, and is obtained by thinly cutting and polishing the supporting substrate. In such a structure, the carrier gas region 45 can be formed on the entire surface, which is preferable. In FIG. 8C, 43 is a gate electrode and 44 is an ohmic electrode.

The supporting substrates 20, 30, 40 are made of LiG.
It may be an insulating substrate made of aO ₂ .

Further, the supporting substrate 20, 30, 40 is at least one selected from RABO ₄ or RAO ₃ (BO) _n R: Sc and In and at least one selected from A: Al, Fe and Ga. One B: An insulating substrate that is an insulator compound having a structure represented by at least one selected from Mg, Mn, Fe, Co, Cu, Zn, and Cd may be used. In this case, the oxide semiconductor layers 21, 31,
It is possible to reduce the lattice mismatch rate with 41.

With the oxide semiconductor layers 21, 31, 41
From the viewpoint of lowering the lattice mismatch rate, the structure of the insulator compound is
RABO showing structure_FourIs ScAlMgO_Four, ScGaM
gO _Four, ScAlMnO_Four, ScGaCoO_Four, ScA
lCoO_Four, ScGaZnO _FourAnd ScAlZnO_Four
It is preferable that it is one selected from
RAO showing structure of insulator compound_Three(BO)_nIs Sc
GaO_Three(ZnO)_nAnd ScAlO_Three(ZnO)_nof
It is preferably one selected from the above.

Next, a method of manufacturing the semiconductor device of the present invention will be described.

In order to obtain a clean interface as described above, it is preferable that the growth of the semiconductor layer and the growth of the oxide barrier layer on the supporting substrate are continuously performed.

A pulse laser deposition (PLD) method in which the composition difference between the target and the grown film is small is suitable as a crystal growth method for a thin film containing an oxide such as the semiconductor element of the present invention, and particularly ZnO crystal growth. In this case, a laser molecular beam epitaxy (hereinafter referred to as laser MBE) method in which pulse laser deposition is performed in a high vacuum chamber is suitable.

Further, even when a nitride-based semiconductor is used for the semiconductor layer, it is difficult to grow an oxide by the organic chemical vapor deposition (MOCVD) method, whereas it is difficult to grow an oxide or a nitride by the laser MBE method. Since it is also possible to grow, a clean interface can be obtained by continuous growth.

(Embodiment 2) FIG. 9 is a schematic sectional view of a MIS (metal-insulator-semiconductor) type field effect transistor as a semiconductor element according to Embodiment 2 of the present invention.

As shown in FIG. 9, the MIS field effect transistor is formed by an oxide semiconductor channel layer 51 formed on the insulating substrate 50 by epitaxial growth, and an epitaxial growth on the oxide semiconductor channel layer 51. Oxide gate insulating layer 52, gate electrode 53 formed on the oxide gate insulating layer 52, source electrode 54 formed on the insulating substrate 50 and covered with the oxide semiconductor channel layer 51, and drain And an electrode 55.

The MIS field effect transistor having the above structure controls the current between the source electrode 54 and the drain electrode 55 by applying a voltage between the gate electrode 53 and the source electrode 54. This current is generated by the oxide gate insulating layer 52.
Is generated by the high-mobility carrier gas generated at the interface of the oxide semiconductor channel layer 51 in contact with. M above
The IS field effect transistor is often used in a normally-off state in practice, and the sample of the oxide semiconductor channel layer 51 is a semi-insulating sample not doped with impurities or a semi-insulating sample slightly doped with impurities. It is preferable to use a sex sample. In this case, regardless of whether the applied voltage to the gate electrode 53 is positive or negative, carriers are generated at the interface of the oxide semiconductor channel layer 51 in contact with the oxide gate insulating layer 52 by accumulation or inversion.

Further, the oxide semiconductor channel layer 51 may be doped with an impurity so as to have a low resistance, and an impurity of opposite conductivity type may be added only to a region in contact with the source electrode 54 and the drain electrode 55. In this case, the applied voltage to the gate electrode 53 is made negative, and carriers are generated at the interface due to inversion, so that the transistor operation is realized.

FIG. 10 shows a schematic sectional view of a modification of the MIS field effect transistor.

The MIS field effect transistor shown in FIG. 10 has an oxide semiconductor channel layer 61 formed on an insulating substrate 60 by epitaxial growth, and an oxide gate formed on the oxide semiconductor channel layer 61 by epitaxial growth. Insulating layer 62 and this oxide gate insulating layer 62
The gate electrode 63 is formed on the oxide semiconductor channel layer 61, and the source electrode 64 and the drain electrode 65 are formed on the oxide semiconductor channel layer 61 and are adjacent to the oxide gate insulating layer 62.

In the MIS field effect transistor having the above structure, a voltage is applied between the gate electrode 63 and the source electrode 64, and carriers of high mobility are formed at the interface of the oxide semiconductor channel layer 61 in contact with the oxide gate insulating layer 62. Produces gas. A current is generated between the source electrode 64 and the drain electrode 65 by the generation of the carrier gas, and the MIS field effect transistor controls this current. Similar to the MIS field effect transistor of FIG. 9, the MIS field effect transistor is often used in a normally-off state in practice, and as a sample of the oxide semiconductor channel layer 61, a semi-insulating layer not doped with impurities is used. It is preferable to use a conductive sample or a semi-insulating sample slightly doped with impurities. In this case, regardless of whether the applied voltage to the gate electrode 53 is positive or negative, carriers are generated by accumulation or inversion at the interface of the oxide semiconductor channel layer 61 in contact with the oxide gate insulating layer 62.

Further, the oxide semiconductor channel layer 61 may be doped with an impurity to have a low resistance, and an impurity of opposite conductivity type may be added only to a region in contact with the source electrode 64 and the drain electrode 65. In this case, the applied voltage to the gate electrode 63 is made negative and carriers are generated at the interface due to the inversion, so that the transistor operation is realized.

(Embodiment 3) FIG. 11 shows a schematic cross-sectional view of a high mobility transistor as a semiconductor device according to Embodiment 3 of the present invention.

The high-mobility transistor is formed on the insulating substrate 70 by epitaxial growth and is a semi-insulating oxide semiconductor channel layer 71 which is not doped with impurities.
An oxide semiconductor barrier layer 72 formed by epitaxial growth on the oxide semiconductor channel layer 71, a gate electrode 73 formed on the oxide semiconductor barrier layer 72,
A source electrode 74 and a drain electrode 75 are provided.

The oxide semiconductor channel layer 71 is formed by using a semi-insulating oxide semiconductor which is not doped with impurities, such as non-doped ZnO. The oxide semiconductor barrier layer 72 is formed of an impurity-doped oxide semiconductor, for example, Ga-doped n-type Mg _X Zn.
It is formed using _{1-X 2} O or the like. The band gap of the oxide semiconductor barrier layer 72 is larger than the band gap of the oxide semiconductor channel layer 71.

The gate electrode 73 provided on the oxide semiconductor barrier layer 72 has Schottky characteristics. That is, the gate electrode 73 is in Schottky contact with the oxide semiconductor barrier layer 72. Then, the gate electrode 7
3 is an oxide semiconductor barrier layer 32 immediately below under voltage application.
Further, a depletion layer is generated in the oxide semiconductor channel layer 71 to control the flow of high mobility carrier gas. Such a Schottky type gate electrode 73 is Au for a Ga-doped n-type MgZnO barrier layer,
It can be formed using Pt, Pd, Ni, W or the like. If the oxide semiconductor barrier layer 72 is p-type, Al is preferable as the Schottky type gate electrode material.

The source electrode 74 and the drain electrode 75 provided on the oxide semiconductor barrier layer 72 have ohmic characteristics. That is, the source electrode 74 and the drain electrode 75 are in ohmic contact with the oxide semiconductor barrier layer 72.

According to the high-mobility transistor having the above structure, since the channel through which carriers are carried is separated from the region where ionized impurities are present, the carriers are not easily affected by impurity scattering. Therefore, the carrier mobility is dramatically improved as compared with the field effect transistor shown in the second embodiment, and a faster switching operation becomes possible.

By the way, the transparent transistor formed by using ZnO has a higher aperture ratio and a wider viewing angle when used in a display device such as a liquid crystal than a transistor formed by using Si. By applying the high-mobility transistor of the present invention to such a transparent transistor, it is possible to manufacture a display device with higher definition.

(Embodiment 4) FIG. 12 is a schematic cross-sectional view of a high mobility transistor as a semiconductor device according to Embodiment 4 of the present invention. This high mobility transistor is a modification of the high mobility transistor of the third embodiment.

The high mobility transistor of the fourth embodiment is
A first oxide semiconductor barrier layer 82A formed by epitaxial growth on the insulating substrate 80, and a semi-insulating oxide semiconductor channel layer 81 formed by epitaxial growth on the first oxide semiconductor barrier layer 82A. A second oxide semiconductor barrier layer 82B formed by epitaxial growth on the oxide semiconductor channel layer 81, and an oxide gate formed on the second oxide semiconductor barrier layer 82B via a semiconductor contact layer 86. And an insulating layer 87. The high mobility transistor is formed on the gate electrode 83 formed on the oxide gate insulating layer 87 and the semiconductor contact layer 86, and the high mobility transistor is formed on the oxide gate insulating layer 87.
And a source electrode 84 and a drain electrode 85 located laterally of the. The source electrode 84 and the drain electrode 85
Are separated from the oxide gate insulating layer 87. That is, the oxide gate insulating layer 87 includes the source electrode 84,
It has a predetermined distance from the drain electrode 85.

For the oxide semiconductor channel layer 81, a semi-insulating oxide semiconductor not doped with impurities, such as non-doped ZnO, can be used.

The above first and second oxide semiconductor barrier layers 82
A, 82B, an impurity is formed using an oxide semiconductor having a band gap greater than the oxide semiconductor channel layer 81 is doped, for example, and Mg X _Zn 1-X _O. Further, it is preferable that the interface of the second oxide semiconductor barrier layer 82B in contact with the oxide semiconductor channel layer 81 is not doped with impurities from the viewpoint of preventing carrier scattering.

The semiconductor contact layer 86 is used to bring the source electrode 84 and the drain electrode 85 into contact with the second oxide semiconductor barrier layer 82B with low resistance.
The oxide semiconductor barrier layer 82A is formed of the same conductive type semiconductor. The contact layer 86 preferably has a smaller bandgap than the first and second oxide semiconductor barrier layers 82A and 82B. The oxide gate insulating layer 87 can be formed by using the same material as the oxide gate insulating layers 52 and 62 in the second embodiment.

The high-mobility transistor having the above structure is
The field effect transistor operation is obtained by controlling the flow of the high-mobility two-dimensional carrier gas generated at the interface of the oxide semiconductor channel layer 81 in contact with the oxide semiconductor barrier layer 82B. At this time, since the semiconductor-insulator-metal structure, that is, the MIS structure is used to control the flow of the high mobility carrier gas in the oxide semiconductor channel layer 81, the withstand voltage is higher than that in the third embodiment. It's getting higher.

Further, since the oxide semiconductor channel layer 81 is narrowed by the first and second oxide semiconductor barrier layers 82A and 82B, the high mobility carrier gas is better confined as compared with the third embodiment. Is. Furthermore, since the oxide semiconductor channel layer 81 is a non-doped oxide semiconductor,
The crystallinity of the oxide semiconductor channel layer 81 is improved, and a cleaner stacked interface can be obtained. That is, the interface between the oxide semiconductor channel layer 81 and the second oxide semiconductor barrier layer 82B can be cleaned more.

Further, since the semiconductor contact layer 86 having a small band gap can make a large band discontinuity in the conduction band, it becomes easy to control the threshold voltage which is a normally-off condition.

(Embodiment 5) FIG. 13 is a schematic cross-sectional view of a light emitting diode as a semiconductor element according to Embodiment 5 of the present invention.

The light emitting diode described above includes an oxide semiconductor light emitting layer 91 formed on the insulating substrate 90 by epitaxial growth, an oxide gate insulating layer 92 formed on the oxide semiconductor light emitting layer 91 by epitaxial growth, and Gate electrode 93 formed on oxide gate insulating layer 92
And the first and second layers formed on the oxide semiconductor light emitting layer 91.
It is provided with first and second ohmic electrodes 94 and 95 as electrodes. The first and second ohmic electrodes 94,
95 is covered with an oxide gate insulating layer 92.

According to the light emitting diode having the above structure, the voltage is applied to the gate electrode 93 and the first ohmic electrode 94 so that the interface of the oxide semiconductor light emitting layer 91 in contact with the oxide gate insulating layer 92 is in the inverted state. A voltage is applied to the gate electrode 93 and the second ohmic electrode 95 so that the interface of the oxide semiconductor light emitting layer 91 in contact with the oxide gate insulating layer 92 is in an accumulated state. In particular,
When the oxide semiconductor light emitting layer 91 is an n-type, a positive voltage is applied to the first ohmic electrode 94 based on the gate electrode 93 to contact the oxide gate insulating layer 92. Invert the interface of. At the same time, a negative voltage is applied to the second ohmic electrode 95 based on the gate electrode 93, and the oxide gate insulating layer 9 is formed.
The interface of the oxide semiconductor light emitting layer 91 which is in contact with 2 is put into an accumulation state.

For example, when the oxide semiconductor light emitting layer 91 is formed of non-doped ZnO, electrons are generated between the electrodes in the accumulation state and holes are generated between the electrodes in the inversion state due to the electric field effect, so that the gate is formed. In the light emitting region of the oxide semiconductor light emitting layer 91 immediately below the electrode 93, the electrons and the holes are recombined to obtain ultraviolet light emission having a wavelength of about 380 nm.

The generation of the inversion layer carrier by the electric field effect as described above is a semiconductor in which both conductivity types are difficult to be manufactured although it has optical characteristics such as ZnO having a high added value for industrial use. It is extremely effective as a material, and highly efficient light emission due to electron-hole recombination can be obtained even in a unipolar semiconductor.

In FIG. 13, the oxide semiconductor light emitting layer 9 is used.
1 is formed of n-type ZnO and a bias circuit for forming a p-type inversion layer is shown.
When it is formed of the type semiconductor, the same effect as that of the fifth embodiment can be obtained by reversing the polarities of the applied voltages to the first and second ohmic electrodes 94 and 95.

(Embodiment 6) FIG. 14 is a schematic cross-sectional view of a light emitting diode as a semiconductor element according to Embodiment 6 of the present invention.

The light emitting diode includes an oxide gate insulating layer 102 and an oxide semiconductor light emitting layer 101 formed on the oxide gate insulating layer 102 by epitaxial growth. In the oxide gate insulating layer 102, the gate electrode 103 is provided below the surface opposite to the oxide semiconductor light emitting layer 101. Further, a first ohmic electrode 104 as a first electrode is formed on the oxide semiconductor light emitting layer 101. Then, on the oxide gate insulating layer 102, the second ohmic electrode 1 as a second electrode adjacent to the side surface of the oxide semiconductor light emitting layer 101.
Forming 05.

The oxide gate insulating layer 102 is obtained by thinning the insulating substrate by polishing or the like.

In the light emitting diode having the above structure, the hole carriers generated by the electric field effect from the inversion layer are directly controlled by the second ohmic electrode 105 adjacent to the side surface of the oxide semiconductor light emitting layer 101. Therefore, it operates with lower power consumption than the light emitting diode of the fifth embodiment.

Further, in the light emitting diode of the sixth embodiment, the light emitting region is a depletion layer spreading on the inversion layer,
Holes and electrons, which are majority carriers of the oxide semiconductor light emitting layer 101, are injected into this region from the inversion layer. Therefore, in order to control the emission characteristics, the oxide semiconductor light emitting layer 1
01 can be formed of a low resistance semiconductor doped with impurities.

Although FIG. 14 shows a bias circuit for forming the p-type inversion layer by forming the oxide semiconductor light-emitting layer 101 with n-type ZnO, the oxide semiconductor light-emitting layer 10 is shown.
When 1 is formed of a p-type semiconductor, the same effect as that of the sixth embodiment can be obtained by reversing the polarities of the applied voltages to the first and second ohmic electrodes 104 and 105.

(Embodiment 7) FIG. 15 This light emitting diode is a structural modification of the light emitting diode of the fifth embodiment.

The light emitting diode of the seventh embodiment has the oxide semiconductor light emitting layer 111 formed by epitaxial growth.
And an oxide gate insulating layer 112 formed on the oxide semiconductor light emitting layer 111. A gate electrode 113 is formed on the oxide gate insulating layer 112. Then, in the oxide semiconductor light emitting layer 111, the first and second electrodes 114 and 115 are provided below the surface opposite to the oxide gate insulating layer 112. The second electrode 115 has a larger area than the first electrode 114 and surrounds the disc-shaped first electrode 114. A hole that is concentric with the first electrode 114 is formed in the second electrode 115, and the first electrode 114 is accommodated in the hole.

In the light emitting diode having the above structure, a voltage is applied to the gate electrode 113 and the first electrode 114 so that the interface of the oxide semiconductor light emitting layer 111 in contact with the oxide gate insulating layer 112 is in an inverted state. At this time, when the oxide semiconductor light emitting layer 111 is an n-type, the first electrode 11
4, and a positive voltage is applied to the second electrode 115. When the oxide semiconductor light emitting layer 111 has a high resistance, the second electrode 11 has a large contact area and is reverse-biased.
5 breaks down at a relatively low voltage, a current flows between the first electrode 114 and the second electrode 115 through the inversion layer, and light emission due to carrier recombination is obtained.

In the structure of this embodiment, the second electrode 11
In order for 5 to break down at a low voltage, the ratio of the area of the second electrode 115 to the area of the first electrode 114 is preferably 10 or more. That is, the area of the second electrode 115 is preferably 10 times or more the area of the first electrode 114.

In FIG. 15, the oxide semiconductor light emitting layer 1 is used.
11 shows n-type ZnO and a bias circuit for forming a p-type inversion layer.
When formed of a p-type semiconductor, the first and second electrodes 114,
By reversing the polarity of the voltage applied to 115, the same effect as in the seventh embodiment can be obtained.

(Embodiment 8) FIG. 16 shows a schematic sectional view of a surface emitting laser as a semiconductor device according to Embodiment 8 of the present invention.

The surface emitting laser includes an oxide gate insulating layer 202 and an oxide semiconductor light emitting layer 201 formed on the oxide gate insulating layer 202. The oxide gate insulating layer 202 is formed by thinning an insulating substrate by polishing or the like.

On the oxide gate insulating layer 202, a second ohmic electrode 205 is formed as a second electrode adjacent to the side surface of the oxide semiconductor light emitting layer 201. A gate electrode 203 is provided below the surface of the oxide gate insulating layer 202 opposite to the oxide semiconductor light emitting layer 201. The gate electrode 203 is formed thin so as to have a light-transmitting property.

A first ohmic electrode 204 as a first electrode is formed on the oxide semiconductor light emitting layer 201. The first ohmic electrode 204 is a conductive multilayer film having a high reflectance for ultraviolet light.

The surface emitting laser having the above structure is an oxide semiconductor.
The thickness of the light emitting layer 201 is controlled, and the first ohmic layer
Resonance between the electrode 204 and the oxide gate insulating layer 202.
It is wide. For example, the above oxide semiconductor light emitting layer 2
01 is made of ZnO, and the oxide gate insulating layer 202 is made of S
cAlMgO_FourIf it is formed by, ScAlMgO _Four
Has a lower refractive index than ZnO.
The vessel structure is realized.

Further, instead of using the first ohmic electrode 204 as a multilayer reflective film, the region of the semiconductor light emitting layer 201 which is in contact with the first ohmic electrode may be formed as a conductive multilayer structure for reflecting light emission. 8 has the same effect as that of ZnO and Mg _X Zn _1-X whose composition is appropriately controlled.
_O, it can be achieved by using a mixed crystal, such as Cd _{X Zn 1-X} O.

In FIG. 16, the oxide semiconductor light emitting layer 2 is used.
No. 01 is formed of n-type ZnO, and the bias circuit for forming the p-type inversion layer is shown.
When the p-type semiconductor is used, the same effect as that of the eighth embodiment can be obtained by reversing the polarities of the applied voltages to the first and second ohmic electrodes 204 and 205.

(Embodiment 9) FIG. 17 shows a schematic sectional view of an edge emitting laser (Fabry-Perot laser) as a semiconductor element of Embodiment 9 of the present invention. In FIG.
The same components as those of the light emitting diode of the sixth embodiment shown in FIG. 14 are designated by the same reference numerals as those of the components in FIG.

The edge emitting laser of the ninth embodiment is provided with a pair of cavity faces parallel to the side faces of the oxide semiconductor light emitting layer 101, and the surface emitting laser of the eighth embodiment emits oxide semiconductor light. A reflection film 306 for light emitted from the layer 101 is adjacent to the cavity surface. The distance between the resonator planes is controlled so that the light emitted from the oxide semiconductor light emitting layer 101 is resonantly amplified between the reflection films 306.

In the structure of the above edge emitting laser, laser oscillation can be obtained with a low threshold current by forming a multilayer structure having a light or carrier confinement mechanism in the light emitting region of the oxide semiconductor light emitting layer 101. Can be done.

Further, by making the above-mentioned multi-layered structure include a quantum well structure composed of well layers and barrier layers, it is possible to increase the optical gain, further reduce the polarization selectivity and the power consumption. The multilayer structure of such a light emitting region is
O and Mg _X Zn _1-X O, Cd whose composition is controlled appropriately
_It can be realized by using a mixed crystal such as _X Zn _1-X O.

Further, the reflection film 306 may be asymmetrical, that is, one side is highly reflective to the oscillated light and the other is low reflective.

The structure of the edge emitting laser of the ninth embodiment can be applied to the structure of the light emitting diode of the fifth embodiment. That is, the gate electrode 103 and the first and second
The ohmic electrodes 104 and 105 may be formed in a stripe shape, and a reflective film may be formed to provide a pair of parallel resonator surfaces perpendicular to the stripe direction on the side surface of the oxide semiconductor light emitting layer 101.

[0152]

As is apparent from the above, according to the semiconductor device of the present invention, since the semiconductor-insulator structure or the semiconductor heterojunction structure having the band gap barrier is formed by epitaxial growth, the interface quasi-state caused by defects or the like is formed. Is less likely to occur and a clean joint interface can be obtained. Therefore, a carrier gas having a high concentration and a high mobility can be generated, and the added value can be increased by utilizing the characteristics of the oxide semiconductor and the nitride semiconductor.

In particular, when the semiconductor device of the present invention is applied to a semiconductor switching device such as a field effect transistor,
The mobility of the two-dimensional carrier gas generated at the interface is dramatically improved by the electric field effect, and a semiconductor element capable of high-speed switching operation can be manufactured.

Further, since a clean interface with reduced defect levels can be formed, the applied gate voltage can be lowered, which contributes to lower power consumption of the semiconductor element.

In particular, when applied to a transparent oxide semiconductor such as ZnO, a display device having a high aperture ratio using the same can be operated at high speed.

When the semiconductor device of the present invention is applied to a semiconductor light emitting device such as a light emitting diode or a laser diode, an inversion state is formed at the interface due to an electric field effect, and high mobility carriers having a conductivity type different from that of the semiconductor layer are formed. It can be generated at high density. Such carrier generation by the inversion layer is extremely effective for a semiconductor material in which it is difficult to produce a dual-conductivity type, although it has optical characteristics such as ZnO having high added value for industrial use. is there.

The laminated structure having the potential barrier as described above can be realized by selecting a barrier layer material having an extremely small lattice mismatch with the semiconductor layer. In particular, if the lattice mismatch at the interface is 5% or less, a laminated structure having a clean interface can be manufactured.

Particularly for ZnO, since an oxide having a good compatibility can be used as such a barrier layer material, a laminated structure having an interface with extremely few defects can be produced.

[Brief description of drawings]

FIG. 1 is a schematic sectional view of a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a table showing an example of a semiconductor material of the semiconductor device of the first embodiment and its lattice constant.

3 (a) and 3 (b) are views for explaining an interface state when an electric field is applied in the semiconductor device of the first embodiment.

4 (a) and 4 (b) are views for explaining an interface state when an electric field is applied in the semiconductor device of the first embodiment.

5 (a) and 5 (b) are views for explaining an interface state when an electric field is applied in the semiconductor device of the first embodiment.

FIG. 6 is a diagram showing the relationship between the lattice constant and the ionic radius of the RABO ₄ type oxide barrier layer material according to the present invention.

FIG. 7 is a diagram showing the relationship between the lattice constant and the ionic radius of the RAO ₃ (BO) _n- type oxide barrier layer material according to the present invention.

8A and 8B are a top view and a schematic cross-sectional view of a modified example of the semiconductor device according to the first embodiment.
(C) is a schematic cross-sectional view of a modified example of the semiconductor device of the first embodiment.

FIG. 9 is a schematic cross-sectional view of a field effect transistor as a semiconductor device according to a second embodiment of the present invention.

FIG. 10 is a schematic cross-sectional view of a modified example of the electric field transistor.

FIG. 11 is a schematic cross-sectional view of a high mobility transistor as a semiconductor device according to a third embodiment of the present invention.

FIG. 12 is a schematic cross-sectional view of a high mobility transistor as a semiconductor device according to a fourth embodiment of the present invention.

FIG. 13 is a schematic cross-sectional view of a light emitting diode as a semiconductor device according to a fifth embodiment of the present invention.

FIG. 14 is a schematic configuration diagram of a light emitting diode as a semiconductor device according to a sixth embodiment of the present invention.

FIG. 15 is a bottom view and a schematic cross-sectional view of a ring electrode type light emitting diode as a semiconductor element according to a seventh embodiment of the present invention.

FIG. 16 is a schematic configuration diagram of a surface emitting laser as a semiconductor device according to an eighth embodiment of the present invention.

FIG. 17 is a schematic configuration diagram of a semiconductor device Fabry-Perot laser according to a ninth embodiment of the present invention.

[Explanation of symbols]

11 Semiconductor layer 12 Oxide barrier layer 13 Gate electrode 14 Ohmic electrode 20, 30, 40 support substrate 21, 31, 41 Oxide semiconductor layer 22, 32, 42 Oxide barrier layer 23, 33, 43 Gate electrode 24, 34, 44 Ohmic electrodes 25,35,45 Carrier gas area 50, 60, 70, 80, 90 Support substrate 51, 61 semiconductor channel layer 52,62 Oxide gate insulating layer 53,63 Gate electrode 54,64 Source electrode 55,65 drain electrode 71,81 Oxide semiconductor channel layer 72 Oxide semiconductor barrier layer 73,83 Gate electrode 74,84 Source electrode 75,85 drain electrode 82A First oxide semiconductor barrier layer 82B Second oxide semiconductor barrier layer 87 Oxide gate insulating layer 91, 101, 111, 201 Oxide semiconductor light emitting layer 92,102,112,202 Oxide gate insulating layer 93, 103, 113, 203 Gate electrode 94, 104, 204 First ohmic electrode 95, 105, 205 second ohmic electrode 114 first electrode 115 Second electrode

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) H01L 33/00 H01L 29/78 617T H01S 5/183 29/80 H 5/327 (72) Inventor Hajime Saito 22-22 Nagaike-cho, Abeno-ku, Osaka-shi, Osaka Prefecture F-terms within Sharp Co., Ltd. (reference) 5F041 AA21 AA24 CA08 CA12 CA41 5F073 AA89 AB17 CA22 EA14 EA23 5F102 GB01 GC01 GD01 GD10 GL01 GM01 GM08 GQ01 GQ03 GT01 GT110 A01A01 A01 BB01 CC02 CC04 DD01 FF01 FF05 FF27 GG01 GG06 GG42 5F140 AA01 BA06 BA09 BA10 BA16 BC12 BD13 BE09

Claims (27)

[Claims] 1. A laminated structure comprising a zinc oxide-based or nitride-based semiconductor layer formed by epitaxial growth and an oxide barrier layer formed by epitaxial growth on the semiconductor layer and having a bandgap wider than that of the semiconductor layer. A semiconductor characterized in that a high mobility carrier gas is generated at an interface of the semiconductor layer in contact with the oxide barrier layer by applying a voltage between the semiconductor layer and the oxide barrier layer. element. 2. The semiconductor device according to claim 1, wherein the semiconductor layer is ZnO, Mg _x Zn _1-X O and C.
a semiconductor element which is a d x _Zn 1-X at least one zinc oxide-based semiconductor layer is composed of an oxide of one of the _O. 3. The semiconductor device according to claim 1, wherein the semiconductor layer is GaN, Al _X Ga _1-X N, In _X.
A semiconductor device comprising a nitride-based semiconductor layer made of at least one nitride of Ga _1-X N and Al _X In _1-X N. 4. The semiconductor device according to claim 1, wherein a lattice mismatch ratio at an interface between the semiconductor layer and the oxide barrier layer is 5% or less. Semiconductor device. 5. The semiconductor device according to claim 1, wherein the oxide barrier layer contains LiGaO ₂ . 6. The semiconductor device according to claim 1, wherein the oxide barrier layer is at least one selected from RABO ₄ or RAO ₃ (BO) _n R: Sc and In. A: at least one selected from Al, Fe and Ga, B: containing an insulator having a structure represented by at least one selected from Mg, Mn, Fe, Co, Cu, Zn and Cd. A semiconductor device characterized by the above. 7. The semiconductor device according to claim 6, wherein the RABO ₄ is ScAlMgO ₄ or ScGaMgO.
₄ , ScAlMnO ₄ , ScGaCoO ₄ , ScAlC
It is one selected from oO ₄ , ScGaZnO ₄ and ScAlZnO ₄ , and the above RAO ₃ (BO) _n is one selected from ScGaO ₃ (ZnO) _n and ScAlO ₃ (ZnO) _n. A semiconductor element characterized by. 8. The semiconductor device according to claim 1, wherein the oxide barrier layer is any one of ZnO, Mg _X Zn _1-X O and Cd _X Zn _1-X O. A semiconductor element comprising a semiconductor layer composed of two layers. 9. An oxide semiconductor channel layer formed by epitaxial growth, an oxide gate insulating layer formed on the oxide semiconductor channel layer, a gate electrode formed on the oxide gate insulating layer, A source electrode formed on the oxide semiconductor channel layer and a drain electrode formed on the oxide semiconductor channel layer, and formed at an interface of the oxide semiconductor channel layer in contact with the oxide gate insulating layer. A semiconductor device characterized in that a field effect type transistor operation is obtained by controlling the flow of a high mobility two-dimensional carrier gas. 10. A semi-insulating oxide semiconductor channel layer formed by epitaxial growth, and an oxide formed on the oxide semiconductor channel layer, which is doped with impurities and has a bandgap larger than that of the oxide semiconductor channel layer. Oxide semiconductor barrier layer, a gate electrode formed on the oxide semiconductor barrier layer and in Schottky contact with the oxide semiconductor barrier layer, and an oxide semiconductor barrier layer formed on the oxide semiconductor barrier layer. An interface of the oxide semiconductor channel layer in contact with the oxide semiconductor barrier layer, the source electrode in ohmic contact, and the drain electrode formed on the oxide semiconductor barrier layer in ohmic contact with the oxide semiconductor barrier layer The field-effect transistor operation is controlled by controlling the flow of the high mobility two-dimensional carrier gas generated in Semiconductor element to be. 11. A semi-insulating oxide semiconductor channel layer formed by epitaxial growth, and an oxide formed on the oxide semiconductor channel layer, which is doped with impurities and has a bandgap larger than that of the oxide semiconductor channel layer. A semiconductor semiconductor barrier layer, an oxide gate insulating layer formed on the oxide semiconductor barrier layer, a gate electrode formed on the oxide gate insulating layer, and an oxide semiconductor barrier layer formed on the oxide semiconductor barrier layer. A high-mobility two-dimensional carrier gas flow generated at an interface of the oxide semiconductor channel layer, which includes a source electrode and a drain electrode formed on the oxide semiconductor barrier layer, and which is in contact with the oxide semiconductor barrier layer. Is controlled to obtain a field effect transistor operation. 12. The semiconductor device according to claim 9, wherein the oxide semiconductor channel layer is ZnO, Mg _X Zn.
_1-X O and _Cd X _{Zn 1-X} semiconductor device characterized by comprising at least one oxide semiconductor of O. 13. The semiconductor device according to claim 10.
hand, The oxide semiconductor channel layer and the oxide semiconductor barrier
The wall layer is ZnO, Mg _XZn_1-XO and Cd_XZn
_1-XAt least one oxide semiconductor of O
A semiconductor device characterized by the above. 14. The semiconductor device according to claim 11, wherein the oxide semiconductor channel layer, the oxide semiconductor barrier layer, and the oxide gate insulating layer are ZnO, Mg _X Zn.
_1-X O and _Cd X _{Zn 1-X} semiconductor device characterized by comprising at least one oxide semiconductor of O. 15. An oxide semiconductor light emitting layer formed by epitaxial growth, an oxide gate insulating layer formed on the oxide semiconductor light emitting layer, and a gate electrode formed on the oxide gate insulating layer. A first electrode and a second electrode formed on the oxide semiconductor light emitting layer, wherein the interface between the oxide semiconductor light emitting layer in contact with the oxide gate insulating layer is in an inverted state. By applying a voltage to the first electrode and applying a voltage to the gate electrode and the second electrode such that the interface of the oxide semiconductor light emitting layer in contact with the oxide gate insulating layer is in an accumulated state, A semiconductor device characterized in that light is obtained by injecting an electron and hole gas into a light emitting region in an oxide semiconductor light emitting layer. 16. An oxide gate insulating layer, an oxide semiconductor light emitting layer formed by epitaxial growth on the oxide gate insulating layer, and a surface of the oxide gate insulating layer opposite to the oxide semiconductor light emitting layer. A gate electrode formed below, a first electrode formed on the oxide semiconductor light emitting layer, and a second electrode formed on the oxide gate insulating layer and adjacent to a side surface of the oxide semiconductor light emitting layer. And applying a voltage to the gate electrode and the first electrode so that the interface of the oxide semiconductor light emitting layer in contact with the oxide gate insulating layer is in an inverted state. Electrons and holes are injected into the light emitting region in the oxide semiconductor light emitting layer by generating a carrier gas of opposite conductivity type and applying a voltage between the first electrode and the second electrode. A semiconductor device characterized by being turned on and emitting light. 17. An oxide semiconductor light emitting layer formed by epitaxial growth, an oxide gate insulating layer formed on the oxide semiconductor light emitting layer, a gate electrode formed on the oxide gate insulating layer, A first electrode formed under the surface of the oxide semiconductor light emitting layer opposite to the oxide gate insulating layer; and a first electrode formed under the surface of the oxide semiconductor light emitting layer opposite the oxide gate insulating layer. A second electrode having an area larger than that of the first electrode, and the gate electrode and the first electrode so that an interface of the oxide semiconductor light emitting layer in contact with the oxide gate insulating layer is in an inverted state. To generate a carrier gas having a conductivity type opposite to that of the oxide semiconductor light emitting layer, and applying a voltage between the first electrode and the second electrode, A semiconductor device, wherein electrons and holes are injected into a light emitting region in the oxide semiconductor light emitting layer to obtain light emission. 18. The semiconductor device according to claim 17, wherein the first electrode has a disc shape, the second electrode is formed so as to surround the first electrode, and the area of the second electrode is large. Is 10 times or more the area of the first electrode. 19. The semiconductor element according to claim 16, wherein the first electrode has a multi-layer structure that reflects light emitted from the oxide semiconductor light emitting layer, 1 electrode and the oxide gate insulating layer have a lower refractive index than the oxide semiconductor light emitting layer, the gate electrode is transparent to the light emitted from the oxide semiconductor light emitting layer, the oxide semiconductor light emitting The light emitted from the layer is transmitted to the first
A surface-emitting type semiconductor device characterized in that resonance amplification is performed between an electrode and the oxide gate insulating layer, and the resonant amplification is performed from the gate electrode. 20. The semiconductor element according to claim 16, wherein a region of the oxide semiconductor light emitting layer in the vicinity of the first electrode comprises:
A conductive multilayer structure that reflects light of the oxide semiconductor light emitting layer is provided, the first electrode and the oxide gate insulating layer have a lower refractive index than the oxide semiconductor light emitting layer, and the gate electrode is oxidized. The light emitted from the oxide semiconductor light-emitting layer and transmitting the light emitted from the first semiconductor light-emitting layer.
A surface-emitting type semiconductor device characterized in that resonance amplification is performed between an electrode and the oxide gate insulating layer, and the resonant amplification is performed from the gate electrode. 21. The semiconductor device according to claim 15, wherein a pair of resonator faces parallel to side surfaces of the oxide semiconductor light emitting layer are provided, and the oxide face is formed on the resonator faces. An end face characterized in that a reflection film for light emitted from the semiconductor light emitting layer is adjacently arranged, and light emitted from the oxide semiconductor light emitting layer is resonantly amplified by the resonator surface and emitted from at least one of the reflection films. Light emitting semiconductor device. 22. The semiconductor device according to claim 15, wherein the oxide semiconductor light emitting layer has a multilayer structure having a light or carrier confinement mechanism. 23. The semiconductor device according to claim 22, wherein the multilayer structure of the oxide semiconductor light emitting layer includes a quantum well structure including a well layer and a barrier layer. 24. The semiconductor device according to claim 15, wherein the oxide semiconductor light emitting layer is ZnO, Mg _X Zn _1-X.
O and _Cd X _{Zn 1 -X} any one of an oxide semiconductor semiconductor device characterized by consisting of layers of O. 25. The semiconductor element according to claim 1, further comprising an insulating substrate made of LiGaO ₂ . 26. The semiconductor device according to claim 1, wherein at least one selected from RABO ₄ or RAO ₃ (BO) _n R: Sc and In, A: Al, Fe and At least one selected from Ga B: An insulating substrate that is an insulator compound having a structure represented by at least one selected from Mg, Mn, Fe, Co, Cu, Zn, and Cd. A semiconductor element characterized by. 27. The semiconductor device according to claim 26, wherein the RABO ₄ showing the structure of the insulator compound is Sc.
AlMgO ₄ , ScGaMgO ₄ , ScAlMnO ₄ ,
ScGaCoO ₄ , ScAlCoO ₄ , ScGaZnO
₄ and ScAlZnO ₄ selected from the group consisting of RAO ₃ (BO) _{n and} the structure of the insulator compound.
Is ScGaO ₃ (ZnO) _n and ScAlO ₃ (Z
nO) A semiconductor device characterized by being one selected from _n .