JP2001117118A - Active matrix type liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an active matrix type liquid crystal display device which adopts an IPS system using short pitch transparent comblike electrodes, and which realizes almost equal transmittance to that of a device using a liquid crystal material having negative dielectric anisotropy (comparable with a TN system) by using a liquid crystal having positive dielectric anisotropy which makes low driving voltage, fast response and lower cost possible. SOLUTION: A liquid crystal composition used has positive dielectric anisotropy, >=2.4 ratio of K11/K22, wherein K11 is the elastic modulus for splay deformation and K22 is the elastic modulus for twist deformation, and >=8 dielectric anisotropy and <=110 mPa.s rotational viscosity coefficient. The retardation d-Δ n is controlled to satisfy 0.28 μm<d.Δn<0.5 μm.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an active matrix type liquid crystal display device.

[0002]

2. Description of the Related Art A display of a liquid crystal display device utilizes an electric field applied to the liquid crystal molecules of a liquid crystal layer sandwiched between substrates to change the orientation direction of the liquid crystal molecules, thereby utilizing the change in the optical characteristics of the liquid crystal layer. It is done. In particular, an active matrix type liquid crystal display device using an active element typified by a thin film transistor element is a low power consumption OA device which substitutes for a CRT in terms of response characteristics and the like capable of responding to moving images with high definition. It is expected as a display device.

In a conventional active matrix type liquid crystal display device, the alignment directions of the alignment films on the upper and lower substrates sandwiching a liquid crystal layer are substantially orthogonal to each other, and the liquid crystal molecule arrangement is twisted by approximately 90 ° when no electric field is applied. And a twisted nematic (TN) display system in which display is performed by utilizing the change in the optical rotatory power of the liquid crystal layer by applying an electric field in the normal direction of the substrate. However, the TN display type liquid crystal display device has a specific disadvantage that the viewing angle is narrow, and has been a problem when replacing a CRT in terms of image quality.

On the other hand, in-plane switching (IPS) in which the direction of an electric field applied to the liquid crystal using a comb electrode is made substantially parallel to the substrate surface, and display is performed using the birefringence of the liquid crystal.
The method is described in, for example, Japanese Patent Publication No. 63-21907, "R.
efer, B. Weber, F. Windcheidand G. Baur, Proceedings
of the Twelfth International Display Research Conf
erence (Japan Display '92) pp.547-550 ". This IPS method has advantages such as a wide viewing angle and a low load capacity as compared with the conventional TN method,
This is a promising technology as an active matrix type liquid crystal display device capable of replacing T.

However, in the TN mode, a vertical electric field is applied using solid transparent electrodes provided on the respective surfaces of a pair of substrates sandwiching a liquid crystal layer, whereas in the IPS mode, one of the paired substrates is applied. Since a lateral electric field is applied using the stripe-shaped opaque metal comb electrodes provided in the surface of the device, the aperture ratio is reduced by an area corresponding to the opaque comb electrodes, and as a result, the transmittance is reduced, and In order to obtain luminance, a backlight having higher luminance is required, and there is a specific problem that power consumption is increased. IPS
The reason why the opaque metal electrode is used as the comb electrode in the TN method, unlike the TN method, is that in the IPS method, the in-plane alignment of the liquid crystal changes due to a lateral electric field generated in the gap between the comb electrodes, and light transmission is controlled. This is because the liquid crystal on the electrode on which the lateral electric field is not positively generated does not cause in-plane orientation change due to the lateral electric field and does not contribute to light transmission, so that a metal electrode which can be formed together with the wiring electrode is used.

In order to solve this problem, the above-mentioned comb-tooth electrode is formed of a transparent conductive material such as ITO (Indium Tin Oxide), and the pitch of the arrangement of the comb-tooth electrode is reduced by the conventional I-type.
By arranging the liquid crystal material having a shorter pitch than that of the PS method and using a liquid crystal material having a negative dielectric anisotropy, only the electric field formed at the edge portion of the comb-teeth electrode allows the liquid crystal existing above the transparent comb-teeth electrode to have One type of IPS system that can change the orientation and improve the transmittance and aperture ratio is, for example, “SHLee, SLLee and HYKim, Asia Display, 1998, pp.371-374” and “SHLee, SLL”.
ee, HYKim and TYEom, SID digest, 1999, pp.202-
205 ". IPS combining a liquid crystal material with a negative dielectric anisotropy and a short pitch transparent comb electrode
In the above-mentioned literature, it is reported in the above-mentioned literature that a transmittance close to that of the TN scheme can be maintained while maintaining a wide viewing angle characteristic equivalent to that of the IPS scheme.

[0007]

In the IPS system using the short pitch transparent comb-tooth electrode, when the liquid crystal having a positive dielectric anisotropy is used instead of a negative one, the effect of improving the transmittance is almost lost. What is not seen is reported simultaneously in the above-mentioned literature. In the IPS system using the short-pitch transparent comb-teeth electrode, considering the reason why the transmittance improving effect is greatly different depending on the positive / negative of the dielectric anisotropy of the liquid crystal material, in this system, the pitch of the comb-teeth electrode arrangement is short. Therefore, the electric field applied to the liquid crystal does not become a horizontal electric field in most of the liquid crystal layer as in the conventional IPS system, but becomes an oblique electric field including a vertical electric field component in most of the liquid crystal layer. When a liquid crystal having a positive dielectric anisotropy is used, it is possible that the longitudinal axis of the liquid crystal molecules due to the vertical electric field component occurs in most of the liquid crystal layer.

In the IPS system using the short-pitch transparent comb-teeth electrode, as described above, the orientation of the liquid crystal molecules existing above the transparent comb-teeth electrode is changed to positively contribute to light transmission. A larger transmittance is obtained.
Considering the cross section of the comb-teeth electrode, when the liquid crystal material with positive dielectric anisotropy is used on the right and left sides with the center of the electrode as the boundary line, the rotation direction when the long axis of the liquid crystal molecule rises is reversed. Since the center of the electrode, which is the boundary line, is a disclination line, a low transmittance region is generated in this portion which actively contributes to light transmission by the IPS method using a short pitch transparent comb electrode.

An IP using a short pitch transparent comb electrode is
When a liquid crystal material having a positive dielectric anisotropy is combined with the S mode, effective retardation due to rising of liquid crystal molecules is reduced, and transmittance is reduced. Here, the retardation means a parameter d · Δn where the refractive index anisotropy of the liquid crystal composition is Δn and the thickness of the liquid crystal layer is d, and the effective Δn decreases due to the occurrence of liquid crystal molecules. , The above-described reduction in retardation occurs.

As described above, in the IPS system using the short-pitch transparent comb-teeth electrode, the influence of the vertical electric field component is larger than in the conventional IPS system. The use of a liquid crystal having a negative effect is much more effective in improving the transmittance than a positive liquid crystal. Therefore, in the conventional IPS system using a short pitch transparent comb-teeth electrode, a liquid crystal material having a negative dielectric anisotropy is used more widely, and a larger absolute value of the dielectric anisotropy which is advantageous for reducing the driving voltage is used. However, there is a problem that it is difficult to realize a liquid crystal display device having a transmittance similar to that of a TN using a liquid crystal material having a smaller rotational viscosity, which is advantageous for high-speed response, and having a positive dielectric anisotropy, which is generally used. there were.

An object of the present invention is to solve the above-mentioned problem. An object of the present invention is to provide a liquid crystal material having a negative dielectric anisotropy in an IPS active matrix type liquid crystal display device using a short pitch transparent comb electrode. An active matrix type liquid crystal that realizes the same transmittance (similar to the TN mode) as that obtained by using a liquid crystal with a positive dielectric anisotropy that enables low driving voltage, high speed response, and low cost. A display device is provided.

[0012]

In the IPS system using a short-pitch transparent comb-teeth electrode, when a liquid crystal material having a positive dielectric anisotropy is used, the rise of the long axis of the liquid crystal molecule is determined by the physical property value of the liquid crystal material. Is the ratio K of the elastic constant K11 to K22
The dielectric anisotropy having a value of 11 / K22 of 2.4 or more can be reduced by using a positive liquid crystal composition. This liquid crystal composition having a positive dielectric anisotropy has a dielectric anisotropy of 8 or more and a rotational viscosity coefficient of 110 mP.
By using a liquid crystal material having a value of a · s or less, a low driving voltage and a high-speed response characteristic that cannot be realized by a liquid crystal composition having a negative dielectric anisotropy can be realized.

FIG. 1 shows an IPS type electrode configuration using the same short-pitch transparent comb-tooth electrode (both electrode width and electrode spacing are 4 μm).
m), a typical positive dielectric anisotropy (Δε = 1
0.2) of liquid crystal and negative dielectric anisotropy (Δε = −4.
FIG. 5 shows an applied voltage-transmittance characteristic (simulation result) of a pixel non-light-shielded portion when the liquid crystal of 1) is used. The retardation (d · Δn) of a liquid crystal having a positive dielectric anisotropy is 0.
The retardation (d · Δn) of a liquid crystal having a negative dielectric anisotropy of 4 μm (optimized) is 0.32 μm.

FIG. 1 shows that in the IPS system using a short-pitch transparent comb electrode, even if a liquid crystal material having a positive dielectric anisotropy is used, its spray-twist elastic constant ratio K1
As 1 / K22 is increased, the peak transmittance becomes
It can be seen that approaching the case where a liquid crystal having a negative dielectric anisotropy is used. Further, in a liquid crystal material having a positive dielectric anisotropy, the absolute value of the dielectric anisotropy is 8 which is more than twice the general value of a liquid crystal material having a negative dielectric anisotropy. As shown in FIG. 1, it can be seen that the liquid crystal drive voltage can be reduced.

FIG. 2 shows the peak transmission when the splay-twist elastic constant ratio K11 / K22 is changed in the IPS system using a liquid crystal material having a positive dielectric anisotropy and a short pitch transparent comb electrode. FIG. 3 is a diagram showing the ratio by a ratio with the peak transmittance when a liquid crystal material having a negative dielectric anisotropy is used. Referring to FIG. 2, the peak transmittance sharply increases at a boundary between the spray-twist elastic constant ratio K11 / K22 of 2.2 and 2.4, and the dielectric anisotropy is anisotropy when K11 / K22 is 2.4 or more. It can be seen that even when a liquid crystal material having a positive property is used, a peak transmittance substantially equal to that in a negative liquid crystal material can be obtained.

Further, even if a liquid crystal material having a positive dielectric anisotropy in which the occurrence of the major axis of the liquid crystal molecule is reduced as described above cannot be eliminated at all, the retardation (d · Δn) is reduced to 0. .28 μm <d · Δn <0.5
By setting so as to satisfy μm, a decrease in effective retardation due to this rising can be corrected, and a high transmittance can be obtained. FIG. 3 shows a liquid crystal material having the same positive dielectric anisotropy as that shown in FIG. 1 (Δε = 10.2, K1
1 / K22 = 2.8) short pitch transparent comb-teeth electrode I
In the electrode configuration of the PS system, the retardation (d · Δ
The change of peak transmittance when n) was changed is shown. FIG. 3 shows that the retardation is 0.28 μm <d · Δn <
It can be seen that by setting the thickness to satisfy 0.5 μm, it is possible to obtain a high transmittance of 30% or more as the absolute transmittance of the TN system.

As described above, according to the present invention, in the IPS type active matrix liquid crystal display device using the short pitch transparent comb-teeth electrode, the same (TN) as the case where a liquid crystal material having a negative dielectric constant anisotropy is used. It is possible to obtain an active-matrix-type liquid crystal display device that uses a liquid crystal having a positive dielectric anisotropy that can achieve low driving voltage, high-speed response, and low cost.

That is, an active matrix type liquid crystal display device according to the present invention is a liquid crystal display comprising a pair of transparent substrates and a liquid crystal composition having a positive dielectric anisotropy disposed between the pair of substrates. In an active matrix liquid crystal display device including a layer, a pixel electrode and a counter electrode formed on one of the pair of substrates, and an active element connected to the pixel electrode and the counter electrode, the liquid crystal composition is The ratio K11 / K22 of the splay deformation elastic constant K11 and the twist deformation elastic constant K22 is 2.4 or more.

The liquid crystal composition preferably has a dielectric anisotropy of 8 or more and a rotational viscosity coefficient of 110 mPa · s or less. If the rotational viscosity coefficient is larger than this value, it becomes difficult to perform high-speed response within 16.6 msec corresponding to 60 Hz which is a general video signal frame frequency, and it is not possible to realize a high-speed response characteristic for video moving images. When the refractive index anisotropy of the liquid crystal composition is Δn and the thickness of the liquid crystal layer is d, the parameter d · Δn is 0.28 μm <d · Δn
It is preferable to satisfy <0.5 μm.

It is desirable that the pixel electrode and the counter electrode are transparent electrodes such as ITO, and electrical insulation between the pixel electrode and the counter electrode is ensured by a transparent insulating film. For example, the pixel electrode can be a short-pitch transparent comb-teeth electrode, and the counter electrode can be a solid transparent electrode. The transparent insulating film is made of, for example, S
can be configured by iO ₂ or Si _x N _y.

In the active matrix type liquid crystal display device of the present invention, a storage capacitor can be formed by overlapping a pixel electrode for applying an electric field to the liquid crystal layer with a counter electrode. Since this storage capacitor portion also contributes to light transmission, unlike a general IPS system, it can be provided in an unshielded area in the pixel area, and the effective aperture ratio of the pixel can be further improved.

[0022]

Embodiments of the present invention will be described below with reference to the drawings. Here, an embodiment in which the present invention is applied to an active matrix type color liquid crystal display device will be described. Note that, in the following drawings, portions having the same functions are denoted by the same reference numerals, and the description thereof will not be repeated.

[Example 1] 1. Plan view 4 of the matrix portion (pixel portion) is a plan view showing one pixel and its periphery of the active matrix type liquid crystal display device of the present invention. As shown in FIG. 4, each pixel has a gate signal line (scanning signal line or horizontal signal line) GL and a common voltage signal line (counter electrode wiring) CL
And two adjacent drain signal lines (video signal lines or vertical signal lines) DL (in a region surrounded by four signal lines). These signal lines are all formed of opaque metal electrodes. The gate signal line GL,
In the figure, a plurality of common voltage signal lines CL extend in the left-right direction, and a plurality of common voltage signal lines CL are arranged in the up-down direction. The video signal lines DL extend in the up-down direction, and a plurality of video signal lines DL are arranged in the left-right direction.

The pixel electrode PX is formed of an ITO transparent conductive film, and is electrically connected to a thin film transistor TFT through a through hole. The counter electrode CT is also formed of ITO and is electrically connected to the common voltage signal line CL.
The pixel electrode PX is formed in a comb-like shape, and each of the pixel electrodes PX is an elongated electrode in the vertical direction in the figure. The counter electrode CT is a solid transparent electrode, and controls an optical state of the liquid crystal composition LC by an electric field generated between each pixel electrode PX and the counter electrode CT to control display.

The gate signal line GL is for transmitting a gate signal to the thin film transistor element of each pixel, and the drain signal line DL is for supplying a drain signal voltage to the pixel electrode PX of each pixel via the thin film transistor element. The common voltage signal line CL is for supplying a common voltage to the counter electrode CT of each pixel. The common voltage signal line CL formed of the above-described metal electrode is formed so as to surround the side of the drain signal line DL, and prevents unnecessary light leakage beside the drain line caused by the influence of the electric field generated by the potential of the drain electrode. Also serves as a light-shielding layer for prevention.

The electrode width W and the electrode interval L of the comb-shaped pixel electrode PX are changed depending on the liquid crystal material used. This is because the electric field intensity that achieves the maximum transmittance varies depending on the liquid crystal material, so the electrode spacing is set according to the liquid crystal material, and the maximum amplitude of the signal voltage set by the withstand voltage of the drain signal drive circuit (signal side driver) used. This is because the maximum transmittance can be obtained in the range described above. In this embodiment, the electrode width W is 4 microns and the electrode interval L is 5 microns.

[0027] 2. FIG. 5 is a cross-sectional view taken along line II-II of FIG. 4, and FIG.
Is the thin film transistor TF along the line III-III in FIG.
T is a cross-sectional view, and FIG. 7 is a view showing a cross-section of the storage capacitor Cstg formation section taken along the line IV-IV in FIG.

As shown in FIGS. 5 to 7, the liquid crystal composition layer L
With reference to C, a thin film transistor TFT, a storage capacitor Cstg, and an electrode group are formed on the lower transparent glass substrate SUB1 side, and a color filter FIL and a light shielding black matrix pattern BM are formed on the upper transparent glass substrate SUB2 side. In addition, the transparent glass substrates SUB1, SU
Alignment films ORI1 and ORI2 for controlling the initial alignment of the liquid crystal are provided on the inner surface (the liquid crystal LC side) of each of B2, and a polarizing plate is provided on each outer surface of the transparent glass substrates SUB1 and SUB2. POL1 and POL2 are provided.

As shown in FIGS. 5 to 7, in this embodiment, the solid ITO counter electrode CT is in the same layer as the gate signal line GL, and the pixel electrode PX of the comb tooth is formed on the signal line DL. The structure is formed on the film PSV. Therefore, in the cross-sectional view, PX and CT are sandwiched between the gate insulating film GI and the protective insulating film PSV, and this forms the storage capacitor Cstg. The common signal line CL is in contact with the counter electrode CT in the same layer. The gate insulating film GI and the protective insulating film PSV
It can be formed by SiO ₂ or Si _x N _y.

[0030] 3. Below the TFT substrate , the lower transparent glass substrate SUB1 side (TFT substrate)
Will be described in detail. 3.1. Thin film transistor TFT The thin film transistor TFT whose sectional view is shown in FIG. 6 operates so that the channel resistance between the source and the drain decreases when a positive bias is applied to the gate electrode GT, and the channel resistance increases when the bias is zero. I do. As shown in FIG. 6, the thin film transistor TFT includes a gate electrode GT, an insulating film GI, an i-type (intrinsic, intrinsic, and conductivity type determining impurity-doped) amorphous silicon (S
i) -type semiconductor layer AS comprising i) and a pair of source electrodes SD
1. It has a drain electrode SD2. It should be understood that the source and the drain are originally determined by the bias polarity between them, and in the circuit of this liquid crystal display device, the polarity is inverted during the operation, so that the source and the drain are interchanged during the operation. However, in the following description, one is fixed and the other is fixed as a drain for convenience.

3.2. Gate electrode GT The gate electrode GT is formed continuously with the gate signal line GL, and a partial region of the gate signal line GL is
T is configured. The gate electrode GT is a portion beyond the active area of the thin film transistor TFT. In this example, the gate electrode GT is formed of a single-layer conductive film g1. As the conductive film g1, for example, a chromium-molybdenum alloy (Cr-Mo) film formed by sputtering is used, but not limited thereto. Further, two layers of different kinds of metals may be formed.

3.3. Gate signal line GL The gate signal line GL is formed of the conductive film g1. The conductive film g1 of the gate signal line GL is formed in the same manufacturing process as the conductive film g1 of the gate electrode GT, and is integrally formed. Through this gate signal line GL, a gate voltage VG is supplied from an external circuit to the gate electrode GT. In this example,
As the conductive film g1, for example, a chromium-molybdenum alloy (Cr-Mo) film formed by sputtering is used. Further, the material of the gate signal line GL and the gate electrode GT is not limited to the chromium-molybdenum alloy. Good.

3.4. Common voltage signal line CL The common voltage signal line CL is formed of the conductive film g1.
The conductive film g1 of the common voltage signal line CL is connected to the gate electrode G
T, the gate signal line GL, and the conductive film g1 of the counter electrode CT are formed in the same manufacturing process, and are formed integrally with the counter electrode CT. The common voltage Vcom is supplied from an external circuit to the common electrode CT through the common voltage signal line CL.
The material of the common voltage signal line CL is not limited to the chromium-molybdenum alloy, but may be a two-layer structure in which aluminum or an aluminum alloy is wrapped with chromium-molybdenum to reduce the resistance.

3.5. Insulating film GI The insulating film GI is used as a gate insulating film for applying an electric field to the semiconductor layer AS together with the gate electrode GT in the thin film transistor TFT. The insulating film GI is formed above the gate electrode GT and the gate signal line GL. As the insulating film GI, for example, a silicon nitride film formed by plasma CVD is selected, and is formed to a thickness of 2000 to 4500 ° (about 3500 ° in this embodiment). The insulating film GI also functions as an interlayer insulating film between the gate signal line GL, the common voltage signal line CL, and the drain signal line DL, and also contributes to their electrical insulation.

3.6. i-type semiconductor layer AS The i-type semiconductor layer AS is made of amorphous silicon and has a thickness of 150 to 25.
It is formed to a thickness of 00 ° (in this embodiment, a thickness of about 1200 °). The layer d0 is an N (+)-type amorphous silicon semiconductor layer doped with phosphorus (P) for ohmic contact, and is located only where the i-type semiconductor layer AS exists on the lower side and the conductive layer d1 exists on the upper side. Has been left. The i-type semiconductor layer AS and the layer d0 are also provided between the gate signal line GL and the intersection (crossover portion) between the common voltage signal line CL and the drain signal line DL. The i-type semiconductor layer AS at the intersection is the gate signal line GL at the intersection.
In addition, a short circuit between the counter voltage signal line CL and the drain signal line DL is reduced.

3.7. Source electrode SD1, drain electrode
SD2 Each of the source electrode SD1 and the drain electrode SD2 is
It is composed of a conductive film d1 in contact with the N (+) type semiconductor layer d0. Since the Cr—Mo film has low stress, it can be formed relatively thick, which contributes to lowering the resistance of the wiring. Further, the Cr—Mo film has good adhesion to the N (+) type semiconductor layer d0.

3.8. Drain signal line DL The drain signal line DL is formed in the same layer as the source electrode SD1 and the drain electrode SD2. Further, the drain signal line DL is formed integrally with the drain electrode SD2. In this example, the conductive film d1 uses a chromium-molybdenum alloy (Cr-Mo) film formed by sputtering, and is 500 to 3000.
Å (in this embodiment, about 2500 Å). Since the Cr—Mo film has low stress, it can be formed relatively thick, which contributes to lowering the resistance of the wiring. Further, the Cr—Mo film has good adhesion to the N (+) type semiconductor layer d0. As the conductive film d1, a high melting point metal (Mo, Ti, Ta, W) film, a high melting point metal silicide (MoSi ₂ , TiSi ₂ , TaSi ₂ , WS) in addition to the Cr—Mo film.
i ₂ ) A film may be used, or a laminated structure with aluminum or the like may be used.

3.9. Storage Capacitor Cstg The conductive film ITO2 forming the storage capacitor Cstg is formed to overlap the conductive film ITO1 forming the counter electrode CT. This superposition forms a storage capacitor (capacitance element) Cstg between the pixel electrode PX and the counter electrode CT, as is clear from FIG. This storage capacity Cstg
Is a protective film PSV and a thin film transistor TFT
And an insulating film GI used as a gate insulating film. As shown in FIG. 4, the storage capacitance Cst
g is formed as an overlapping portion of the pixel electrode PX and the counter electrode CT in the pixel.

3.10. Protective Film PSV A protective film PSV is provided on the thin film transistor TFT. The protective film PSV is provided mainly for protecting the thin film transistor TFT from moisture and the like, and uses a film having high transparency and good moisture resistance. Protective film PSV
Is formed of, for example, a silicon oxide film or a silicon nitride film formed by a plasma CVD apparatus and has a thickness of about 0.1 to 1 μm. The protective film PSV includes external connection terminals DTM,
Removed to expose GTM. Regarding the thickness relationship between the protective film PSV and the insulating film GI, the former is made thicker in consideration of the protective effect, and the latter is made thinner in consideration of the transconductance gm of the transistor. Further, the protective film PSV may have a laminated structure with a thick organic film such as polyimide.

3.11. Pixel electrode PX The pixel electrode PX is formed of ITO which is a transparent conductor,
Similarly, a storage capacitor is formed with the counter electrode CT formed of ITO. 3.12. Counter electrode CT The counter electrode CT is formed of ITO, and the common voltage signal line C
L and the same layer. The common voltage Vcom is applied to the counter electrode CT. In this embodiment, the common voltage Vcom is a feed voltage generated when the thin film transistor element TFT is turned off from an intermediate DC potential between the minimum level drive voltage Vdmin and the maximum level drive voltage Vdmax applied to the drain signal line DL. The potential is set lower by the through voltage ΔVs.

[0041] 4. The color filter substrate Next, FIG. 4, returning to FIG. 5, the upper transparent glass substrate SUB2
The configuration of the side (color filter substrate) will be described in detail. 4.1. On the transparent glass substrate SUB2 side above the light-shielding film BM , transmitted light from an unnecessary gap (a gap other than the pixel electrode PX and the counter electrode CT) is transmitted to the display surface side as shown by a BM boundary line shown by a thick line in FIG. The light shielding film BM is emitted so as not to lower the contrast ratio and the like.
(A so-called black matrix). The light-shielding film BM is formed such that the external light or the backlight is
It also plays a role in preventing incidence on S. That is, the i-type semiconductor layer AS of the thin film transistor TFT includes the upper and lower light shielding films BM and the large gate electrode GT (FIG. 6).
And sandwiched out, so that natural light and backlight from outside do not shine. The light shielding film BM shown in FIG.
Although only one pixel is shown, it is formed so that the inside is open for every pixel. This pattern is an example.

In a portion where the direction of the electric field is disturbed, such as an end portion of a comb-tooth electrode, the display of the portion corresponds to the video information in the pixel on a one-to-one basis. Is white, so that it can be used as part of the display. However, the light shielding film BM must have a light shielding property. In particular, the gap between the pixel electrode PX and the counter electrode CT is a crosstalk (vertical smear) in the drain signal line direction.
In order to suppress this, an optical density of 3 or more is required.

The light-shielding film BM may be formed of a conductive metal such as Cr, but is preferably formed of a highly insulating film so as not to affect the electric field between the pixel electrode PX and the counter electrode CT. Is preferred. In this embodiment, a black organic pigment is mixed into a resist material to form a film having a thickness of about 1.2 μm.
In order to improve the light shielding property, carbon or titanium oxide (TixOy) may be mixed in a range where the insulating property can maintain 10 ⁸ Ωcm or more that does not affect the electric field in the liquid crystal composition layer. .

Further, since the light-shielding film BM partitions the effective display area of each row, it also has a role of clarifying the outline of the pixels of each row. The light-shielding film BM is also formed in a peripheral part in a frame shape, and its pattern is formed continuously with the pattern of the matrix part shown in FIG. The light-shielding film BM in the peripheral portion is extended outside the seal portion SL (see FIG. 10) to prevent leaked light such as reflected light due to a mounting machine such as a personal computer from entering the matrix portion, and to prevent the backlight and the like from being emitted. Light is prevented from leaking out of the display area. On the other hand, this light shielding film B
M is fixed about 0.3 to 1.0 mm inside the edge of the substrate SUB2, and is formed so as to avoid the cutting region of the substrate SUB2.

4.2. Color filter FIL The color filter FIL has red,
The stripes are formed by repeating green and blue. The color filter FIL is formed so as to overlap the light shielding film BM.

The color filter FIL can be formed as follows. First, a dye base such as an acrylic resin is formed on the surface of the upper transparent glass substrate SUB2, and the dye base other than the red filter formation region is removed by photolithography. Thereafter, the dyed base material is dyed with a red pigment and subjected to a fixing treatment to form a red filter R. Next, by performing similar steps, a green filter G and a blue filter B are sequentially formed. Note that a dye may be used for dyeing.

4.3. Overcoat film OC The overcoat film OC is provided to prevent the dye of the color filter FIL from leaking into the liquid crystal composition layer LC and to flatten the steps formed by the color filter FIL and the light shielding film BM. The overcoat film OC is formed of a transparent resin material such as an acrylic resin and an epoxy resin. Further, as the overcoat film, an organic film such as polyimide having good fluidity may be used.

[0048] 5. Liquid crystal layer and polarizing plate Next, a liquid crystal layer, an alignment film, a polarizing plate and the like will be described. 5.1. As the liquid crystal composition LC, the dielectric anisotropy Δε is positive, the value is 9.2, and the refractive index anisotropy Δn is 0.091 (58
9 nm, 20 ° C.), and the elastic constant ratio K11 / K22 is 2.
No. 6 nematic liquid crystal was used. In this embodiment,
In order to increase the elastic constant ratio K11 / K22, "H.Takatsu,
K. Takeuchi, M. Sasaki, H. Ohnishi and M. Schdt, Molec
ular Crystal, Liquid Crystal, 1991, vo.l206, pp.15
9-177 ", a liquid crystal composition containing a molecule comprising a fluorine-modified cyclohexane or bicyclohexane having a methoxypropyl or alkenyl terminal group was used. The liquid crystal composition used in this example has a low viscosity of 91 mPa · s in rotational viscosity. Note that the configuration of the liquid crystal composition is not limited to the above composition, and any composition may be used as long as the elastic constant ratio K11 / K22 is 2.4 or more.

The thickness (gap) of the liquid crystal composition layer was 4.0.
μm, and the retardation Δn · d was 0.36 μm. By combining an alignment film and a polarizing plate described later, the maximum transmittance can be obtained when the liquid crystal molecules are rotated by about 45 ° from the initial alignment direction to the electric field direction, and the transmitted light has almost no wavelength dependence within the visible light range. To be able to get
The thickness (gap) of the liquid crystal composition layer is controlled by polymer beads that have been subjected to a vertical alignment treatment. This allows
It stabilizes the orientation of liquid crystal molecules around the beads during black display, obtains a good black level, and improves the contrast ratio.

The specific resistance of the liquid crystal composition is 10
⁹ Ωcm or more and 10 ¹⁴ Ωcm or less, preferably 10 ¹¹ Ωc
m and 10 ¹³ Ωcm or less are used. In this method,
Even if the resistance of the liquid crystal composition is low, the voltage charged between the pixel electrode and the counter electrode can be sufficiently maintained, and the lower limit is 10 ⁹ Ωcm, preferably 10 ¹¹ Ωcm. This is because the pixel electrode and the counter electrode are formed on the same substrate. On the other hand, if the resistance is too high, it is difficult to alleviate static electricity that has entered during the manufacturing process, so the resistance is preferably 10 ¹⁴ Ωcm or less, and more preferably 10 ¹³ Ωcm or less.

5.2. As the alignment film orientation film ORI, polyimide. The initial alignment direction RDR is made parallel to the upper and lower substrates. Rubbing is the most common method for imparting the initial alignment direction, but oblique evaporation is another method. FIG. 8 shows the relationship between the initial alignment direction RDR and the applied electric field direction EDR. In this embodiment, the initial alignment direction RDR is about 75 ° with respect to the horizontal direction.
And In the structure of the present invention using a liquid crystal composition having a positive dielectric anisotropy, the angle between the initial alignment direction RDR and the applied electric field direction EDR must be 45 ° or more and less than 90 °.

5.3. Polarizing plate As a polarizing plate POL, using a polarizing plate having conductivity,
The polarization transmission axis MAX1 of the lower polarizing plate POL1 is made to coincide with the initial alignment direction RDR, and the polarization transmission axis MAX2 of the upper polarizing plate POL2 is made orthogonal to it. FIG. 8 shows the relationship. As a result, it is possible to obtain a normally closed characteristic in which the transmittance increases as the voltage applied to the pixel of the present invention (the voltage between the pixel electrode PX and the counter electrode CT) increases. In addition, high quality black display can be achieved.

In this embodiment, measures are taken against display failure and EMI caused by external static electricity by giving the polarizing plate conductivity. Regarding the conductivity, the sheet resistance is desirably 10 ⁸ Ω / □ or less if only for measures against the effects of static electricity, and 10 ⁴ Ω / □ or less if measures are also taken for EMI. Also,
A conductive layer may be provided on the back surface of the holding surface of the liquid crystal composition of the glass substrate (the surface on which the polarizing plate is adhered).

6 Configuration around Matrix FIG. 9 is a plan view showing a main part around a matrix (AR) of the display panel PNL including the upper and lower glass substrates SUB1 and SUB2. FIG. 10 is a diagram showing a cross section near the external connection terminal GTM to which the scanning circuit is to be connected on the left side, and a cross section near the seal portion where there is no external connection terminal on the right side.

[0055] Any For this panel In the manufacture of, if small size divided from simultaneously processing a plurality fraction of the device in one glass substrate for increased throughput, manufacturing facilities if large size shared A glass substrate of a standardized size is processed even in a variety, and the size is reduced to a size suitable for each type. In each case, the glass is cut after passing through one process. FIGS. 9 and 10 show the latter example. In both FIGS. 9 and 10, the upper and lower substrates SUB1, S
This represents the state after the cutting of UB2, and LN indicates the edge of both substrates before cutting.

In any case, in the completed state, the external connection terminal groups Tg and Td and the terminal CTM are present (the upper side and the left side in FIG. 9) so that the upper substrate SU is exposed.
The size of B2 is limited inside the lower substrate SUB1. The terminal groups Tg and Td are respectively a scanning circuit connection terminal GTM and a drain signal circuit connection terminal DTM described later.
And their leading wiring portions are integrated circuit chip CHI (FIG. 16)
Tape carrier package TCP equipped with
(Refer to FIG. 16).

The lead wiring from the matrix section of each group to the external connection terminal section is inclined as approaching both ends. This is because the display panel PN is at the arrangement pitch of the package TCP and the connection terminal pitch of each package TCP.
This is for matching the L terminals DTM and GTM. Also,
The counter electrode terminal CTM is a terminal for applying a common voltage to the counter electrode CT from an external circuit. The common voltage signal lines CL of the matrix section are led out to the opposite side (the right side in FIG. 9) of the scanning circuit terminal GTM, and the common voltage signal lines are grouped together by a common bus line CB to form a counter electrode terminal CTM.
Connected to

Between the transparent glass substrates SUB1 and SUB2, along the edges thereof, except for the liquid crystal filling opening INJ, the liquid crystal LC
Is formed to seal the sealing pattern SL. The sealing material is made of, for example, an epoxy resin. Orientation film ORI
The layers 1 and ORI2 are formed inside the seal pattern SL. The polarizing plates POL1 and POL2 are formed on the outer surfaces of the lower transparent glass substrate SUB1 and the upper transparent glass substrate SUB2, respectively. The liquid crystal LC is sealed in a region partitioned by the seal pattern SL between the lower alignment film ORI1 and the upper alignment film ORI2 for setting the direction of the liquid crystal molecules. The lower alignment film ORI1 is formed of a lower transparent glass substrate S
It is formed above the protective film PSV1 on the UB1 side.

In this liquid crystal display device, various layers are separately stacked on the lower transparent glass substrate SUB1 side and the upper transparent glass substrate SUB2 side, and a seal pattern SL is formed on the substrate SUB2.
Side, the lower transparent glass substrate SUB1 and the upper transparent glass substrate SUB2 are overlapped, liquid crystal LC is injected from the opening INJ of the sealing material SL, the injection port INJ is sealed with epoxy resin or the like, and the upper and lower substrates are sealed. Assembled by cutting.

[0060] 7. Gate Terminal FIG. 11 is a diagram showing a connection structure from the gate signal line GL of the display matrix to its external connection terminal GTM. FIG. 11A is a plan view, and FIG. 11B is a plan view of FIG.
2 shows a cross section taken along the line BB of FIG. This figure corresponds to the vicinity of the lower left of FIG. 9, and the diagonal wiring portion is represented by a straight line for convenience. In the figure, the Cr-Mo layer g1 is hatched for easy understanding.

The gate terminal GTM is a Cr-Mo layer g1
And further protect the surface and use TCP (Tape Carri
er Package) and a transparent conductive layer ITO1 for improving the reliability of connection. This transparent conductive layer I
TO1 uses a transparent conductive film ITO. In the plan view, the insulating film GI and the protective film PSV are formed on the right side, and the terminal portion GTM located on the left end is exposed therefrom so as to be able to make electrical contact with an external circuit.

Although only one pair of the gate line GL and the gate terminal is shown in the figure, a plurality of such pairs are arranged vertically to form a terminal group Tg (FIG. 13).
In the manufacturing process, the left end of the gate terminal extends beyond the cutting region of the substrate and is short-circuited by a wiring SHg (not shown). This is useful for preventing electrostatic breakdown at the time of rubbing of the alignment film ORI1 in the manufacturing process.

[0063] 8. Drain terminal DTM FIG. 12 shows the connection between the drain signal line DL and its external connection terminal D.
It is a figure showing connection to TM. FIG. 12A shows the plane, and FIG. 12B shows a cross section taken along the line BB of FIG. 12A. 9 corresponds to the vicinity of the upper right of FIG. 9 and the direction of the drawing is changed for convenience, but the right end direction corresponds to the upper end of the substrate SUB1.

The external connection drain terminals DTM are arranged in a vertical direction, and the drain terminals DTM constitute a terminal group Td (subscript omitted) as shown in FIG. 16, and are further extended beyond the cutting line of the substrate SUB1. During the manufacturing process, all of them are short-circuited to each other by a wiring SHd (not shown) to prevent electrostatic breakdown. The drain connection terminal DTM is a transparent conductive layer I
It is formed of TO1, and is connected to the drain signal line DL at a portion where the protective film PSV1 is removed. The transparent conductive film ITO1 uses the transparent conductive film ITO as in the case of the gate terminal GTM. The lead wiring from the matrix portion to the drain terminal portion DTM has a layer d1 at the same level as the drain signal line DL.

9. Counter electrode terminal CTM FIG. 13 is a diagram showing a connection from the common voltage signal line CL to the external connection terminal CTM. FIG. 13 (a) shows the plane, and FIG. 13 (b) shows a cross section taken along the line BB of FIG. 13 (a). This figure corresponds to the vicinity of the upper left of FIG.

The common voltage signal lines CL are led together to a common electrode terminal CTM by a common bus line CB. The common bus line CB is formed on the conductive layer g1 by the conductive layer g.
3 (not shown), and they are electrically connected by a transparent conductive layer ITO1. This is to reduce the resistance of the common bus line CB so that the common voltage is sufficiently supplied from the external circuit to each common voltage signal line CL. This structure is characterized in that the resistance of the common bus line can be reduced without adding a new conductive layer.

The counter electrode terminal CTM has a structure in which a transparent conductive layer ITO1 is laminated on a conductive layer g1. This transparent conductive film ITO1 uses the transparent conductive film ITO like the other terminals. With the transparent conductive layer ITO1,
The conductive layer g1 is covered with a transparent conductive layer ITO1 having good durability in order to protect the surface and prevent electrolytic corrosion and the like. Also,
The connection between the transparent conductive layer ITO1 and the conductive layers g1 and d1 is made conductive by forming through holes via the protective film PSV and the insulating film GI.

10. FIG. 14 shows a connection diagram of an equivalent circuit of the entire display device equivalent circuit display matrix portion and peripheral circuits thereof. Although the figure is a circuit diagram, it is drawn corresponding to an actual geometric arrangement. A plurality of pixels form a two-dimensional matrix array.
X means a drain signal line DL, and suffixes G, B, and R are given corresponding to green, blue, and red pixels, respectively.
Y means a gate signal line GL, and suffixes 1, 2, 3,.
The end is given according to the order of the scanning timing. The gate signal line Y (subscript omitted) is connected to the vertical scanning circuit V, and the drain signal line X (subscript omitted) is connected to the drain signal drive circuit H. The SUP is a power supply circuit for obtaining a plurality of divided and stabilized voltage sources from one voltage source, and a CR from a host (upper processing unit).
This is a circuit including a circuit for exchanging information for T (cathode ray tube) with information for a TFT liquid crystal display device.

11. Driving Method FIG. 15 shows a driving waveform of the liquid crystal display device of this embodiment.
The gate signal VG takes an on level every scanning period, and takes an off level in the others. Drain signal voltage VD
Is applied so that the positive electrode and the negative electrode are inverted for each frame at twice the amplitude of the voltage to be applied to the liquid crystal layer and transmitted to one pixel. Here, the polarity of the drain signal voltage VD is inverted every column, and the polarity is also inverted every two rows. This results in a configuration (dot inversion drive) in which the pixels whose polarity has been inverted are vertically and horizontally, and flicker and crosstalk (smear)
Is less likely to occur.

Further, the common voltage VC is set to a voltage deviated by a fixed amount from the center voltage of the polarity inversion of the drain signal voltage. This is for correcting a feedthrough voltage generated when the thin film transistor element changes from on to off, and is performed to apply an AC voltage VLC having a small DC component to the liquid crystal. Afterimages, deterioration, etc. become severe).

12. Display panel PNL and drive circuit board P
CB1 FIG. 16 is a top view showing a state where the drain signal drive circuit H and the vertical scanning circuit V are connected to the display panel PNL shown in FIG. CHI is a driving IC chip for driving the display panel PNL (the lower five are driving ICs on the vertical scanning circuit side).
The C chip and the ten left chips are drive IC chips on the drain signal drive circuit side. TCP is a tape carrier package on which a driving IC chip CHI is mounted by a tape automated bonding method (TAB), and PCB1 is a driving circuit board on which the above-mentioned TCP, capacitors, etc. are mounted. It is divided into two for the gate signal drive circuit.

FGP is a frame ground pad,
A spring-shaped fragment provided by cutting into the shield case SHD is soldered. FC is the lower drive circuit board PC
This is a flat cable for electrically connecting B1 to the left drive circuit board PCB1. As shown in the drawing, a flat cable FC is used in which a plurality of lead wires (phosphor bronze material plated with Sn) are sandwiched and supported by a striped polyethylene layer and a polyvinyl alcohol layer.

13. Manufacturing Method Next, a method of manufacturing the liquid crystal display device on the substrate SUB1 side will be described with reference to FIGS. In the figure, the abbreviation of the process name is shown in the center, the thin film transistor TFT portion shown in FIG. 6 is shown on the left side, and the processing flow as seen in the cross section near the gate terminal shown in FIG. 11 is shown on the right side. Processes A to F are classified according to the respective photographic processes, and all the cross-sectional views of each process show the stage where the processing after the photographic processes is completed and the photoresist is removed. In addition,
The photographic processing refers to a series of operations from application of a photoresist to selective exposure using a mask to development. Hereinafter, steps A to C are described with reference to FIG.
, And steps D to F will be described with reference to FIG. 18, but repeated description will be omitted.

(A) Step A On the lower transparent glass substrate SUB1 made of AN635 glass (trade name), a conductive film ITO1 made of ITO having a thickness of 100 ° is provided by sputtering. After the photographic processing, the conductive film ITO1 is selectively etched with an HBr solution. Thereby, the counter electrode CT is formed.

(B) Step B Next, a conductive film g1 made of Cr and having a film thickness of 2000 ° is provided by sputtering. After the photographic processing, the conductive film g1 is selectively etched with ceric ammonium nitrate.
Thereby, the gate electrode GT, the gate signal line GL, the common voltage signal line CL, the gate terminal GTM, the first conductive layer of the common bus line CB1, the first conductive layer of the counter electrode terminal CTM1, and the bus line connecting the gate terminal GTM. SHg
(Not shown). Here, the electrode material is not limited to Cr, but may be Mo, Ti, Ta, W, or the like, or an alloy thereof.

(C) Step C An ammonia gas, a silane gas, and a nitrogen gas are introduced into a plasma CVD apparatus to provide a Si nitride film having a thickness of 3500 °, and a silane gas and a hydrogen gas are introduced into the plasma CVD apparatus to form a film. After providing an i-type amorphous Si film having a thickness of 1200 °, hydrogen gas and phosphine gas are introduced into a plasma CVD apparatus to form an N (+)-type amorphous Si film having a thickness of 300 °. After photo processing, SF is used as dry etching gas
₆ , the N (+)-type amorphous Si film and the i-type amorphous Si film are selectively etched using CCl ₄ to form islands of the i-type semiconductor layer AS.

(D) Step D A conductive film d1 made of Cr having a thickness of 300 ° is provided by sputtering. After the photo processing, the conductive film d1 is etched with the same liquid as in step B, and the drain signal line DL, the source electrode SD1, the drain electrode SD2, and the common bus line CB
The second first conductive layer and a bus line SHd (not shown) for short-circuiting the drain terminal DTM are formed. Here, the electrode material is not limited to Cr, but may be Mo, Ti, Ta, W, or the like, or an alloy thereof.

Next, CCl ₄ ,
By introducing SF ₆ and etching the N (+)-type amorphous Si film, the N (+)-type semiconductor layer d0 between the source and the drain is selectively removed. After patterning the conductive film d1 with a mask pattern, the N (+) type semiconductor layer d0 is removed using the conductive film d1 as a mask. That is, i
N (+) type semiconductor layer d0 remaining on type semiconductor layer AS
The portion other than the conductive film d1 is removed by self-alignment. At this time, since the N (+)-type semiconductor layer d0 is etched so as to entirely remove the thickness thereof, the i-type semiconductor layer AS is also slightly etched at its surface, but the degree is controlled by the etching time. do it.

(E) Step E An ammonia gas, a silane gas, and a nitrogen gas are introduced into a plasma CVD apparatus to form a 0.4 μm-thick Si nitride film. After photographic processing, SF _{6 is used} as a dry etching gas.
Then, the protective film PSV and the insulating film GI are patterned by selectively etching the Si nitride film using the method described above.

(F) Step F A conductive film ITO2 made of ITO having a thickness of 120 ° is provided by sputtering. After the photographic processing, the conductive film ITO2 is selectively etched with an HBr solution. Thereby, the pixel electrode PX is formed.

14. Characteristics of the present embodiment The transmittance of the liquid crystal display element constructed in this embodiment at the pixel ratio light-shielding portion is 32%, and the total panel transmittance including factors such as the pixel aperture ratio and the color filter transmittance is 6. 5%
As a result, a panel transmittance substantially equal to that of the TN system was obtained. Further, the absolute value of the dielectric anisotropy is 9.2, which is twice or more as compared with the generally known absolute value of the dielectric anisotropy of a liquid crystal material having a negative dielectric anisotropy. And the electrode spacing is smaller than that of a general IPS type comb-tooth electrode, so that a short pitch transparent comb combined with a general liquid crystal material having a negative dielectric anisotropy is used. The driving voltage was suppressed to be lower than both of the IPS system using tooth electrodes and the IPS system combining a liquid crystal having a positive dielectric anisotropy, and driving by a 5 V withstand voltage drain driver was possible. Furthermore, high-speed response was possible because a low-viscosity liquid crystal material having a positive dielectric anisotropy, which is difficult to obtain with a generally known liquid crystal material having a negative dielectric anisotropy, was used. .

Example 2 As a liquid crystal material, the dielectric anisotropy Δε is positive, the value is 10.5, the refractive index anisotropy Δn is 0.113, and the elastic constant ratio K11 / K22 is 2.
Using the nematic liquid crystal of No. 4, an active matrix liquid crystal display device was prepared in the same manner as in Example 1 except that the thickness (gap) of the liquid crystal composition layer was 4.2 μm and the retardation Δn · d was 0.47 μm. . The liquid crystal composition used in this example has a rotational viscosity coefficient of 95 mPa.
-Low viscosity with s.

The transmittance of the liquid crystal display element of Example 2 at the pixel ratio light-shielding portion is 30%, and the total panel transmittance including factors such as the pixel aperture ratio and the color filter transmittance is 6.1%. As a result, the same panel transmittance as that of the TN method similar to that of Example 1 was obtained, and a high-speed response was possible.

Example 3 As a liquid crystal material, the dielectric anisotropy Δε was positive, the value was 8.6, and the refractive index anisotropy Δε was 8.6.
n is 0.076, and the elastic constant ratio K11 / K22 is 3.0.
An active matrix liquid crystal display device was prepared in the same manner as in Example 1 except that the thickness (gap) of the liquid crystal composition layer was set to 4.2 μm and the retardation Δn · d was set to 0.32 μm. The liquid crystal composition used in this example had a rotational viscosity coefficient of 108 mP.
a · s.

The transmittance of the liquid crystal display element of Example 2 at the pixel ratio light-shielding portion is 32%, and the total panel transmittance including factors such as the pixel aperture ratio and the color filter transmittance is 6.4%. As a result, the same panel transmittance as that of the TN system similar to that of Example 1 was obtained, and a high-speed response was possible.

Comparative Example 1 In Example 1, the liquid crystal composition had a positive dielectric anisotropy Δε and a value of 1
0.2, refractive index anisotropy Δn is 0.081 (589 nm,
20 ° C.) and a liquid crystal display device was prepared in the same manner as in Example 1 except that a nematic liquid crystal having an elastic constant ratio K11 / K22 of 1.3 was used. The rotational viscosity coefficient of the liquid crystal composition is 16
0 mPa · s. The retardation Δn · d was 0.4 μm.

The transmittance of the liquid crystal display element of Comparative Example 1 at the pixel ratio light-shielding portion was 24%, and the total panel transmittance including factors such as the pixel aperture ratio and the color filter transmittance was 4.8%. And the same panel transmittance as the IPS system. The response characteristic is that the black and white response time is 40
msec, which is 16
The response speed was much slower than msec.

[Comparative Example 2] In Example 1, the liquid crystal composition had a positive dielectric anisotropy Δε and a value of 8.
6. The refractive index anisotropy Δn is 0.0871 and the elastic constant ratio K
A liquid crystal display device was prepared in the same manner as in Example 1 except that a nematic liquid crystal having 11 / K22 of 2.1 was used. The rotational viscosity coefficient of the liquid crystal composition is 125 mPa · s. The retardation Δn · d was 0.36 μm.

The transmittance of the liquid crystal display element of Comparative Example 2 at the pixel ratio light-shielding portion is 27%, and the total panel transmittance including factors such as the pixel aperture ratio and the color filter transmittance is 5.5%. The remarkable effect of improving the panel transmittance as in the present invention was not obtained. Further, the response characteristics were such that the white / black response time was about 30 msec.

[0090]

As described above in detail, according to the present invention, a liquid crystal material having a negative dielectric anisotropy is used in an IPS type active matrix liquid crystal display device using a short pitch transparent comb electrode. Equivalent to the case of (the same as the TN method)
It is possible to provide an active matrix type liquid crystal display device which is realized by using a liquid crystal having a positive dielectric anisotropy which can reduce the driving voltage, increase the response speed, and reduce the cost.

[Brief description of the drawings]

FIG. 1 is a comparison diagram of applied voltage-transmittance characteristics of a short pitch transparent comb electrode IPS system using a liquid crystal material having a positive dielectric anisotropy and a liquid crystal material having a negative dielectric anisotropy.

FIG. 2 is a graph showing a relationship between a splay-twist elastic constant ratio K11 / K22 and a peak transmittance of a liquid crystal material having a positive dielectric anisotropy.

FIG. 3 is a diagram showing a relationship between retardation and peak transmittance when a liquid crystal material having a positive dielectric anisotropy is used.

FIG. 4 is a main part plan view showing one pixel of an example of a liquid crystal display section of an active matrix type color liquid crystal display device and its periphery.

FIG. 5 is a cross-sectional view of the pixel taken along the line II-II in FIG. 4;

FIG. 6 is a sectional view of the thin film transistor element TFT taken along the line III-III in FIG. 4;

FIG. 7 shows a storage capacitance Cstg along a section line IV-IV in FIG.
FIG.

FIG. 8 is a diagram showing a relationship among a direction of an applied electric field, a rubbing direction, and a transmission axis of a polarizing plate.

FIG. 9 is a plan view illustrating a configuration of a matrix peripheral portion of a display panel.

FIG. 10 is a diagram showing a gate signal terminal on the left side and a panel edge portion without an external connection terminal on the right side.

11A and 11B are a plan view and a cross-sectional view illustrating an example of a structure near a connection portion between a gate terminal GTM and a gate wiring GL.

12A and 12B are a plan view and a cross-sectional view illustrating an example of a structure near a connection portion between a drain terminal DTM and a drain signal line DL.

FIGS. 13A and 13B are a plan view and a cross-sectional view illustrating an example of a structure near a connection portion of a counter electrode terminal CTM, a common bus line CB, and a common voltage signal line CL.

FIG. 14 is a circuit diagram including a matrix portion and its periphery of an active matrix type color liquid crystal display device.

FIG. 15 is a diagram showing driving waveforms of the active matrix type color liquid crystal display device of the present invention.

FIG. 16 is a top view showing a state where peripheral driving circuits are mounted on a liquid crystal display panel.

FIG. 17 is a diagram illustrating manufacturing steps A to C on the substrate SUB1 side.

FIG. 18 is a view for explaining manufacturing steps DF on the substrate SUB1 side.

[Explanation of symbols]

SUB: transparent glass substrate, GL: gate signal line, DL ...
Drain signal line, CL: common voltage signal line, PX: pixel electrode, CT: counter electrode, GI: insulating film, GT: gate electrode, AS: i-type semiconductor layer, SD: source electrode or drain electrode, PSV: protective film ,
BM: light shielding film, LC: liquid crystal, TFT: thin film transistor, PH: through hole, g, d: conductive film, ITO: transparent conductive film, Cstg: storage capacitor, GTM: gate terminal, DTM: drain terminal, CB: common bus Line, CTM: Counter electrode terminal, SHD: Shield case, PNL: Liquid crystal display panel

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification code FI Theme coat ゛ (Reference) G09F 9/35 330 G09G 3/20 624D 5C080 G09G 3/20 624 680H 5C094 680 3/36 3/36 G02F 1 / 136 500 (72) Inventor Hitoshi Oaku 7-1-1, Omika-cho, Hitachi City, Ibaraki Prefecture Inside Hitachi Research Laboratory, Hitachi, Ltd. (72) Inventor Shintaro Takeda 7-1-1, Omika-cho, Hitachi City, Ibaraki Prefecture F-term (reference) in Hitachi, Ltd.Hitachi Research Laboratory JA39 JA42 JA43 JA44 JA47 JB11 JB13 JB23 JB32 JB33 JB38 JB52 JB57 JB63 JB69 KA05 KA07 K A12 KA16 KA18 KB14 MA05 MA08 MA14 MA15 MA16 MA18 MA19 MA20 MA27 MA35 MA37 MA41 NA01 NA04 NA05 NA25 QA06 QA18 4H027 BA01 BB13 BC04 BD03 BD04 BD07 BD08 BD11 BD24 BE02 BE03 5C006 AA01 AA22 AC11 AC28 AF42 AF43 AF44 AF12 FA46 FA51 5C080 AA10 BB05 CC03 DD06 DD08 DD22 DD27 FF11 JJ02 JJ04 JJ05 JJ06 5C094 AA13 AA24 AA44 BA03 BA43 CA19 FB04 JA01 JA08 JA11 JA20

Claims (4)

[Claims] 1. A pair of substrates, at least one of which is transparent;
A liquid crystal layer formed of a liquid crystal composition having a positive dielectric anisotropy disposed between the pair of substrates, a pixel electrode and a counter electrode formed on one of the pair of substrates, and the pixel electrode And an active element connected to a counter electrode, wherein the liquid crystal composition has a ratio K11 / K22 between a splay deformation elastic constant K11 and a twist deformation elastic constant K22 of 2.4.
An active matrix type liquid crystal display device characterized by the above. 2. The active matrix liquid crystal display device according to claim 1, wherein the liquid crystal composition has a dielectric anisotropy of 8 or more and a rotational viscosity coefficient of 110 mPa.
-An active matrix type liquid crystal display device characterized by being not more than s. 3. The active matrix type liquid crystal display device according to claim 1, wherein when the refractive index anisotropy of the liquid crystal composition is Δn and the thickness of the liquid crystal layer is d, a parameter d · Δn. Is 0.28 μm <d · Δn <0.5 μ
m, an active matrix type liquid crystal display device. 4. The active matrix type liquid crystal display device according to claim 1, wherein the pixel electrode and the counter electrode are transparent electrodes, and an electrical connection between the pixel electrode and the counter electrode. An active matrix type liquid crystal display device, wherein insulation is secured by a transparent insulating film.