JP2005284304A - Active matrix liquid crystal display - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an active matrix liquid crystal display by the IPS technology using a short pitch transparent interdigital electrode, manufactured by using liquid crystal materials of the positive dielectric constant anisotropy that allow lowering of a driving voltage, speeding up of a response, and reduction of a cost, which has achieved the transmissivity equivalent to the transmissivity (a level of the TN technology) when liquid crystal materials of the negative dielectric constant anisotropy are used. <P>SOLUTION: A liquid crystal composition of the positive dielectric constant anisotropy is used in which the ratio K11/K22, where K11 is a splay elastic deformation constant and K22 is a twist elastic deformation constant, is 2.4 or more, the dielectric constant anisotropy is 8 or more, and the rotational viscosity value is 110 mPa s or less. The retardation d×Δn is set to meet the range of 0.28 μm<d×Δn<0.5 μm. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to an active matrix liquid crystal display device.

  The display of the liquid crystal display device is performed by changing the alignment direction of the liquid crystal molecules by applying an electric field to the liquid crystal molecules sandwiched between the substrates, thereby changing the optical characteristics of the liquid crystal layer. In particular, an active matrix type liquid crystal display device using an active element typified by a thin film transistor element is a low power consumption OA device that substitutes for a CRT in terms of response characteristics that can handle high definition and moving images. It is expected as a display device.

  In the conventional active matrix type liquid crystal display device, the alignment direction in the substrate plane of the alignment film on the upper and lower two substrates sandwiching the liquid crystal layer is almost orthogonal, and the liquid crystal molecular alignment is twisted by approximately 90 ° when no electric field is applied. A twisted nematic (TN) display method for performing display by utilizing a change in the optical rotation of the liquid crystal layer by applying an electric field in the normal direction of the substrate. However, this TN display type liquid crystal display device has a peculiar defect that the viewing angle is narrow, and it has been a problem when substituting for a CRT in terms of image quality.

  On the other hand, an in-plane switching (IPS) system in which the direction of the electric field applied to the liquid crystal using the comb electrode is made substantially parallel to the substrate surface and the display is performed using the birefringence of the liquid crystal is disclosed in, for example, Japanese Patent Publication No. 63-21907. It is proposed by the publication "R. Kiefer, B. Weber, F. Windcheid and G. Baur, Proceedings of the Twelfth International Display Research Conference (Japan Display '92) pp.547-550". This IPS system has advantages such as a wide viewing angle and low load capacity compared to the conventional TN system, and is a promising technology as an active matrix type liquid crystal display device capable of full-scale CRT replacement.

  However, in the TN method, a vertical electric field is applied using a solid transparent electrode provided on each surface of a pair of substrates sandwiching the liquid crystal layer, whereas in the IPS method, the inner surface of one of the paired substrates Since a horizontal electric field is applied using a striped opaque metal comb electrode provided on the substrate, the aperture ratio is reduced by an area corresponding to the opaque comb electrode, resulting in a low transmittance and a constant luminance. For this purpose, a backlight with higher luminance is required, and there is a specific problem that power consumption increases. Unlike the TN method, the opaque metal electrode is used as the comb electrode in the IPS method. In the IPS method, the in-plane orientation change of the liquid crystal occurs due to the lateral electric field generated in the gap portion of the comb electrode, and the light transmission is controlled. For this reason, the liquid crystal on the electrode that does not actively generate a lateral electric field does not change in-plane orientation due to the lateral electric field, and does not contribute to light transmission. Therefore, a metal electrode that can be collectively formed with the wiring electrode is used. .

In order to solve this problem, the comb electrode is formed of a transparent conductive material such as ITO (Indium Tin Oxide), and the pitch of the arrangement of the comb electrodes is shorter than that of the conventional IPS system. By using a liquid crystal material having a negative dielectric anisotropy, it is possible to change the orientation of all the liquid crystals existing above the transparent comb electrode only by the electric field formed at the edge of the comb electrode. For example, “SHLee, SLLee and HYKim, Asia Display, 1998, pp.371-374” and “SHLee, SLLee, HYKim and TYEom, SID digest, 1999, pp.202-205 ”. In the IPS system in which the liquid crystal material having a negative dielectric anisotropy and the short pitch transparent comb electrode are combined, the transmittance close to that of the TN system can be maintained while maintaining the wide viewing angle characteristic equivalent to that of the IPS system. It is reported in the above-mentioned literature.
Japanese Examined Patent Publication No. 63-21907 `` R. Kiefer, B. Weber, F. Windcheidand G. Baur, Proceedings of the Twelfth International Display Research Conference (Japan Display '92) pp.547-550 '' "SHLee, SLLee and HYKim, Asia Display, 1998, pp.371-374" `` SHLee, SLLee, HYKim and TYEom, SID digest, 1999, pp.202-205 ''

  In the IPS system using the above short pitch transparent comb electrode, the above-mentioned document shows that when the liquid crystal having positive dielectric anisotropy is not negative, the transmittance improvement effect is hardly seen. At the same time. In the IPS system using a short pitch transparent comb electrode, considering the reason why the transmittance improvement effect varies greatly depending on whether the dielectric anisotropy of the liquid crystal material is positive or negative, the pitch of the comb electrode arrangement is short in this system. Therefore, the electric field applied to the liquid crystal as in the conventional IPS method does not become a horizontal electric field in the majority of the liquid crystal layer, but becomes an oblique electric field containing a vertical electric field component in the majority, so that it is used in the TN method and the like. When the liquid crystal having positive dielectric anisotropy is used, the rise of the major axis of the liquid crystal molecule due to the longitudinal electric field component occurs in most of the liquid crystal layer.

  In the IPS method using a short pitch transparent comb electrode, the liquid crystal molecules existing above the transparent comb electrode are changed in orientation as described above, and positively contributes to the light transmission, thereby transmitting more light than the conventional IPS method. Getting rate. Considering the cross-section of the comb electrode, the rotation direction when the liquid crystal molecular long axis rises is reversed when using the liquid crystal material with positive dielectric anisotropy on the right and left sides with the center of the electrode as the boundary line. Since the center of the electrode, which is the boundary line, becomes a disclination line, a low transmittance region is generated in this portion that positively contributes to light transmission by the IPS method originally using a short pitch transparent comb electrode.

  Further, when a liquid crystal material having a positive dielectric anisotropy is combined with an IPS system using short pitch transparent comb electrodes, effective retardation due to rising of liquid crystal molecules is reduced and transmittance is lowered. Here, retardation means a parameter d · Δn where the refractive index anisotropy of the liquid crystal composition is Δn, and the thickness of the liquid crystal layer is d, and the effective Δn is reduced by raising the liquid crystal molecules. As a result, the retardation is reduced.

  As described above, in the IPS method using the short pitch transparent comb electrode, the influence of the vertical electric field component is larger than that in the conventional IPS method. The use of this liquid crystal has a much greater effect of improving the transmittance than the positive liquid crystal. Therefore, in the IPS method using the conventional short pitch transparent comb electrode, the absolute value of the larger dielectric anisotropy that is more widely used than the liquid crystal material having the negative dielectric anisotropy and is advantageous for reducing the driving voltage is The problem is that it is difficult to realize a liquid crystal display device having a transmittance equivalent to that of TN using a liquid crystal material having a smaller rotational viscosity, which is advantageous for high-speed response, and generally having a positive dielectric anisotropy. there were.

  The present invention solves the above problem, and its purpose is to use a liquid crystal material having a negative dielectric anisotropy in an IPS active matrix liquid crystal display device using short pitch transparent comb electrodes. An active matrix liquid crystal display device that achieves the same transmittance as TN using a liquid crystal with positive dielectric constant anisotropy that can reduce drive voltage, speed up response, and reduce costs It is to provide.

  In the IPS system using a short pitch transparent comb electrode, when the liquid crystal material having a positive dielectric anisotropy is used, the rise of the major axis of the liquid crystal molecule is the ratio of the elastic constant K11, which is a physical property value of the liquid crystal material, to K22. It can be reduced by using a liquid crystal composition having a positive dielectric anisotropy having a value of K11 / K22 of 2.4 or more. By using a liquid crystal material having a dielectric anisotropy of 8 or more and a rotational viscosity coefficient of 110 mPa · s or less as a liquid crystal composition having a positive dielectric anisotropy, anisotropy of the negative dielectric constant is obtained. The low driving voltage and high-speed response characteristics that are not practically realized with the liquid crystal composition with high conductivity are possible.

  FIG. 1 shows a liquid crystal having typical positive dielectric anisotropy (Δε = 10.2) in an IPS-type electrode configuration (4 μm in both electrode width and electrode interval) using the same short pitch transparent comb electrode. FIG. 6 shows applied voltage-transmittance characteristics (simulation results) of a pixel non-light-shielding portion when a liquid crystal having negative dielectric anisotropy (Δ∈ = −4.1) is used. The retardation (d · Δn) of the liquid crystal with positive dielectric anisotropy is 0.4 μm (optimized), and the retardation (d · Δn) of the liquid crystal with negative dielectric anisotropy is 0.32 μm.

  From FIG. 1, in the IPS system using a short pitch transparent comb electrode, even when a liquid crystal material having a positive dielectric anisotropy is used, when the spray twist elastic constant ratio K11 / K22 is increased, It can be seen that the peak transmittance approaches that when a liquid crystal having a negative dielectric anisotropy is used. In addition, since the liquid crystal material having a positive dielectric anisotropy has an absolute value of the dielectric anisotropy of 8 which is more than twice the general value of a liquid crystal material having a negative dielectric anisotropy, As shown in FIG. 1, it can be seen that the liquid crystal driving voltage can be reduced.

  FIG. 2 shows the peak transmittance when the spray-twist elastic constant ratio K11 / K22 is changed in an IPS system using a liquid crystal material having a positive dielectric anisotropy and using a short pitch transparent comb electrode. It is a figure represented by ratio with the peak transmittance | permeability at the time of using a liquid crystal material with negative dielectric constant anisotropy. As can be seen from FIG. 2, the peak transmittance sharply increases when the splay-twist elastic constant ratio K11 / K22 is between 2.2 and 2.4, and when K11 / K22 is 2.4 or more, the dielectric constant is anisotropic. It can be seen that even when a liquid crystal material having positive properties is used, a peak transmittance almost equal to that in the negative case can be obtained.

  Further, even when a liquid crystal material having a positive dielectric anisotropy with reduced rise in the major axis of the liquid crystal molecules as described above is used, the rise cannot be eliminated at all. Therefore, the retardation (d · Δn) is 0.28 μm < By setting so as to satisfy d · Δn <0.5 μm, it is possible to correct a decrease in effective retardation due to the rising and to obtain a high transmittance. FIG. 3 shows a short pitch transparent comb electrode IPS type electrode using the same positive dielectric anisotropy liquid crystal material (Δε = 10.2, K11 / K22 = 2.8) as shown in FIG. In the configuration, the change in the peak transmittance when the retardation (d · Δn) is changed is shown. From FIG. 3, it can be seen that by setting the retardation to satisfy 0.28 μm <d · Δn <0.5 μm, the absolute transmittance can be as high as 30% or more, which is equivalent to that of the TN system.

  As described above, according to the present invention, in the IPS mode active matrix liquid crystal display device using the short pitch transparent comb electrode, it is equivalent to the case where the liquid crystal material having negative dielectric anisotropy is used (the same level as the TN mode). It is possible to obtain an active matrix type liquid crystal display device that is realized by using a liquid crystal having positive dielectric anisotropy that can reduce the drive voltage, increase the response speed, and reduce the cost.

  That is, an active matrix liquid crystal display device according to the present invention includes a pair of substrates at least one of which is transparent, a liquid crystal layer made of a liquid crystal composition having a positive dielectric anisotropy disposed between the pair of substrates, In an active matrix liquid crystal display device including a pixel electrode and a counter electrode formed on one of a pair of substrates, and an active element connected to the pixel electrode and the counter electrode, the liquid crystal composition has a splay deformation The ratio K11 / K22 between the elastic constant K11 and the twist deformation elastic constant K22 is 2.4 or more.

  The liquid crystal composition preferably has a dielectric anisotropy of 8 or more and a rotational viscosity coefficient of 110 mPa · s or less. If the rotational viscosity coefficient is larger than this value, a high-speed response within 16.6 msec corresponding to a general video signal frame frequency of 60 Hz becomes difficult, and a high-speed response characteristic corresponding to a video moving image cannot be realized. Further, when the refractive index anisotropy of the liquid crystal composition is Δn and the thickness of the liquid crystal layer is d, the parameter d · Δn preferably satisfies 0.28 μm <d · Δn <0.5 μm.

The pixel electrode and the counter electrode are preferably transparent electrodes such as ITO, and it is desirable to ensure electrical insulation between the pixel electrode and the counter electrode with a transparent insulating film. For example, the pixel electrode can be a short pitch transparent comb electrode, and the counter electrode can be a solid transparent electrode. The transparent insulating film can be made of, for example, SiO ₂ or Si _x N _y .

  In the active matrix liquid crystal display device of the present invention, a storage capacitor can be formed by overlapping of a pixel electrode that applies an electric field to a liquid crystal layer and a counter electrode. Since this storage capacitor portion also contributes to light transmission, unlike the general IPS system, it can be provided in a non-light-shielded region in the pixel region, and the effective aperture ratio of the pixel can be further improved.

  According to the present invention, in an IPS mode active matrix liquid crystal display device using a short pitch transparent comb electrode, a transmittance equivalent to that when a liquid crystal material having a negative dielectric anisotropy is used (as in the TN mode). Thus, it is possible to provide an active matrix liquid crystal display device using a liquid crystal having positive dielectric anisotropy capable of lowering driving voltage, speeding up response, and reducing costs.

  Embodiments of the present invention will be described below with reference to the drawings. Here, an embodiment in which the present invention is applied to an active matrix type color liquid crystal display device will be described. In the following drawings, portions having the same function are denoted by the same reference numerals, and repeated description thereof is omitted.

[Example 1]
1. Plan view 4 of the matrix portion (pixel portion) is a plan view showing one pixel and its periphery of the active matrix type liquid crystal display device of the present invention. As shown in FIG. 4, each pixel includes a gate signal line (scanning signal line or horizontal signal line) GL, a common voltage signal line (counter electrode wiring) CL, and two adjacent drain signal lines (video signal line or The vertical signal line (DL) is arranged in a region intersecting with DL (in a region surrounded by four signal lines). All of these signal lines are formed of opaque metal electrodes. In the drawing, the gate signal line GL and the common voltage signal line CL extend in the left-right direction, and a plurality of gate signal lines GL and common voltage signal lines CL are arranged in the up-down direction. The video signal lines DL extend in the vertical direction, and a plurality of video signal lines DL are arranged in the horizontal direction.

  The pixel electrode PX is formed of an ITO transparent conductive film and is electrically connected to the thin film transistor TFT through a through hole. The counter electrode CT is also formed of ITO and is electrically connected to the common voltage signal line CL. The pixel electrode PX is formed in a comb-like shape, and each is a long and narrow electrode in the vertical direction of the figure. The counter electrode CT is a solid transparent electrode, and controls the optical state of the liquid crystal composition LC by an electric field generated between each pixel electrode PX and the counter electrode CT, thereby controlling display.

  The gate signal line GL is for propagating a gate signal to the thin film transistor element of each pixel, and the drain signal line DL is for supplying a drain signal voltage to the pixel electrode PX of each pixel via the thin film transistor element. The common voltage signal line CL is for supplying a common voltage to the counter electrode CT of each pixel. The common voltage signal line CL formed of the above-described metal electrode is formed so as to surround the drain signal line DL, thereby preventing unnecessary light leakage on the side of the drain line caused by the electric field generated by the potential of the drain electrode. It also serves as a light shielding layer to prevent.

  The electrode width W and the electrode interval L of the comb-like pixel electrode PX are changed depending on the liquid crystal material to be used. This is because the electric field strength that achieves the maximum transmittance differs depending on the liquid crystal material, so the electrode spacing is set according to the liquid crystal material, and the maximum amplitude of the signal voltage set by the withstand voltage of the drain signal drive circuit (signal side driver) to be used This is because the maximum transmittance can be obtained within the above range. In this embodiment, the electrode width W is 4 microns and the electrode interval L is 5 microns.

2. 5 is a cross-sectional view taken along the line II-II in FIG. 4, FIG. 6 is a cross-sectional view of the thin film transistor TFT taken along the line III-III in FIG. 4, and FIG. It is a figure which shows the cross section of the storage capacity Cstg formation part in an IV-IV cutting line.

  As shown in FIGS. 5 to 7, a thin film transistor TFT, a storage capacitor Cstg, and an electrode group are formed on the lower transparent glass substrate SUB1 side based on the liquid crystal composition layer LC, and a color filter is formed on the upper transparent glass substrate SUB2 side. A FIL and a light blocking black matrix pattern BM are formed. In addition, alignment films ORI1 and ORI2 for controlling the initial alignment of the liquid crystal are provided on the inner surfaces (liquid crystal LC side) of the transparent glass substrates SUB1 and SUB2, and the outer surfaces of the transparent glass substrates SUB1 and SUB2. Are provided with polarizing plates POL1 and POL2.

As shown in FIGS. 5 to 7, in this embodiment, the solid ITO counter electrode CT is in the same layer as the gate signal line GL, and the pixel electrode PX of the comb-like ITO is on the protective insulating film PSV formed on the signal line DL. It is the structure formed in. Accordingly, in the cross-sectional view, PX and CT are sandwiched between the gate insulating film GI and the protective insulating film PSV to form the storage capacitor Cstg. The common signal line CL is in contact with the counter electrode CT in the same layer. The gate insulating film GI and the protective insulating film PSV can be formed of SiO ₂ or Si _x N _y .

3. Below TFT substrate will be described in detail a configuration of the lower transparent glass substrate SUB1 side (TFT substrate).
3.1. Thin film transistor TFT
The thin film transistor TFT whose sectional view is shown in FIG. 6 operates such that when a positive bias is applied to the gate electrode GT, the channel resistance between the source and the drain decreases, and when the bias is set to zero, the channel resistance increases. As shown in FIG. 6, the thin film transistor TFT includes a gate electrode GT, an insulating film GI, an i-type semiconductor layer AS made of i-type (intrinsic, intrinsic, non-doped with conductivity-determining impurity) amorphous silicon (Si). And a pair of source electrode SD1 and drain electrode SD2. It should be understood that the source and drain are originally determined by the bias polarity between them, and the polarity is inverted during operation in the circuit of this liquid crystal display device, so that the source and drain are interchanged during operation. However, in the following description, for convenience, one is fixed as a source and the other is fixed as a drain.

3.2. Gate electrode GT
The gate electrode GT is formed continuously with the gate signal line GL, and a part of the gate signal line GL is configured to be the gate electrode GT. The gate electrode GT is a portion exceeding the active region of the thin film transistor TFT. In this example, the gate electrode GT is formed of a single-layer conductive film g1. As the conductive film g1, for example, a chromium-molybdenum alloy (Cr-Mo) film formed by sputtering is used, but it is not limited thereto. Further, two layers of different metals may be formed.

3.3. Gate signal line GL
The gate signal line GL is composed of a conductive film g1. The conductive film g1 of the gate signal line GL is formed in the same manufacturing process as that of the conductive film g1 of the gate electrode GT and is integrally formed. The gate signal line GL supplies a gate voltage VG from an external circuit to the gate electrode GT. In this example, a chromium-molybdenum alloy (Cr-Mo) film formed by sputtering, for example, is used as the conductive film g1. The material of the gate signal line GL and the gate electrode GT is not limited to the chromium-molybdenum alloy. For example, a two-layer structure in which aluminum or an aluminum alloy is wrapped with chromium-molybdenum to reduce resistance can be used. Good.

3.4. Common voltage signal line CL
The common voltage signal line CL is composed of a conductive film g1. The conductive film g1 of the common voltage signal line CL is formed in the same manufacturing process as the conductive film g1 of the gate electrode GT, the gate signal line GL and the counter electrode CT, and is integrally formed with the counter electrode CT. A common voltage Vcom is supplied from an external circuit to the counter electrode CT through the common voltage signal line CL. The material of the common voltage signal line CL is not limited to the chromium-molybdenum alloy. For example, a two-layer structure in which aluminum or an aluminum alloy is encased in chromium-molybdenum may be used to reduce resistance.

3.5. Insulating film GI
The insulating film GI is used as a gate insulating film for applying an electric field to the semiconductor layer AS together with the gate electrode GT in the thin film transistor TFT. The insulating film GI is formed above the gate electrode GT and the gate signal line GL. As the insulating film GI, for example, a silicon nitride film formed by plasma CVD is selected, and is formed to a thickness of 2000 to 4500 mm (about 3500 mm in this embodiment). The insulating film GI also functions as an interlayer insulating film of the gate signal line GL and the common voltage signal line CL and the drain signal line DL, and contributes to their electrical insulation.

3.6. i-type semiconductor layer AS
The i-type semiconductor layer AS is made of amorphous silicon and has a thickness of 150 to 2500 mm (in this embodiment, a film thickness of about 1200 mm). The layer d0 is an N (+)-type amorphous silicon semiconductor layer doped with phosphorus (P) for ohmic contact, and only where the i-type semiconductor layer AS is present on the lower side and the conductive layer d1 is present on the upper side. Is left behind. The i-type semiconductor layer AS and the layer d0 are also provided between the gate signal line GL and the intersection (crossover portion) of the common voltage signal line CL and the drain signal line DL. This crossing portion i-type semiconductor layer AS reduces a short circuit between the gate signal line GL and the counter voltage signal line CL and the drain signal line DL at the crossing portion.

3.7. Source electrode SD1, drain electrode SD2
Each of the source electrode SD1 and the drain electrode SD2 includes a conductive film d1 that is in contact with the N (+) type semiconductor layer d0. Since the Cr—Mo film has a low stress, it can be formed with a relatively large thickness, which contributes to a reduction in wiring resistance. In addition, the Cr—Mo film has good adhesion to the N (+) type semiconductor layer d0.

3.8. Drain signal line DL
The drain signal line DL is configured in the same layer as the source electrode SD1 and the drain electrode SD2. The drain signal line DL is formed integrally with the drain electrode SD2. In this example, the conductive film d1 is made of a chromium-molybdenum alloy (Cr-Mo) film formed by sputtering, and is formed to a thickness of 500 to 3000 mm (in this embodiment, about 2500 mm). Since the Cr—Mo film has a low stress, it can be formed with a relatively large thickness, which contributes to a reduction in wiring resistance. In addition, the Cr—Mo film has good adhesion to the N (+) type semiconductor layer d0. As the conductive film d1, a refractory metal (Mo, Ti, Ta, W) film or a refractory metal silicide (MoSi ₂ , TiSi ₂ , TaSi ₂ , WSi ₂ ) film may be used in addition to the Cr—Mo film, Alternatively, a laminated structure with aluminum or the like may be used.

3.9. Storage capacity Cstg
The conductive film ITO2 that forms the storage capacitor Cstg is formed so as to overlap the conductive film ITO1 that forms the counter electrode CT. As is apparent from FIG. 7, this superposition forms a storage capacitor (capacitance element) Cstg between the pixel electrode PX and the counter electrode CT. The dielectric film of the storage capacitor Cstg is composed of a protective film PSV and an insulating film GI used as a gate insulating film of the thin film transistor TFT. As shown in FIG. 4, in a plan view, the storage capacitor Cstg is formed as an overlapping portion of the pixel electrode PX and the counter electrode CT in the pixel.

3.10. Protective film PSV
A protective film PSV is provided on the thin film transistor TFT. The protective film PSV is provided mainly to protect the thin film transistor TFT from moisture and the like, and a film having high transparency and good moisture resistance is used. The protective film PSV is made of, for example, a silicon oxide film or a silicon nitride film formed by a plasma CVD apparatus, and is formed with a thickness of about 0.1 to 1 μm. The protective film PSV is removed so as to expose the external connection terminals DTM and GTM. Regarding the thickness relationship between the protective film PSV and the insulating film GI, the former is thickened considering the protective effect, and the latter is thinned considering the mutual conductance gm of the transistor. The protective film PSV may have a laminated structure with a thick organic film such as polyimide.

3.11. Pixel electrode PX
The pixel electrode PX is made of ITO, which is a transparent conductor, and forms a storage capacitor with the counter electrode CT that is also made of ITO.

3.12. Counter electrode CT
The counter electrode CT is made of ITO and is connected to the common voltage signal line CL in the same layer. A common voltage Vcom is applied to the counter electrode CT. In this embodiment, the common voltage Vcom is a feed generated when the thin film transistor element TFT is turned off from an intermediate DC potential between the minimum level drive voltage Vdmin and the maximum level drive voltage Vdmax applied to the drain signal line DL. The potential is set lower by the through voltage ΔVs.

4). Color Filter Substrate Next, returning to FIGS. 4 and 5, the configuration of the upper transparent glass substrate SUB2 side (color filter substrate) will be described in detail.

4.1. Light shielding film BM
On the upper transparent glass substrate SUB2 side, transmitted light from an unnecessary gap (gap other than the pixel electrode PX and the counter electrode CT) is emitted to the display surface side like the BM boundary shown by a thick line in FIG. The light shielding film BM (so-called black matrix) is formed so as not to lower the contrast ratio and the like. The light shielding film BM also serves to prevent external light or backlight light from entering the i-type semiconductor layer AS. That is, the i-type semiconductor layer AS of the thin film transistor TFT is sandwiched by the upper and lower light shielding films BM and the large gate electrode GT (FIG. 6), and is not exposed to external natural light or backlight light. The light shielding film BM shown in FIG. 4 is shown for only one pixel, but is formed so that the inside is an opening for every pixel. Moreover, this pattern is an example.

  In a portion where the electric field direction is disturbed, such as at the end of the comb electrode, the display of the portion corresponds to the video information in the pixel on a one-to-one basis, and in black, it is black, and in white, it is white. Therefore, it can be used as a part of the display. However, the light shielding film BM must have light shielding properties. In particular, the gap between the pixel electrode PX and the counter electrode CT requires an optical density of 3 or more in order to suppress crosstalk (vertical smear) in the drain signal line direction.

The light shielding film BM may be formed of a conductive metal such as Cr, but is preferably formed of a highly insulating film so as not to affect the electric field between the pixel electrode PX and the counter electrode CT. In this embodiment, a black organic pigment is mixed in a resist material and formed to a thickness of about 1.2 μm. In order to improve the light shielding property, carbon and titanium oxide (TixOy) may be mixed so long as the insulating property can maintain 10 ⁸ Ωcm or more without affecting the electric field in the liquid crystal composition layer. .

  Further, since the light shielding film BM partitions the effective display area of each row, it also serves to clarify the outline of the pixels of each row. The light shielding film BM is also formed in a frame shape in the peripheral portion, and the pattern is formed continuously with the pattern of the matrix portion shown in FIG. The peripheral light shielding film BM extends outside the seal portion SL (see FIG. 10), prevents leakage light such as reflected light from a mounting machine such as a personal computer from entering the matrix portion, It also prevents light from leaking outside the display area. On the other hand, the light-shielding film BM is retained about 0.3 to 1.0 mm from the edge of the substrate SUB2, and is formed so as to avoid the cutting area of the substrate SUB2.

4.2. Color filter FIL
The color filter FIL is formed in a stripe shape by repeating red, green, and blue at a position facing the pixel. The color filter FIL is formed so as to overlap the light shielding film BM.

  The color filter FIL can be formed as follows. First, a dyeing base material such as an acrylic resin is formed on the surface of the upper transparent glass substrate SUB2, and the dyeing base material other than the red filter forming region is removed by a photolithography technique. Thereafter, the dyed substrate is dyed with a red pigment, and a fixing process is performed to form a red filter R. Next, a green filter G and a blue filter B are sequentially formed by performing the same process. A dye may be used for dyeing.

4.3. Overcoat film OC
The overcoat film OC is provided for preventing leakage of the dye of the color filter FIL to the liquid crystal composition layer LC and for flattening a step by the color filter FIL and the light shielding film BM. The overcoat film OC is formed of a transparent resin material such as an acrylic resin or an epoxy resin. Further, an organic film such as polyimide having good fluidity may be used as the overcoat film.

5. Liquid crystal layer and deflector Next, the liquid crystal layer, orientation film, described polarizing plate or the like.
5.1. The liquid crystal layer liquid crystal composition LC has a positive dielectric anisotropy Δε, a value of 9.2, a refractive index anisotropy Δn of 0.091 (589 nm, 20 ° C.), an elastic constant ratio K11 / A nematic liquid crystal having a K22 of 2.6 was used. In this example, in order to increase the elastic constant ratio K11 / K22, “H. Takatsu, K. Takeuchi, M. Sasaki, H. Ohnishi and M. Schdt, Molecular Crystal, Liquid Crystal, 1991, vo.l206, pp. The liquid crystal composition containing a molecule composed of fluorine-modified cyclohexane or bicyclohexane having a methoxypropyl or alkenyl end group described in “159-177” was used. Further, the liquid crystal composition used in this example has a rotational viscosity coefficient as low as 91 mPa · s. The configuration of the liquid crystal composition is not limited to the above composition, and any composition may be used as long as the elastic constant ratio K11 / K22 is 2.4 or more.

  The thickness (gap) of the liquid crystal composition layer was 4.0 μm, and the retardation Δn · d was 0.36 μm. Combined with an alignment film and a polarizing plate, which will be described later, the maximum transmittance can be obtained when the liquid crystal molecules are rotated about 45 ° from the initial alignment direction to the electric field direction, and the transmitted light has almost no wavelength dependence within the visible light range. To be able to get. The thickness (gap) of the liquid crystal composition layer is controlled by polymer beads subjected to vertical alignment treatment. This stabilizes the orientation of the liquid crystal molecules around the beads during black display, obtains a good black level, and improves the contrast ratio.

The specific resistance of the liquid crystal composition is 10 ⁹ Ωcm or more and 10 ¹⁴ Ωcm or less, preferably 10 ¹¹ Ωcm or more and 10 ¹³ Ωcm or less. In this method, even when the resistance of the liquid crystal composition is low, the voltage charged between the pixel electrode and the counter electrode can be sufficiently maintained, and the lower limit is 10 ⁹ Ωcm, preferably 10 ¹¹ Ωcm. This is because the pixel electrode and the counter electrode are formed on the same substrate. Further, if the resistance is too high, it is difficult to relieve static electricity that has entered during the manufacturing process, so that it is 10 ¹⁴ Ωcm or less, preferably 10 ¹³ Ωcm or less.

5.2. As the alignment film ORI, polyimide is used. The initial alignment directions RDR are parallel to each other on the upper and lower substrates. As the method for imparting the initial alignment direction, rubbing is the most common, but there is also oblique deposition. The relationship between the initial alignment direction RDR and the applied electric field direction EDR is shown in FIG. In this embodiment, the initial alignment direction RDR is set to about 75 ° with respect to the horizontal direction. In the configuration of the present invention using a liquid crystal composition having a positive dielectric anisotropy, the angle formed between the initial alignment direction RDR and the applied electric field direction EDR must be 45 ° or more and less than 90 °.

5.3. As the polarizing plate POL, a conductive polarizing plate is used. The polarizing transmission axis MAX1 of the lower polarizing plate POL1 is aligned with the initial alignment direction RDR, and the polarizing transmission axis MAX2 of the upper polarizing plate POL2 is Make orthogonal. FIG. 8 shows the relationship. As a result, a normally closed characteristic in which the transmittance increases as the voltage applied to the pixel of the present invention (the voltage between the pixel electrode PX and the counter electrode CT) increases can be obtained. When it is added, a good quality black display can be achieved.

In this embodiment, the polarizing plate is made conductive to take measures against display defects and EMI due to external static electricity. Concerning conductivity, it is desirable that the sheet resistance is 10 ⁸ Ω / □ or less if it is only for countermeasures against the effects of static electricity, and 10 ⁴ Ω / □ or less if measures are also taken against EMI. Moreover, you may provide a conductive layer in the back surface (surface which adhere | attaches a polarizing plate) of the clamping surface of the liquid crystal composition of a glass substrate.

6). Diagram of the surrounding elements 9 is a plan view showing a main part of the surrounding elements (AR) of the display panel PNL including the upper and lower glass substrates SUB1, SUB2. FIG. 10 is a diagram showing a cross section near the external connection terminal GTM to which the scanning circuit is to be connected on the left side, and a cross section near the seal portion where there is no external connection terminal on the right side.

  In the manufacture of this panel, if small size divided from simultaneously processing a plurality fraction of the device in one glass substrate for improving throughput, standardized any breed for shared manufacturing facilities if large size After processing the glass substrate of the size, the glass substrate is reduced to a size suitable for each type, and in any case, the glass is cut after going through a single process. FIGS. 9 and 10 show the latter example. Both of FIGS. 9 and 10 show the upper and lower substrates SUB1 and SUB2 after cutting, and LN indicates an edge before the cutting of both substrates.

  In any case, the size of the upper substrate SUB2 is larger than that of the lower substrate SUB1 so that the external connection terminal groups Tg and Td and the terminal CTM (in the upper side and the left side in FIG. 9) are exposed in the completed state. Is also restricted to the inside. The terminal groups Tg and Td are respectively a tape carrier package TCP (FIG. 16) on which an integrated circuit chip CHI (see FIG. 16) is mounted with a scanning circuit connecting terminal GTM and a drain signal circuit connecting terminal DTM, which will be described later. (Refer to the unit).

  The lead-out wiring from the matrix portion of each group to the external connection terminal portion is inclined as it approaches both ends. This is to match the terminals DTM and GTM of the display panel PNL to the arrangement pitch of the package TCP and the connection terminal pitch in each package TCP. The counter electrode terminal CTM is a terminal for applying a common voltage to the counter electrode CT from an external circuit. The common voltage signal line CL of the matrix portion is drawn to the opposite side (right side in FIG. 9) of the scanning circuit terminal GTM, and the common voltage signal lines are grouped together by the common bus line CB and connected to the counter electrode terminal CTM. Yes.

  A seal pattern SL is formed between the transparent glass substrates SUB1 and SUB2 so as to seal the liquid crystal LC along the edge except for the liquid crystal sealing inlet INJ. The sealing material is made of, for example, an epoxy resin. The layers of the alignment films ORI1 and ORI2 are formed inside the seal pattern SL. The polarizing plates POL1 and POL2 are respectively formed on the outer surfaces of the lower transparent glass substrate SUB1 and the upper transparent glass substrate SUB2. The liquid crystal LC is sealed in a region partitioned by a seal pattern SL between the lower alignment film ORI1 and the upper alignment film ORI2 that set the direction of liquid crystal molecules. The lower alignment film ORI1 is formed on the protective film PSV1 on the lower transparent glass substrate SUB1 side.

  In this liquid crystal display device, various layers are separately stacked on the lower transparent glass substrate SUB1 side and the upper transparent glass substrate SUB2 side, and a seal pattern SL is formed on the substrate SUB2 side, so that the lower transparent glass substrate SUB1 and the upper transparent glass substrate SUB2 are formed. And the liquid crystal LC is injected from the opening INJ of the sealing material SL, the injection port INJ is sealed with an epoxy resin or the like, and the upper and lower substrates are cut.

7). Gate Terminal Part FIG. 11 is a diagram showing a connection structure from the gate signal line GL of the display matrix to the external connection terminal GTM. FIG. 1111 (a) is a plane, and FIG. 11 (b) shows a cross section taken along the line BB of FIG. 11 (a). The figure corresponds to the vicinity of the lower left of FIG. 9, and the diagonal wiring portion is represented by a straight line for convenience. In the drawing, the Cr—Mo layer g1 is hatched for easy understanding.

  The gate terminal GTM is composed of a Cr—Mo layer g1, and a transparent conductive layer ITO1 for further protecting the surface and improving the reliability of connection with a TCP (Tape Carrier Package). This transparent conductive layer ITO1 uses a transparent conductive film ITO. In the plan view, the insulating film GI and the protective film PSV are formed on the right side, and the terminal part GTM located at the left end is exposed from them so as to be able to make electrical contact with an external circuit.

  In the figure, only one pair of the gate line GL and the gate terminal is shown, but actually, a plurality of such pairs are arranged vertically to form a terminal group Tg (FIG. 13), and the left end of the gate terminal. In the manufacturing process, is extended beyond the cutting region of the substrate and short-circuited by the wiring SHg (not shown). This is useful for preventing electrostatic breakdown during rubbing of the alignment film ORI1 during the manufacturing process.

8). Drain terminal DTM
FIG. 12 is a diagram showing a connection from the drain signal line DL to its external connection terminal DTM. FIG. 12A shows the plane, and FIG. 12B shows a cross section taken along the line BB in FIG. 9 corresponds to the vicinity of the upper right of FIG. 9, and the direction of the drawing is changed for convenience, but the right end corresponds to the upper end of the substrate SUB1.

  The external connection drain terminals DTM are arranged in the vertical direction, and the drain terminals DTM constitute a terminal group Td (subscript omitted) as shown in FIG. 16, and are further extended beyond the cutting line of the substrate SUB1, during the manufacturing process. Are all short-circuited to each other by a wiring SHd (not shown) in order to prevent electrostatic breakdown. The drain connection terminal DTM is formed of the transparent conductive layer ITO1, and is connected to the drain signal line DL at a portion where the protective film PSV1 is removed. This transparent conductive film ITO1 uses the transparent conductive film ITO as in the case of the gate terminal GTM. A layer d1 having the same level as that of the drain signal line DL is formed in the lead wiring from the matrix portion to the drain terminal portion DTM.

9. Counter electrode terminal CTM
FIG. 13 is a diagram showing a connection from the common voltage signal line CL to the external connection terminal CTM. FIG. 13A shows the plane, and FIG. 13B shows a cross section taken along the line BB in FIG. 13A. This figure corresponds to the vicinity of the upper left in FIG.

  The common voltage signal lines CL are gathered together by a common bus line CB and led out to the counter electrode terminal CTM. The common bus line CB has a structure in which a conductive layer g3 (not shown) is stacked on the conductive layer g1, and these are electrically connected by a transparent conductive layer ITO1. This is to reduce the resistance of the common bus line CB so that the common voltage is sufficiently supplied from the external circuit to each common voltage signal line CL. This structure is characterized in that the resistance of the common bus line can be lowered without adding a new conductive layer.

  The counter electrode terminal CTM has a structure in which a transparent conductive layer ITO1 is laminated on a conductive layer g1. This transparent conductive film ITO1 uses a transparent conductive film ITO as in the case of other terminals. The transparent conductive layer ITO1 covers the conductive layer g1 with a transparent conductive layer ITO1 having good durability in order to protect the surface and prevent electric corrosion and the like. Further, the connection between the transparent conductive layer ITO1 and the conductive layer g1 and the conductive layer d1 is conducted by forming a through hole via the protective film PSV and the insulating film GI.

10. FIG. 14 shows a connection diagram of an equivalent circuit of the display device overall equivalent circuit display matrix section and its peripheral circuits. Although this figure is a circuit diagram, it is drawn corresponding to the actual geometric arrangement. A matrix array in which a plurality of pixels are arranged two-dimensionally is formed. In the figure, X means a drain signal line DL, and subscripts G, B, and R correspond to green, blue, and red pixels, respectively. Has been granted. Y means the gate signal line GL, and subscripts 1, 2, 3,..., End are given according to the order of scanning timing. The gate signal line Y (subscript omitted) is connected to the vertical scanning circuit V, and the drain signal line X (subscript omitted) is connected to the drain signal drive circuit H. SUP supplies information for a CRT (cathode ray tube) from a power supply circuit and a host (high-order processing unit) for obtaining a stabilized voltage source obtained by dividing a plurality of voltages from one voltage source for a TFT liquid crystal display device. A circuit including a circuit for exchanging information.

11. Driving Method FIG. 15 shows a driving waveform of the liquid crystal display device of this embodiment. The gate signal VG takes an on level every scanning period, and the other takes an off level. The drain signal voltage VD is applied so that the positive and negative electrodes are inverted every frame and transmitted to one pixel with an amplitude twice that of the voltage to be applied to the liquid crystal layer. Here, the polarity of the drain signal voltage VD is inverted every column, and the polarity is inverted every two rows. Accordingly, the pixel whose polarity is inverted is configured to be vertically and horizontally (dot inversion driving), and flicker and crosstalk (smear) can be hardly generated.

  Further, the common voltage VC is set to a voltage obtained by deducting a certain amount from the center voltage of the polarity inversion of the drain signal voltage. This corrects the feedthrough voltage generated when the thin film transistor element changes from on to off, and is performed to apply an alternating voltage VLC with a small direct current component to the liquid crystal (when the direct current is applied to the liquid crystal, (Because afterimage, deterioration, etc. become severe).

12 Display panel PNL and drive circuit board PCB1
FIG. 16 is a top view showing a state in which the drain signal driving circuit H and the vertical scanning circuit V are connected to the display panel PNL shown in FIG. CHI is a driving IC chip for driving the display panel PNL (the lower five are driving IC chips on the vertical scanning circuit side, and the ten left ones are driving IC chips on the drain signal driving circuit side). TCP is a tape carrier package in which a driving IC chip CHI is mounted by a tape automated bonding method (TAB), and PCB 1 is a driving circuit board on which the above-described TCP, capacitor, etc. are mounted. It is divided into two for the gate signal driving circuit.

  FGP is a frame ground pad, and a spring-shaped piece cut into the shield case SHD is soldered. FC is a flat cable that electrically connects the lower drive circuit board PCB1 and the left drive circuit board PCB1. As shown in the figure, a flat cable FC is used in which a plurality of lead wires (phosphor bronze material Sn plated) are sandwiched and supported by a striped polyethylene layer and a polyvinyl alcohol layer.

13. Manufacturing Method Next, a manufacturing method on the substrate SUB1 side of the liquid crystal display device described above will be described with reference to FIGS. In the figure, the abbreviations of process names are shown in the center, the thin film transistor TFT portion shown in FIG. 6 is shown on the left side, and the processing flow viewed in the cross-sectional shape near the gate terminal shown in FIG. Steps A to F are divided according to each photo processing, and any cross-sectional view of each step shows a stage where the processing after the photo processing is finished and the photoresist is removed. Photoprocessing refers to a series of operations from application of a photoresist to selective exposure using a mask and development thereof. Hereinafter, the process A to the process C will be described with reference to FIG. 17, and the process D to the process F will be described with reference to FIG. 18, but repeated description will be avoided.

  (A) On the lower transparent glass substrate SUB1 made of step AAN635 glass (trade name), a conductive film ITO1 made of ITO having a thickness of 100 mm is provided by sputtering. After the photographic processing, the conductive film ITO1 is selectively etched with an HBr solution. Thereby, the counter electrode CT is formed.

  (B) Step B Next, a conductive film g1 made of Cr having a film thickness of 2000 mm is provided by sputtering. After the photographic processing, the conductive film g1 is selectively etched with ceric ammonium nitrate. Accordingly, the gate line connecting the gate electrode GT, the gate signal line GL, the common voltage signal line CL, the gate terminal GTM, the first conductive layer of the common bus line CB1, the first conductive layer of the counter electrode terminal CTM1, and the gate terminal GTM. SHg (not shown) is formed. Here, the electrode material is not limited to Cr, and may be Mo, Ti, Ta, W, or an alloy thereof.

(C) Step C Ammonia gas, silane gas, and nitrogen gas are introduced into the plasma CVD apparatus to provide a Si nitride film having a thickness of 3500 mm, and silane gas and hydrogen gas are introduced into the plasma CVD apparatus to have a thickness of 1200 mm. After providing the i-type amorphous Si film, hydrogen gas and phosphine gas are introduced into the plasma CVD apparatus to provide an N (+)-type amorphous Si film having a thickness of 300 mm. After the photographic processing, the N (+) type amorphous Si film and the i type amorphous Si film are selectively etched using SF ₆ and CCl ₄ as dry etching gases, thereby forming the i type semiconductor layer AS. Form an island.

  (D) Step D A conductive film d1 made of Cr having a thickness of 300 mm is provided by sputtering. After the photo processing, the conductive film d1 is etched with the same solution as in the process B, and the drain signal line DL, the source electrode SD1, the drain electrode SD2, the first conductive layer of the common bus line CB2, and the bus line that short-circuits the drain terminal DTM. SHd (not shown) is formed. Here, the electrode material is not limited to Cr, and may be Mo, Ti, Ta, W, or an alloy thereof.

Next, by introducing CCl ₄ and SF ₆ into a dry etching apparatus and etching the N (+) type amorphous Si film, the N (+) type semiconductor layer d0 between the source and the drain is selectively formed. Remove. After patterning the conductive film d1 with a mask pattern, the N (+) type semiconductor layer d0 is removed using the conductive film d1 as a mask. That is, the N (+) type semiconductor layer d0 remaining on the i type semiconductor layer AS is removed by self-alignment except for the conductive film d1. At this time, since the N (+) type semiconductor layer d0 is etched so that the entire thickness thereof is removed, the surface portion of the i type semiconductor layer AS is also slightly etched, but the degree is controlled by the etching time. do it.

(E) Step E Ammonia gas, silane gas, and nitrogen gas are introduced into a plasma CVD apparatus to provide a Si nitride film having a thickness of 0.4 μm. After the photo processing, the protective film PSV and the insulating film GI are patterned by selectively etching the Si nitride film using SF ₆ as a dry etching gas.

  (F) Step F A conductive film ITO2 made of ITO having a thickness of 120 mm is provided by sputtering. After the photographic processing, the conductive film ITO2 is selectively etched with an HBr solution. Thereby, the pixel electrode PX is formed.

14 Characteristics of this Example The transmittance of the pixel ratio light-shielding portion of the liquid crystal display element configured in this example is 32%, and the total panel transmittance including factors such as pixel aperture ratio and color filter transmittance is 6. A panel transmittance of 5%, almost the same level as that of the TN system, was obtained. In addition, the absolute value of dielectric anisotropy is 9.2, which is more than twice the absolute value of dielectric anisotropy of a generally known liquid crystal material having a negative dielectric anisotropy. Short pitch transparent comb combined with a liquid crystal material having a negative dielectric constant anisotropy. The driving voltage is suppressed lower than both the IPS method using a tooth electrode and the IPS method combined with a liquid crystal having a positive dielectric anisotropy, and driving with a 5 V breakdown voltage drain driver is possible. In addition, a liquid crystal material having a negative dielectric anisotropy, which is generally known, is difficult to obtain with a low viscosity positive liquid crystal material having a positive dielectric anisotropy. .

[Example 2]
As the liquid crystal material, nematic liquid crystal having a positive dielectric anisotropy Δε, a value of 10.5, a refractive index anisotropy Δn of 0.113, and an elastic constant ratio K11 / K22 of 2.4 is used. An active matrix liquid crystal display device was produced in the same manner as in Example 1 except that the thickness (gap) of the liquid crystal composition layer was 4.2 μm and the retardation Δn · d was 0.47 μm. The liquid crystal composition used in this example has a rotational viscosity coefficient as low as 95 mPa · s.

  The transmittance of the pixel ratio light-shielding portion of the liquid crystal display element of Example 2 is 30%, and the total panel transmittance including factors such as pixel aperture ratio and color filter transmittance is 6.1%. The panel transmittance of the same level as the TN system similar to 1 was obtained, and a faster response was possible.

Example 3
As the liquid crystal material, nematic liquid crystal having a positive dielectric anisotropy Δε, a value of 8.6, a refractive index anisotropy Δn of 0.076, and an elastic constant ratio K11 / K22 of 3.0 is used. An active matrix liquid crystal display device was produced in the same manner as in Example 1 except that the thickness (gap) of the liquid crystal composition layer was 4.2 μm and the retardation Δn · d was 0.32 μm. The liquid crystal composition used in this example has a rotational viscosity coefficient of 108 mPa · s.

  The transmittance of the pixel ratio light-shielding portion of the liquid crystal display element of Example 2 is 32%, and the total panel transmittance including factors such as pixel aperture ratio and color filter transmittance is 6.4%. The panel transmittance almost equal to that of the TN system similar to that in Example 1 was obtained, and further high-speed response was possible.

[Comparative Example 1]
In Example 1 above, as the liquid crystal composition, the dielectric anisotropy Δε is positive, the value is 10.2, the refractive index anisotropy Δn is 0.081 (589 nm, 20 ° C.), and the elastic constant ratio K11. A liquid crystal display device was produced in the same manner as in Example 1 except that nematic liquid crystal having a / K22 of 1.3 was used. The rotational viscosity coefficient of the liquid crystal composition is 160 mPa · s. The retardation Δn · d was 0.4 μm.

  The transmittance of the pixel ratio light shielding portion of the liquid crystal display element of Comparative Example 1 is 24%, and the total panel transmittance including factors such as the pixel aperture ratio and the color filter transmittance is 4.8%, which is an IPS system. The panel transmittance remained at the same level. Further, the response characteristic was that the white / black response time was about 40 msec, and the response speed was much slower than 16 msec, which is a standard for video animation.

[Comparative Example 2]
In Example 1, the liquid crystal composition has a positive dielectric anisotropy Δε and a value of 8.6, a refractive index anisotropy Δn of 0.0871, and an elastic constant ratio K11 / K22 of 2.1. A liquid crystal display device was produced in the same manner as in Example 1 except that the nematic liquid crystal was used. The rotational viscosity coefficient of the liquid crystal composition is 125 mPa · s. The retardation Δn · d was 0.36 μm.

  The transmittance of the pixel ratio light shielding portion of the liquid crystal display element of Comparative Example 2 is 27%, and the total panel transmittance including factors such as the pixel aperture ratio and the color filter transmittance is 5.5%. The remarkable effect of improving the panel transmittance as in the invention was not obtained. Further, the response characteristic was a white / black response time of about 30 msec.

The comparison figure of the applied voltage-transmittance characteristic of the short pitch transparent comb electrode IPS system using a liquid crystal material with positive dielectric anisotropy and a negative liquid crystal material. The figure which shows the relationship between the splay twist elastic constant ratio K11 / K22 of liquid crystal material with positive dielectric anisotropy and peak transmittance. The figure which shows the relationship between the retardation at the time of using a liquid crystal material with positive dielectric anisotropy, and peak transmittance | permeability. The principal part top view which shows one pixel of an example of the liquid crystal display part of an active matrix type color liquid crystal display device, and its periphery. Sectional drawing of the pixel in the II-II cutting line of FIG. Sectional drawing of the thin-film transistor element TFT in the III-III cutting line of FIG. FIG. 5 is a cross-sectional view of the storage capacitor Cstg taken along the line IV-IV in FIG. 4. The figure which shows the relationship between an applied electric field direction, a rubbing direction, and a polarizing plate transmission axis. The top view for demonstrating the structure of the matrix peripheral part of a display panel. The figure which shows the panel edge part without a gate signal terminal on the left side and an external connection terminal on the right side. The top view and sectional drawing which show an example of the structure of the connection part vicinity of the gate terminal GTM and the gate wiring GL. The top view and sectional drawing which show an example of the structure of the connection part vicinity of the drain terminal DTM and the drain signal line DL. The top view and sectional drawing which show an example of the structure of the connection part vicinity of the counter electrode terminal CTM, the common bus line CB, and the common voltage signal line CL. The circuit diagram containing the matrix part of an active matrix type color liquid crystal display device, and its periphery. The figure which shows the drive waveform of the active matrix type color liquid crystal display device of this invention. The top view which shows the state which mounted the peripheral drive circuit on the liquid crystal display panel. The figure explaining manufacturing process AC of the board | substrate SUB1 side. The figure explaining manufacturing process DF on the board | substrate SUB1 side.

Explanation of symbols

SUB ... Transparent glass substrate, GL ... Gate signal line, DL ... Drain signal line, CL ... Common voltage signal line,
PX ... pixel electrode, CT ... counter electrode,
GI ... insulating film, GT ... gate electrode, AS ... i-type semiconductor layer,
SD: source electrode or drain electrode, PSV: protective film, BM: light shielding film,
LC ... Liquid crystal, TFT ... Thin film transistor, PH ... Through hole,
g, d ... conductive film, ITO ... transparent conductive film, Cstg ... storage capacity,
GTM ... Gate terminal, DTM ... Drain terminal, CB ... Common bus line, CTM ... Counter electrode terminal, SHD ... Shield case, PNL ... Liquid crystal display panel

Claims (4)

  A pair of substrates at least one of which is transparent, a liquid crystal layer made of a liquid crystal composition having a positive dielectric anisotropy disposed between the pair of substrates, and one of the pair of substrates. In an active matrix liquid crystal display device including a pixel electrode and a counter electrode, and an active element connected to the pixel electrode and the counter electrode, the liquid crystal composition has a splay deformation elastic constant K11 and a twist deformation elastic constant K22. An active matrix liquid crystal display device, wherein the ratio K11 / K22 is 2.4 or more.   2. The active matrix liquid crystal display device according to claim 1, wherein the liquid crystal composition has a dielectric anisotropy of 8 or more and a rotational viscosity coefficient of 110 mPa · s or less. Matrix type liquid crystal display device.   3. The active matrix type liquid crystal display device according to claim 1, wherein when the refractive index anisotropy of the liquid crystal composition is Δn and the thickness of the liquid crystal layer is d, the parameter d · Δn is 0.28 μm <. An active matrix liquid crystal display device satisfying d · Δn <0.5 μm.   4. The active matrix type liquid crystal display device according to claim 1, wherein the pixel electrode and the counter electrode are transparent electrodes, and electrical insulation between the pixel electrode and the counter electrode is a transparent insulating film. An active matrix liquid crystal display device characterized by being secured by

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