FR2875338B1 - Methode d'elaboration de structures hemt piezoelectriques a desordre d'alliage nul - Google Patents
Methode d'elaboration de structures hemt piezoelectriques a desordre d'alliage nulInfo
- Publication number
- FR2875338B1 FR2875338B1 FR0503173A FR0503173A FR2875338B1 FR 2875338 B1 FR2875338 B1 FR 2875338B1 FR 0503173 A FR0503173 A FR 0503173A FR 0503173 A FR0503173 A FR 0503173A FR 2875338 B1 FR2875338 B1 FR 2875338B1
- Authority
- FR
- France
- Prior art keywords
- structures
- barrier layer
- alloys
- zero
- alloy
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 229910045601 alloy Inorganic materials 0.000 title abstract 2
- 239000000956 alloy Substances 0.000 title abstract 2
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- 230000004888 barrier function Effects 0.000 abstract 3
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 abstract 1
- 229910002056 binary alloy Inorganic materials 0.000 abstract 1
- 229910052738 indium Inorganic materials 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 239000000203 mixture Substances 0.000 abstract 1
- 150000004767 nitrides Chemical class 0.000 abstract 1
- 229910002058 ternary alloy Inorganic materials 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/15—Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
- H01L29/151—Compositional structures
- H01L29/152—Compositional structures with quantum effects only in vertical direction, i.e. layered structures with quantum effects solely resulting from vertical potential variation
- H01L29/155—Comprising only semiconductor materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
- H01L29/7787—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/2003—Nitride compounds
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Junction Field-Effect Transistors (AREA)
- Compositions Of Oxide Ceramics (AREA)
Priority Applications (8)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0503173A FR2875338B1 (fr) | 2004-09-13 | 2005-03-31 | Methode d'elaboration de structures hemt piezoelectriques a desordre d'alliage nul |
TW094131551A TWI309088B (en) | 2004-09-13 | 2005-09-13 | Hemt piezoelectric structures with zero alloy disorder |
KR1020077003503A KR100930639B1 (ko) | 2004-09-13 | 2005-09-13 | 합금 무질서가 없는 hemt 압전 구조물 |
JP2007530721A JP2008512863A (ja) | 2004-09-13 | 2005-09-13 | 合金無秩序のないhemt圧電構造 |
PCT/EP2005/054559 WO2006030014A1 (fr) | 2004-09-13 | 2005-09-13 | Structures piezo-electriques de type hemt a zero desordre d'alliage |
EP05784616A EP1800346B1 (fr) | 2004-09-13 | 2005-09-13 | Structures piezo-electriques de type hemt a zero desordre d'alliage |
AT05784616T ATE543218T1 (de) | 2004-09-13 | 2005-09-13 | Piezoelektrische hemt-strukturen mit nulllegierungsunordnung |
US11/684,925 US20070164299A1 (en) | 2004-09-13 | 2007-03-12 | Hemt piezoelectric structures with zero alloy disorder |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0409674A FR2875337A1 (fr) | 2004-09-13 | 2004-09-13 | Structures hemt piezoelectriques a desordre d'alliage nul |
FR0503173A FR2875338B1 (fr) | 2004-09-13 | 2005-03-31 | Methode d'elaboration de structures hemt piezoelectriques a desordre d'alliage nul |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2875338A1 FR2875338A1 (fr) | 2006-03-17 |
FR2875338B1 true FR2875338B1 (fr) | 2007-01-05 |
Family
ID=35106688
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR0503173A Active FR2875338B1 (fr) | 2004-09-13 | 2005-03-31 | Methode d'elaboration de structures hemt piezoelectriques a desordre d'alliage nul |
Country Status (8)
Country | Link |
---|---|
US (1) | US20070164299A1 (fr) |
EP (1) | EP1800346B1 (fr) |
JP (1) | JP2008512863A (fr) |
KR (1) | KR100930639B1 (fr) |
AT (1) | ATE543218T1 (fr) |
FR (1) | FR2875338B1 (fr) |
TW (1) | TWI309088B (fr) |
WO (1) | WO2006030014A1 (fr) |
Families Citing this family (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2875338B1 (fr) * | 2004-09-13 | 2007-01-05 | Picogiga Internat Soc Par Acti | Methode d'elaboration de structures hemt piezoelectriques a desordre d'alliage nul |
WO2009001888A1 (fr) * | 2007-06-27 | 2008-12-31 | Nec Corporation | Transistor à effet de champ et film épitaxial multicouche destiné à être utilisé dans la fabrication du transistor à effet de champ |
EP2259295A4 (fr) * | 2008-03-24 | 2013-11-27 | Ngk Insulators Ltd | Substrat épitaxial pour élément semiconducteur, élément semiconducteur, et procédé de production de substrat épitaxial pour élément semiconducteur |
US20100117118A1 (en) * | 2008-08-07 | 2010-05-13 | Dabiran Amir M | High electron mobility heterojunction device |
US20100072484A1 (en) * | 2008-09-23 | 2010-03-25 | Triquint Semiconductor, Inc. | Heteroepitaxial gallium nitride-based device formed on an off-cut substrate |
US8344420B1 (en) * | 2009-07-24 | 2013-01-01 | Triquint Semiconductor, Inc. | Enhancement-mode gallium nitride high electron mobility transistor |
JP5308290B2 (ja) * | 2009-09-15 | 2013-10-09 | 日本碍子株式会社 | 半導体素子用エピタキシャル基板、ショットキー接合構造、およびショットキー接合構造の漏れ電流抑制方法 |
JP5506919B2 (ja) * | 2010-04-22 | 2014-05-28 | 三菱電機株式会社 | 半導体装置およびその製造方法 |
JP5712583B2 (ja) * | 2010-12-02 | 2015-05-07 | 富士通株式会社 | 化合物半導体装置及びその製造方法 |
JP5712721B2 (ja) * | 2011-03-24 | 2015-05-07 | 株式会社デンソー | 半導体装置 |
JP2012227227A (ja) * | 2011-04-15 | 2012-11-15 | Advanced Power Device Research Association | 半導体デバイス |
WO2013095343A1 (fr) | 2011-12-19 | 2013-06-27 | Intel Corporation | Transistors à nanofils du groupe iii-n |
US8896101B2 (en) | 2012-12-21 | 2014-11-25 | Intel Corporation | Nonplanar III-N transistors with compositionally graded semiconductor channels |
US10636881B2 (en) * | 2016-04-11 | 2020-04-28 | Qorvo Us, Inc. | High electron mobility transistor (HEMT) device |
US10734512B2 (en) | 2016-04-11 | 2020-08-04 | Qorvo Us, Inc. | High electron mobility transistor (HEMT) device |
TWI648858B (zh) | 2016-06-14 | 2019-01-21 | 黃知澍 | Ga-face III族/氮化物磊晶結構及其主動元件與其製作方法 |
JP7039705B2 (ja) | 2017-12-05 | 2022-03-22 | キング・アブドゥッラー・ユニバーシティ・オブ・サイエンス・アンド・テクノロジー | Iii族窒化物合金の形成 |
CN111477536A (zh) * | 2020-03-31 | 2020-07-31 | 华为技术有限公司 | 一种半导体外延结构及半导体器件 |
JP7556401B2 (ja) | 2020-11-18 | 2024-09-26 | 日本電信電話株式会社 | トランジスタの製造方法 |
CN112951910A (zh) * | 2021-04-13 | 2021-06-11 | 西安电子科技大学 | BAlN/GaN高电子迁移率晶体管及其制作方法 |
KR102615809B1 (ko) * | 2022-07-22 | 2023-12-20 | 웨이브로드 주식회사 | 전력반도체 소자용 그룹3족 질화물 반도체 템플릿 |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61198784A (ja) * | 1985-02-28 | 1986-09-03 | Fujitsu Ltd | 電界効果型半導体装置 |
US5192987A (en) * | 1991-05-17 | 1993-03-09 | Apa Optics, Inc. | High electron mobility transistor with GaN/Alx Ga1-x N heterojunctions |
JP3094500B2 (ja) * | 1991-05-21 | 2000-10-03 | 日本電気株式会社 | 電界効果トランジスタ |
JP3286921B2 (ja) * | 1992-10-09 | 2002-05-27 | 富士通株式会社 | シリコン基板化合物半導体装置 |
JP3445653B2 (ja) * | 1994-03-23 | 2003-09-08 | 士郎 酒井 | 発光素子 |
JP3458349B2 (ja) * | 1996-11-19 | 2003-10-20 | 株式会社デンソー | 半導体装置 |
JPH10335637A (ja) * | 1997-05-30 | 1998-12-18 | Sony Corp | ヘテロ接合電界効果トランジスタ |
JP4347919B2 (ja) * | 1997-10-03 | 2009-10-21 | Okiセミコンダクタ株式会社 | 半導体装置 |
US6605151B1 (en) * | 1999-11-29 | 2003-08-12 | Northwestern University | Oxide thin films and composites and related methods of deposition |
JP3751791B2 (ja) * | 2000-03-28 | 2006-03-01 | 日本電気株式会社 | ヘテロ接合電界効果トランジスタ |
US6992319B2 (en) * | 2000-07-18 | 2006-01-31 | Epitaxial Technologies | Ultra-linear multi-channel field effect transistor |
US6849882B2 (en) * | 2001-05-11 | 2005-02-01 | Cree Inc. | Group-III nitride based high electron mobility transistor (HEMT) with barrier/spacer layer |
TW200305283A (en) * | 2001-12-06 | 2003-10-16 | Hrl Lab Llc | High power-low noise microwave GaN heterojunction field effet transistor |
US7115896B2 (en) * | 2002-12-04 | 2006-10-03 | Emcore Corporation | Semiconductor structures for gallium nitride-based devices |
TWI230978B (en) * | 2003-01-17 | 2005-04-11 | Sanken Electric Co Ltd | Semiconductor device and the manufacturing method thereof |
US6841809B2 (en) * | 2003-04-08 | 2005-01-11 | Sensor Electronic Technology, Inc. | Heterostructure semiconductor device |
US20050006639A1 (en) * | 2003-05-23 | 2005-01-13 | Dupuis Russell D. | Semiconductor electronic devices and methods |
FR2875338B1 (fr) * | 2004-09-13 | 2007-01-05 | Picogiga Internat Soc Par Acti | Methode d'elaboration de structures hemt piezoelectriques a desordre d'alliage nul |
FR2875337A1 (fr) * | 2004-09-13 | 2006-03-17 | Picogiga Internat Soc Par Acti | Structures hemt piezoelectriques a desordre d'alliage nul |
-
2005
- 2005-03-31 FR FR0503173A patent/FR2875338B1/fr active Active
- 2005-09-13 JP JP2007530721A patent/JP2008512863A/ja active Pending
- 2005-09-13 AT AT05784616T patent/ATE543218T1/de active
- 2005-09-13 WO PCT/EP2005/054559 patent/WO2006030014A1/fr active Application Filing
- 2005-09-13 TW TW094131551A patent/TWI309088B/zh active
- 2005-09-13 EP EP05784616A patent/EP1800346B1/fr active Active
- 2005-09-13 KR KR1020077003503A patent/KR100930639B1/ko active IP Right Grant
-
2007
- 2007-03-12 US US11/684,925 patent/US20070164299A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
KR20070041751A (ko) | 2007-04-19 |
US20070164299A1 (en) | 2007-07-19 |
JP2008512863A (ja) | 2008-04-24 |
EP1800346B1 (fr) | 2012-01-25 |
EP1800346A1 (fr) | 2007-06-27 |
KR100930639B1 (ko) | 2009-12-09 |
FR2875338A1 (fr) | 2006-03-17 |
TW200633214A (en) | 2006-09-16 |
ATE543218T1 (de) | 2012-02-15 |
TWI309088B (en) | 2009-04-21 |
WO2006030014A1 (fr) | 2006-03-23 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
FR2875338B1 (fr) | Methode d'elaboration de structures hemt piezoelectriques a desordre d'alliage nul | |
US20110140173A1 (en) | Low OHMIC contacts containing germanium for gallium nitride or other nitride-based power devices | |
US8633094B2 (en) | GaN high voltage HFET with passivation plus gate dielectric multilayer structure | |
JP5552923B2 (ja) | 半導体装置およびその製造方法 | |
TW200636999A (en) | Thick semi-insulating or insulating epitaxial gallium nitride layers and devices incorporating same | |
EP2609632B9 (fr) | Composant semi-conducteur et procédé de fabrication d'un composant semi-conducteur | |
US9157169B2 (en) | Process for manufacture of super lattice using alternating high and low temperature layers to block parasitic current path | |
US8723296B2 (en) | Stress compensation for large area gallium nitride or other nitride-based structures on semiconductor substrates | |
JP6484328B2 (ja) | バッファ層スタック上にiii−v族の活性半導体層を備える半導体構造および半導体構造を製造するための方法 | |
US8067269B2 (en) | Method for fabricating at least one transistor | |
WO2011025290A3 (fr) | Élément semi-conducteur non polaire/semi-polaire de haute qualité formé sur un substrat incliné et procédé de fabrication correspondant | |
JP2009158804A (ja) | 半導体材料、半導体材料の製造方法及び半導体素子 | |
TW200707799A (en) | Bonded intermediate substrate and method of making same | |
JP2009130010A (ja) | 窒化物半導体装置の製造方法 | |
JP2013042032A (ja) | 化合物半導体装置及びその製造方法 | |
US20080006846A1 (en) | Iii-v nitride semiconductor device and method of forming electrode | |
KR20110130502A (ko) | Ⅲ족 질화물 반도체 성장용 기판, ⅲ족 질화물 반도체 에피택셜 기판, ⅲ족 질화물 반도체 소자 및 ⅲ족 질화물 반도체 자립 기판, 및 이들의 제조 방법 | |
ATE491227T1 (de) | Verfahren zur herstellung von interkonnektverbindungen für halbleiterkomponenten | |
US8541298B2 (en) | Method for fabricating semiconductor device | |
JP2007053357A (ja) | 窒化物単結晶基板の製造方法および窒化物半導体発光素子の製造方法 | |
JP4495698B2 (ja) | Iii族窒化物半導体デバイスの製造 | |
US8865575B2 (en) | Fabrication of III-nitride semiconductor device and related structures | |
JP4030982B2 (ja) | 半導体装置および半導体装置の製造方法 | |
JP2010212406A (ja) | 半導体装置及びその製造方法 | |
US10020244B2 (en) | Polymer via plugs with high thermal integrity |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
CD | Change of name or company name |
Owner name: SOITEC, FR Effective date: 20140825 |
|
TP | Transmission of property |
Owner name: SOITEC, FR Effective date: 20140825 |
|
PLFP | Fee payment |
Year of fee payment: 12 |
|
PLFP | Fee payment |
Year of fee payment: 13 |
|
PLFP | Fee payment |
Year of fee payment: 14 |
|
PLFP | Fee payment |
Year of fee payment: 16 |
|
PLFP | Fee payment |
Year of fee payment: 17 |
|
PLFP | Fee payment |
Year of fee payment: 18 |
|
PLFP | Fee payment |
Year of fee payment: 19 |
|
PLFP | Fee payment |
Year of fee payment: 20 |