[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

ES8107420A1 - Perfeccionamientos en circuitos para el reaprovechamiento decadencia de la parte receptora en la transmision digital de informaciones ligadas a cadencia - Google Patents

Perfeccionamientos en circuitos para el reaprovechamiento decadencia de la parte receptora en la transmision digital de informaciones ligadas a cadencia

Info

Publication number
ES8107420A1
ES8107420A1 ES496384A ES496384A ES8107420A1 ES 8107420 A1 ES8107420 A1 ES 8107420A1 ES 496384 A ES496384 A ES 496384A ES 496384 A ES496384 A ES 496384A ES 8107420 A1 ES8107420 A1 ES 8107420A1
Authority
ES
Spain
Prior art keywords
receiver
digital
circuit arrangement
information transmission
clock recovery
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES496384A
Other languages
English (en)
Other versions
ES496384A0 (es
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of ES8107420A1 publication Critical patent/ES8107420A1/es
Publication of ES496384A0 publication Critical patent/ES496384A0/es
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/027—Speed or phase control by the received code signals, the signals containing no special synchronisation information extracting the synchronising or clock signal from the received signal spectrum, e.g. by using a resonant or bandpass circuit
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0016—Arrangements for synchronising receiver with transmitter correction of synchronization errors
    • H04L7/0033—Correction by delay
    • H04L7/0041—Delay of data signal

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Circuits Of Receivers In General (AREA)

Abstract

DISPOSITIVO PARA TRANSMISION DIGITAL CON REAPROVECHAMIENTO DE CADENCIA. LA INFORMACION (N) CONTENIDA EN UNA LINEA DE TRANSMISION SE TRATA EN UN CONVERTIDOR DIGITAL (1), CON UNA CADENCIA DETERMINADA POR UN OSCILADOR (Q1), LLEGANDO LA INFORMACION EN FORMA DIGITAL A UN CONVERTIDOR (2), DE DIGITAL A LA FORMA INICIAL (N), CON UNA TENDENCIA RECEPTORA (E.T.) DETERMINADA POR UN OSCILADOR (Q2), DE FRECUENCIA MULTIPLO DE LA TRANSMISION, Y LA PROPIA FRECUENCIA DE TRANSMISION QUE ACTUA EN UNA PUERTA O (3) DIRECTAMENTE Y CON UN RETARDADOR (4), SIRVIENDO LOS IMPULSOS DE SALIDA DE LA PUERTA (3) PARA PONER A CERO A UN CONTADOR DIGITAL (DZ2), CONECTADO AL OSCILADOR (Q2). A
ES496384A 1979-10-30 1980-10-29 Perfeccionamientos en circuitos para el reaprovechamiento decadencia de la parte receptora en la transmision digital de informaciones ligadas a cadencia Granted ES496384A0 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2943865A DE2943865B2 (de) 1979-10-30 1979-10-30 Schaltungsanordnung zur empfangsseitigen Taktrückgewinnung bei digitaler taktgebundener Nachrichtenübertragung

Publications (2)

Publication Number Publication Date
ES8107420A1 true ES8107420A1 (es) 1981-10-01
ES496384A0 ES496384A0 (es) 1981-10-01

Family

ID=6084759

Family Applications (1)

Application Number Title Priority Date Filing Date
ES496384A Granted ES496384A0 (es) 1979-10-30 1980-10-29 Perfeccionamientos en circuitos para el reaprovechamiento decadencia de la parte receptora en la transmision digital de informaciones ligadas a cadencia

Country Status (12)

Country Link
US (1) US4361897A (es)
EP (1) EP0028001A1 (es)
JP (1) JPS5675746A (es)
AR (1) AR226193A1 (es)
AU (1) AU519973B2 (es)
BR (1) BR8006962A (es)
DE (1) DE2943865B2 (es)
DK (1) DK458680A (es)
ES (1) ES496384A0 (es)
FI (1) FI803390L (es)
NO (1) NO803235L (es)
ZA (1) ZA806642B (es)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3311677A1 (de) * 1983-03-30 1984-10-04 Siemens AG, 1000 Berlin und 8000 München Vorrichtung zur rueckgewinnung eines taktes aus einer signalfolge
GB2146509B (en) * 1983-09-10 1986-08-13 Stc Plc Data transmission system
US4694196A (en) * 1984-12-07 1987-09-15 American Telephone And Telegraph Company And At&T Information Systems Clock recovery circuit
EP0202597B1 (de) * 1985-05-15 1991-05-22 Siemens Aktiengesellschaft Schaltungsanordnung zur Rückgewinnung des Taktes eines isochronen Binärsignales
KR100303315B1 (ko) * 1999-08-05 2001-11-01 윤종용 전송속도 무의존성의 광수신 방법 및 장치

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1541922C3 (de) * 1967-09-21 1974-06-06 Robert Bosch Fernsehanlagen Gmbh, 6100 Darmstadt Anordnung zur Verzögerung von elektrischen Signalen
US3705398A (en) * 1970-08-11 1972-12-05 Odetics Inc Digital format converter
BE791484A (nl) * 1971-11-18 1973-05-16 Trt Telecom Radio Electr Systeem voor synchrone datatransmissie over een synchroon digitaal transmissiekanaal
DE2354072C3 (de) * 1973-10-29 1979-04-05 Siemens Ag, 1000 Berlin Und 8000 Muenchen Schaltungsanordnung zur Regelang der Phasenlage eines Taktsignals
DE2462087C3 (de) * 1974-06-20 1981-06-19 Vereinigte Flugtechnische Werke Gmbh, 2800 Bremen Verfahren und Schaltungsanordnung zur Erzeugung einer synchronen Taktimpulsfolge
US4064361A (en) * 1975-12-31 1977-12-20 Bell Telephone Laboratories, Incorporated Correlative timing recovery in digital data transmission systems
US4208724A (en) * 1977-10-17 1980-06-17 Sperry Corporation System and method for clocking data between a remote unit and a local unit
US4232388A (en) * 1977-11-04 1980-11-04 Mca Disco-Vision, Inc. Method and means for encoding and decoding digital data
JPS5853809B2 (ja) * 1977-12-20 1983-12-01 日本電気株式会社 クロツクパルス再生回路
JPS5814104B2 (ja) * 1978-04-28 1983-03-17 株式会社東芝 情報伝送方式
US4267595A (en) * 1980-02-04 1981-05-12 International Telephone And Telegraph Corporation AMI Decoder apparatus

Also Published As

Publication number Publication date
AU519973B2 (en) 1982-01-07
NO803235L (no) 1981-05-04
BR8006962A (pt) 1981-05-05
JPS5675746A (en) 1981-06-23
DK458680A (da) 1981-05-01
DE2943865A1 (de) 1981-05-07
FI803390L (fi) 1981-05-01
AU6380180A (en) 1981-05-07
AR226193A1 (es) 1982-06-15
DE2943865B2 (de) 1981-07-30
US4361897A (en) 1982-11-30
ES496384A0 (es) 1981-10-01
EP0028001A1 (de) 1981-05-06
ZA806642B (en) 1981-10-28

Similar Documents

Publication Publication Date Title
GB1236494A (en) Improvements in or relating to phase difference detectors
ES8107420A1 (es) Perfeccionamientos en circuitos para el reaprovechamiento decadencia de la parte receptora en la transmision digital de informaciones ligadas a cadencia
ES448469A1 (es) Un sistema de transmision de datos en serie binaria.
ES464023A1 (es) Perfeccionamientos en circuitos digitales con red de fase sincronizada.
ES363941A2 (es) Una disposicion para transmitir senales de informacion en una banda de frecuencias prescrita.
EP0108702A3 (en) Serial to parallel data conversion circuit
AU3653584A (en) Regenerating the significant instants of a periodic signal
GB1348148A (en) Timing signal extraction circuits for example in pcm regenerative repeaters
GB1193475A (en) Improvements in or relating to Coded Information Transmission Systems
GB1290143A (es)
JPS5381059A (en) Digital phase synchronizing system
JPS5622134A (en) Asynchronous system serial data receiving device
JPS5739639A (en) Delay type phase correction system
JPS5696552A (en) Erastic storage
FR2249506A1 (en) Transmission system for binary signals - pulses of opposite polarities are transmitted at each pos and neg. change
GB1417325A (en) Method of indicating slippage during data transmission
ES437103A1 (es) Una disposicion de circuito de conmutacion de senal electri-ca digital, de transmision simultanea de impulsos de divi- sion de tiempo.
SU661840A1 (ru) Устройство дл приема дискретных сигналов со стиранием
SU1172047A1 (ru) Устройство дл передачи и приема цифровых сигналов
GB1026806A (en) Receiving apparatus and frequency shift keying systems for the utilisation thereof
FR2297521A1 (fr) Systeme de transmission de donnees selon une modulation numerique du type delta asynchrone
JPS6416124A (en) Parallel/serial converting circuit
FR2408256A1 (fr) Procede de transmission en modulation de frequence de donnees codees en binaire et dispositifs de mise en oeuvre
JPS56106417A (en) Energizing circuit
JPH07112193B2 (ja) シリアルデータ転送装置