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JPS5696552A - Erastic storage - Google Patents

Erastic storage

Info

Publication number
JPS5696552A
JPS5696552A JP17120179A JP17120179A JPS5696552A JP S5696552 A JPS5696552 A JP S5696552A JP 17120179 A JP17120179 A JP 17120179A JP 17120179 A JP17120179 A JP 17120179A JP S5696552 A JPS5696552 A JP S5696552A
Authority
JP
Japan
Prior art keywords
input
serial data
register
output
word
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17120179A
Other languages
Japanese (ja)
Inventor
Yoshiaki Matsuura
Kenzo Aoki
Yoshitaka Nomura
Atsuhisa Takahashi
Takashi Nara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP17120179A priority Critical patent/JPS5696552A/en
Publication of JPS5696552A publication Critical patent/JPS5696552A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/05—Electric or magnetic storage of signals before transmitting or retransmitting for changing the transmission rate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Communication Control (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To synchronize the input serial data to the clock of device and to make circuit integration through the simple constitution, by making input/output of serial data through shift registers. CONSTITUTION:An input serial data Din is fed to a shift register SR1, where it is shifted according to the bit clock BSin in synchronizing with the bit of the input data, and the parallel output of SR1 is set to the register consisting of FF1-FF4 with the word synchronizing signal Sin in word unit. Further, the set content of this register is set to SR2 in the word synchronizing signal WSout of the device, and it is serially output with the bit clock BSout of the device from SR2.
JP17120179A 1979-12-29 1979-12-29 Erastic storage Pending JPS5696552A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17120179A JPS5696552A (en) 1979-12-29 1979-12-29 Erastic storage

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17120179A JPS5696552A (en) 1979-12-29 1979-12-29 Erastic storage

Publications (1)

Publication Number Publication Date
JPS5696552A true JPS5696552A (en) 1981-08-04

Family

ID=15918886

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17120179A Pending JPS5696552A (en) 1979-12-29 1979-12-29 Erastic storage

Country Status (1)

Country Link
JP (1) JPS5696552A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58137348A (en) * 1982-02-09 1983-08-15 Nec Corp Signal converting circuit
JPS5970062A (en) * 1982-10-13 1984-04-20 Fujitsu Ltd Transferring method of data
JPS61117954A (en) * 1984-11-12 1986-06-05 Dainichi Nippon Cables Ltd First-in first-out circuit for repeater
JPS61240726A (en) * 1985-04-17 1986-10-27 Nec Corp Memory circuit device
JPS6472640A (en) * 1987-09-14 1989-03-17 Nec Corp Digital data smoothing circuit

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58137348A (en) * 1982-02-09 1983-08-15 Nec Corp Signal converting circuit
JPS6367784B2 (en) * 1982-02-09 1988-12-27 Nippon Electric Co
JPS5970062A (en) * 1982-10-13 1984-04-20 Fujitsu Ltd Transferring method of data
JPS61117954A (en) * 1984-11-12 1986-06-05 Dainichi Nippon Cables Ltd First-in first-out circuit for repeater
JPS61240726A (en) * 1985-04-17 1986-10-27 Nec Corp Memory circuit device
JPS6472640A (en) * 1987-09-14 1989-03-17 Nec Corp Digital data smoothing circuit

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