DE3853814D1 - Integrierte Halbleiterschaltung. - Google Patents
Integrierte Halbleiterschaltung.Info
- Publication number
- DE3853814D1 DE3853814D1 DE3853814T DE3853814T DE3853814D1 DE 3853814 D1 DE3853814 D1 DE 3853814D1 DE 3853814 T DE3853814 T DE 3853814T DE 3853814 T DE3853814 T DE 3853814T DE 3853814 D1 DE3853814 D1 DE 3853814D1
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor circuit
- integrated semiconductor
- integrated
- circuit
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/153—Arrangements in which a pulse is delivered at the instant when a predetermined characteristic of an input signal is present or at a fixed time interval after this instant
- H03K5/1534—Transition or edge detectors
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Dram (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62330056A JPH0661160B2 (ja) | 1987-12-28 | 1987-12-28 | 半導体集積回路 |
JP63252971A JPH07118195B2 (ja) | 1988-10-07 | 1988-10-07 | 半導体集積回路 |
JP63291969A JP2530012B2 (ja) | 1988-11-18 | 1988-11-18 | 半導体集積回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3853814D1 true DE3853814D1 (de) | 1995-06-22 |
DE3853814T2 DE3853814T2 (de) | 1995-11-30 |
Family
ID=27334172
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE3853814T Expired - Fee Related DE3853814T2 (de) | 1987-12-28 | 1988-12-28 | Integrierte Halbleiterschaltung. |
DE3855797T Expired - Fee Related DE3855797T2 (de) | 1987-12-28 | 1988-12-28 | Integrierte Halbleiterschaltung |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE3855797T Expired - Fee Related DE3855797T2 (de) | 1987-12-28 | 1988-12-28 | Integrierte Halbleiterschaltung |
Country Status (3)
Country | Link |
---|---|
US (2) | US4959816A (de) |
EP (2) | EP0624878B1 (de) |
DE (2) | DE3853814T2 (de) |
Families Citing this family (38)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4959816A (en) * | 1987-12-28 | 1990-09-25 | Kabushiki Kaisha Toshiba | Semiconductor integrated circuit |
US5200926A (en) * | 1987-12-28 | 1993-04-06 | Kabushiki Kaisha Toshiba | Semiconductor integrated circuit |
JPH0344890A (ja) * | 1989-07-12 | 1991-02-26 | Toshiba Corp | 半導体記憶装置のデータ出力制御回路 |
IL96808A (en) * | 1990-04-18 | 1996-03-31 | Rambus Inc | Introductory / Origin Circuit Agreed Using High-Performance Brokerage |
JP2530055B2 (ja) * | 1990-08-30 | 1996-09-04 | 株式会社東芝 | 半導体集積回路 |
JP2781651B2 (ja) * | 1990-10-15 | 1998-07-30 | 日本電気アイシーマイコンシステム株式会社 | Icメモリ回路 |
TW198135B (de) * | 1990-11-20 | 1993-01-11 | Oki Electric Ind Co Ltd | |
JP3100622B2 (ja) * | 1990-11-20 | 2000-10-16 | 沖電気工業株式会社 | 同期型ダイナミックram |
DE69317927T2 (de) * | 1992-02-28 | 1998-11-19 | Sony Corp | Halbleiterspeicheranordnung mit einer Adressübergangsabfühlschaltung |
US5272674A (en) * | 1992-09-21 | 1993-12-21 | Atmel Corporation | High speed memory sense amplifier with noise reduction |
JP3307009B2 (ja) * | 1993-07-21 | 2002-07-24 | 富士通株式会社 | 半導体記憶装置 |
GB2289178B (en) * | 1993-11-09 | 1998-05-20 | Motorola Inc | Circuit and method for generating a delayed output signal |
KR950014086B1 (ko) * | 1993-11-11 | 1995-11-21 | 현대전자산업주식회사 | 반도체 메모리 소자의 데이타 출력장치 |
DE69419403T2 (de) * | 1994-02-18 | 1999-12-30 | Stmicroelectronics S.R.L., Agrate Brianza | Verfahren und Schaltung für Ladetaktsteuerung für nichflüchtige Speicherausgabedaten |
DE69419723T2 (de) * | 1994-02-18 | 1999-12-02 | Stmicroelectronics S.R.L., Agrate Brianza | Verfahren und Schaltung zum Unterdrücken von Datenladerauschen in nichtflüchtigen Speichern |
DE69421266T2 (de) * | 1994-02-18 | 2000-05-18 | Stmicroelectronics S.R.L., Agrate Brianza | Lesetaktsteuerungsverfahren und Schaltung für nichtflüchtige Speicher |
US6353554B1 (en) * | 1995-02-27 | 2002-03-05 | Btg International Inc. | Memory apparatus including programmable non-volatile multi-bit memory cell, and apparatus and method for demarcating memory states of the cell |
US5524096A (en) * | 1995-06-29 | 1996-06-04 | Micron Quantum Devices, Inc. | Circuit for generating a delayed standby signal in response to an external standby command |
JPH09153288A (ja) * | 1995-11-30 | 1997-06-10 | Mitsubishi Electric Corp | 半導体記憶装置 |
JP3087653B2 (ja) * | 1996-05-24 | 2000-09-11 | 日本電気株式会社 | 半導体記憶装置 |
DE69626815T2 (de) * | 1996-09-19 | 2003-12-11 | Stmicroelectronics S.R.L., Agrate Brianza | Steuerschaltung für Ausgangspuffer, insbesondere für eine nichtflüchtige Speicheranordnung |
KR100260358B1 (ko) * | 1996-12-30 | 2000-07-01 | 김영환 | 반도체 메모리소자의 출력버퍼회로 |
JP3903588B2 (ja) * | 1997-07-31 | 2007-04-11 | ソニー株式会社 | 信号変化検出回路 |
US6009041A (en) * | 1998-02-26 | 1999-12-28 | Sgs-Thomson Microelectronics S.R.L. | Method and circuit for trimming the internal timing conditions of a semiconductor memory device |
US6285216B1 (en) * | 1998-12-17 | 2001-09-04 | United Microelectronics Corporation | High speed output enable path and method for an integrated circuit device |
EP1014547A3 (de) | 1998-12-21 | 2000-11-15 | Fairchild Semiconductor Corporation | Ladungspumpesystem für niedrigen Strom |
US20030112665A1 (en) * | 2001-12-17 | 2003-06-19 | Nec Electronics Corporation | Semiconductor memory device, data processor, and method of determining frequency |
US7312637B2 (en) * | 2004-08-30 | 2007-12-25 | Thunder Creative Technologies, Inc. | Enhanced timing margin memory interface |
US7184328B2 (en) * | 2004-10-18 | 2007-02-27 | Infineon Technologies Ag | DQS for data from a memory array |
US7149128B2 (en) * | 2004-11-16 | 2006-12-12 | Realtek Semiconductor Corp. | Data latch |
JP2006351108A (ja) * | 2005-06-16 | 2006-12-28 | Oki Electric Ind Co Ltd | 半導体記憶装置 |
US8445828B2 (en) | 2010-07-01 | 2013-05-21 | Silicon Optronics, Inc. | High dynamic range image sensor with in pixel memory |
US8526266B2 (en) * | 2011-01-21 | 2013-09-03 | Qualcomm Incorporated | Row-decoder circuit and method with dual power systems |
JP6116159B2 (ja) * | 2012-08-27 | 2017-04-19 | キヤノン株式会社 | スリップリング、スリップリング電気システム、及びロボット |
US9654714B2 (en) | 2013-11-01 | 2017-05-16 | Silicon Optronics, Inc. | Shared pixel with fixed conversion gain |
JP2015170203A (ja) * | 2014-03-07 | 2015-09-28 | 富士通株式会社 | 検証方法、検証プログラムおよび検証装置 |
US10193555B1 (en) * | 2016-06-29 | 2019-01-29 | Cadence Design Systems, Inc. | Methods and devices for a memory interface receiver |
WO2023287744A1 (en) * | 2021-07-13 | 2023-01-19 | Edward Stoneham | Delay-adjusted digital-unit interface |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58169383A (ja) * | 1982-03-30 | 1983-10-05 | Fujitsu Ltd | 半導体記憶装置 |
JPS59181829A (ja) * | 1983-03-31 | 1984-10-16 | Toshiba Corp | 半導体素子の出力バツフア回路 |
JPS60253091A (ja) * | 1984-05-30 | 1985-12-13 | Fujitsu Ltd | 半導体記憶装置 |
JPS60254485A (ja) * | 1984-05-31 | 1985-12-16 | Nec Corp | スタテイツク型半導体記憶装置 |
JPS6124091A (ja) * | 1984-07-12 | 1986-02-01 | Nec Corp | メモリ回路 |
JPS6381551A (ja) * | 1986-09-25 | 1988-04-12 | Sony Corp | メモリ装置 |
US4959816A (en) * | 1987-12-28 | 1990-09-25 | Kabushiki Kaisha Toshiba | Semiconductor integrated circuit |
-
1988
- 1988-12-27 US US07/290,721 patent/US4959816A/en not_active Expired - Lifetime
- 1988-12-28 DE DE3853814T patent/DE3853814T2/de not_active Expired - Fee Related
- 1988-12-28 DE DE3855797T patent/DE3855797T2/de not_active Expired - Fee Related
- 1988-12-28 EP EP94109913A patent/EP0624878B1/de not_active Expired - Lifetime
- 1988-12-28 EP EP88121806A patent/EP0322901B1/de not_active Expired - Lifetime
-
1990
- 1990-08-17 US US07/568,734 patent/US5056064A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP0322901B1 (de) | 1995-05-17 |
EP0322901A3 (de) | 1991-03-20 |
DE3853814T2 (de) | 1995-11-30 |
DE3855797D1 (de) | 1997-03-27 |
DE3855797T2 (de) | 1997-08-14 |
US5056064A (en) | 1991-10-08 |
EP0624878A3 (de) | 1995-02-15 |
EP0624878B1 (de) | 1997-02-12 |
US4959816A (en) | 1990-09-25 |
EP0624878A2 (de) | 1994-11-17 |
EP0322901A2 (de) | 1989-07-05 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8327 | Change in the person/name/address of the patent owner |
Owner name: TOSHIBA MICRO-ELECTRONICS CORP., KAWASAKI, JP |
|
8327 | Change in the person/name/address of the patent owner |
Owner name: KABUSHIKI KAISHA TOSHIBA, KAWASAKI, KANAGAWA, JP T |
|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |