CN206270794U - Bus-powered circuit that can be integrated - Google Patents
Bus-powered circuit that can be integrated Download PDFInfo
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- CN206270794U CN206270794U CN201621302193.7U CN201621302193U CN206270794U CN 206270794 U CN206270794 U CN 206270794U CN 201621302193 U CN201621302193 U CN 201621302193U CN 206270794 U CN206270794 U CN 206270794U
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Abstract
The utility model is related to a kind of bus-powered circuit that can be integrated, including current limliting source module, LDO modules, functional module, reception and constant current sending module and the second diode, described current limliting source module is connected with bus negative line Ln, the negative pole of the second described diode, described reception and constant current sending module and described LDO modules respectively, described LDO modules are connected with described functional module and described reception and constant current sending module respectively, and described functional module is connected with described reception and constant current sending module.Using the circuit, it is adapted to current CMOS technology, it is easy to integrated and low cost；The requirement that satisfaction is limited bus dash current；For the power supply that functional module is provided has good uniformity and temperature characterisitic, do not influenceed by technological factor.
Description
Technical field
The utility model is related to bus-powered technical field, more particularly to bus-powered integrated technology field, specifically
It refer to a kind of bus-powered circuit that can be integrated.
Background technology
In bus-powered technology, main frame is connected with a number of slave (being confirmed with different ID) by two cables
Connect, all of slave is all connected in parallel in bus, and by bus obtain power supply, meanwhile, bus also serve as main frame with from
The holding wire that machine is in communication with each other.Main frame uses bus voltage modulation method from data to slave when sending, that is, change bus
Magnitude of voltage transmits data；And slave to main frame send data when use be then bus current modulate method, i.e., slave lead to
The electric current of the extra extraction certain value from bus is crossed to transmit data.By bus-powered and communication, can be to related data or letter
Number carrying out concentrated collection reaches main frame, and all slave devices can be made to be equipped with battery, and power supply is connect without separately cloth, installs dimension
Shield low cost, it is environment friendly and pollution-free.
Due to more slave circuit can be carried in bus, when all slave circuits are under heavy duty state (as started
When), it will cause the bus current to have very big impact, so as to the driving force to main frame has higher requirements, influence main frame makes
With the life-span, therefore in the prior art, the slave chip in bus is connected to, some realize power supply and electric current using special chip
The interface of control, but can so cause overall relatively costly；Some are built between slave chip and bus using discrete component
Interface, it is generally main by constant current source module, Voltage stabilizing module, receive constituted with constant current sending module, it is necessary to use multiple triodes,
Voltage-stabiliser tube and some resistance.
Slave circuit implementations bus-powered in the prior art are as shown in figure 1, wherein Lp and Ln are being respectively bus just
Polar curve and negative line, then need to be converted to by rectification module bus positive line Lp in figure and total for the bus of not polarity
Line negative line Ln.Circuit can be divided into following components in Fig. 1：
1) constant current source module：Constant electric current Inormal is produced by constant current source module, bus-powered and slave not to
In the case that main frame sends data, bus current Ibus is about Inormal；
2) Voltage stabilizing module：Slave chip power VDD is produced using the breakdown voltage of voltage-stabiliser tube D36 through one-level LDO again；
3) receive and constant current sending module：For realizing the function with bus communication, receiver module is used for detecting in bus
Level change come recognize main frame send data；Constant current sending module is sent out by extracting constant electric current Idelta to main frame
Data are sent, now bus current Ibus is about Inormal+Idelta, and main frame is by detecting the current increment come identification data；
4) slave chip：Slave chip realizes the function of slave circuit and controls to receive and send.
On the whole, prior art is primarily present three below problem：If the first, being built with special chip or discrete component,
Cost is higher, and harsher to technological requirement if being integrated in slave chip, is unfavorable for integrated；2nd, using constant-current source
When, there is a problem of the very difficult determination of constant current value and hold, some power consumptions are only applicable to always than more uniform and stable slave
Circuit, and be not suitable for the power consumption of slave circuit and have periodically and in some feelings that in particular cases power consumption can increase suddenly
Condition (such as Smoke Detection circuit is in alarm), and also there is slave circuit start speed (influence plant produced using constant-current source
When factory's coding rate) and energy utilization rate contradiction therebetween；3rd, usual Voltage stabilizing module utilizes voltage-stabiliser tube again through one-level
(or directly with the breakdown voltage of voltage-stabiliser tube as from electromechanical source, but the power supply characteristic for so producing will to produce from electromechanical source for LDO
It is worse), this not only complex structure, and slave limited power will be caused in the characteristic of voltage-stabiliser tube, it is limited to process conditions, it is impossible to
It is widely used in all kinds of slave circuits different to power requirement.
Utility model content
The purpose of this utility model is the shortcoming for overcoming above-mentioned prior art, there is provided it is a kind of be directly integrated it is bus-powered
Circuit.
To achieve these goals, bus-powered circuit that can be integrated in the utility model has following composition：
This can be integrated bus-powered circuit, including current limliting source module, LDO modules, functional module, reception and constant current send
Module and the second diode, described current limliting source module respectively with bus negative line Ln, the negative pole of the second described diode, institute
The reception and constant current sending module stated are connected with described LDO modules, described LDO modules respectively with described functional module
It is connected with described reception and constant current sending module, described functional module is connected with described reception and constant current sending module
Connect, the positive pole of the second described diode is connected with bus positive line Lp.
It is preferred that described current limliting source module includes the second p-type metal-oxide-semiconductor, the 3rd p-type metal-oxide-semiconductor, the first N-type metal-oxide-semiconductor, the
Two N-type metal-oxide-semiconductors, the 3rd N-type metal-oxide-semiconductor, 3rd resistor, the 4th resistance, the second voltage-stabiliser tube and offset generating circuit, the described the 3rd
The first end of resistance negative pole, the first end of the 4th described resistance, the second described p-type respectively with the second described diode
The source electrode of metal-oxide-semiconductor, the source electrode of the 3rd described p-type metal-oxide-semiconductor are connected with the first end of described reception and constant current sending module,
Second end of described 3rd resistor respectively with the negative pole and the grid of the first described N-type metal-oxide-semiconductor of the second described voltage-stabiliser tube
Be connected, the positive pole of described the second voltage-stabiliser tube respectively with described bus negative line Ln, the source of the 3rd described N-type metal-oxide-semiconductor
Pole, the 3rd end of described offset generating circuit, described LDO modules, the second end of described functional module and described connect
Receive and the second end of constant current sending module is connected, the drain electrode and the second of the 4th described resistance of described the first N-type metal-oxide-semiconductor
End is connected, and the source electrode of described the first N-type metal-oxide-semiconductor produces electricity with the grid of the second described N-type metal-oxide-semiconductor, described biasing
The first end on road, described LDO modules, the first end of described functional module and described reception and the of constant current sending module
One end is connected, the drain electrode of described the second p-type metal-oxide-semiconductor grid respectively with the second described p-type metal-oxide-semiconductor, described second
The drain electrode of N-type metal-oxide-semiconductor is connected with the grid of the 3rd described p-type metal-oxide-semiconductor, the drain electrode of described the 3rd p-type metal-oxide-semiconductor with it is described
LDO modules be connected, the source electrode of the second described N-type metal-oxide-semiconductor is connected with the drain electrode of the 3rd described N-type metal-oxide-semiconductor, described
The grid of the 3rd N-type metal-oxide-semiconductor be connected with the second end of described offset generating circuit.
More preferably, described current limliting source module also includes the 3rd diode, the positive pole of described the 3rd diode with it is described
The source electrode of the first N-type metal-oxide-semiconductor be connected, the negative pole of described the 3rd diode and the grid phase of the second described N-type metal-oxide-semiconductor
Connection.
More preferably, described offset generating circuit include the 4th p-type metal-oxide-semiconductor, the 5th p-type metal-oxide-semiconductor, the 4th N-type metal-oxide-semiconductor,
5th N-type metal-oxide-semiconductor, the second operational amplifier and the 5th resistance, the 5th described resistance are adjustable resistance, the second described computing
The positive input of amplifier connects bandgap voltage reference, the reverse input end of described the second operational amplifier respectively with it is described
The source electrode of the 5th N-type metal-oxide-semiconductor is connected with the first end of the 5th described resistance, the positive supply of described the second operational amplifier
End is connected with the described source electrode of the 5th p-type metal-oxide-semiconductor and the source electrode of the 4th p-type metal-oxide-semiconductor respectively, the second described operation amplifier
The output end of device is connected with the grid of the 5th described N-type metal-oxide-semiconductor, second end and the described the 4th of described the 5th resistance
The source electrode of N-type metal-oxide-semiconductor is connected and meets bus negative line Ln, and the drain electrode of described the 5th N-type metal-oxide-semiconductor is respectively with the described the 5th
The drain electrode of p-type metal-oxide-semiconductor, the grid of the 5th described p-type metal-oxide-semiconductor are connected with the grid of the 4th described p-type metal-oxide-semiconductor, described
The 4th p-type metal-oxide-semiconductor drain electrode drain electrode respectively with the 4th described N-type metal-oxide-semiconductor and the grid of described the 4th N-type metal-oxide-semiconductor
It is connected and exports bias voltage.
Further, it is characterised in that described LDO modules include that band-gap reference produces circuit, the first operation amplifier
Device, the first p-type metal-oxide-semiconductor, first resistor, second resistance and the second electric capacity, described band-gap reference produce the first end point of circuit
First end, drain electrode, the first of described second resistance of the first described p-type metal-oxide-semiconductor not with described offset generating circuit
End is connected with the first end of the second described electric capacity, and described band-gap reference produces the second end of circuit and the first described fortune
Calculate the reverse input end line connection of amplifier, described band-gap reference produce the 3rd end of circuit respectively with described first resistor
The second end be connected with the second end of the second described electric capacity with the second end of described offset generating circuit, described first
The input in the same direction of operational amplifier the second end respectively with described first resistor and the first end phase of described second resistance
Connection, the positive power source terminal of described the first operational amplifier respectively with the drain electrode of the 3rd described p-type metal-oxide-semiconductor and described first
The source electrode of p-type metal-oxide-semiconductor is connected, the output end of described the first operational amplifier and the grid phase of the first described p-type metal-oxide-semiconductor
Connection.
Further, described second resistance is adjustable resistance.
Employ in the utility model can be integrated bus-powered circuit, it is easier to it is integrated, be adapted to most extensive at present
The CMOS technology of application, low cost；Current limit value when the limits value Ilimit1 of electric current is with normal work when slave starts
Ilimit2 can be respectively provided with.Therefore the requirement limited bus dash current can be met, satisfaction is quickly actuated for
The requirement of factory's coding, and the waste of energy is not caused；The value of Ilimit2 can be adjusted to be adapted to by configuration register
The value of present load demand, if the controller such as no CPU and can not constantly adjust, due to the characteristic of current limit source, design
During the peak load of Ilimit2=slaves, the carrying load ability of slave can be both met, will not also produce the waste of energy；For
The power vd D that functional module is provided has good uniformity and temperature characterisitic, and occurrence can be carried out by the ratio of R1, R2
Design, is not influenceed by technological factor so that slave circuit can realize high-precision metering or detection characteristic, with extensive
Range of application.
Brief description of the drawings
Fig. 1 is the electrical block diagram of prior art.
Fig. 2 is the electrical block diagram of bus-powered circuit that can be integrated of the present utility model.
Fig. 3 is a kind of schematic diagram of implementation method of bus-powered circuit that can be integrated of the present utility model.
Fig. 4 be it is of the present utility model can be integrated startup when each Parameters variation schematic diagram.
Fig. 5 is the schematic diagram of the optional implementation of bus-powered circuit that can be integrated of the present utility model.
Fig. 6 is the structural representation of the offset generating circuit of bus-powered circuit that can be integrated of the present utility model.
Fig. 7 is the utility model and prior art mode of operation contrast schematic diagram.
Fig. 8 is the schematic diagram of the optional implementation of another kind of bus-powered circuit that can be integrated of the present utility model.
Specific embodiment
In order to more clearly describe technology contents of the present utility model, traveling one is entered with reference to specific embodiment
The description of step.
This can be integrated bus-powered circuit, including current limliting source module, LDO modules, functional module, reception and constant current send
Module and the second diode, described current limliting source module respectively with bus negative line Ln, the negative pole of the second described diode, institute
The reception and constant current sending module stated are connected with described LDO modules, described LDO modules respectively with described functional module
It is connected with described reception and constant current sending module, described functional module is connected with described reception and constant current sending module
Connect, the positive pole of the second described diode is connected with bus positive line Lp.
In a kind of preferably implementation method, described current limliting source module include the second p-type metal-oxide-semiconductor, the 3rd p-type metal-oxide-semiconductor,
First N-type metal-oxide-semiconductor, the second N-type metal-oxide-semiconductor, the 3rd N-type metal-oxide-semiconductor, 3rd resistor, the 4th resistance, the second voltage-stabiliser tube and biasing are produced
Circuit, the first end of described 3rd resistor negative pole, the first of the 4th described resistance respectively with the second described diode
End, the source electrode of the second described p-type metal-oxide-semiconductor, the source electrode of the 3rd described p-type metal-oxide-semiconductor and described reception and constant current send mould
The first end of block is connected, the second end of described 3rd resistor respectively with the negative pole of the second described voltage-stabiliser tube and described
The grid of one N-type metal-oxide-semiconductor is connected, the positive pole of described the second voltage-stabiliser tube respectively with described bus negative line Ln, described
The source electrode of the 3rd N-type metal-oxide-semiconductor, the 3rd end of described offset generating circuit, described LDO modules, described functional module
Second end is connected with the second end of described reception and constant current sending module, the drain electrode of described the first N-type metal-oxide-semiconductor with it is described
The second end of the 4th resistance be connected, the source electrode of described the first N-type metal-oxide-semiconductor and the grid of the second described N-type metal-oxide-semiconductor,
The first end of described offset generating circuit, described LDO modules, the first end of described functional module and described reception and
The first end of constant current sending module is connected, the drain electrode of described the second p-type metal-oxide-semiconductor respectively with the second described p-type metal-oxide-semiconductor
Grid, the drain electrode of described second N-type metal-oxide-semiconductor be connected with the grid of the 3rd described p-type metal-oxide-semiconductor, the 3rd described p-type
The drain electrode of metal-oxide-semiconductor is connected with described LDO modules, the source electrode and the 3rd described N-type metal-oxide-semiconductor of described the second N-type metal-oxide-semiconductor
Drain electrode be connected, the described grid of the 3rd N-type metal-oxide-semiconductor is connected with the second end of described offset generating circuit.
In a kind of more preferably implementation method, described current limliting source module also includes the 3rd diode, the described the 3rd 2
The positive pole of pole pipe is connected with the source electrode of the first described N-type metal-oxide-semiconductor, the negative pole and described second of described the 3rd diode
The grid of N-type metal-oxide-semiconductor is connected.
In a kind of more preferably implementation method, described offset generating circuit includes the 4th p-type metal-oxide-semiconductor, the 5th p-type MOS
Pipe, the 4th N-type metal-oxide-semiconductor, the 5th N-type metal-oxide-semiconductor, the second operational amplifier and the 5th resistance, the 5th described resistance are adjustable electric
Resistance, the positive input of the second described operational amplifier connects bandgap voltage reference, described the second operational amplifier it is reverse
Input is connected with the source electrode of the 5th described N-type metal-oxide-semiconductor and the first end of the 5th described resistance respectively, and described second
The positive power source terminal of operational amplifier is connected with the described source electrode of the 5th p-type metal-oxide-semiconductor and the source electrode of the 4th p-type metal-oxide-semiconductor respectively,
The output end of the second described operational amplifier is connected with the grid of the 5th described N-type metal-oxide-semiconductor, described the 5th resistance
Second end is connected with the source electrode of the 4th described N-type metal-oxide-semiconductor and meets bus negative line Ln, the leakage of described the 5th N-type metal-oxide-semiconductor
Pole drain electrode, the grid and the 4th described p-type metal-oxide-semiconductor of the 5th described p-type metal-oxide-semiconductor respectively with the 5th described p-type metal-oxide-semiconductor
Grid be connected, the drain electrode of described the 4th p-type metal-oxide-semiconductor respectively with the drain electrode of the 4th described N-type metal-oxide-semiconductor and described the
The grid of four N-type metal-oxide-semiconductors is connected and exports bias voltage.
In a kind of further embodiment, it is characterised in that described LDO modules include that band-gap reference produces electricity
Road, the first operational amplifier, the first p-type metal-oxide-semiconductor, first resistor, second resistance and the second electric capacity, described band-gap reference are produced
It is the first end of circuit first end respectively with described offset generating circuit, the drain electrode of the first described p-type metal-oxide-semiconductor, described
The first end of second resistance is connected with the first end of the second described electric capacity, and described band-gap reference produces the second end of circuit
Reverse input end line with the first described operational amplifier is connected, described band-gap reference produce the 3rd end of circuit respectively with
The second end phase at second end and described offset generating circuit of the second end of described first resistor and the second described electric capacity
Connection, the input in the same direction of described the first operational amplifier respectively with the second end of described first resistor and described second
The first end of resistance is connected, the positive power source terminal of described the first operational amplifier respectively with the leakage of the 3rd described p-type metal-oxide-semiconductor
Pole is connected with the source electrode of the first described p-type metal-oxide-semiconductor, the output end and a described P of described the first operational amplifier
The grid of type metal-oxide-semiconductor is connected.
In a kind of further embodiment, described second resistance is adjustable resistance.
The utility model is conceived to above-mentioned problem of the prior art and proposes solution, it is therefore an objective to propose a kind of low cost
, the bus-powered of slave chip internal can be directly integrated in and realize circuit, can both meet and bus dash current has been limited
The requirement of system, meets the requirement of slave current peak load, meets the requirement for being quickly actuated for factory's coding, and do not cause
The waste of energy, and the accurate power supply suitable for types of functionality module is produced with simple circuit structure, reach and accurately examine
Survey or meter characteristic.
In order to reach above-mentioned purpose, the bus-powered of slave chip internal is directly integrated in the utility model proposes a kind of
Circuit, circuit structure are realized as shown in Fig. 2 mainly including following components：
1) diode D2：Electric current pours in down a chimney caused by bus voltage is also low than VDD during for preventing bus from sending data；
2) current limliting source module：Size for limiting the electric current that slave chip is extracted from bus；
3) LDO modules：For the high-performance power supply for producing functional module to need；
4) functional module：Various functions for realizing all kinds of slaves, such as the metering of each item data of water, electricity, gas or
Temperature detection, smog alarm detection etc.；
5) receive and constant current sending module：For realize with the function of main-machine communication, by detect bus voltage state come
The data that Receiving Host sends, data are sent by the extra electric current for extracting steady state value from bus to main frame.
The definition of current limit source is：Its output electric current all the time≤setting cut-off current Ilimit.Its working region can be divided
It is linear zone and saturation region, when loading demand value >=cut-off current：Current limliting ource electric current=Ilimit, current limit source is in saturation region；
When loading demand value<During cut-off current：Current limliting ource electric current=load current IL, current limit source is in linear zone.Limited in the utility model
Stream source includes 2 two parts of current limit source 1 and current limit source：Current limit source 1 is, when slave chip starts to start, bus current to be carried out
Limit, now limits value is set to Ilimit1, switch S1 closures, S2 disconnects；When current limit source 2 is slave normal work, to bus electricity
Stream is limited, and now limits value is set to Ilimit2, and switch S1 disconnects, S2 closures.
A kind of specific embodiment of the present utility model is as shown in figure 3, with reference to Fig. 3, circuit work of the present utility model is former
Reason is as described below：Current limit source 1 is made up of R3, ZD2, R4, MN1, and current limit source 2 is by offset generating circuit, MN2, MN3, MP2, MP3 group
Into.
When starting to start, VDD is 0V, and MN2 and MN3 ends in figure, therefore I2=0, and bus current limits value is determined by I1
It is fixed.During startup, by the effect of resistance R3 and voltage-stabiliser tube ZD2, by the grid end voltage stabilization of MN1 in Vzd, so as to produce electric current I1
Charged to electric capacity C2, now the current maxima Ilimit1 of I1 determines that Ibus is about by resistance R4, voltage Vzd and MN1
Ilimit1。
With the charging to electric capacity C2, VDD is gradually increasing, then by offset generating circuit generation biasing VB, by band
Gap reference generating circuit produces band-gap reference Vref, MN3 and MN2 pipe gradually to open, and produces electric current I3, then by by MP2 and MP3
The 1 of composition：The current mirror of n produces electric current I2, simultaneously because the rising of vdd voltage will cause the Vgs of MN1 to reduce, I1 gradually subtracts
Small, when VDD increases to Vzd-Vthn1 (i.e. the Vgs of MN1 is less than its cut-in voltage Vthn1), I1 electric currents are decreased to 0.Now,
Bus current limits value is determined that the current maxima Ilimit2 of I2 is determined by bias voltage VB and current mirror ratio n by I2
It is fixed.So far, slave circuit is just completed from starting to two kinds of cut-off currents of normal work current limit source (i.e. current limit source 1 to current limit source 2)
Switching.
Electric current I2 is produced to continue to be charged to electric capacity C2 by MP1 pipes from current mirror MP2 and MP3, due to the pincers of amplifier AMP1
Position effect, will finally cause vdd voltage stabilization in Vref × (R1+R2)/R1, and so far, I2 current values will be approximately equal to slave circuit
The current value IL of actual consumption.
During slave circuit start, the change schematic diagram of above-mentioned each parameter is as shown in figure 4, by whole start-up course from left to right
It is divided into A, B, C, D four-stage, then the A stages：Current limit source 1 is in saturation region；B-stage：Current limit source 1 is in linear zone；C-stage：
Current limit source 2 is in saturation region；D stages current limit source 2 is in linear zone.The current maxima Ilimit1 of I1 can be by resistance R4, electricity
Pressure Vzd and MN1 freely adjust, thus can easily according to slave starting current and start the time (i.e. factory encode fast
Degree is required) determine.The current maxima Ilimit2 of I2 can freely be adjusted by bias voltage VB.As long as meeting condition：
Vref×(R1+R2)/R1>Vzd-Vthn1, then start after terminating, and starting current I1 will be reduced to 0, limit during slave normal work
Current value Ilimit2 processed is only determined that realizing starting current limits value and running current limits value can set respectively by I2
The function of putting, it is to avoid both slave circuit start speed (factory's coding rate during influence plant produced) and energy utilization rate
Between contradiction.
If technological factor causes Vref × (R1+R2)/R1>Vzd-Vthn1 this condition is unsatisfactory for, can be MN1's
Series diode between source and VDD, as shown in figure 5, increasing diode D3, can as needed increase the number of diode,
One is not limited to, various process conditions are widely used in：
The required precision of usual Ilimit2 is higher, therefore one kind of bias voltage VB realizes circuit as shown in fig. 6, passing through
Bandgap voltage reference and amplifier and current mirror are produced, and can so ensure Ilimit2 degree of precision and good temperature characterisitic,
Its occurrence can configure the size of resistance R5 or the breadth length ratio of MN4 according to different working modes to realize with register
Ilimit2 is adjustable.
During with main-machine communication, using the receiving circuit detection data that are sent come Receiving Host of bus voltage state, by from
The extra electric current for extracting steady state value to send data to main frame in bus.Because starting current limits value and running current are limited
Value processed can be respectively provided with, thus larger Ilimit1 values when both not interfered with normal work in bus the stability of electric current or
The requirement of slave fast powering-up when factory encodes is disclosure satisfy that, while the value of Ilimit2 can be adjusted by configuration register
To the value for being adapted to present load demand, if the controller such as no CPU and can not constantly adjust, because current limit source both can be with work
Work can also be operated in linear zone in saturation region, as long as therefore design Ilimit2=slaves peak load when, can both meet
The carrying load ability of slave, will not also produce the waste of energy.
As shown in Fig. 7 left-halfs, application of the present utility model is illustrated by taking Smoke Detection circuit as an example, designed
The electric current consumed during Ilimit2=smog alarms, then current limit source is operated in saturation region during smog alarm：Ibus is about Ilimit2,
And when dormancy even load is smaller, current limit source is operated in linear zone：The electric current IL that Ibus=is actually needed (is much smaller than
Ilimit2), it is to avoid the waste of energy.By contrast, in Fig. 1 the working condition of prior art then such as Fig. 7 right half parts institute
Show, only a kind of mode of operation in saturation region, in order to be able to make Smoke Detection circuit function normal, can only be by constant-current source output current
Inormal is set to Ilimit2, causes the significant wastage on energy.
Additionally, the voltage of VDD determines finally by band-gap reference Vref in the utility model circuit case study on implementation, resistance R2
Can be trimmed by data signal, so that the proportionate relationship of resistance R2 and resistance R1 is adjusted, therefore vdd voltage can have
Good uniformity and temperature characterisitic, its occurrence can be designed by the ratio of resistance R1, R2, not by technological factor
Influence.
Another circuit implementations of the present utility model as shown in figure 8, from normal work unlike circuit shown in Fig. 5
When limitation electric current mode：The current value of I3 can freely be adjusted by resistance R6 in Fig. 8, compared with circuit shown in Fig. 5, its circuit
Structure is simpler, but the precision and temperature coefficient of Ilimit2 values are worse.
In the technical scheme of bus-powered circuit of the present utility model, wherein each included function device and module dress
Putting can correspond to actual particular hardware circuit structure, therefore these modules and unit can merely with hardware circuit
To realize, it is not necessary to which auxiliary can be automatically obtained corresponding function with specific control software.
Employ the bus-powered circuit in the utility model, it is easier to integrated, be adapted to most widely used at present
CMOS technology, low cost；Current limit value Ilimit2 when the limits value Ilimit1 of electric current is with normal work when slave starts
Can be respectively provided with.Therefore the requirement limited bus dash current can be met, the quick factory that is actuated for is met and compiled
The requirement of code, and the waste of energy is not caused；The value of Ilimit2 can be adjusted to be adapted to current bearing by configuration register
The value of load demand, if the controller such as no CPU and can not constantly adjust, due to the characteristic of current limit source, design Ilimit2=from
During the peak load of machine, the carrying load ability of slave can be both met, will not also produce the waste of energy；For functional module is provided
Power vd D there is good uniformity and temperature characterisitic, occurrence can be designed by the ratio of R1, R2, not by work
The influence of skill factor so that slave circuit can realize high-precision metering or detection characteristic, be with a wide range of applications.
In this description, the utility model is described with reference to its specific embodiment.But it is clear that still can be with
Various modification can be adapted and conversion is without departing from spirit and scope of the present utility model.Therefore, specification and drawings are considered as
It is illustrative and not restrictive.
Claims (6)
1. a kind of bus-powered circuit that can be integrated, it is characterised in that described circuit includes current limliting source module, LDO modules, work(
Can module, receive and constant current sending module and the second diode, described current limliting source module respectively with bus negative line Ln, described
The negative pole of the second diode, described reception and constant current sending module be connected with described LDO modules, described LDO moulds
Block is connected with described functional module and described reception and constant current sending module respectively, described functional module with it is described
Receive and constant current sending module is connected, the positive pole of the second described diode is connected with bus positive line Lp.
2. bus-powered circuit that can be integrated according to claim 1, it is characterised in that described current limliting source module includes
Second p-type metal-oxide-semiconductor, the 3rd p-type metal-oxide-semiconductor, the first N-type metal-oxide-semiconductor, the second N-type metal-oxide-semiconductor, the 3rd N-type metal-oxide-semiconductor, 3rd resistor,
Four resistance, the second voltage-stabiliser tube and offset generating circuit, the first end of described 3rd resistor respectively with the second described diode
Negative pole, the first end of the 4th described resistance, the source electrode of the second described p-type metal-oxide-semiconductor, the source of the 3rd described p-type metal-oxide-semiconductor
Pole is connected with the first end of described reception and constant current sending module, the second end of described 3rd resistor respectively with it is described
The negative pole of the second voltage-stabiliser tube is connected with the grid of the first described N-type metal-oxide-semiconductor, the positive pole of described the second voltage-stabiliser tube respectively with
It is described bus negative line Ln, the source electrode of the 3rd described N-type metal-oxide-semiconductor, the 3rd end of described offset generating circuit, described
LDO modules, the second end of described functional module are connected with the second end of described reception and constant current sending module, described
The drain electrode of the first N-type metal-oxide-semiconductor is connected with the second end of the 4th described resistance, the source electrode of described the first N-type metal-oxide-semiconductor and institute
The grid of the second N-type metal-oxide-semiconductor stated, the first end of described offset generating circuit, described LDO modules, described function mould
The first end of block is connected with the first end of described reception and constant current sending module, and the drain electrode of the second described p-type metal-oxide-semiconductor divides
The grid of grid, the drain electrode of the second described N-type metal-oxide-semiconductor and the 3rd described p-type metal-oxide-semiconductor not with the second described p-type metal-oxide-semiconductor
Pole is connected, and the drain electrode of the 3rd described p-type metal-oxide-semiconductor is connected with described LDO modules, the source of described the second N-type metal-oxide-semiconductor
Pole is connected with the drain electrode of the 3rd described N-type metal-oxide-semiconductor, and the grid of the 3rd described N-type metal-oxide-semiconductor produces electricity with described biasing
Second end on road is connected.
3. bus-powered circuit that can be integrated according to claim 2, it is characterised in that described current limliting source module is also wrapped
The 3rd diode is included, the positive pole of the 3rd described diode is connected with the source electrode of the first described N-type metal-oxide-semiconductor, described
The negative pole of three diodes is connected with the grid of the second described N-type metal-oxide-semiconductor.
4. bus-powered circuit that can be integrated according to claim 2, it is characterised in that described offset generating circuit bag
Include the 4th p-type metal-oxide-semiconductor, the 5th p-type metal-oxide-semiconductor, the 4th N-type metal-oxide-semiconductor, the 5th N-type metal-oxide-semiconductor, the second operational amplifier and the 5th electricity
Resistance, the 5th described resistance is adjustable resistance, and the positive input of the second described operational amplifier connects bandgap voltage reference, institute
The reverse input end of the second operational amplifier stated respectively with the source electrode and the 5th described resistance of the 5th described N-type metal-oxide-semiconductor
First end be connected, the positive power source terminal of described the second operational amplifier respectively with the source electrode of the 5th described p-type metal-oxide-semiconductor and
The source electrode of the 4th p-type metal-oxide-semiconductor is connected, the output end of described the second operational amplifier and the grid of the 5th described N-type metal-oxide-semiconductor
Pole is connected, and the second end of the 5th described resistance is connected with the source electrode of the 4th described N-type metal-oxide-semiconductor and connects bus negative line
Ln, the drain electrode of described the 5th N-type metal-oxide-semiconductor drain electrode, the 5th described p-type metal-oxide-semiconductor respectively with the 5th described p-type metal-oxide-semiconductor
Grid be connected with the grid of the 4th described p-type metal-oxide-semiconductor, the drain electrode of described the 4th p-type metal-oxide-semiconductor is respectively with described the
The drain electrode of four N-type metal-oxide-semiconductors is connected with the grid of the 4th described N-type metal-oxide-semiconductor and exports bias voltage.
5. bus-powered circuit that can be integrated according to claim 4, it is characterised in that described LDO modules include band
Gap reference generating circuit, the first operational amplifier, the first p-type metal-oxide-semiconductor, first resistor, second resistance and the second electric capacity, it is described
Band-gap reference produces the first end first end respectively with described offset generating circuit of circuit, the first described p-type metal-oxide-semiconductor
Drain electrode, the first end of described second resistance are connected with the first end of the second described electric capacity, and described band-gap reference is produced
Second end of circuit is connected with the reverse input end line of the first described operational amplifier, and described band-gap reference produces circuit
3rd end produces electricity with the second end of described first resistor and the second end of the second described electric capacity and described biasing respectively
Second end on road is connected, the input in the same direction of described the first operational amplifier respectively with the second end of described first resistor
First end with described second resistance is connected, and the positive power source terminal of described the first operational amplifier is respectively with the described the 3rd
The drain electrode of p-type metal-oxide-semiconductor is connected with the source electrode of the first described p-type metal-oxide-semiconductor, the output end of described the first operational amplifier with
The grid of the first described p-type metal-oxide-semiconductor is connected.
6. bus-powered circuit that can be integrated according to claim 5, it is characterised in that described second resistance is adjustable
Resistance.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621302193.7U CN206270794U (en) | 2016-11-30 | 2016-11-30 | Bus-powered circuit that can be integrated |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621302193.7U CN206270794U (en) | 2016-11-30 | 2016-11-30 | Bus-powered circuit that can be integrated |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN206270794U true CN206270794U (en) | 2017-06-20 |
Family
ID=59041989
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201621302193.7U Withdrawn - After Issue CN206270794U (en) | 2016-11-30 | 2016-11-30 | Bus-powered circuit that can be integrated |
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| Country | Link |
|---|---|
| CN (1) | CN206270794U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106647923A (en) * | 2016-11-30 | 2017-05-10 | 无锡华润矽科微电子有限公司 | Integratable bus power supply circuit |
| CN110134176A (en) * | 2018-09-05 | 2019-08-16 | 江西联智集成电路有限公司 | LDO circuit and wireless charging system |
-
2016
- 2016-11-30 CN CN201621302193.7U patent/CN206270794U/en not_active Withdrawn - After Issue
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106647923A (en) * | 2016-11-30 | 2017-05-10 | 无锡华润矽科微电子有限公司 | Integratable bus power supply circuit |
| CN110134176A (en) * | 2018-09-05 | 2019-08-16 | 江西联智集成电路有限公司 | LDO circuit and wireless charging system |
| CN110134176B (en) * | 2018-09-05 | 2024-05-28 | 江西联智集成电路有限公司 | LDO circuit and wireless charging system |
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| AV01 | Patent right actively abandoned |
Granted publication date: 20170620 Effective date of abandoning: 20190108 |
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