CN110134176A - LDO circuit and wireless charging system - Google Patents
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- CN110134176A CN110134176A CN201910474349.1A CN201910474349A CN110134176A CN 110134176 A CN110134176 A CN 110134176A CN 201910474349 A CN201910474349 A CN 201910474349A CN 110134176 A CN110134176 A CN 110134176A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
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- G05F3/262—Current mirrors using field-effect transistors only
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Abstract
Present disclose provides a kind of LDO circuit and wireless charging system, LDO circuit includes: LDO module and current detecting and current limliting module;LDO module includes: first comparator, and inverting input terminal is for accessing bandgap voltage reference VBGR;The output end of first PMOS, grid and first comparator connects;Resistance R1, first end are connect with the drain electrode of the first PMOS;Rheostat R2, first end are connect with the second end of resistance R1;And two input multiple selector, first input end connect with the second end of resistance R1, and the non-inverting input terminal of output end and first comparator connects;And current detecting and current limliting module include: current sensor, first end is connect with the grid of the first PMOS, the second input terminal connection of second end and selector;And second comparator, non-inverting input terminal connects with the second input terminal of two input multiple selector, inverting input terminal is used to access reference voltage VBGR, output end with two input multiple selector control terminal connect.Disclosure LDO circuit and wireless charging system reduce circuit cost and complexity.
Description
Technical field
This disclosure relates to a kind of LDO circuit and wireless charging system with current detecting and current-limiting protection.
Background technique
In modern society, more and more using the place of various electronic equipments, range and quantity are also being continuously increased.
These electronic equipments, which are substantially all, to be needed to charge.And at present most of power supply all can by after LDO to subsequent core circuit into
Row power supply.It can not only guarantee the stabilization of power supply in this way, but also can guarantee that circuit works normally.
As shown in Figure 1, AC power source is converted to DC power supply by receiver in wireless charging system, but due to straight
Ripple influences in galvanic electricity source, works normally and has an impact to load, therefore is generally powered by LDO to load circuit.And
How to carry out detection and current-limiting protection circuit to LDO output electric current seems particularly significant to the safety of load circuit, especially
It is for wireless charging system, is to realize stability and high efficiency rate wireless charging to the control for exporting electric current and to the protection of load
The key of system.
Fig. 2 is existing LDO circuit schematic diagram.When VOUT is higher than design value, VFB is higher than VBGR, and amplifier is caused to export
Higher than design value, to make voltage VGS between the grid and source electrode of power tube PMOS reduce, so that main current path electric current subtracts
It is small, so that VOUT reduces.Similarly it is found that loop can make VOUT increase when VOUT is lower than design value.To make VOUT stablize
On design voltage.The apparent defect of one of LDO circuit shown in Fig. 2 is to be unable to control the size of output electric current.In power tube
In the enough situations of driving capability, load resistance is lower, and the electric current for flowing through load is bigger, can not provide in time current limliting to load
Protection.In practical applications, it is possible to which irreversible damage is caused to load.
Fig. 3 is that existing LDO is detected and current-limiting circuit schematic diagram, LDO include current module loop and voltage module loop,
It realizes the closure of two loops by two comparators, the two loops work independently and collective effect is realized in G point
Control to output Current Voltage.The shortcomings that this circuit, is two high-performance comparators of needs, and in wireless charging system,
The two high-performance comparators work under high-pressure situations, it is therefore necessary to high tension apparatus are used, to considerably increase circuit face
Product cost.Meanwhile the circuit uses charge pump module, and G point is made to be in about VRECT+VTHHigh-pressure work state, no
Chip area is increased only, and system stability and power transmission efficiency are had an impact.
Summary of the invention
(1) technical problems to be solved
In view of the above problems, the main purpose of the disclosure is to provide a kind of LDO circuit and wireless charging system, to solve
Certainly at least one of above problem.
(2) technical solution
In order to achieve the above object, as an aspect of this disclosure, a kind of LDO circuit is provided, comprising: LDO module,
And current detecting and current limliting module;Wherein
The LDO module, comprising:
First comparator, inverting input terminal is for accessing a bandgap voltage reference VBGR;
First PMOS, grid are connect with the output end of the first comparator;
Resistance R1, first end are connect with the drain electrode of the first PMOS;
Rheostat R2, first end are connect with the second end of the resistance R1, second end ground connection;And
Two input multiple selector, first input end connect with the second end of the resistance R1, output end and described the
The non-inverting input terminal of one comparator connects;And
The current detecting and current limliting module, comprising:
Current sensor, first end are connect with the grid of the first PMOS, second end and the two inputs multichannel choosing
Select the second input terminal connection of device;And
Second comparator, non-inverting input terminal are connect with the second input terminal of the two inputs multiple selector, and reverse phase is defeated
Enter end for accessing the reference voltage VBGR, output end with it is described two input multiple selector control terminal connect.
In some embodiments, the voltage of the non-inverting input terminal access of second comparator is VLIM, described in comparing
Detect voltage VLIMWith reference voltage VBGR, and control signal OCL_EN is exported according to comparison result;
The control terminal of the two inputs multiple selector is used to receive the control signal OCL_ of the second comparator output
EN, and according to the control signal OCL_EN switching electric current mode loops or voltage mode loop.
In some embodiments, if VLIMHigher than VBGR, then current loop mode is closed, and voltage mode loop disconnects;If VLIM
Lower than VBGR, then voltage mode loop is closed, and current loop mode disconnects.
In some embodiments, the current sensor includes: the 2nd PMOS, the grid of grid and the first PMOS
Connection, source electrode connect with the source electrode of the first PMOS, drain respectively with a resistance RLIMFirst end, it is described two input multichannel
The connection of the non-inverting input terminal of second input terminal of selector and second comparator, the resistance RLIMSecond end ground connection.
In some embodiments, the first PMOS and the 2nd PMOS constitutes common-source common-gate current mirror;2nd PMOS
With the resistance RLIMThe electric current of junction is to detect electric current ILIM, the voltage of junction is to detect voltage VLIM, the two satisfaction
Following relationship: VLIM=ILIM×RLIM。
In some embodiments, the LDO circuit further includes base modules, defeated with the reverse phase of the first comparator
Enter end connection, is used to provide the described reference voltage VBGR。
In some embodiments, the LDO circuit further includes source follower buffers, is connected to described first
Between the output end of comparator and the grid of the first PMOS.
In some embodiments,In formula, Ratio indicates the first PMOS and the 2nd PMOS
Ratio, IOUTIndicate the output current value of LDO, RLIMIndicate detection resistance value.
According to another aspect of the disclosure, a kind of wireless charging system is additionally provided comprising the LDO circuit.
(3) beneficial effect
It can be seen from the above technical proposal that disclosure LDO circuit and wireless charging system at least have below beneficial to effect
One of fruit:
(1) LDO circuit and wireless charging system include current detecting and current limliting module, may be implemented instant current detecting with
And current limliting.
(2) current limliting can be achieved by the switching to voltage mode loop and current-mode loop, and both of which loop is total
With a comparator, avoid reducing circuit cost and complexity using charge pump module.
Detailed description of the invention
Fig. 1 is existing radio force transmission system schematic diagram.
Fig. 2 is existing LDO circuit schematic diagram.
Fig. 3 is existing LDO detection and current-limiting circuit schematic diagram.
Fig. 4 is according to one embodiment LDO circuit schematic diagram of the disclosure.
Fig. 5 is to open the LDO timing diagram closed with current limliting according to one embodiment current limliting of the disclosure.
Fig. 6 is according to another embodiment LDO circuit schematic diagram of the disclosure.
<symbol description>
P1- on piece, under P2- piece;1- AC power source, 2- rectifier, 3-LDO, 4- load, 5,6- comparator, 7- charge pump;
10-LDO module, 20- current detecting and current limliting module;101,201- first comparator, 102, the second comparator of 202-, 103,
203- bis- inputs multiple selector, 104,204- current sensor, 205- source follower buffers, 206- limiter, 207-
Base modules, ER- non-essential resistance, FRC- feedback resistance control (Feedback resistor control).
Specific embodiment
For the purposes, technical schemes and advantages of the disclosure are more clearly understood, below in conjunction with specific embodiment, and reference
Attached drawing is described in further detail the disclosure.
The LDO that the disclosure provides is a kind of LDO circuit with current detecting and current-limiting protection.Compared with existing LDO,
The function that current detecting and current limliting can be only realized with a comparator, avoids using electric charge pump module.
In one embodiment, as shown in figure 4, the LDO circuit includes:
First comparator 101 has an inverting input terminal, a non-inverting input terminal, a power end and an output end, reverse phase
Input terminal is for accessing a bandgap voltage reference VBGR, power end is for accessing supply voltage VDD_5V;Certainly, supply voltage VDD
It is not limited to 5V;
First PMOS MPl, grid connect with the output end of the first comparator 101, connect between source electrode and drain electrode
It is connected to a parasitic diode, source electrode meets voltage VRECT;
Current sensor 104, first end are connect with the grid of the first PMOS MP1, third termination voltage VRECT;
Resistance R1, first end are connect with the drain electrode of the first PMOS MP1;
Rheostat R2, first end are connect with the second end of the resistance R1, second end ground connection;
Second comparator 102, inverting input terminal is for accessing bandgap voltage reference VBGR, non-inverting input terminal and the electricity
The second end of flow sensor connects, for accessing detection voltage VLIM;
Two input multiple selector 103, control terminal are connect with the output end of second comparator 102, the first input
End is connect with the second end of the resistance R1, the second end and second ratio of the second input terminal and the current sensor 104
Non-inverting input terminal compared with device 102 connects, and output end is connect with the non-inverting input terminal of the first comparator 101.
In addition, a load capacitance CLOAD, first end connect with the drain electrode of the first PMOS, second end ground connection;
One load resistance RLOAD, first end connect with the drain electrode of the first PMOS, second end ground connection;Wherein, institute
State load capacitance CLOADWith the load resistance RLOADJunction voltage be VOUT;
One resistance RLIM, first end connect with the second end of the current sensor, second end ground connection, the resistance
RLIMVoltage with the junction of the current sensor is VLIM。
The present embodiment LDO circuit includes voltage mode loop and current-mode loop.It is realized by multiple selector
The disconnection and closure of voltage mode loop and current-mode loop, to switch voltage mode loop and current-mode ring
Road.
Specifically, it is larger when loading, flow through load current IoUTIn lesser situation, second comparator exports OCL_
EN is low level, and the control terminal of the two inputs multiple selector receives the low level of the second comparator output, thus electric
Die pressing type loop closure, current-mode loop disconnect (the of the second end of the resistance R1 and the two inputs multiple selector
Access between one input terminal, between the second end of the current sensor and the second input terminal of the two inputs multiple selector
Open circuit), and the sustainable detection of current detector at this time exports electric current.
It is smaller when loading, flow through load current IoUTBecome larger, VLIMIncrease, in IoUTHigher than cut-off current ILIMIn the case where, it leads
Cause VLIMIncrease to above setting value VBGRWhen, the second comparator output OCL_EN is high level, the two inputs multichannel choosing
The control terminal for selecting device receives the high level of the second comparator output, so that voltage mode loop disconnects, current-mode loop
Closure, exporting electric current at this time can stablize in design maximum, IoUTIt is always cut-off current ILIM, to reach current detecting and limit
The effect of protection is flowed, therefore, the present embodiment LDO circuit realizes current detecting and current limliting.
Fig. 5 is the timing diagram of LDO circuit of the present embodiment with current detecting and current-limiting protection.Wherein, dark solid
Indicate each key signal situation of change when current limliting is opened;Dotted line indicates each key signal situation of change when current limliting is closed.
As shown in figure 5, system is closed at 0 moment of Φ, all signals are in original state.At 1 moment of Φ, VDDIn upper
In the electric stage, each signal is gradually built up at this time, system worked well, and system is in voltage mode loop work shape at this time
State.
At 2 moment of Φ, for opening for current-limiting function, i.e. OCL ON, due to IOUTHigher than cut-off current, so that VLIMIt is higher than
VBGR, leading to OCL_EN is high level, so that system enters current-mode from voltage mode, as long as VLIMHigher than VBGR, defeated
Electric current I outOUTIt is always cut-off current.For not opening for current-limiting function, i.e. OCL OFF, since OCL_EN is low electricity always
Flat, so that system is constantly in voltage mode state, shown in dotted line, system is without metering function, IOUTCut-off current can be higher than.
At 3 moment of Φ, for opening for current-limiting function, i.e. OCL ON, at this time VDDIt begins to decline, due to IOUTStill high
In cut-off current, so that system is current-mode always, electric current I is exportedOUTIt is always cut-off current.For not opening current limliting
For function, i.e. OCL OFF, system is constantly in voltage mode state, due to VDDIt begins to decline, IOUTWith VOUTAlso start slowly
Decline, shown in dotted line.
At 4 moment of Φ, for opening for current-limiting function, i.e. OCL ON, due to VDDIt is gradually reduced, so that IOUTStart low
In cut-off current, VLIMLower than VBGR, leading to OCL_EN is low level, so that system enters voltage mode, I from current-modeOUT
It begins to decline.For not opening for current-limiting function, i.e. OCL OFF, system is constantly in voltage mode state, due to VDDStart
Decline, IOUTWith VOUTAlso start slowly to decline, dotted line is overlapped with solid line at this time, and is eventually returned to 0 moment of Φ.
In another embodiment, as shown in fig. 6, the LDO circuit includes: LDO module and current detecting and current limliting mould
Block;Wherein, the LDO module (LDO core) 10 includes:
Limiter (Limiter) 206, input terminal access rectified voltage VRECT, and output voltage VLIM;
Base modules (BGR) 207, input terminal is connect with the output end of the limiter, for accessing voltage VLIM, and
Outputting reference voltage VBGR;
First comparator 201, inverting input terminal access the bandgap voltage reference VBGR, non-inverting input terminal access is instead
Feedthrough voltage VFB;
Source follower buffers (source follower buffer) 205, one end and the first comparator
Output end connection;
First PMOS, grid are connect with the second end of the source follower buffers, and source electrode meets rectified voltage VRECT,
There is a parasitic diode between its source electrode and drain electrode;
Capacitor C1, first end are connect with the drain electrode of the PMOS;
Resistance R1, first end are connect with the drain electrode of the PMOS;
Rheostat R2, first end are connect with the second end of the resistance R1, second end ground connection;
Two input multiple selector 203, control terminal are used for incoming control signal OCL_EN, first input end and the electricity
The second end connection of R1 is hindered, the second input terminal accesses voltage VLIM, the inverting input terminal of output end and the first comparator
Connection.
The current detecting and current limliting module (current sensor (over current limit)) 20 include:
2nd PMOS 204, grid are connect with the grid of the first PMOS, the source electrode of source electrode and the first PMOS
Connection;
Resistance RLIM, first end connect with the drain electrode of the 2nd PMOS, second end ground connection;
Second comparator 202, inverting input terminal access bandgap voltage reference VBGR, non-inverting input terminal access detection voltage
VLIM, and export the control signal OCL_EN.
In addition, the drain electrode of an external capacitive C2 (external capatitor), first end and the first PMOS connect
It connects, second end ground connection;
One load resistance RLOAD, first end connect with the drain electrode of the first PMOS, second end ground connection.
The present embodiment specifically describes the current detecting and current limliting module.This current detecting and current limliting module pass through electricity
The size of current of form detection the 2nd PMOS of LDO of mirror is flowed, and detection electric current is made to flow through non-essential resistance (ER, External Res)
RLIMObtain detection voltage VLIM, detect voltage VLIMBy with VBGRCompare and comes switching electric current mode loops or voltage mode ring
Road.Work as VLIMHigher than VBGR, system enters current-mode loop;Work as VLIMLower than VBGR, system enters voltage mode loop.Its current limliting
Value can carry out flexible setting by non-essential resistance size.
Wherein, Ratio indicates main PMOS and detects the ratio (width (Width) of PMOS compares) of PMOS, optionally,
Ratio takes 1000: 1, but not limited to this.
The disclosure by switching electric current mode loops and voltage mode loop reached and Fig. 3 similar in effect, with Fig. 3 knot
Structure is compared, and reduction has used a high-performance high pressure comparator, is avoided using charge pump module, is substantially reduced
Circuit cost.
The disclosure successfully applies in wireless charging system chip, and whole efficiency is consistent with expected results higher than 90%.
In addition, the above-mentioned definition to each element and method is not limited in various specific structures, shape or the mode mentioned in embodiment,
Those of ordinary skill in the art simply can be changed or be replaced to it.
It should be noted that the direction term mentioned in embodiment, such as "upper", "lower", "front", "rear", "left", "right"
Deng being only the direction with reference to attached drawing, not be used to limit the protection scope of the disclosure.Through attached drawing, identical element is by identical
Or similar appended drawing reference indicates.When may cause understanding of this disclosure and cause to obscure, conventional structure or structure will be omitted
It makes.And the shape and size of each component do not reflect actual size and ratio in figure, and only illustrate the content of the embodiment of the present disclosure.
In addition, in the claims, any reference symbol between parentheses should not be configured to limitations on claims.
Furthermore word "comprising" or " comprising " do not exclude the presence of element or step not listed in the claims.Positioned at member
Word "a" or "an" before part does not exclude the presence of multiple such elements.
The word of ordinal number such as " first ", " second ", " third " etc. used in specification and claim, with modification
Corresponding element, itself is not meant to that the element has any ordinal number, does not also represent the suitable of a certain element and another element
Sequence in sequence or manufacturing method, the use of those ordinal numbers are only used to enable an element and another tool with certain name
Clear differentiation can be made by having the element of identical name.
Similarly, it should be understood that in order to simplify the disclosure and help to understand one or more of each open aspect,
Above in the description of the exemplary embodiment of the disclosure, each feature of the disclosure is grouped together into single implementation sometimes
In example, figure or descriptions thereof.However, the disclosed method should not be interpreted as reflecting the following intention: i.e. required to protect
The disclosure of shield requires features more more than feature expressly recited in each claim.More precisely, as following
Claims reflect as, open aspect is all features less than single embodiment disclosed above.Therefore,
Thus the claims for following specific embodiment are expressly incorporated in the specific embodiment, wherein each claim itself
All as the separate embodiments of the disclosure.
Particular embodiments described above has carried out further in detail the purpose of the disclosure, technical scheme and beneficial effects
Describe in detail it is bright, it is all it should be understood that be not limited to the disclosure the foregoing is merely the specific embodiment of the disclosure
Within the spirit and principle of the disclosure, any modification, equivalent substitution, improvement and etc. done should be included in the guarantor of the disclosure
Within the scope of shield.
Claims (9)
1. a kind of LDO circuit, comprising: LDO module and current detecting and current limliting module;Wherein
The LDO module, comprising:
First comparator, inverting input terminal is for accessing a bandgap voltage reference VBGR;
First PMOS, grid are connect with the output end of the first comparator;
Resistance R1, first end are connect with the drain electrode of the first PMOS;
Rheostat R2, first end are connect with the second end of the resistance R1, second end ground connection;And
Two input multiple selector, first input end are connect with the second end of the resistance R1, output end and first ratio
Non-inverting input terminal compared with device connects;And
The current detecting and current limliting module, comprising:
Current sensor, first end are connect with the grid of the first PMOS, second end and the two inputs multiple selector
The second input terminal connection;And
Second comparator, non-inverting input terminal are connect with the second input terminal of the two inputs multiple selector, inverting input terminal
For accessing the reference voltage VBGR, output end with it is described two input multiple selector control terminal connect.
2. LDO circuit according to claim 1, wherein
The voltage of the non-inverting input terminal access of second comparator is VLIM, it is used for the detection voltage VLIMWith benchmark electricity
Press VBGR, and control signal OCL_EN is exported according to comparison result;
The control terminal of the two inputs multiple selector is used to receive the control signal OCL_EN of the second comparator output, and
According to the control signal OCL_EN switching electric current mode loops or voltage mode loop.
3. LDO circuit according to claim 2, wherein if VLIMHigher than VBGR, then current loop mode is closed, voltage-mode
Formula loop disconnects;If VLIMLower than VBGR, then voltage mode loop is closed, and current loop mode disconnects.
4. LDO circuit according to claim 1, wherein the current sensor includes: the 2nd PMOS, grid and institute
State the grid connection of the first PMOS, source electrode connect with the source electrode of the first PMOS, drain respectively with a resistance RLIMFirst
The non-inverting input terminal connection at end, the second input terminal of the two inputs multiple selector and second comparator, the electricity
Hinder RLIMSecond end ground connection.
5. LDO circuit according to claim 4, wherein the first PMOS and the 2nd PMOS constitutes cascode current
Mirror;The 2nd PMOS and resistance RLIMThe electric current of junction is to detect electric current ILIM, the voltage of junction is to detect
Voltage VLIM, the two meets following relationship: VLIM=ILIM×RLIM。
6. LDO circuit according to claim 1, further includes, base modules, the inverting input terminal with the first comparator
Connection, is used to provide the described reference voltage VBGR。
7. LDO circuit according to claim 1, further includes, source follower buffers, it is connected to described first and compares
Between the output end of device and the grid of the first PMOS.
8. LDO circuit according to claim 4, wherein
In formula, Ratio indicates the ratio of the first PMOS and the 2nd PMOS, IOUTIndicate the output current value of LDO, RLIMIndicate detection
Resistance value.
9. a kind of wireless charging system comprising such as LDO circuit described in any item of the claim 1 to 8.
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CN103424666A (en) * | 2013-07-18 | 2013-12-04 | 广东电网公司电力科学研究院 | Overhead line fault indicator with voltage detection function |
CN106484017A (en) * | 2015-08-24 | 2017-03-08 | 三美电机株式会社 | Semiconductor Integrated Circuit For Regulator |
CN105186636A (en) * | 2015-10-30 | 2015-12-23 | 杭州士兰微电子股份有限公司 | Power charging circuit |
CN206270794U (en) * | 2016-11-30 | 2017-06-20 | 无锡华润矽科微电子有限公司 | Bus-powered circuit that can be integrated |
CN209946732U (en) * | 2018-09-05 | 2020-01-14 | 江西联智集成电路有限公司 | LDO circuit and wireless charging system |
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