CN110517719A - A kind of method of dynamic N andFlash danger block screening - Google Patents
A kind of method of dynamic N andFlash danger block screening Download PDFInfo
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- CN110517719A CN110517719A CN201910794154.5A CN201910794154A CN110517719A CN 110517719 A CN110517719 A CN 110517719A CN 201910794154 A CN201910794154 A CN 201910794154A CN 110517719 A CN110517719 A CN 110517719A
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- Prior art keywords
- block
- error bit
- threshold value
- dangerous
- voltage
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0614—Improving the reliability of storage systems
- G06F3/0619—Improving the reliability of storage systems in relation to data integrity, e.g. data losses, bit errors
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0638—Organizing or formatting or addressing of data
- G06F3/064—Management of blocks
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/38—Response verification devices
- G11C29/42—Response verification devices using error correcting codes [ECC] or parity check
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/44—Indication or identification of errors, e.g. for repair
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Human Computer Interaction (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- Read Only Memory (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
Abstract
The invention discloses a kind of methods of dynamic N andFlash danger block screening, voltage is can be read into using all in page in the block for occurring ECC Fail under default voltage, and it sees if there is voltage and the Error Bit of page can be dropped to threshold value or less, if being both greater than threshold value T using all Error Bit that voltage reading can be read, this block is then labeled as dangerous block, if having one to read the Error Bit that voltage is read is not more than threshold value T, then think that this block is normal, the invention can filter out in use the dangerous block for causing NandFlash internal characteristic bad, user reads the data of the dangerous block by screening, it is put into normal blocks, and this dangerous block is circumvented and is not used, it avoids because next time has used dangerous block to lead to a system It arranges unstable problem to occur, improves the stability of product.
Description
Technical field
The present invention relates to technical field of data storage, specially a kind of method of dynamic N andFlash danger block screening.
Background technique
NandFlash can still maintain charge in power free situation, and storage mode is based on floating gate (Floating
Gate technology), there are floating grids between grid (control gate) and drain electrode, for storing data.
Storage of the data in NandFlash is stored with form of electrical charges, and grid and mainboard are carried out absolutely using oxidation film
Edge processing, it is possible to make charge storage for a long time, but if oxidation film existing defects or be destroyed, data
It just will receive destruction.
Due to the influence of manufacture craft or hardware electrical characteristic, the data bit meeting that is stored in Nand Flash memorizer
It inverts.In the product of currently used NandFlash, Nand can be all decoded by decoder module, when inverting
Data volume it is larger and when exceeding the error correcting capability of hardware correction module, may will generate loss of data.
So ECC Fail is easy to happen when reading data, so we will be detected in advance than relatively hazardous block
(Dangerous Block) prevents from directly losing data when certain reads data, it would therefore be highly desirable to which a kind of improved technology is come
Solve the problems, such as this in the presence of the prior art.
Summary of the invention
The purpose of the present invention is to provide a kind of methods of dynamic N andFlash danger block screening, in using for Nand
The presence of dangerous block is identified in journey by read-write, it is based on the screening as a result, the user of Nand Flash memorizer can adopt
Different counte-rplan are taken, evading is influenced using dangerous block bring, to solve the problems mentioned in the above background technology.
To achieve the above object, the invention provides the following technical scheme: a kind of side of dynamic N andFlash danger block screening
Method, comprising the following steps:
Step 1: there is ECC Fail using default voltage in NandFlash use process；
Step 2: the reading voltmeter provided using manufacturer, and see that the page of error is read under conditions of each reading voltmeter
When Error Bit, if Error Bit is both greater than threshold value T under conditions of each reading voltmeter, just this block
It is designated as dangerous block；
Step 3: as long as soon as thering is a page to be both greater than threshold value T, explanation by the Error Bit of all reading voltmeters in block
The block is dangerous block, is labeled, and carry out next piece of screening；
Step 4: if all pages need not move through all reading voltmeters and Error Bit can be reduced to threshold value T in block
It is then considered normal block below.
Preferably, ECC Fail is that loss of data occurs in the step 1.
Preferably, Error Bit is error bit in the step 2.
Preferably, in the step 2 Error Bit threshold value T according to ECC error correction capabilities setting, the Error Bit threshold
Value T is decode the limit 85%.
Compared with prior art, the beneficial effects of the present invention are:
The present invention has fully considered that environment temperature, abrasion number, Endurance, the factors such as Error Bit threshold value influence, can be with
Filter out the dangerous block for causing NandFlash internal characteristic bad in use.Number of the user the dangerous block by screening
It according to reading, is put into normal blocks, and this dangerous block is circumvented and is not used, avoid because next time has used dangerous block to lead to one
The unstable problem of series occurs, and improves the stability of product.
Detailed description of the invention
Fig. 1 is flow diagram of the present invention.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
Referring to Fig. 1, the present invention provides a kind of technical solution: a kind of method of dynamic N andFlash danger block screening, packet
Include following steps:
Step 1: there is ECC Fail using default voltage in NandFlash use process；
Step 2: the reading voltmeter provided using manufacturer, and see that the page of error is read under conditions of each reading voltmeter
When Error Bit, if Error Bit is both greater than threshold value T under conditions of each reading voltmeter, just this block
It is designated as dangerous block；
Step 3: as long as soon as thering is a page to be both greater than threshold value T, explanation by the Error Bit of all reading voltmeters in block
The block is dangerous block, is labeled, and carry out next piece of screening；
Step 4: if all pages need not move through all reading voltmeters and Error Bit can be reduced to threshold value T in block
It is then considered normal block below.
In any storage equipment use process using Nand, all loss of data can occur under default voltage.Silent
Recognize under voltage under conditions of there is ECC Fail, can star dangerous block label.To occur ECC Fail's under default voltage
Page (Page) in block (Block) is seen if there is voltage and can be dropped the Error Bit of Page using all voltage that can be read
To below threshold value.If threshold value T is both greater than using all Error Bit that voltage (Retry Table) reading can be read, by this
A block (Block) is labeled as dangerous block.If having one to read the Error Bit that voltage is read is not more than threshold value T, then it is assumed that this
Block (Block) is normal.
Following embodiment is tested with several USB flash disks.
Embodiment one:
It is tested using first USB flash disk, which is 2gb, and the threshold value of the Error Bit of the USB flash disk is 140, in default electricity
It depresses the page in one of block and ECC Fail occurs, the Error Bit of Page is dropped to 120 by subsequent voltage, i.e. judgement should
Block is normal block, shown in green, continues to test, then ECC Fail, subsequent voltage also occurs in the page in another block
The Error Bit of Page is dropped to 95, that is, judges that the block for normal block, continues to test, the page in another block of third time goes out
ECC Fail is showed, the Error Bit of Page is dropped to 80 by subsequent voltage, that is, judges that the block for normal block, continues to test, and is tied
There is ECC Fail in Shu Qianwei, completes test.
There is ECC Fail three times during the test in the present embodiment, is then dropped to Error Bit by voltage
Threshold value 140 is hereinafter, be judged as normal block.
Embodiment two:
It is tested using second USB flash disk, which is 2gb, and the threshold value of the Error Bit of the USB flash disk is 140, in default electricity
It depresses the page in one of block and ECC Fail occurs, the Error Bit of Page is dropped to 85, that is, judges the block by subsequent voltage
It is shown in green for normal block, continue to test, then ECC Fail also occurs in the page in another block, and subsequent voltage will
The Error Bit of Page drops to 170, that is, judge the block for dangerous block, it is shown in red and be marked, continue to test, silent
Recognize the page under voltage in one of block and ECC Fail occur, the Error Bit of Page is dropped to 130, that is, sentenced by subsequent voltage
Break the block be normal block, it is shown in green, continue to test, ECC occurs in the page under default voltage in one of block
The Error Bit of Page is dropped to 110 by Fail, voltage, that is, judge the block for normal block, it is shown in green, continue to test, In
There is ECC Fail in page under default voltage in one of block, and the Error Bit of Page is dropped to 150, that is, judged by voltage
The block is dangerous block, shown in red and be marked, and continues to test, does not occur ECC Fail before terminating.
There are five ECC Fail during the test in the present embodiment, passes through voltage three times for Error Bit wherein having
Threshold value 140 is dropped to hereinafter, this is judged as normal block three times, does not drop Error Bit wherein passing twice through voltage
To threshold value 140 hereinafter, this is judged as dangerous block twice, and is marked.
The present invention has fully considered that the factors such as environment temperature, abrasion number, Endurance, Error Bit threshold value influence,
The dangerous block for causing NandFlash internal characteristic bad can be filtered out in use, user is the dangerous block by screening
Data read, be put into normal blocks, and this dangerous block is circumvented and is not used, avoid because next time has used dangerous block to lead
It causes a series of unstable problems to occur, improves the stability of product.
It although an embodiment of the present invention has been shown and described, for the ordinary skill in the art, can be with
A variety of variations, modification, replacement can be carried out to these embodiments without departing from the principles and spirit of the present invention by understanding
And modification, the scope of the present invention is defined by the appended.
Claims (4)
1. a kind of method of dynamic N andFlash danger block screening, it is characterised in that: the following steps are included:
Step 1: there is ECC Fail using default voltage in NandFlash use process；
Step 2: the reading voltmeter provided using manufacturer, and see that the page of error is read under conditions of each reading voltmeter
When Error Bit, if Error Bit is both greater than threshold value T under conditions of each reading voltmeter, just this block
It is designated as dangerous block；
Step 3: as long as soon as thering is a page to be both greater than threshold value T, explanation by the Error Bit of all reading voltmeters in block
The block is dangerous block, is labeled, and carry out next piece of screening；
Step 4: if all pages need not move through all reading voltmeters and Error Bit can be reduced to threshold value T in block
It is then considered normal block below.
2. a kind of method of dynamic N andFlash danger block screening according to claim 1, it is characterised in that: the step
ECC Fail is that loss of data occurs in rapid one.
3. a kind of method of dynamic N andFlash danger block screening according to claim 1, it is characterised in that: the step
Error Bit is error bit in rapid two.
4. a kind of method of dynamic N andFlash danger block screening according to claim 1, it is characterised in that: the step
For Error Bit threshold value T according to ECC error correction capabilities setting, the Error Bit threshold value T is decode the limit 85% in rapid two.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910794154.5A CN110517719A (en) | 2019-08-27 | 2019-08-27 | A kind of method of dynamic N andFlash danger block screening |
| PCT/CN2019/105122 WO2021035803A1 (en) | 2019-08-27 | 2019-09-10 | Dynamic dangerous block screening method for nand flash |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910794154.5A CN110517719A (en) | 2019-08-27 | 2019-08-27 | A kind of method of dynamic N andFlash danger block screening |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN110517719A true CN110517719A (en) | 2019-11-29 |
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ID=68628031
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910794154.5A Pending CN110517719A (en) | 2019-08-27 | 2019-08-27 | A kind of method of dynamic N andFlash danger block screening |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN110517719A (en) |
| WO (1) | WO2021035803A1 (en) |
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| CN102789813B (en) * | 2012-06-20 | 2015-03-18 | 深圳市江波龙电子有限公司 | Method and device for controlling use of non-least significant bit page in storage device |
| CN105630701B (en) * | 2015-05-29 | 2018-09-14 | 上海磁宇信息科技有限公司 | Data storage device and the reading/writing method for using unavailable page table or unavailable piece of table |
| CN106776109B (en) * | 2016-12-26 | 2020-01-24 | 湖南国科微电子股份有限公司 | Solid state disk reading error detection device and method for detecting reasons of uncorrectable errors |
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2019
- 2019-08-27 CN CN201910794154.5A patent/CN110517719A/en active Pending
- 2019-09-10 WO PCT/CN2019/105122 patent/WO2021035803A1/en active Application Filing
Patent Citations (7)
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|---|---|---|---|---|
| US20140068377A1 (en) * | 2012-08-30 | 2014-03-06 | SK Hynix Inc. | Semiconductor memory device and method of operating the same |
| CN107240411A (en) * | 2016-03-29 | 2017-10-10 | 爱思开海力士有限公司 | Storage system and its operating method |
| US20180107540A1 (en) * | 2016-10-18 | 2018-04-19 | SK Hynix Inc. | Data storage apparatus and operation method thereof |
| US10248501B2 (en) * | 2016-10-18 | 2019-04-02 | SK Hynix Inc. | Data storage apparatus and operation method thereof |
| CN106981314A (en) * | 2017-03-10 | 2017-07-25 | 记忆科技(深圳)有限公司 | A kind of method of the quick error correction of solid state hard disc |
| US20180268919A1 (en) * | 2017-03-20 | 2018-09-20 | SK Hynix Inc. | Data storage device and operating method thereof |
| CN109271275A (en) * | 2018-09-06 | 2019-01-25 | 浪潮电子信息产业股份有限公司 | Bad block marking method, device, equipment and medium in solid state disk |
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| Publication number | Publication date |
|---|---|
| WO2021035803A1 (en) | 2021-03-04 |
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Application publication date: 20191129 |
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