CN102789813B - Method and device for controlling use of non-least significant bit page in storage device - Google Patents
Method and device for controlling use of non-least significant bit page in storage device Download PDFInfo
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- CN102789813B CN102789813B CN201210204528.1A CN201210204528A CN102789813B CN 102789813 B CN102789813 B CN 102789813B CN 201210204528 A CN201210204528 A CN 201210204528A CN 102789813 B CN102789813 B CN 102789813B
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- bit page
- significance bit
- error correction
- critical value
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/349—Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
- G11C16/3495—Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices, e.g. by counting numbers of erase or reprogram cycles, by using multiple memory areas serially or cyclically
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
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- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
The invention is suitable for the technical field of data storage of storage devices, and provides a method and a device for controlling the use of a non-least significant bit page in a storage device; the method comprises the following steps: setting a critical value of the use number of a non-least significant bit page, or a critical value of the error correction number; recording the use number or error correction number of each non-least significant bit page; when the ratio of non-least significant bit pages whose use number of the non-least significant bit page reaches the critical value of the use number or whose error correction number reaches the critical value of the error correction number reaches a preset value, correcting the non-least significant bit pages. With the invention, when the non-least significant bit page in the storage device reaches a critical value of its service life, the non-least significant bit page can still be used continuedly, and thus the service life of the storage device is effectively prolonged; and the practicality is strong.
Description
Technical field
The invention belongs to the technical field of data storage of storer, particularly relate to method and device that in a kind of control store equipment, not least significance bit page uses.
Background technology
Flash memory can be divided into single layer cell flash memory (Single-Level Cell, SLC) and multi-layered unit flash memory (Multi-Level Cell, MLC) according to its internal framework.Flash memory internal comprises multiple storage block, and each storage block is made up of multiple page.In SLC, the serviceable life (namely wipe, read and write number of times) of all pages is all identical, more than 100,000 times.And in MLC, only having the serviceable life of least significant bit page can reach the serviceable life of page in SLC, its serviceable life about 10,000 times are only had for not least significance bit page.
Prior art adopts the mode of " balance abrasion " to use MLC, even if the used time, to ensure the erasing of each page, read-write number of times basically identical as far as possible.But, because least significant bit page in MLC is different with the erasable number of times of not least significance bit page, when the erasable number of times of not least significance bit page reaches capacity, make mistakes when whole flash memory will be caused to scrap or use, as obliterated data, can not data etc. be stored.
Therefore, " balance abrasion " mode of employing just improves the overall utilization rate to flash memory in same equal life, fail to improve the serviceable life of least significant bit page in flash memory, namely when the life-span of not least significance bit page, use reached capacity, whole service life of flash memory also will reach capacity, but the serviceable life of least significant bit page does not also reach capacity in MLC, waste the part serviceable life of least significant bit page.
Summary of the invention
The object of the embodiment of the present invention is to provide a kind of method and device that in control store equipment, not least significance bit page uses, to extend the serviceable life of MLC.
The embodiment of the present invention is achieved in that a kind of method that in control store equipment, not least significance bit page uses, and described method comprises:
The critical value of not least significance bit page access times or the critical value of error correction number are set;
Record access times or the error correction number of each not least significance bit page;
When in described not least significance bit page, access times reach the critical value of described access times, or when the error correction number ratio that reaches the not least significance bit page of the critical value of described error correction number reaches preset value, revise described not least significance bit page.
Another object of the embodiment of the present invention is to provide the device that in a kind of control store equipment, not least significance bit page uses, and described device comprises:
Setting unit, for the critical value of the critical value or error correction number that arrange not least significance bit page access times;
Counting unit, for recording access times or the error correction number of each not least significance bit page;
Control module, for reaching the critical value of described access times when access times in described not least significance bit page, or when the ratio that error correction number reaches the not least significance bit page of the critical value of described error correction number reaches preset value, revise described not least significance bit page.
An object again of the embodiment of the present invention is to provide a kind of memory device, and described memory device comprises the device that in described control store equipment, not least significance bit page uses.
As can be seen from technique scheme, the embodiment of the present invention is by the critical value of the critical value or error correction number that arrange not least significance bit page access times, when in described not least significance bit page, access times reach the critical value of described access times, or when the ratio that error correction number reaches the not least significance bit page of the critical value of described error correction number reaches preset value, revise described not least significance bit page, make revised memory device when its not least significance bit page reaches the critical value in its serviceable life, least significant bit page still can continue to use, thus effectively extend the serviceable life of described memory device, there is stronger practicality.
Accompanying drawing explanation
In order to be illustrated more clearly in the technical scheme in the embodiment of the present invention, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is the realization flow figure of not least significance bit page using method in the control store equipment that provides of the embodiment of the present invention one;
Fig. 2 is the composition structural drawing of not least significance bit page operative installations in the control store equipment that provides of the embodiment of the present invention two.
Embodiment
In order to make object of the present invention, technical scheme and advantage clearly understand, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the present invention, be not intended to limit the present invention.
In order to technical solutions according to the invention are described, be described below by specific embodiment.
embodiment one:
Fig. 1 shows the realization flow of not least significance bit page using method in control store equipment that the embodiment of the present invention one provides, and details are as follows for the method process:
In step S101, the critical value of not least significance bit page access times or the critical value of error correction number are set.
In the present embodiment, described access times comprise the number of times such as erasing, read-write.The critical value of described error correction number refers to number of errors in any not least significance bit page and exceedes the maximal value of error-correcting code correctable error.
In step s 102, access times or the error correction number of each not least significance bit page is recorded.
In the present embodiment, record the access times of each not least significance bit page by counting unit etc., namely not least significance bit page is often once wiped or read-write operation, and counting unit adds 1.Or the error correction number of each not least significance bit page is recorded by counting unit etc., not least significance bit page is when repeatedly reading and writing, data may be made mistakes, along with the increase of read-write number of times, number of errors will increase, when in any not least significance bit page, number of errors exceedes the maximal value of error-correcting code correctable error, this not least significance bit page will be destroyed.Therefore, in order to prevent not least significance bit page to be destroyed, the error correction number of each not least significance bit page can be recorded, when described error correction number reaches the critical value of error correction number, processing accordingly.
In step s 103, when in described not least significance bit page, access times reach the critical value of described access times, or when the ratio that error correction number reaches the not least significance bit page of the critical value of described error correction number reaches preset value, revise described not least significance bit page, can also continue to make the least significant bit page in revised memory device to use.
It should be noted that, critical value in the present embodiment, preset value for main body be not " each " not least significance bit page, but the not least significance bit page of " great majority " in flash memory, namely when the access times of " most of not least significance bit page ", or error correction number of times is when reaching critical value, then not least significance bit pages all in flash memory is revised.Such as, 100 not least significance bit pages are had in a flash memory, the critical value of each not least significance bit page access times is 1000, when in flash memory 90% not least significance bit page access times reach 1000 time, then revise not least significance bit pages all in this flash memory.
Preferably, revise described not least significance bit page specifically to comprise:
Judge in described memory device, whether not least significance bit page and least significant bit page are separate management;
If not, described not least significance bit page and relevant information thereof is deleted;
If so, the file system of described not least significance bit page correspondence is deleted, or by the state position that pre-sets in effective status, to stop the operation to not least significance bit page.
In the present embodiment, when revising described not least significance bit page, first described memory device volume production pattern is first judged, when volume production pattern is not least significance bit page and least significant bit page managed mixed mode first, in described not least significance bit page, access times reach the critical value of described access times, or when the ratio that error correction number reaches the not least significance bit page of the critical value of described error correction number reaches preset value, memory device described in volume production again, delete not least significance bit page and relevant information (comprising the storage address information etc. of not least significance bit page correspondence) thereof in described memory device, now in described memory device, not least significance bit page can not re-use, the storage space of described memory device diminishes, but least significant bit page still can continue to use in described memory device.
When the pattern of volume production is first not least significance bit page and least significant bit page separate management pattern, namely all least significant bit page composition parts, all not least significance bit page composition parts, every part has the file system of its correspondence.In described not least significance bit page, access times reach the critical value of described access times, or when the ratio that error correction number reaches the not least significance bit page of the critical value of described error correction number reaches preset value, delete the file system corresponding to that part of described not least significance bit page composition, all not least significance bit pages in described memory device can not be re-used, but in described memory device, least significant bit page still can continue to use.
Or, when the pattern of volume production be first not least significance bit page and least significant bit page separate management pattern time, in advance a mode bit can also be set in described memory device, the original state of described mode bit is disarmed state, and in described memory device, all not least significance bit pages and least significant bit page all can use.When in described not least significance bit page, access times reach the critical value of described access times, or when the ratio that error correction number reaches the not least significance bit page of the critical value of described error correction number reaches preset value, by described state position in effective status, now, in described memory device, all not least significance bit pages can not re-use, but in described memory device, least significant bit page still can continue to use.
It should be noted that, " ratio " described in the present embodiment exists different from " number ", " number " is a static value, and " ratio " is a dynamic value, if what such as arrange is " number ", " number " is 6, and certain memory device storage space is less, its not least significance bit page only has 5, the critical value of described access times is then reached at the access times of all not least active page positions, or when error correction number reaches the critical value of described error correction number, still cannot meet the condition of correction.And if setting is " ratio ", such as " ratio " is 60%, if not least significance bit page only has 5, as long as so wherein the access times of 3 not least significance bit pages reach the critical value of described access times, or when error correction number reaches the critical value of described error correction number, then can revise.
As another preferred embodiment of the present invention, in order to protect the data stored, facilitate user to the management storing data, improve the satisfaction that user uses, before the step of described correction described not least significance bit page, described method also comprises:
Data in not least significance bit page described in prompting user ID.
The embodiment of the present invention, by revising described not least significance bit page, makes the least significant bit page in revised memory device can also continue to use, effectively extends the serviceable life of described memory device, have stronger practicality.
embodiment two:
Fig. 2 shows the composition structure of not least significance bit page operative installations in control store equipment that the embodiment of the present invention two provides, for convenience of explanation, illustrate only the part relevant to the embodiment of the present invention.
In this control store equipment, not least significance bit page operative installations can be applied in memory device, can be the software unit run in memory device, the unit that combines of hardware cell or software and hardware, also can be integrated in memory device as independently suspension member or run in the application system of memory device.
In this control store equipment, not least significance bit page operative installations comprises setting unit 21, counting unit 22 and control module 23.Wherein, the concrete function of each unit is as follows:
Setting unit 21, for the critical value of the critical value or error correction number that arrange not least significance bit page access times;
Counting unit 22, for recording access times or the error correction number of each not least significance bit page;
Control module 23, for reaching the critical value of described access times when access times in described not least significance bit page, or when the ratio that error correction number reaches the not least significance bit page of the critical value of described error correction number reaches preset value, revise described not least significance bit page.
Further, described control module 23 comprises:
Judge module 231, for judging in described memory device, whether not least significance bit page and least significant bit page are separate management;
Control module 232, for when described judge module 231 judged result is no, deletes described not least significance bit page and relevant information thereof; Or when described judge module 231 judged result is for being, delete the file system of described not least significance bit page correspondence; Or when described judge module 231 judged result is for being, by the state position that pre-sets in effective status, to stop the operation to not least significance bit page.
Preferably, in order to protect the data stored, facilitate user to the management storing data, described control module 23 also comprises:
Backup module 233, for before the described not least significance bit page of correction, the data in not least significance bit page described in prompting user ID.
Not least significance bit page using method in the control store equipment that in the control store equipment that the present embodiment provides, not least significance bit page operative installations can be used in aforementioned correspondence, details, see the associated description of not least significance bit page using method embodiment one in above-mentioned control store equipment, do not repeat them here.
One of ordinary skill in the art will appreciate that what unit included by above-described embodiment two and module just carried out dividing according to function logic, but be not limited to above-mentioned division, as long as corresponding function can be realized; In addition, the concrete title of each functional unit and module, also just for the ease of mutual differentiation, is not limited to protection scope of the present invention.
In sum, the embodiment of the present invention is by the critical value of the critical value or error correction number that arrange not least significance bit page access times, when in described not least significance bit page, access times reach the critical value of described access times, or when the ratio that error correction number reaches the not least significance bit page of the critical value of described error correction number reaches preset value, revise described not least significance bit page in several ways, make the least significant bit page in revised memory device can also continue to use, effectively extend the serviceable life of described memory device, there is stronger practicality.And in order to protect the data stored, facilitate user to the management storing data, and improve the satisfaction that user uses, before the described not least significance bit page of correction, the data in not least significance bit page described in prompting user ID.
Above content is in conjunction with concrete preferred implementation further description made for the present invention, can not assert that specific embodiment of the invention is confined to these explanations.For general technical staff of the technical field of the invention; make some equivalent alternative or obvious modification without departing from the inventive concept of the premise; and performance or purposes identical, all should be considered as belonging to the scope of patent protection that the present invention is determined by submitted to claims.
Claims (5)
1. the method that in control store equipment, not least significance bit page uses, it is characterized in that, described method comprises:
The critical value of not least significance bit page access times or the critical value of error correction number are set;
Record access times or the error correction number of each not least significance bit page;
Judge described memory device volume production pattern first;
When volume production pattern is not least significance bit page and least significant bit page managed mixed mode first, and access times reach the critical value of described access times in described not least significance bit page, or when the ratio that error correction number reaches the not least significance bit page of the critical value of described error correction number reaches preset value, delete not least significance bit page and relevant information thereof in described memory device;
When the pattern of volume production is first not least significance bit page and least significant bit page separate management pattern, and access times reach the critical value of described access times in described not least significance bit page, or when the ratio that error correction number reaches the not least significance bit page of the critical value of described error correction number reaches preset value, by the state position pre-set in effective status to stop the operation of not least significance bit page or the file system of deleting described not least significance bit page correspondence.
2. the method for claim 1, is characterized in that, before the step judging described memory device volume production pattern first, also comprises:
Data in not least significance bit page described in prompting user ID.
3. the device that in control store equipment, not least significance bit page uses, it is characterized in that, described device comprises:
Setting unit, for the critical value of the critical value or error correction number that arrange not least significance bit page access times;
Counting unit, for recording access times or the error correction number of each not least significance bit page;
Control module, described control module comprises judge module and control module;
Described judge module, for judging described memory device volume production pattern first;
Described control module, for ought volume production pattern be not least significance bit page and least significant bit page managed mixed mode first, and access times reach the critical value of described access times in described not least significance bit page, or when the ratio that error correction number reaches the not least significance bit page of the critical value of described error correction number reaches preset value, delete not least significance bit page and relevant information thereof in described memory device; When the pattern of volume production is first not least significance bit page and least significant bit page separate management pattern, and access times reach the critical value of described access times in described not least significance bit page, or when the ratio that error correction number reaches the not least significance bit page of the critical value of described error correction number reaches preset value, by the state position pre-set in effective status to stop the operation of not least significance bit page or the file system of deleting described not least significance bit page correspondence.
4. device as claimed in claim 3, it is characterized in that, described control module also comprises:
Backup module, for judging described memory device first before volume production pattern, the data in not least significance bit page corresponding stored address described in prompting user ID.
5. a memory device, is characterized in that, described memory device comprises the device that in the control store equipment described in claim 3 or 4, not least significance bit page uses.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210204528.1A CN102789813B (en) | 2012-06-20 | 2012-06-20 | Method and device for controlling use of non-least significant bit page in storage device |
| PCT/CN2013/075272 WO2013189212A1 (en) | 2012-06-20 | 2013-05-07 | Method and device for controlling use of non-least-significant bit page in storage device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201210204528.1A CN102789813B (en) | 2012-06-20 | 2012-06-20 | Method and device for controlling use of non-least significant bit page in storage device |
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| CN102789813A CN102789813A (en) | 2012-11-21 |
| CN102789813B true CN102789813B (en) | 2015-03-18 |
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| CN102789813B (en) * | 2012-06-20 | 2015-03-18 | 深圳市江波龙电子有限公司 | Method and device for controlling use of non-least significant bit page in storage device |
| CN104572489B (en) | 2013-10-23 | 2019-12-24 | 深圳市腾讯计算机系统有限公司 | Wear leveling method and device |
| KR102182368B1 (en) * | 2013-12-19 | 2020-11-24 | 에스케이하이닉스 주식회사 | Circuit for detecting address and memory including the same |
| CN111370048A (en) * | 2018-12-25 | 2020-07-03 | 北京兆易创新科技股份有限公司 | Method and device for processing programming state of nonvolatile memory |
| CN110517719A (en) * | 2019-08-27 | 2019-11-29 | 江苏华存电子科技有限公司 | A kind of method of dynamic N andFlash danger block screening |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102214143A (en) * | 2010-04-06 | 2011-10-12 | 深圳市江波龙电子有限公司 | Method and device for managing multilayer unit flash memory, and storage equipment |
| CN102298543A (en) * | 2011-09-15 | 2011-12-28 | 成都市华为赛门铁克科技有限公司 | Memory management method and memory management device |
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| KR101541736B1 (en) * | 2008-09-22 | 2015-08-04 | 삼성전자주식회사 | LSB page recovering method for multi-level cell flash memory device |
| CN101794253B (en) * | 2009-02-04 | 2012-08-22 | 威刚科技股份有限公司 | Memory storage device and control method thereof, and hot data control module |
| CN102789813B (en) * | 2012-06-20 | 2015-03-18 | 深圳市江波龙电子有限公司 | Method and device for controlling use of non-least significant bit page in storage device |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102214143A (en) * | 2010-04-06 | 2011-10-12 | 深圳市江波龙电子有限公司 | Method and device for managing multilayer unit flash memory, and storage equipment |
| CN102298543A (en) * | 2011-09-15 | 2011-12-28 | 成都市华为赛门铁克科技有限公司 | Memory management method and memory management device |
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| WO2013189212A1 (en) | 2013-12-27 |
| CN102789813A (en) | 2012-11-21 |
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