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CN1190795A - 采用单层陶瓷基板的芯片大小组件半导体 - Google Patents

采用单层陶瓷基板的芯片大小组件半导体 Download PDF

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Publication number
CN1190795A
CN1190795A CN97114383A CN97114383A CN1190795A CN 1190795 A CN1190795 A CN 1190795A CN 97114383 A CN97114383 A CN 97114383A CN 97114383 A CN97114383 A CN 97114383A CN 1190795 A CN1190795 A CN 1190795A
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China
Prior art keywords
chip
substrate
semiconductor assembly
signal circuit
die size
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CN97114383A
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English (en)
Inventor
孔炳植
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SK Hynix Inc
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Hyundai Electronics Industries Co Ltd
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Publication of CN1190795A publication Critical patent/CN1190795A/zh
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Abstract

一种采用单层陶瓷基板的芯片大小组件半导体,包括:在其中央部形成引线焊盘的芯片;在中央部形成规定尺寸的四角形的长方形孔的规定尺寸陶瓷板材料的上表面上设置芯片的基板;用于把芯片安装到基板上表面上的附着构件;分别安装于信号电路的球点电极安装部并与外部电路连结的球点电极;充填于芯片和基板之间保持芯片和基板的涂覆部,其目的在于使组件的厚度更薄且可靠性提高。

Description

采用单层陶瓷基板的芯片 大小组件半导体
本发明涉及一种芯片大小组件(CSP:Chip Size Package)半导体,特别涉及一种为了原封不动地收容现有的LOC(Lead On Chip)方式的芯片而采用特殊设计的单层陶瓷基板(sub-strate),进一步缩小组件厚度提高生产率的新的芯片大小组件半导体。
一般说来,为使半导体组件小型化,已提出了一种芯片大小组件半导体。所述芯片大小组件半导体(以下称之为CSP半导体)示出了完成后的组件尺寸与芯片的尺寸相同,或者比芯片的尺寸再大1mm或再大20%左右的组件,以其轻薄小型化为目的,被进行了多种方式的开发。
下面,简单地说明两种现有技术的CSP半导体。
图1示出了收容LOC方式芯片的现有CSP半导体。所述CSP半导体由LOC用芯片1和在所述芯片1下面的规定位置上通过粘合带4支持的引线框2构成,在所述芯片1和引线框2之间进行引线焊接从而相互连接起来,并且为了全体结构的支持、保护及绝缘,用模压化合物进行成形。
但是,由于所述CSP半导体利用预先以一定形态形成的现有引线框,故降低了工作效率。在进行模压作业时,存在着在芯片与引线框之间产生没有充填模压化合物的空洞的危险,而且,有引线框产生变形的危险。还有,在进行修边(Trim)工序时,在引线框的附近有产生组件芯片碎屑(Chipping)和龟裂的可能性,存在以难以调整组件厚度的问题。
为了解决上述问题,已提出了一种采用高热加工陶瓷(Co-Fried Ceramic)基板的CSP结构。即,提出了在陶瓷基板上形成信号电路之后,在用通孔(via-hole)连接基板两面的信号路径的结构的上面,安装已形成突点的芯片并不使其充满涂料的CSP半导体。
然而,采用上述陶瓷基板的CSP半导体在形成基板后,由于难以在正确位置上加工用于连接基板两面的信号路径的孔,故增大了制作基板的费用,难以大量生产,此外,还存在因在基板与芯片之间介以突点而限制组件厚度缩小的问题。
鉴于上述问题,本发明的目的在于提供一种作为用于支持芯片的基座而使用的特殊制作的单层陶瓷基板,并采用原封不动地收容现有的LOC方式的半导体芯片的办法,提供一种比现有的CSP组件轻薄小型化的芯片大小组件半导体。
本发明的另一个目的在于提供一种通过形成多片基板的办法可以以低成本大量产生的芯片大小组件半导体。
本发明的又一目的在于提供一种通过采用以陶瓷材料制作的基板,使在工作中产生的热量容易放出而使其寿命延长的芯片大小组件半导体。
本发明的再一目的在于提供一种不是用现有技术的模压工序,而是在用毛细管形状的器具使之不充满涂覆剂的情况下组装组件,以提高组件的可靠性并使工序时间缩短的芯片大小组件半导体。
为达到上述目的,本发明包括:
在其中央部形成引线焊盘的芯片;
在所述中央部形成规定形状的长方形孔,至少在一个表面上形成信号电路并在其上表面设置该芯片的基板;
把所述芯片附着固定到所述基板的上面,使所述芯片的焊盘定位于所述长方形孔上部的附着构件;
用于保持所述芯片和所述基板的保持装置,以及安装于所述基板的信号电路图形上并形成外部电路的多个球点电极的构件,其目的在于提供一种通过所述长方形孔用金属线把芯片的焊盘和基板的信号电路相互连接起来并形成内部电路的芯片大小组件半导体。
附图的简要说明如下:
图1是表示现有的芯片大小半导体的剖视图。
图2A和图2B是表示本发明涉及的芯片大小组件的透视图和剖视图。
图3A、图3B、图3C是表示本发明涉及的芯片大小组件半导体的基板的侧视图、上部平面图和下部平面图。
图4A、图4B是表示把LOC粘合用带安装到图3的基板上部的组装状态的剖视图和平面图。
图5A、图5B是表示在图4的组装状态下把芯片设置于粘合带上的组装状态的剖视图和平面图。
图6A、图6B是表示在图5的组装状态下用金属线连接基板与芯片之间的组装状态的剖视图和平面图。
图7A、图7B是表示在图6的组装状态下用未充满溶液涂覆的状态的剖视图和平面图。
图8A、图8B是表示在图7的组装状态下把球点电极安装到基板下面球点电极安装部且表示组装完成后状态的剖视图和平面图。
下面,参照附图详细地说明本发明涉及的芯片大小组件半导体的一个实施例的构成。
图2A示出了本发明涉及的CSP半导体的整体形状。图2B示出了图2A的CSP半导体的剖面结构。图3A、图3B、图3C示出了本发明涉及的CSP半导体的单层陶瓷基板的剖面、上表面和下表面结构。参照图2和图3,附图标号21表示芯片,22表示基板,22a表示长方形孔,22b表示基板上表面,22c表示基板下表面,23表示粘合带,24表示金属线,25表示球点电极,26表示未充满涂覆剂部分,30表示信号电路,31表示球点电极安装部。
如图所示,本发明包括:LOC方式的芯片21;在中央部形成规定大小的长方形孔22a,且在下表面22c上形成信号电路30的图形,将所述芯片安装在其上的单层陶瓷基板22;用于把所述芯片21粘附于所述基板22的上表面22b上的LOC附着用粘合带23;通过所述基板22的长方形孔22b把所述芯片21与形成于所述基板22的下表面22c上的信号电路30的引线焊接部分连接起来的金属线24;分别安装于在所述信号电路30上形成的多个球点电极安装部31上,构成外部电路的球点电极25;以及用于保持上述构成要素的未充满涂覆剂部26。
下面再说明作为本发明的主要特征的所述基板,如图3所示,所述基板是单层的陶瓷材料,作为本发明涉及的CSP半导体的基座发挥其作用,在其中央部的规定位置上形成有规定大小的长方形孔22a,在该上表面上不形成任何图形,而只在其下表面22c上形成信号电路30的图形。
所述图形的形成是用无电解镀膜法在基板下表面22c上镀镍之后,用电解镀膜法实施镀金而形成。
所述信号电路30,由在图3中以虚线示出的引线焊接部和形成于所述信号电路30端部的球点电极安装部31构成。所述引线焊接部通过所述长方形孔22a用金属线24直接与芯片连接,把球点电极25分别安装到各个所述球点电极安装部31上,并使之与PCB(Printed Circuit Board)的图形连结。另外,在所述基板22的下表面22c上,将除所述引线焊接部和所述球点电极安装部外的部分用电介质材料进行涂覆使之绝缘。如上所述,本发明适用只在下表面22c上形成信号电路图形的单层陶瓷基板,在芯片与基板之间不需要突点而用金属线直接连接,这样,组件的厚度可以制作得比现有的CSP半导体更薄些,上述基板由于在中央部形成有规定大小的单个长方形孔,而不需要在现有的基板上形成正确定位的多个孔,故加工和制作变得容易了。因此,可以节省制作费用和大量产生。
又因陶瓷的散热性能良好,在芯片工作时,容易发散所产生的热,故可延长热匹配应力低下的芯片的寿命。
下面,参照图4至图8,说明组装采用上述单层陶瓷基板的CSP半导体的过程。
首先,如图4A、图4B所示,把LOC附着用粘合带23附着到所述基板22的上表面22b上,而且分别安装在形成于中央的长方形孔22a的两侧。
接着,如图5A、图5B所示,把芯片安装到所述粘合带23上,使得芯片21的中心定位于所述基板22的上表面22a的上部。
其次,如图6A、图6B所示,用金属线连接配置在所述基板22的中央长方形孔22a间的引线焊盘和露出于所述基板22的下表面22c的信号电路30的引线焊接部(用虚线表示的部分)。
在完成引线焊接之后,如图7A、图7B所示,注入象环氧系树脂之类的涂覆溶液形成未充满涂覆部26。这时,用毛细管状器具把所述溶液自然地充填到芯片21和基板22之间形成的狭窄间的间隙内。被注入的所述溶液的量调节为使得完全地一直浸没到芯片21的顶端为止。在所述未充满溶液的充填完成之后,为了使之硬化而实施固化处理。其结果,省去了用于现有的CSP半导体的模压作业,具有消除在模压作业中产生的组件内部发生空洞部和基板的变形问题的效果。如上所述,上述效果是通过利用毛细管器具把涂覆溶液自然地充填到芯片和基板之间形成的间隙内而达到的。
接着,对完成所述工序之后的产品用溶剂处理在所述基板22的下表面22c上的信号电路30的端部上形成的多个球点电极安装部31,如图8A、图8B所示,把球点电极25安置到所述球点电极安装部31上以后,用红外线加热装置进行加热安装球点电极25。
以上分成各个阶段说明组装一个本发明涉及的CSP半导体的过程,若把所述陶瓷基板制作成多片(multi)基板状态在上述的组装阶段中实施CSP半导体组装作业,然后,再沿已形成的切断线切断就可以大量产生单个CSP半导体。其结果,可以提高花费于整个CSP半导体组装工序的生产率和作业性。
本发明不限于上述实施例,在不脱离其基本构思的范围内还可以有种种变更。
本发明比现有的组件提高了可靠性,同时可以得到厚度更薄的组件,并且由于提高了热发散能力而使寿命延长,在制作工序中,具有缩短工序、节省制作费用、提高作业性和生产效率的效果。

Claims (5)

1.一种芯片大小组件半导体,包括:
在其中央部形成有引线焊盘的芯片;
在所述中央部形成规定形状的长方形孔,至少在一个表面上形成信号电路并在其上表面上设置所述芯片的基板;
用于把所述芯片附着、固定到所述基板的上表面上,使所述芯片的焊盘定位于所述长方形孔上部的附着构件;
用于保持所述芯片和所述基板的保持装置;
安装于所述基板的信号电路图形上,并形成外部电路的多个球点电极的构件,
通过所述长方形孔,用金属线把芯片的焊盘和基板的信号电路相互连接起来并形成内部电路。
2.根据权利要求1所述的芯片大小组件半导体,其特征在于,还包括把从芯片引出的金属线连接到所述信号电路上去的多个引线焊接部和安装固定所述球点电极构件的球点电极安装部。
3.根据权利要求2所述的芯片大小组件半导体,其特征在于,在所述基板形成的信号电路的表面上,用电介质涂覆除所述引线焊接部和球点电极部以外的其余部分。
4.根据权利要求1所述的芯片大小组件半导体,其特征在于,所述基板是由具有规定尺寸与形状的陶瓷板材料形成的。
5.根据权利要求1所述的芯片大小组件半导体,其特征在于,所述保持装置是以规定量的涂覆用树脂溶液注入并充填到所述芯片和所述基板之间,然后通过热处理使所充填的树脂溶液固化而成。
CN97114383A 1996-12-18 1997-12-18 采用单层陶瓷基板的芯片大小组件半导体 Pending CN1190795A (zh)

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US5920118A (en) 1999-07-06
KR100248792B1 (ko) 2000-03-15
JP3491003B2 (ja) 2004-01-26
GB2320616B (en) 2002-01-16

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