CN103595419A - N-bit binary-system electro-optic odd-even checker - Google Patents

Abstract

The invention discloses an odd-even check technology in the technical field of optical communication. An electro-optic odd-even checker is formed by N microring resonators (MRRs) and two bent nanowire waveguides, wherein the MRRs are made of semiconducting material on insulators, each MRR is respectively coupled with the two nanowire waveguides, and a spacer or an insulator is arranged between every two adjacent MRRs and can prevent thermal crosstalk between the two adjacent MRRs. Compared with an electric odd-even checker, the electro-optic odd-even checker has the advantages of being small in size, low in power consumption, high in speed, good in expansibility and capable of being integrated with an electric element conveniently, and has excellent application prospects in an optical communication network.

Description

An N-bit binary electro-optical parity checker

technical field

The present invention relates to the technical field of optical communication, in particular to an N-bit binary electro-optic parity checker, which is especially suitable for the future optical communication and optical computing fields.

Background technique

With the rapid development of semiconductor technology, the integration of chips or integrated circuits is getting higher and higher, and the CPU can already obtain GHZ-level operating frequency, but the most serious problem brought by high frequency is that the power consumption per unit area of the circuit rises sharply At the same time, due to the further shrinking of the size of integrated components, the leakage and heat dissipation problems cannot be solved well, and the myth of Moore's Law is constantly being challenged. There are various indications that using electrons as information carriers can no longer meet people's requirements for faster processing speeds, while optical communication and optical computing systems use photons as information carriers, replace wire interconnections with optical interconnections, and replace electronic hardware with photonic hardware. Optical calculation replaces electrical calculation, and the integrated optical path is composed of optical fiber and various optical components, which can greatly improve the ability of data calculation, transmission and storage, and has attracted the attention of more and more researchers.

Electro-optic parity checkers are essential elements in optical communication and computing networks. Traditional electrical parity checkers are implemented using gate circuits, which have great disadvantages in terms of power consumption and delay.

Contents of the invention

The present invention is to provide an N-bit binary electro-optic parity checker to solve the bottleneck problems of speed, power consumption, gate delay and competition and risk caused by gate delay in traditional electrical parity checkers. It will play an important role in future photonic communication and computing systems under the premise of keeping the device small size, low power consumption and easy integration.

To achieve the above object, the invention provides a kind of N binary electro-optic parity checker, this electro-optic parity checker is made of N microring resonators MRR (microring resonator) and two The curved nanowire waveguide is realized. Each microring resonator MRR is coupled with two nanowire waveguides respectively. There is a gap or insulation between two adjacent microring resonators MRR that can prevent thermal crosstalk between them. The input is an N-bit binary electrical signal sequence to be verified and a continuous optical signal at the working wavelength, and the output is the optical signal after the electrical signal has been verified. The basic unit of each microring resonator MRR is thermally modulated The microring resonator MRR optical switch of the mechanical or electrical modulation mechanism, the verification process is: input a continuous laser with a specific working wavelength at an optical port of the device, and the N-bit binary electrical signal to be verified acts on the N MRRs respectively , and act on the MRR in the form of high and low levels according to the state of 1 and 0, and output the parity check result corresponding to the electrical signal of the N-bit input in the form of optical logic at the signal output port, thus completing the N-bit binary electro-optical calibration.

An N-bit binary electro-optical parity checker of the present invention can be prepared by using Silicon-on-Insulator (SOI) material.

In the N-bit binary electro-optic parity checker of the present invention, the N-bit binary electrical signal to be checked acts on the respective MRRs as follows: when the modulated electrical signal added to the microring is logic "0", the MRR is working There is no resonance at the wavelength, and the optical signal is passed through; when the modulated electrical signal added to the microring is logic "1", the MRR resonates at the working wavelength, and the optical signal is dropped.

In the silicon-based integrated N-bit binary electro-optic parity checker of the present invention, the logic values of the N binary electrical signals to be checked must be precisely aligned in time, and each logic value must be precisely synchronized in time.

The N binary electrical signals input in the application of the present invention are electrical logic sequences to be verified, and the output is the verified optical signal.

The MRR with a thermal modulation mechanism or an electrical modulation mechanism of the present invention can adopt thermal modulation when the signal transmission rate (below mega-order) is not high, and electrical modulation is required in a high-speed (gigabyte-level) transmission system.

In the above solution, the parity checker implements the verification process from electrical signals to optical signals: one port of the device inputs continuous light with a specific working wavelength, and the input electrical signal is any N-bit binary combination. When there is an odd number of logic 1s in the input logic sequence, the odd parity output P _o is 1, and the even parity output P _e is 0; when there is an even number of 1s in the input logic sequence, the odd parity output P _o is 0, even parity output P _e is 1. In this way, parity check signal outputs corresponding to the modulated electrical signal sequences loaded on the N microrings are respectively obtained at the two optical signal output ends of the device. The device completes the parity check output of the N-bit electrical signal input to the 2-bit optical signal, which is also the purpose of the present invention.

In the present invention, the N-bit electrical signal sequences to be verified (electrical signals respectively applied to N microrings) need to be accurately aligned in time, that is, accurately synchronized in time. In the high-speed working mode, special design of electrodes and analysis and simulation of electromagnetic compatibility are required.

In the present invention, the optical signal can be transmitted in the optical fiber and directly enter the next stage for processing.

The present invention has the following advantages:

1. The silicon-based integrated N-bit binary electro-optic parity checker provided by the present invention replaces the traditional electrical parity checker with the electro-optic parity checker realized by utilizing the natural characteristics of light, so that high-speed and large-capacity information can be realized deal with. Using mature technology, the device has high integration, small size, low power consumption, good scalability, and is easy to integrate with electrical components, so it is expected to play an important role in optical communication and optical computing systems.

2. The silicon-based integrated N-bit binary electro-optical parity checker provided by the present invention can perform optical parity check on electrical signals by using the device. In this structure, each optical switch based on the microring resonator is independent, and all switches work in parallel at the same time, which means that the delay of each switch will not accumulate, and the final verification result It is output at the optical output terminal in the form of light beams, so the verification speed of the entire device is much faster than that of the electrical parity checker. It has a good application prospect in optical communication and computing network.

Description of drawings

Accompanying drawing 1 is the structural representation of the N-bit binary electro-optic parity checker of the present invention, port Input is the input end of monochromatic continuous optical signal, P _e , P _o are the output end of optical signal respectively, and the N to be verified Electrical signals are respectively loaded on N microrings.

Attached Figure 2 is a schematic diagram of the structure of a single MRR coupled with two nanowire waveguides. Input a light wave of a specific wavelength (light wave satisfying the resonance condition) at the input end (1), and the light wave will be downloaded by the MRR. At the download end (3) Output, for light waves of other wavelengths (light waves that do not satisfy the resonance condition), they will be output at the through end (2) without any influence.

Accompanying drawing 3 is a schematic diagram of the electrode structure of a microring resonator MRR with a thermal modulation mechanism or an electrical modulation mechanism. Applying a voltage to the electrode changes the group refractive index of the ring waveguide by generating heat or changing the carrier concentration in the material. Changing the resonant wavelength of the MRR enables dynamic filtering.

Detailed ways

The present invention will be described in further detail below in conjunction with the accompanying drawings and specific embodiments.

The N-bit binary electro-optical parity checker of the present invention is composed of N ring waveguides and two curved waveguides, referring to accompanying drawing 1, its basic structure is an optical switch based on MRR, which is only composed of a structure of MRR, using Fabrication of silicon-based nanowire waveguides, realized by N microring resonators MRR made of semiconductor material on insulator and two curved nanowire waveguides, each microring resonator MRR is coupled with two nanowire waveguides respectively , see Figure 2. There is a gap or insulation between two adjacent microring resonators MRR that can prevent thermal crosstalk between them.

The MRR structure of the thermal modulation mechanism or the electrical modulation mechanism of the present invention is shown in FIG. 3 .

The input of the device of the present invention is an N-bit binary electrical signal sequence to be checked and a continuous optical signal at the working wavelength, and the output is an optical signal after checking the electrical signal, wherein the basic unit of each microring resonator MRR It is a microring resonator MRR optical switch with a thermal modulation mechanism or an electrical modulation mechanism. The verification process is: input a continuous laser with a specific working wavelength at an optical port of the device, and the N-bit binary electrical signals to be verified are respectively applied Based on N MRRs, and act on the MRRs in the form of high and low levels according to the state of 1 and 0, the parity check result corresponding to the N-bit input electrical signal is output in the form of optical logic at the signal output port, so that The electro-optical verification of N-bit binary is completed.

There are N electrical signal inputs to be verified and a continuous optical input at the working wavelength, and the output is an optical signal that can be transmitted in the optical fiber and directly enters the next level of information processing after the verification of the N electrical signal sequences. Assuming that the modulation voltage loaded on the microring is at a high level, the MRR resonates, and at a low level, the MRR does not resonate, then the optical verification of the N-bit electrical input signal can be obtained at the output of the optical signal, so that the device completes the N-bit Function of binary electro-optical parity check.

The MRR structure of the present invention can be realized by using SOI, SIN, and III-V group materials. The optimized scheme of the present invention is realized based on SOI material, and its outstanding advantages are: the process utilizes the ready-made CMOS process technology, which makes the device small in size, low in power consumption, good in scalability, and easy to integrate with electrical components.

The performance advantages of the invention are closely related to the properties of the materials used and the structure of the device.

In terms of materials: the present invention uses a silicon-on-insulator (SOI) material on an insulating substrate. SOI refers to the growth of a single crystal silicon film with a certain thickness on the SiO ₂ insulating layer, and its process is compatible with the CMOS process widely used in the field of microelectronics. The silicon waveguide made of SOI material has a core layer of Si (refractive index 3.45) and a cladding layer of SiO ₂ (refractive index 1.44). In this way, the refractive index difference between the cladding layer and the core layer is very large, so the waveguide is relatively The confinement ability of the light field is so strong that its bending radius can be very small.

In terms of structure: the basic unit of the present invention is a microring resonator based on a silicon-based nanowire waveguide, which is an integrated optical element with various functions and superior performance that has been extensively studied in recent years. Since the radius of the ring waveguide can be as small as 1.5 microns, the area of the device is very small, and multiple devices can be fabricated on one chip. The bending radius of traditional waveguide devices (such as LiNbO ₃ ) is generally on the order of millimeters or centimeters, which occupies a large chip area, and usually only one device can be placed on a chip. The device of the invention has a very compact structure, can realize high-density integration of the device, reduce the loss when discrete devices are coupled, and reduce the packaging cost of the device at the same time.

The following is a brief description of its working principle by analyzing the transmission process of optical signals in the MRR shown in Figure 2 (the straight waveguide between ports 1 and 2 is called a, and the straight waveguide between ports 3 and 4 is called b):

Assuming that the optical signal is input from the input terminal 1, when the signal passes through the coupling region (the range where the distance between the straight waveguide and the curved waveguide is the closest), the optical signal will be coupled into the microring through the evanescent field coupling, satisfying the resonance condition (m ×λ= N _g ×2π×R) will be downloaded by the MRR, and the signal will be output from the download end 3, and the signal that does not meet the resonance condition will be output at the through end 2 through the coupling area. Port 4 is called the upload port. The MRR is a symmetrical structure. If the optical signal is input from the upload terminal 4, the principle is the same as that of the optical signal input from the input terminal 1, which will not be repeated here.

The above analysis is the static working characteristics of MRR, that is, MRR will fixedly drop certain wavelength signals (wavelengths that meet the resonance conditions), and pass through certain wavelength signals (wavelengths that do not meet the resonance conditions). In actual work, the MRR resonance wavelength needs to be dynamically adjustable (that is, dynamic filtering) to achieve more complex functions. From the above resonance condition (m×λ=N _g ×2π×R), it can be seen that to adjust the resonance wavelength to achieve dynamic filtering, the physical quantities that can be changed are the radius R of the ring waveguide and its group refractive index N _g . The former is determined after the process is completed and cannot be adjusted. The resonance wavelength of the MRR can only be changed by adjusting the group refractive index N _g of the ring waveguide. The group index of refraction varies with the refractive index of the material. Generally, two methods can be adopted to change the refractive index of the material so as to change the group refractive index of the material: one is by heating the material (the specific method is to deposit a layer of metal on the silicon waveguide by MOCVD as a heating hot pole, and then heat the hot pole Applying a voltage across both ends) changes the temperature of the material to change the refractive index of the material, which is the so-called thermo-optic effect. The second is to change the refractive index of the material by carrier injection (electro-optic effect). The electro-optic effect is generally used in high-speed systems. In the present invention, the refractive index of the material is changed by heating the silicon waveguide with the hot pole, so as to dynamically select the optical signal to be downloaded and the optical signal to be passed through, so that the optical signal can be output at the download end or the through end under dynamic control.

Figure 3 shows the thermal modulation mechanism of the MRR. After the power is turned on, the metal electrode heats up, and the heat field conducts to the waveguide, causing the temperature of the waveguide to change. The group refractive index N _g of the ring waveguide changes, and the resonance wavelength λ of the MRR changes accordingly. .

Fig. 1 is a schematic diagram of the structure of a silicon-based integrated N-bit binary electro-optic parity checker. A monochromatic continuous optical signal (CW) at the working wavelength is input at the optical signal input terminal Input, and then a modulation voltage is applied to the N microrings to heat the microrings to change the resonance wavelength of the microrings. If the microring resonates when the modulation voltage is high, then when the modulation voltage is high, the optical signal will be output from the download end, and when the modulation voltage is low, the optical signal will be output from the through end. High level is represented by logic '1', and low level is represented by logic '0'. For optical signals: high output optical power is represented by logic '1', and low output optical power is represented by logic '0'. The N MRRs are represented by R ₁ , R ₂ , . . . , R _N-1 and R _N , respectively. After the above definition, it is obtained from the structural diagram of the device: For 2 ^N different combination states of N electrical signals (N bits from all 0 to all 1), there are two different optical combination (0 1, 1 0) states and it correspond. The principle is as follows: When the N-bit electrical signal is 0... 0 0 (the logic values of the first, second, third, fourth, and Nth bits represent the logic values added to R ₁ , R ₂ , ..., R _N-1 , R _N Level above), R ₁ , R ₂ ,..., R _N-1 , R _N are not resonant, the state of the optical output port P _o is 0, and the state of P _e is 1, so the combined state of the optical signal output port is 0 1. The same can be obtained for the other 2 ^N -1 states. In this way, the present invention has just completed the function of the N-bit binary parity checker. Its logical truth table is as follows:

The above combined with FIG. 1 illustrates how to use the silicon-based integrated N-bit binary electro-optical parity checker to complete the verification of N-bit electrical signals to two-bit optical signals. From the above truth table, we can more clearly see the N-bit binary electro-optical parity check function of the present invention.

It should be noted that during the working process of the device, the N electrical signals to be verified must be precisely synchronized in time. In high-speed systems, special electrode design, special layout and wiring, and electromagnetic compatibility analysis are required to achieve synchronization requirements.

The specific embodiments described above are only further detailed descriptions of the purpose, technical solutions and beneficial effects of the present invention. It should be pointed out that the above descriptions are only specific embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included within the protection scope of the present invention.

Claims (4)

1. A kind of N binary electro-optical parity checker, it is characterized in that this electro-optic parity checker is realized by N microring resonators MRR and two curved nanowire waveguides made of semiconductor material on the insulator, each Two microring resonators MRR are respectively coupled with two nanowire waveguides, and there is a gap or insulation between two adjacent microring resonators MRR to prevent thermal crosstalk between them, and its input is N bits to be verified A binary electrical signal sequence and a continuous optical signal at the working wavelength, the output is the optical signal after the electrical signal is checked, and the basic unit of each microring resonator MRR is a microring with a thermal modulation mechanism or an electrical modulation mechanism The resonator MRR optical switch, the verification process is: input a continuous laser with a specific working wavelength at an optical port of the device, the N-bit binary electrical signal to be verified acts on the N MRRs respectively, and according to the state of 1 and 0 It acts on the MRR in the form of high and low levels, and outputs the parity check result corresponding to the N-bit input electrical signal in the form of optical logic at the signal output port, thus completing the N-bit binary electro-optic check. 2. An N-bit binary electro-optic parity checker is characterized in that the electro-optic parity checker is prepared with silicon SOI material on an insulator. 3. The N-bit binary electro-optical parity checker according to claim 1 or 2, wherein the N-bit binary electrical signal to be checked acts as follows on the respective MRRs: when the modulation voltage added to the microring When the signal is logic "0", the MRR does not resonate at the working wavelength, and the optical signal passes through; when the modulated electrical signal added to the microring is logic "1", the MRR resonates at the working wavelength, and the optical signal is dropped. 4. The silicon-based integrated N-bit binary electro-optical parity checker according to claim 3, characterized in that: the logic values of the N binary electrical signals to be checked must be precisely aligned in time, and each logic value is in the Precise synchronization in time.

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