CN100536100C - 电子元件的树脂密封成形装置 - Google Patents
电子元件的树脂密封成形装置 Download PDFInfo
- Publication number
- CN100536100C CN100536100C CNB2007101485207A CN200710148520A CN100536100C CN 100536100 C CN100536100 C CN 100536100C CN B2007101485207 A CNB2007101485207 A CN B2007101485207A CN 200710148520 A CN200710148520 A CN 200710148520A CN 100536100 C CN100536100 C CN 100536100C
- Authority
- CN
- China
- Prior art keywords
- chamber
- resin
- heating panel
- electronic component
- mould
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000011347 resin Substances 0.000 title claims abstract description 57
- 229920005989 resin Polymers 0.000 title claims abstract description 57
- 238000007493 shaping process Methods 0.000 title claims description 16
- 238000007789 sealing Methods 0.000 title claims description 15
- 238000010438 heat treatment Methods 0.000 claims description 61
- 239000000758 substrate Substances 0.000 claims description 26
- 238000000465 moulding Methods 0.000 claims description 24
- 239000007788 liquid Substances 0.000 claims description 12
- 230000015572 biosynthetic process Effects 0.000 claims description 2
- 230000005855 radiation Effects 0.000 abstract 3
- 230000000712 assembly Effects 0.000 description 33
- 238000000429 assembly Methods 0.000 description 33
- 239000004065 semiconductor Substances 0.000 description 9
- 239000000463 material Substances 0.000 description 5
- 238000000034 method Methods 0.000 description 5
- 239000000047 product Substances 0.000 description 5
- 238000002347 injection Methods 0.000 description 4
- 239000007924 injection Substances 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
- 150000002148 esters Chemical class 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000004927 fusion Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 239000011265 semifinished product Substances 0.000 description 2
- 208000034189 Sclerosis Diseases 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 238000005266 casting Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 239000011148 porous material Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Moulds For Moulding Plastics Or The Like (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Injection Moulding Of Plastics Or The Like (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006228941A JP5128095B2 (ja) | 2006-08-25 | 2006-08-25 | 電子部品の樹脂封止成形装置 |
JP2006228941 | 2006-08-25 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101131946A CN101131946A (zh) | 2008-02-27 |
CN100536100C true CN100536100C (zh) | 2009-09-02 |
Family
ID=39129145
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2007101485207A Expired - Fee Related CN100536100C (zh) | 2006-08-25 | 2007-08-22 | 电子元件的树脂密封成形装置 |
Country Status (4)
Country | Link |
---|---|
JP (1) | JP5128095B2 (ja) |
KR (1) | KR100848746B1 (ja) |
CN (1) | CN100536100C (ja) |
TW (1) | TW200811968A (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105269744A (zh) * | 2014-06-09 | 2016-01-27 | 东和株式会社 | 树脂封装装置及树脂封装方法 |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6027569B2 (ja) * | 2014-03-26 | 2016-11-16 | エムテックスマツムラ株式会社 | 中空パッケージの製造方法および中空パッケージ |
JP6549531B2 (ja) * | 2016-06-30 | 2019-07-24 | Towa株式会社 | 樹脂成形装置及び樹脂成形品の製造方法 |
EP4181185A4 (en) | 2020-07-28 | 2023-09-13 | Huawei Technologies Co., Ltd. | POWER MODULE AND PRODUCTION FORM AND DEVICE |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3304513B2 (ja) * | 1993-06-29 | 2002-07-22 | アピックヤマダ株式会社 | 放熱体付半導体装置及びその製造方法 |
SG50009A1 (en) * | 1996-03-14 | 1998-06-15 | Towa Corp | Method of sealing electronic component with molded resin |
JPH11274196A (ja) | 1998-03-26 | 1999-10-08 | Seiko Epson Corp | 半導体装置の製造方法およびモールドシステム並びに半導体装置 |
JP4273592B2 (ja) | 1999-10-08 | 2009-06-03 | 株式会社デンソー | 樹脂封止型半導体装置の製造方法 |
JP2003197664A (ja) * | 2001-12-28 | 2003-07-11 | Seiko Epson Corp | 半導体装置及びその製造方法、回路基板並びに電子機器 |
-
2006
- 2006-08-25 JP JP2006228941A patent/JP5128095B2/ja active Active
-
2007
- 2007-06-07 TW TW096120517A patent/TW200811968A/zh unknown
- 2007-07-04 KR KR1020070066899A patent/KR100848746B1/ko active IP Right Grant
- 2007-08-22 CN CNB2007101485207A patent/CN100536100C/zh not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105269744A (zh) * | 2014-06-09 | 2016-01-27 | 东和株式会社 | 树脂封装装置及树脂封装方法 |
CN105269744B (zh) * | 2014-06-09 | 2018-04-20 | 东和株式会社 | 树脂封装装置及树脂封装方法 |
Also Published As
Publication number | Publication date |
---|---|
JP2008053509A (ja) | 2008-03-06 |
TWI338342B (ja) | 2011-03-01 |
TW200811968A (en) | 2008-03-01 |
KR100848746B1 (ko) | 2008-07-25 |
JP5128095B2 (ja) | 2013-01-23 |
KR20080018791A (ko) | 2008-02-28 |
CN101131946A (zh) | 2008-02-27 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20090902 Termination date: 20100822 |