CN107706122A - A kind of detection method of annealing process - Google Patents
A kind of detection method of annealing process Download PDFInfo
- Publication number
- CN107706122A CN107706122A CN201710973277.6A CN201710973277A CN107706122A CN 107706122 A CN107706122 A CN 107706122A CN 201710973277 A CN201710973277 A CN 201710973277A CN 107706122 A CN107706122 A CN 107706122A
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- annealing process
- annealing
- detection method
- semiconductor base
- ion
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- 238000000137 annealing Methods 0.000 title claims abstract description 58
- 238000000034 method Methods 0.000 title claims abstract description 36
- 230000008569 process Effects 0.000 title claims abstract description 35
- 238000001514 detection method Methods 0.000 title claims abstract description 26
- 239000004065 semiconductor Substances 0.000 claims abstract description 52
- 238000005259 measurement Methods 0.000 claims abstract description 10
- 239000000758 substrate Substances 0.000 claims abstract description 7
- 239000000463 material Substances 0.000 claims description 7
- 229910052796 boron Inorganic materials 0.000 claims description 5
- 238000004151 rapid thermal annealing Methods 0.000 claims description 4
- 230000008859 change Effects 0.000 claims description 3
- 230000007773 growth pattern Effects 0.000 claims description 3
- 238000002347 injection Methods 0.000 claims description 3
- 239000007924 injection Substances 0.000 claims description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims 1
- 230000008021 deposition Effects 0.000 claims 1
- 229910052760 oxygen Inorganic materials 0.000 claims 1
- 239000001301 oxygen Substances 0.000 claims 1
- 150000003377 silicon compounds Chemical class 0.000 claims 1
- 238000004519 manufacturing process Methods 0.000 abstract description 4
- 230000012010 growth Effects 0.000 abstract description 3
- 230000009286 beneficial effect Effects 0.000 abstract description 2
- 150000002500 ions Chemical class 0.000 description 39
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- 229910052710 silicon Inorganic materials 0.000 description 6
- 239000010703 silicon Substances 0.000 description 6
- 239000012535 impurity Substances 0.000 description 5
- -1 boron ion Chemical class 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 2
- 230000004913 activation Effects 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 230000000717 retained effect Effects 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910000673 Indium arsenide Inorganic materials 0.000 description 1
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 230000003213 activating effect Effects 0.000 description 1
- 230000000739 chaotic effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- VTGARNNDLOTBET-UHFFFAOYSA-N gallium antimonide Chemical compound [Sb]#[Ga] VTGARNNDLOTBET-UHFFFAOYSA-N 0.000 description 1
- WPYVAWXEWQSOGY-UHFFFAOYSA-N indium antimonide Chemical compound [Sb]#[In] WPYVAWXEWQSOGY-UHFFFAOYSA-N 0.000 description 1
- RPQDHPTXJYYUPQ-UHFFFAOYSA-N indium arsenide Chemical compound [In]#[As] RPQDHPTXJYYUPQ-UHFFFAOYSA-N 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000004064 recycling Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000000523 sample Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- OCGWQDWYSQAFTO-UHFFFAOYSA-N tellanylidenelead Chemical compound [Pb]=[Te] OCGWQDWYSQAFTO-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
The invention discloses a kind of detection method of annealing process, belong to technical field of manufacturing semiconductors and comprise the following steps：Comprise the following steps：Step S1, semiconductor substrate is provided；Step S2, ion implanting is carried out to the semiconductor base；Step S3, in growing layer oxide film on the semiconductor base；Step S4, the semiconductor base is annealed；Step S5, the electrical parameter of the semiconductor base after measurement annealing.The beneficial effect of above-mentioned technical proposal is：In the superficial growth layer oxide film of chip after ion implanting, the phenomenon that wafer surface resistance is higher caused by ion escapes chip in annealing process because of high temperature is avoided the occurrence of, so as to improve the accuracy rate of annealing process detection.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, more particularly to a kind of detection method of annealing process.
Background technology
Into semiconductor during implanting impurity ion, the incident ion of high-energy can with the atomic collision in semiconductor lattice,
Some lattice atoms are subjected to displacement, as a result cause substantial amounts of room, will make it that the atomic arrangement in injection region is chaotic or becomes
As amorphous area, annealed at a certain temperature so semiconductor must be put after ion implanting, to recover crystal
Structure and eliminate defect.Meanwhile annealing also has the function of activating donor and acceptor's impurity, i.e., some is in interstitial site
Foreign atom allows them to enter alternative site by annealing.The activation of impurity is relevant with time and temperature, and the time is longer, temperature
Higher, the activation of impurity is more abundant.
As the reduction of dimensions of semiconductor devices, the accurate of ion implanting is increasingly difficult to control, so as to need to utilize annealing
To be adjusted to ion implanting, change is spread again very to ion implanting using annealing especially in below 65nm techniques
It is important.However, annealing temperature and the difference of time, the influence to device is very big, therefore needs in semiconductor fabrication to annealing
Tested.
In the prior art, to the detection method of annealing process mainly by some ion implantings to one piece of chip, then enter
Row annealing, then measures wafer surface resistance, reflects annealing temperature with resistance.To improve the circulation profit of the chip for detecting
With number, generally injected using shallow-layer in ion implanting, because the ionic distance wafer surface of shallow-layer injection is close, annealed
Process high temperature can make part ion escape chip, and the ion actually retained in chip is on the low side, and wafer surface resistance is higher, so as to
Cause measurement result higher, be unfavorable for the control to annealing process.
The content of the invention
According to the above-mentioned problems in the prior art, a kind of detection method of annealing process is now provided, it is intended to existing skill
In art, in annealing process intermediate ion because high temperature escapes chip so that the ion actually retained in chip is on the low side, wafer surface resistance
It is higher, the problem of so as to cause measurement result higher.The present invention adopts the following technical scheme that：
A kind of detection method of annealing process, comprises the following steps：
Step S1, semiconductor substrate is provided；
Step S2, ion implanting is carried out to the semiconductor base；
Step S3, in growing layer oxide film on the semiconductor base；
Step S4, the semiconductor base is annealed；
Step S5, the electrical parameter of the semiconductor base after measurement annealing.
Preferably, in the detection method of above-mentioned annealing process, ion implanting described in the step S2 is noted for shallow-layer ion
Enter.
Preferably, in the detection method of above-mentioned annealing process, the ion of the ion implanting is boron ion.
Preferably, in the detection method of above-mentioned annealing process, the growth pattern of the oxide-film is chemical vapor deposition.
Preferably, in the detection method of above-mentioned annealing process, the material of the oxide-film is the oxide of silicon.
Preferably, in the detection method of above-mentioned annealing process, the thickness of the oxide-film is 50 angstroms.
Preferably, in the detection method of above-mentioned annealing process, it is described to be annealed into rapid thermal annealing.
Preferably, in the detection method of above-mentioned annealing process, the electrical parameter is included by ion implanting and annealing
The resistance of the semiconductor base.
The beneficial effect of above-mentioned technical proposal is：In the superficial growth layer oxide film of chip after ion implanting, avoid
There is the phenomenon that wafer surface resistance is higher caused by ion escapes chip in annealing process because of high temperature, so as to improve annealing
The accuracy rate of fabrication evaluation.
Brief description of the drawings
Fig. 1 is a kind of flow chart of annealing process detection method in the preferred embodiment of the present invention.
Embodiment
The invention will be further described with specific embodiment below in conjunction with the accompanying drawings, but not as limiting to the invention.
In the preferred embodiment of the present invention, as shown in Figure 1, there is provided a kind of detection method of annealing process, including it is following
Step：
Step S1, semiconductor substrate is provided；
Step S2, ion implanting is carried out to semiconductor base；
Step S3, in growing layer oxide film on semiconductor base；
Step S4, semiconductor base is annealed；
Step S5, the electrical parameter of the semiconductor base after measurement annealing.
In the preferred embodiment of the present invention, the ion implanting in step S2 is shallow-layer ion implanting, wherein ion implanting
Depth be 0.3~0.5um.
In the present embodiment, semiconductor base can be the silicon or SiGe (SiGe) of monocrystalline, polycrystalline or non crystalline structure, also may be used
To be silicon-on-insulator (SOI), or other materials can also be included, for example, indium antimonide, lead telluride, indium arsenide, indium phosphide,
GaAs or gallium antimonide.Semiconductor base is the nude film of silicon chip in a specific implementation, it is necessary to half-and-half before ion implanting is entered
Conductor substrate is cleaned, to remove the impurity on its surface.
In above-mentioned technical proposal, by carrying out shallow-layer ion implanting to semiconductor base, the depth of wherein ion implanting is
0.3~0.5um, after the completion of making current test, when carrying out recycling to semiconductor base, semiconductor base is needed to grind off
Partial depth it is shallow, be advantageous to improve semiconductor base the number recycled, save cost.For shallow-layer ion implanting,
So that ion escapes semiconductor base in annealing process because of high temperature, and the problem of make actual measurement resistance higher, in the present embodiment,
After ion implantation in the superficial growth layer oxide film of semiconductor base, ion is prevented to be escaped from semiconductor base so that
The intrabasement number of ions of semiconductor is equal with the number injected after annealing, so as to avoid the occurrence of ion in annealing process because of high temperature
And the higher phenomenon of wafer surface resistance caused by escaping chip, and then improve the accuracy rate of annealing process detection.
In the preferred embodiment of the present invention, the ion of ion implanting is boron ion.
In the preferred embodiment of the present invention, the growth pattern of oxide-film is chemical vapor deposition.
In this practical example, due to growing oxide-film on a semiconductor substrate after ion implantation, to avoid growing oxide-film
When ion escaped from semiconductor base, when growing oxide-film, semiconductor base can not be heated, therefore use chemical vapor deposition
Long-pending mode grows oxide-film on the semiconductor base after injecting ion.
In the preferred embodiment of the present invention, the material of oxide-film is the oxide of silicon.
In the preferred embodiment of the present invention, the thickness of oxide-film is 50 angstroms.
In the present embodiment, the material of oxide-film is the oxide of silicon, such as can be silica (SiO2) or silicon oxynitride
(SiON).Although there is described herein a few examples of the material of oxide-film, oxide-film can be formed by other materials.
In the preferred embodiment of the present invention, rapid thermal annealing is annealed into.
In the present embodiment, the operation of annealing is specifically, all semiconductor bases after injecting ions into are put into reative cell
Annealed.Preferably, rapid thermal annealing, annealing temperature are 1070 DEG C.In annealing process, the boron of semiconductor substrate surface by
Gradually internally spread.Because the purpose of the step obtains annealing temperature and the pass of the electrical parameter of the semiconductor devices after annealing
System, such as the influence after annealing to the resistance in the semiconductor base after ion implanting, therefore the annealing temperature at a certain temperature
Degree can be adjusted as needed, such as annealing temperature can be 1025 DEG C, 1050 DEG C, 1075 DEG C, 1100 DEG C.
In preferred embodiments of the present invention, the electrical parameter of the semiconductor base in step S5 after measurement annealing, above-mentioned electricity
Learning parameter includes the resistance of the semiconductor base by ion implanting and annealing.
Measurement process is that the bulk resistor in semiconductor base in a certain depth bounds is measured using probe.In addition,
The other specification of semiconductor base can also be measured, such as the boron ion of a certain depth in measurement semiconductor base is dense
Degree, or measure the threshold voltage or saturation current of the transistor being subsequently formed.
Preferred embodiments of the present invention are the foregoing is only, not thereby limit embodiments of the present invention and protection model
Enclose, to those skilled in the art, should can appreciate that all with made by description of the invention and diagramatic content
Scheme obtained by equivalent substitution and obvious change, should be included in protection scope of the present invention.
Claims (8)
1. a kind of detection method of annealing process, it is characterised in that comprise the following steps：
Step S1, semiconductor substrate is provided；
Step S2, ion implanting is carried out to the semiconductor base；
Step S3, in growing layer oxide film on the semiconductor base；
Step S4, the semiconductor base is annealed；
Step S5, the electrical parameter of the semiconductor base after measurement annealing.
2. the detection method of annealing process as claimed in claim 1, it is characterised in that ion implanting described in the step S2
For shallow-layer ion implanting.
3. the detection method of annealing process as claimed in claim 1, it is characterised in that the ion of the ion implanting be boron from
Son.
4. the detection method of annealing process as claimed in claim 1, it is characterised in that the growth pattern of the oxide-film is change
Learn vapour deposition.
5. the detection method of annealing process as claimed in claim 1, it is characterised in that the material of the oxide-film is the oxygen of silicon
Compound.
6. the detection method of annealing process as claimed in claim 1, base are characterised by, the thickness of the oxide-film is 50 angstroms.
7. the detection method of annealing process as claimed in claim 1, it is characterised in that described to be annealed into rapid thermal annealing.
8. the detection method of annealing process as claimed in claim 1, it is characterised in that the electrical parameter includes passing through ion
The resistance of the semiconductor base of injection and annealing.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710973277.6A CN107706122B (en) | 2017-10-18 | 2017-10-18 | Detection method of annealing process |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710973277.6A CN107706122B (en) | 2017-10-18 | 2017-10-18 | Detection method of annealing process |
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| Publication Number | Publication Date |
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| CN107706122A true CN107706122A (en) | 2018-02-16 |
| CN107706122B CN107706122B (en) | 2020-06-26 |
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| CN201710973277.6A Active CN107706122B (en) | 2017-10-18 | 2017-10-18 | Detection method of annealing process |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111524825A (en) * | 2020-04-30 | 2020-08-11 | 华虹半导体(无锡)有限公司 | Method for detecting content of chlorine in oxide film |
| CN114843176A (en) * | 2022-07-06 | 2022-08-02 | 晶芯成(北京)科技有限公司 | Method for manufacturing semiconductor structure |
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| CN101246809A (en) * | 2007-02-13 | 2008-08-20 | 中芯国际集成电路制造(上海)有限公司 | Monitoring coupon and monitoring method for ion implantation technique |
| CN101789384A (en) * | 2009-01-23 | 2010-07-28 | 中芯国际集成电路制造(上海)有限公司 | Method for detecting annealing |
| US20140197862A1 (en) * | 2013-01-17 | 2014-07-17 | Imec Vzw | Methods for characterizing shallow semiconductor junctions |
| CN106783687A (en) * | 2016-12-26 | 2017-05-31 | 株洲中车时代电气股份有限公司 | A kind of method for improving ion implanting monitoring |
-
2017
- 2017-10-18 CN CN201710973277.6A patent/CN107706122B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101246809A (en) * | 2007-02-13 | 2008-08-20 | 中芯国际集成电路制造(上海)有限公司 | Monitoring coupon and monitoring method for ion implantation technique |
| CN101789384A (en) * | 2009-01-23 | 2010-07-28 | 中芯国际集成电路制造(上海)有限公司 | Method for detecting annealing |
| US20140197862A1 (en) * | 2013-01-17 | 2014-07-17 | Imec Vzw | Methods for characterizing shallow semiconductor junctions |
| CN106783687A (en) * | 2016-12-26 | 2017-05-31 | 株洲中车时代电气股份有限公司 | A kind of method for improving ion implanting monitoring |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111524825A (en) * | 2020-04-30 | 2020-08-11 | 华虹半导体(无锡)有限公司 | Method for detecting content of chlorine in oxide film |
| CN111524825B (en) * | 2020-04-30 | 2022-09-20 | 华虹半导体(无锡)有限公司 | Method for detecting content of chlorine in oxide film |
| CN114843176A (en) * | 2022-07-06 | 2022-08-02 | 晶芯成(北京)科技有限公司 | Method for manufacturing semiconductor structure |
| CN114843176B (en) * | 2022-07-06 | 2022-09-16 | 晶芯成(北京)科技有限公司 | Method for manufacturing semiconductor structure |
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| CN107706122B (en) | 2020-06-26 |
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Address after: 430205 No.18, Gaoxin 4th Road, Donghu Development Zone, Wuhan City, Hubei Province Patentee after: Wuhan Xinxin Integrated Circuit Co.,Ltd. Country or region after: China Address before: 430205 No.18, Gaoxin 4th Road, Donghu Development Zone, Wuhan City, Hubei Province Patentee before: Wuhan Xinxin Semiconductor Manufacturing Co.,Ltd. Country or region before: China |
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