JP2735079B2 - Boron doping method - Google Patents

Description

Description: BACKGROUND OF THE INVENTION The present invention relates to a boron doping method that is suitably used when manufacturing a semiconductor device sometimes having low noise.

[Conventional technology]

Conventionally, ion implantation has been used to control the threshold voltage of an insulator gate field effect transistor.
In a high-frequency bipolar transistor, it is used to form its base region and emitter region. However, in the case of the ion implantation method, there is a disadvantage that noise is large in any type of transistor.

When an impurity, particularly boron, is doped into a silicon substrate by ion implantation, for example,
Consists SiO _2, taking into account the acceleration energy of the boron ion implantation (ion implantation) performed after the mask layer to the extent that the implantation into the silicon of the ion can be completely prevented formed by thermal oxidation, implantation of boron ions by photoetching A window is opened in the portion where the process is to be performed, then a thin protective oxide film is formed again, and boron ions are implanted through the window, and a heat treatment at about 900 ° C. is performed to activate the implanted boron. Annealing process and then to diffuse the doped boron
It is known to perform a drive-in process by heat treatment at about 1100 ° C. (Japanese Patent Laid-Open No. 50-122873). The thin protective oxide film for the ion implantation is a device for preventing the peak value of the primary defect from being present in the silicon substrate.

However, even if such a protective oxide film is provided, a primary defect such as a vacancy at the time of ion implantation generated in the crystal substrate becomes a nucleus to generate a secondary defect, and it is difficult to improve noise characteristics. In order to reduce such secondary defects, a special annealing treatment at a temperature of 1100 ° C. or more for 15 minutes or more in a non-oxidizing atmosphere, for example, N ₂ gas after ion implantation has been proposed (Japanese Patent Application Laid-Open No. 50-122874). No.).

Regarding primary defects that occur as irradiation damage during ion implantation and secondary defects induced by these defects, Tamura,
Ikeda, Tokuyama, Second International Conference on Semiconductor Ion Implantation (Proc.I
I International Conf.on Ion Implantation in Semico
nductors p.96-102).

[Problems to be solved by the invention]

Even with the above-described boron doping by the conventional ion implantation method, generation of secondary defects is caused by many factors, for example, oxide film thickness, acceleration energy of ion implantation, ion implantation amount,
It is difficult to control because it is affected complicatedly based on the heat treatment atmosphere, the same temperature, etc., and when a single-crystal thin layer is deposited on a boron-doped substrate by epitaxial growth, Discovered that the defect density caused by secondary defects generated in the bulk of the substrate due to boron ion implantation was high, and that the level varied considerably.

The present invention provides a method of doping boron by an ion implantation method, in which secondary defects generated after annealing are suppressed, and crystal defects in a single crystal thin layer obtained by epitaxial growth on such a substrate are reduced to a certain low level. It is an object of the present invention to provide a boron doping method by an ion implantation method, which can control the concentration of boron.

[Means for solving the problem]

In order to achieve the above object, in the present invention, boron ions are implanted in a silicon wafer,
This is a method of doping boron by performing annealing at 00 ° C. for 20 to 180 minutes, and the acceleration energy of boron ion implantation, the amount of boron ion implantation and the amount of boron ion implanted so as to satisfy the following formula (a) after annealing. An annealing condition is determined to achieve boron doping by an ion implantation method with few defects.

ρ _s · X _j ⁿ > M (a) In equation (a), ρ _s is the sheet resistance (Ω / □) of the silicon wafer after annealing, and X _j is the diffusion depth (μm) of the silicon wafer after annealing. ), N is 0.2-0.4 and M is
100-500. The above X _j when doping the p-type silicon single crystal wafer with boron is defined as follows. An n-type silicon single crystal wafer having the P-type silicon single crystal wafer and the same or substantially the same dopant concentration as X _j measuring monitor, pn from said X _j obtained by measuring the monitor X _j (boron ion implantation surface
_Xj in the P-type silicon single crystal wafer.

(Function) In order to obtain the above formula (a), as described in detail below, p-type and n-type silicon single crystal wafers are prepared, a protective oxide film is provided with a thickness of 50 to 100 nm, and boron ion implantation and nitrogen Annealed in an atmosphere, for a p-type wafer, a protective film layer was removed, epitaxial growth was performed, a single-crystal thin layer was deposited, and this was selectively etched to measure the defect density. Was evaluated, and for the n-type wafer, the protective film layer was removed.
Further, the sheet resistance ρ _s is measured for the diffusion depth X _j by angle wrap and stain etch, and the etch pit density on the epitaxially grown single crystal thin layer is made to correspond to X _j and ρ _s. On average about 10 pcs / c
The above equation (a) was obtained with the limit of m ² . ρ _s and X _j
Depends on the acceleration energy of boron ion implantation, the ion implantation amount, and the annealing conditions. As a result of the experiment, the low-defect, controlled boron doping condition was indirectly determined by the equation (a). Good conditions for boron doping by ion implantation can be set well, and the noise characteristics of various transistors including boron ion implantation can be improved.

(Experimental Example) Hereinafter, an experimental example of the present invention will be described in detail.

As the substrate, for example, an axial orientation (111) conductivity type p-type resistivity 1
5Ωcm, n-type using a polished wafer of several Ωcm,
A thin oxide film of 70 to 100 nm is formed on the surface, and boron (B) is implanted. The p-type was used for crystal evaluation, and the n-type was used for measuring sheet resistance and diffusion depth. The implantation conditions are as follows: the ion implantation acceleration energy is 30 to 50 KeV, and the ion implantation amount is 1 × 10 ¹³ to 1
× 10 ¹⁵ ions / cm ² . After washing this, in a nitrogen atmosphere
Annealing was performed at 1100 to 1200 ° C. for 20 to 180 minutes, after which the oxide film was removed, and a p-type wafer was epitaxially grown. Epitaxial growth conditions are temperature 1050
At 〜1170 ° C., the growth rate was 0.5-2 μm / min. The defect density (etch pit density) was measured by observing the surface after selective etching.

In the boron-doped wafer obtained under the acceleration energy of various boron ion implantations, the boron ion implantation amount, the protective oxide film thickness and the annealing conditions, the sheet resistance ρ
Table 1 shows the measured values of _s (Ω / □), the diffusion depth X _j (μm), and the etch pit density of the epitaxial growth layer. When this was plotted on a graph, FIG. 1 was obtained (the number of each measurement point in FIG. 1 is the same as the sample number shown in Table 1). Here, the mark ○ represents the selective etch pit density of the epitaxially grown layer of 10 / cm ² or less, and the mark Δ represents 10 to 20 / cm
Assuming that m ² and × are 20 pieces / cm ² or more, crystal defects 10 to 20 pieces / cm ²
It can be seen that the region exists in a narrow portion of a straight line represented by a straight line l, and the region above the straight line 1 is a region with a low crystal defect density, and the region below is a region with a high crystal defect density.

This straight line 1 was ρ _s · X _j ^0.3 = 182. The straight line changes depending on changes in the orientation, resistivity, and other conditions of the substrate wafer, and generally ρ _s · X _j ⁿ = M. And n is 0.2
0.4, M varies between 100 and 500. And ρ _s · X
_{If j} ⁿ > M, the above etch pit density is approximately 10
/ cm ² or less.

[Effects of the Invention] As described above, according to the present invention, if boron doping is performed by an ion implantation method so as to satisfy a certain relational expression of the sheet resistance and the diffusion depth of the silicon wafer, the lattice defect of the silicon wafer can be improved. Has an extremely remarkable effect that the density can be limited to a predetermined range, and the noise characteristics of the transistor can be improved.

[Brief description of the drawings]

FIG. 1 is a graph showing the quality of crystallinity with respect to ρ _s and X _j .

Claims (1)

(57) [Claims] 1. A method of doping boron by implanting boron ions into a silicon wafer and then performing annealing at 1100 ° C. to 1200 ° C. for 20 minutes to 180 minutes. After annealing, the following formula (a) is obtained. A low defect boron doping method by an ion implantation method, wherein the boron ion implantation acceleration energy, the boron ion implantation amount, and the annealing conditions are determined so as to be satisfied. ρ _s · X _j ⁿ > M (a) (in equation (a), ρ _s is the sheet resistance (Ω / □) of the silicon wafer after annealing, and X _j is the diffusion depth of the silicon wafer after annealing ( μm), n is 0.2-0.4 and M is
100-500. )