[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

Girardi et al., 2006 - Google Patents

A tool for automatic design of analog circuits based on gm/i/sub d/methodology

Girardi et al., 2006

Document ID
609108070189221108
Author
Girardi A
Cortes F
Bampi S
Publication year
Publication venue
2006 IEEE International Symposium on Circuits and Systems

External Links

Snippet

The goal of this paper is to present a transistor optimization methodology for analog integrated CMOS circuits, based on the physics-based gm/ID characteristics provided by the ACM compact MOS model. This methodology is implemented in a design tool, exploiting all …
Continue reading at ieeexplore.ieee.org (other versions)

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50Computer-aided design
    • G06F17/5009Computer-aided design using simulation
    • G06F17/5036Computer-aided design using simulation for analog modelling, e.g. for circuits, spice programme, direct methods, relaxation methods
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50Computer-aided design
    • G06F17/5068Physical circuit design, e.g. layout for integrated circuits or printed circuit boards
    • G06F17/5081Layout analysis, e.g. layout verification, design rule check
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50Computer-aided design
    • G06F17/5045Circuit design
    • G06F17/5063Analog circuit design, e.g. amplifiers
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50Computer-aided design
    • G06F17/5045Circuit design
    • G06F17/505Logic synthesis, e.g. technology mapping, optimisation
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • G05F3/08Regulating voltage or current wherein the variable is dc
    • G05F3/10Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/24Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F2217/00Indexing scheme relating to computer aided design [CAD]
    • G06F2217/78Power analysis and optimization
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F1/00Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application

Similar Documents

Publication Publication Date Title
Binkley et al. A CAD methodology for optimizing transistor current and sizing in analog CMOS design
Director et al. Statistical integrated circuit design
Magnelli et al. A 2.6 nW, 0.45 V temperature-compensated subthreshold CMOS voltage reference
US6304836B1 (en) Worst case design parameter extraction for logic technologies
Maulik et al. Sizing of cell-level analog circuits using constrained optimization techniques
Pandit et al. Nano-scale CMOS analog circuits: models and CAD techniques for high-level design
Guerra-Gómez et al. Operating-point driven formulation for analog computer-aided design
Thakker et al. A novel table-based approach for design of FinFET circuits
Mallick et al. CMOS analogue amplifier circuits optimisation using hybrid backtracking search algorithm with differential evolution
Girardi et al. A tool for automatic design of analog circuits based on gm/i/sub d/methodology
Maji et al. An evolutionary approach based design automation of low power CMOS Two-Stage Comparator and Folded Cascode OTA
Girardi et al. Power constrained design optimization of analog circuits based on physical gm/ID characteristics
Dolatshahi et al. A new systematic design approach for low-power analog integrated circuits
Zjajo Stochastic process variation in deep-submicron CMOS
Severo et al. Simulated annealing to improve analog integrated circuit design: Trade-offs and implementation issues
Deyati et al. An automated design methodology for yield aware analog circuit synthesis in submicron technology
Maji et al. Automatic generation of saturation constraints and performance expressions for geometric programming based analog circuit sizing
Ghai et al. Fast analog design optimization using regression-based modeling and genetic algorithm: A nano-CMOS VCO case study
Severo et al. Automatic synthesis of analog integrated circuits including efficient yield optimization
Banin Junior et al. Methodology to optimize and reduce the total gate area of robust operational transconductance amplifiers by using diamond layout style for MOSFETs
Sahu et al. Automatic synthesis of CMOS operational amplifiers: a fuzzy optimization approach
Júnior et al. An innovative strategy to reduce die area of robust OTA by using iMTGSPICE and diamond layout style for MOSFETs
Olivera et al. A computer-aided approach for voltage reference circuit design
Javid et al. Simulation-based hierarchical sizing and biasing of analog firm IPs
Gomez et al. 1.5 ppm/° C nano-Watt resistorless MOS-only voltage reference