tock · bors · Sep 22, 2022 · Sep 1, 2022 · Sep 1, 2022 · Sep 1, 2022
diff --git a/Cargo.toml b/Cargo.toml
@@ -15,6 +15,7 @@ members = [
     "boards/esp32-c3-devkitM-1",
     "boards/clue_nrf52840",
     "boards/hail",
+    "boards/hifive_inventor",
     "boards/hifive1",
     "boards/imix",
     "boards/imxrt1050-evkb",
@@ -44,6 +45,8 @@ members = [
     "capsules",
     "chips/apollo3",
     "chips/arty_e21_chip",
+    "chips/e310_g002",
+    "chips/e310_g003",
     "chips/e310x",
     "chips/earlgrey",
     "chips/esp32",

diff --git a/boards/README.md b/boards/README.md
@@ -84,6 +84,7 @@ but the approximate definitions:
 | [WeAct F401CCU6 Core Board](weact_f401ccu6/README.md)             | ARM Cortex-M4    | STM32F401CCU6  | openocd    | custom                      | No            |
 | [SparkFun RedBoard Red-V](redboard_redv/README.md)                | RISC-V           | FE310-G002     | openocd    | tockloader                  | Yes (5.1)     |
 | [SiFive HiFive1 Rev B](hifive1/README.md)                         | RISC-V           | FE310-G002     | openocd    | tockloader                  | Yes (5.1)     |
+| [BBC HiFive Inventor](hifive1/README.md)                          | RISC-V           | FE310-G003     | tockloader | custom                      | No            |
 | [ESP32-C3-DevKitM-1](esp32-c3-devkitM-1/README.md)                | RISC-V-ish RV32I | ESP32-C3       | custom     | custom                      | No            |
 | [i.MX RT 1052 Evaluation Kit](imxrt1050-evkb/README.md)           | ARM Cortex-M7    | i.MX RT 1052   | custom     | custom                      | No            |
 | [Teensy 4.0](teensy40/README.md)                                  | ARM Cortex-M7    | i.MX RT 1062   | custom     | custom                      | No            |

diff --git a/boards/hifive1/Cargo.toml b/boards/hifive1/Cargo.toml
@@ -10,5 +10,5 @@ components = { path = "../components" }
 rv32i = { path = "../../arch/rv32i" }
 capsules = { path = "../../capsules" }
 kernel = { path = "../../kernel" }
-e310x = { path = "../../chips/e310x" }
 e310_g002 = { path = "../../chips/e310_g002" }
 sifive = { path = "../../chips/sifive" }
diff --git a/boards/hifive1/src/io.rs b/boards/hifive1/src/io.rs
@@ -1,7 +1,7 @@
 use core::fmt::Write;
 use core::panic::PanicInfo;
 use core::str;
-use e310x;
+use e310_g002;
 use kernel::debug;
 use kernel::debug::IoWrite;
 use kernel::hil::gpio;
@@ -25,7 +25,7 @@ impl Write for Writer {
 
 impl IoWrite for Writer {
     fn write(&mut self, buf: &[u8]) {
-        let uart = sifive::uart::Uart::new(e310x::uart::UART0_BASE, 16_000_000);
+        let uart = sifive::uart::Uart::new(e310_g002::uart::UART0_BASE, 16_000_000);
         uart.transmit_sync(buf);
     }
 }
@@ -37,7 +37,7 @@ impl IoWrite for Writer {
 pub unsafe extern "C" fn panic_fmt(pi: &PanicInfo) -> ! {
     // turn off the non panic leds, just in case
     let led_green = sifive::gpio::GpioPin::new(
-        e310x::gpio::GPIO0_BASE,
+        e310_g002::gpio::GPIO0_BASE,
         sifive::gpio::pins::pin19,
         sifive::gpio::pins::pin19::SET,
         sifive::gpio::pins::pin19::CLEAR,
@@ -46,7 +46,7 @@ pub unsafe extern "C" fn panic_fmt(pi: &PanicInfo) -> ! {
     gpio::Output::set(&led_green);
 
     let led_blue = sifive::gpio::GpioPin::new(
-        e310x::gpio::GPIO0_BASE,
+        e310_g002::gpio::GPIO0_BASE,
         sifive::gpio::pins::pin21,
         sifive::gpio::pins::pin21::SET,
         sifive::gpio::pins::pin21::CLEAR,
@@ -55,7 +55,7 @@ pub unsafe extern "C" fn panic_fmt(pi: &PanicInfo) -> ! {
     gpio::Output::set(&led_blue);
 
     let led_red_pin = sifive::gpio::GpioPin::new(
-        e310x::gpio::GPIO0_BASE,
+        e310_g002::gpio::GPIO0_BASE,
         sifive::gpio::pins::pin22,
         sifive::gpio::pins::pin22::SET,
         sifive::gpio::pins::pin22::CLEAR,

diff --git a/boards/hifive1/src/main.rs b/boards/hifive1/src/main.rs
@@ -10,7 +10,7 @@
 #![cfg_attr(not(doc), no_main)]
 
 use capsules::virtual_alarm::{MuxAlarm, VirtualMuxAlarm};
-use e310x::chip::E310xDefaultPeripherals;
+use e310_g002::interrupt_service::E310G002DefaultPeripherals;
 use kernel::capabilities;
 use kernel::component::Component;
 use kernel::dynamic_deferred_call::{DynamicDeferredCall, DynamicDeferredCallClientState};
@@ -33,7 +33,7 @@ static mut PROCESSES: [Option<&'static dyn kernel::process::Process>; NUM_PROCS]
     [None; NUM_PROCS];
 
 // Reference to the chip for panic dumps.
-static mut CHIP: Option<&'static e310x::chip::E310x<E310xDefaultPeripherals>> = None;
+static mut CHIP: Option<&'static e310_g002::chip::E310x<E310G002DefaultPeripherals>> = None;
 // Reference to the process printer for panic dumps.
 static mut PROCESS_PRINTER: Option<&'static kernel::process::ProcessPrinterText> = None;
 
@@ -83,7 +83,9 @@ impl SyscallDriverLookup for HiFive1 {
     }
 }
 
-impl KernelResources<e310x::chip::E310x<'static, E310xDefaultPeripherals<'static>>> for HiFive1 {
+impl KernelResources<e310_g002::chip::E310x<'static, E310G002DefaultPeripherals<'static>>>
+    for HiFive1
+{
     type SyscallDriverLookup = Self;
     type SyscallFilter = ();
     type ProcessFault = ();
@@ -125,19 +127,24 @@ pub unsafe fn main() {
     // only machine mode
     rv32i::configure_trap_handler(rv32i::PermissionMode::Machine);
 
-    let peripherals = static_init!(E310xDefaultPeripherals, E310xDefaultPeripherals::new());
+    let peripherals = static_init!(
+        E310G002DefaultPeripherals,
+        E310G002DefaultPeripherals::new()
+    );
 
     // initialize capabilities
     let process_mgmt_cap = create_capability!(capabilities::ProcessManagementCapability);
     let memory_allocation_cap = create_capability!(capabilities::MemoryAllocationCapability);
 
-    peripherals.watchdog.disable();
-    peripherals.rtc.disable();
-    peripherals.pwm0.disable();
-    peripherals.pwm1.disable();
-    peripherals.pwm2.disable();
+    peripherals.e310x.watchdog.disable();
+    peripherals.e310x.rtc.disable();
+    peripherals.e310x.pwm0.disable();
+    peripherals.e310x.pwm1.disable();
+    peripherals.e310x.pwm2.disable();
+    peripherals.e310x.uart1.disable();
 
     peripherals
+        .e310x
         .prci
         .set_clock_frequency(sifive::prci::ClockFrequency::Freq16Mhz);
 
@@ -155,14 +162,14 @@ pub unsafe fn main() {
 
     // Configure kernel debug gpios as early as possible
     kernel::debug::assign_gpios(
-        Some(&peripherals.gpio_port[22]), // Red
+        Some(&peripherals.e310x.gpio_port[22]), // Red
         None,
         None,
     );
 
     // Create a shared UART channel for the console and for kernel debug.
     let uart_mux = components::console::UartMuxComponent::new(
-        &peripherals.uart0,
+        &peripherals.e310x.uart0,
         115200,
         dynamic_deferred_caller,
     )
@@ -171,18 +178,23 @@ pub unsafe fn main() {
     // LEDs
     let led = components::led::LedsComponent::new().finalize(components::led_component_helper!(
         LedLow<'static, sifive::gpio::GpioPin>,
-        LedLow::new(&peripherals.gpio_port[22]), // Red
-        LedLow::new(&peripherals.gpio_port[19]), // Green
-        LedLow::new(&peripherals.gpio_port[21]), // Blue
+        LedLow::new(&peripherals.e310x.gpio_port[22]), // Red
+        LedLow::new(&peripherals.e310x.gpio_port[19]), // Green
+        LedLow::new(&peripherals.e310x.gpio_port[21]), // Blue
     ));
 
-    peripherals
-        .uart0
-        .initialize_gpio_pins(&peripherals.gpio_port[17], &peripherals.gpio_port[16]);
+    peripherals.e310x.uart0.initialize_gpio_pins(
+        &peripherals.e310x.gpio_port[17],
+        &peripherals.e310x.gpio_port[16],
+    );
+    peripherals.e310x.uart1.initialize_gpio_pins(
+        &peripherals.e310x.gpio_port[18],
+        &peripherals.e310x.gpio_port[23],
+    );
 
     let hardware_timer = static_init!(
         sifive::clint::Clint,
-        sifive::clint::Clint::new(&e310x::clint::CLINT_BASE)
+        sifive::clint::Clint::new(&e310_g002::clint::CLINT_BASE)
     );
 
     // Create a shared virtualization mux layer on top of a single hardware
@@ -216,8 +228,8 @@ pub unsafe fn main() {
     hil::time::Alarm::set_alarm_client(virtual_alarm_user, alarm);
 
     let chip = static_init!(
-        e310x::chip::E310x<E310xDefaultPeripherals>,
-        e310x::chip::E310x::new(peripherals, hardware_timer)
+        e310_g002::chip::E310x<E310G002DefaultPeripherals>,
+        e310_g002::chip::E310x::new(peripherals, hardware_timer)
     );
     CHIP = Some(chip);
 
@@ -251,10 +263,7 @@ pub unsafe fn main() {
     )
     .finalize(());
 
-    // Need two debug!() calls to actually test with QEMU. QEMU seems to have
-    // a much larger UART TX buffer (or it transmits faster).
-    debug!("HiFive1 initialization complete.");
-    debug!("Entering main loop.");
+    debug!("HiFive1 initialization complete. Entering main loop.");
 
     // These symbols are defined in the linker script.
     extern "C" {

diff --git a/boards/hifive_inventor/Cargo.toml b/boards/hifive_inventor/Cargo.toml
@@ -0,0 +1,14 @@
+[package]
+name = "hifive_inventor"
+version = "0.1.0"
+authors = ["Tock Project Developers <tock-dev@googlegroups.com>"]
+build = "build.rs"
+edition = "2021"
+
+[dependencies]
+components = { path = "../components" }
+rv32i = { path = "../../arch/rv32i" }
+capsules = { path = "../../capsules" }
+kernel = { path = "../../kernel" }
+e310_g003 = { path = "../../chips/e310_g003" }
+sifive = { path = "../../chips/sifive" }
diff --git a/boards/hifive_inventor/Makefile b/boards/hifive_inventor/Makefile
@@ -0,0 +1,20 @@
+# Makefile for building the tock kernel for the HiFive Inventor platform
+
+TARGET=riscv32imac-unknown-none-elf
+PLATFORM=hifive_inventor
+QEMU ?= qemu-system-riscv32
+
+include ../Makefile.common
+
+# Default target for installing the kernel.
+.PHONY: install
+install: flash-jlink
+
+TOCKLOADER=tockloader
+TOCKLOADER_JTAG_FLAGS = --jlink --board hifive1b
+KERNEL_ADDRESS = 0x20010000
+
+# upload kernel over JTAG
+.PHONY: flash-jlink
+flash-jlink: $(TOCK_ROOT_DIRECTORY)target/$(TARGET)/release/$(PLATFORM).bin
+	$(TOCKLOADER) $(TOCKLOADER_GENERAL_FLAGS) flash --address $(KERNEL_ADDRESS) $(TOCKLOADER_JTAG_FLAGS) $<
diff --git a/boards/hifive_inventor/README.md b/boards/hifive_inventor/README.md
@@ -0,0 +1,39 @@
+# BBC HiFive Inventor - FE310-G003 RISC-V Board
+
+<img src="https://www.hifiveinventor.com/image/hifive/support/gs-2-overview.png" width="35%">
+
+The [BBC HiFive Inventor](https://www.hifiveinventor.com/) is a
+board based on the SiFive FE310-G003 chip built around the
+[E31 Core](https://www.sifive.com/cores/e31). It includes the following
+peripherals:
+
+- 6x8 RGB LED Matrix
+- Light Sensor
+- LSM303AGR compass and accelerometer
+- Bluetooth and Wi-Fi connectivity co-processor
+
+**At present, the peripherals are not set up.** We are waiting for the schematic.
+
+## Programming
+
+### Using J-Link
+
+Running `make flash-jlink` should load the kernel onto the board. It requires
+you install [J-Link](https://www.segger.com/downloads/jlink#J-LinkSoftwareAndDocumentationPack).
+Make sure that the `JLinkExe` executable is accessible starting from your
+`PATH` variable.
+
+If need, use `gdb` to debug the kernel. Start a custom gdb server with
+`JLinkGDBServerExe`, or use the following configuration:
+
+```bash
+$ JLinkGDBServerCLExe -select USB -device FE310 -endian little -if JTAG -speed 1200 -noir -noLocalhostOnly
+```
+
+### Other tools
+
+I would also like to note that `openocd` support is in developement.
+[A update](https://review.openocd.org/c/openocd/+/7135) for adding the flash
+ISSI IS25LQ040 chip is on it's way.
+
+Running in QEMU has not been tested, yet.
diff --git a/boards/hifive_inventor/build.rs b/boards/hifive_inventor/build.rs
@@ -0,0 +1,4 @@
+fn main() {
+    println!("cargo:rerun-if-changed=layout.ld");
+    println!("cargo:rerun-if-changed=../kernel_layout.ld");
+}
diff --git a/boards/hifive_inventor/layout.ld b/boards/hifive_inventor/layout.ld
@@ -0,0 +1,13 @@
+/* The HiFive inventor board has 512 MiB of flash and 64 KiB of RAM.
+ */
+
+MEMORY
+{
+  rom (rx)  : ORIGIN = 0x20010000, LENGTH = 0x30000
+  prog (rx) : ORIGIN = 0x20040000, LENGTH = 512M-0x430000
+  ram (rwx) : ORIGIN = 0x80000000, LENGTH = 0x10000
+}
+
+MPU_MIN_ALIGN = 1K;
+
+INCLUDE ../kernel_layout.ld
diff --git a/boards/hifive_inventor/src/io.rs b/boards/hifive_inventor/src/io.rs
@@ -0,0 +1,55 @@
+use core::fmt::Write;
+use core::panic::PanicInfo;
+use core::str;
+use e310_g003;
+use kernel::debug;
+use kernel::debug::IoWrite;
+use kernel::hil::led;
+use rv32i;
+
+use crate::CHIP;
+use crate::PROCESSES;
+use crate::PROCESS_PRINTER;
+
+struct Writer {}
+
+static mut WRITER: Writer = Writer {};
+
+impl Write for Writer {
+    fn write_str(&mut self, s: &str) -> ::core::fmt::Result {
+        self.write(s.as_bytes());
+        Ok(())
+    }
+}
+
+impl IoWrite for Writer {
+    fn write(&mut self, buf: &[u8]) {
+        let uart = sifive::uart::Uart::new(e310_g003::uart::UART0_BASE, 16_000_000);
+        uart.transmit_sync(buf);
+    }
+}
+
+/// Panic handler.
+#[cfg(not(test))]
+#[no_mangle]
+#[panic_handler]
+pub unsafe extern "C" fn panic_fmt(pi: &PanicInfo) -> ! {
+    let led = sifive::gpio::GpioPin::new(
+        e310_g003::gpio::GPIO0_BASE,
+        sifive::gpio::pins::pin22,
+        sifive::gpio::pins::pin22::SET,
+        sifive::gpio::pins::pin22::CLEAR,
+    );
+    let led = &mut led::LedLow::new(&led);
+    let writer = &mut WRITER;
+
+    debug::panic(
+        &mut [led],
+        writer,
+        pi,
+        &rv32i::support::nop,
+        &PROCESSES,
+        &CHIP,
+        &PROCESS_PRINTER,
+    )
+}