8000 OpenTitan: Bump to the latest RTL SHA by alistair23 · Pull Request #3056 · tock/tock · GitHub
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OpenTitan: Bump to the latest RTL SHA #3056

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merged 1 commit into from
Sep 28, 2022
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@alistair23 alistair23 commented Jun 14, 2022

Pull Request Overview

This bumps us to the latest SHA. This includes support for the Manifest and the ePMP changes

Testing Strategy

Running on FPGA and Verilator

TODO or Help Wanted

Still get all the tests passing and ePMP cleaned up

Documentation Updated

  • Updated the relevant files in /docs, or no updates are required.

Formatting

  • Ran make prepush.

@github-actions github-actions bot added kernel risc-v RISC-V architecture WG-OpenTitan In the purview of the OpenTitan working group. labels Jun 14, 2022
@github-actions github-actions bot removed the kernel label Jun 22, 2022
@alistair23 alistair23 mentioned this pull request Jul 18, 2022
2 tasks
@hudson-ayers hudson-ayers mentioned this pull request Aug 2, 2022
@alistair23 alistair23 force-pushed the alistair/ot-bump branch 2 times, most recently from a218932 to 568e799 Compare August 4, 2022 01:44
@alistair23 alistair23 force-pushed the alistair/ot-bump branch 2 times, most recently from 82832ac to c7a9449 Compare August 8, 2022 01:41
twilfredo added a commit to twilfredo/qemu that referenced this pull request Aug 12, 2022
The following patch updates opentitan to match the new configuration,
as per, lowRISC/opentitan@217a016

Note: with this patch we now skip the usage of the opentitan
`boot_rom`. The Opentitan boot rom contains hw verification
for devies which we are currently not supporting in qemu. As of now,
the `boot_rom` has no major significance, however, would be good to
support in the future.

Tested by running utests from the latest tock [1]
(that supports this version of OT).

[1] tock/tock#3056

Signed-off-by: Wilfred Mallawa <wilfred.mallawa@wdc.com>
alistair23 pushed a commit to alistair23/qemu that referenced this pull request Aug 15, 2022
The following patch updates opentitan to match the new configuration,
as per, lowRISC/opentitan@217a016

Note: with this patch we now skip the usage of the opentitan
`boot_rom`. The Opentitan boot rom contains hw verification
for devies which we are currently not supporting in qemu. As of now,
the `boot_rom` has no major significance, however, would be good to
support in the future.

Tested by running utests from the latest tock [1]
(that supports this version of OT).

[1] tock/tock#3056

Signed-off-by: Wilfred Mallawa <wilfred.mallawa@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220812005229.358850-1-wilfred.mallawa@opensource.wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
alistair23 pushed a commit to alistair23/qemu that referenced this pull request Aug 17, 2022
The following patch updates opentitan to match the new configuration,
as per, lowRISC/opentitan@217a016

Note: with this patch we now skip the usage of the opentitan
`boot_rom`. The Opentitan boot rom contains hw verification
for devies which we are currently not supporting in qemu. As of now,
the `boot_rom` has no major significance, however, would be good to
support in the future.

Tested by running utests from the latest tock [1]
(that supports this version of OT).

[1] tock/tock#3056

Signed-off-by: Wilfred Mallawa <wilfred.mallawa@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220812005229.358850-1-wilfred.mallawa@opensource.wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
alistair23 pushed a commit to alistair23/qemu that referenced this pull request Aug 22, 2022
The following patch updates opentitan to match the new configuration,
as per, lowRISC/opentitan@217a016

Note: with this patch we now skip the usage of the opentitan
`boot_rom`. The Opentitan boot rom contains hw verification
for devies which we are currently not supporting in qemu. As of now,
the `boot_rom` has no major significance, however, would be good to
support in the future.

Tested by running utests from the latest tock [1]
(that supports this version of OT).

[1] tock/tock#3056

Signed-off-by: Wilfred Mallawa <wilfred.mallawa@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220812005229.358850-1-wilfred.mallawa@opensource.wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
alistair23 pushed a commit to alistair23/qemu that referenced this pull request Aug 23, 2022
The following patch updates opentitan to match the new configuration,
as per, lowRISC/opentitan@217a016

Note: with this patch we now skip the usage of the opentitan
`boot_rom`. The Opentitan boot rom contains hw verification
for devies which we are currently not supporting in qemu. As of now,
the `boot_rom` has no major significance, however, would be good to
support in the future.

Tested by running utests from the latest tock [1]
(that supports this version of OT).

[1] tock/tock#3056

Signed-off-by: Wilfred Mallawa <wilfred.mallawa@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220812005229.358850-1-wilfred.mallawa@opensource.wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
alistair23 pushed a commit to alistair23/qemu that referenced this pull request Sep 6, 2022
The following patch updates opentitan to match the new configuration,
as per, lowRISC/opentitan@217a016

Note: with this patch we now skip the usage of the opentitan
`boot_rom`. The Opentitan boot rom contains hw verification
for devies which we are currently not supporting in qemu. As of now,
the `boot_rom` has no major significance, however, would be good to
support in the future.

Tested by running utests from the latest tock [1]
(that supports this version of OT).

[1] tock/tock#3056

Signed-off-by: Wilfred Mallawa <wilfred.mallawa@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220812005229.358850-1-wilfred.mallawa@opensource.wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
alistair23 pushed a commit to alistair23/qemu that referenced this pull request Sep 7, 2022
The following patch updates opentitan to match the new configuration,
as per, lowRISC/opentitan@217a016

Note: with this patch we now skip the usage of the opentitan
`boot_rom`. The Opentitan boot rom contains hw verification
for devies which we are currently not supporting in qemu. As of now,
the `boot_rom` has no major significance, however, would be good to
support in the future.

Tested by running utests from the latest tock [1]
(that supports this version of OT).

[1] tock/tock#3056

Signed-off-by: Wilfred Mallawa <wilfred.mallawa@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220812005229.358850-1-wilfred.mallawa@opensource.wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
bors bot added a commit that referenced this pull request Sep 7, 2022
3135: LEDs array in LED Driver does not need to be mut r=bradjc a=brghena

### Pull Request Overview

The array of LEDs in LED Driver does not need to be a mutable reference.

The LEDs themselves were not mutable, only the array. But nothing should ever be changing to contents of that array, and the LED Driver does not do so. This seems to be legacy from when we used to have LEDs in a TakeCell.

### Testing Strategy

This pull request was tested by compiling all boards and testing the Blink app on an nRF52840DK.


### TODO or Help Wanted

Should be good to go.


### Documentation Updated

- [X] Updated the relevant files in `/docs`, or no updates are required.

### Formatting

- [X] Ran `make prepush`.


3146: static_init: add note about generic parameters r=bradjc a=ppannuto

### Pull Request Overview

This pull request adds a quick documentation note, as suggested by #2995.

### Testing Strategy

N/A

### TODO or Help Wanted

N/A

### Documentation Updated

- [x] Updated the relevant files in `/docs`, or no updates are required.

### Formatting

- [x] Ran `make prepush`.


3163: boards/opentitan: add flash_ctl utests r=bradjc a=twilfredo

### Pull Request Overview

Adds a new test suite to test the flash controller directly.
Previous testing was implicit through the TickV tests.

This is useful for testing OT changes to the flash controller
directly, and much faster (on Verilator)/easier to debug  compared to
TicKV tests.

We currently test all supported functionality,
`read_page`, `write_page` and `erase_page`.

### Testing Strategy

`make BOARD_CONFIGURATION=sim_verilator test-verilator`

Verilator Output:

```
I00001 test_rom.c:115] Test ROM complete, jumping to flash!
Unable to find otbn-rsa, disabling RSA support
OpenTitan initialisation complete. Entering main loop
[FLASH_CTRL] Test page read/write....
    [ok]
[FLASH_CTRL] Test page erase....
    [ok]
trivial assertion... 
    [ok]
```


### Notes

The testing is done on the latest supported version of Tock for Opentitan, so this depends on #3056

### Documentation Updated

- [x] No updates are required.

### Formatting

- [x] Ran `make prepush`.


Co-authored-by: Branden Ghena <brghena@berkeley.edu>
Co-authored-by: Pat Pannuto <pat.pannuto@gmail.com>
Co-authored-by: Wilfred Mallawa <wilfred.mallawa@wdc.com>
@github-actions github-actions bot removed the risc-v RISC-V architecture label Sep 13, 2022
@alistair23
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Addresses the issues

bradjc
bradjc previously approved these changes Sep 13, 2022
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bradjc commented Sep 13, 2022

CI error:

   Compiling capsules v0.1.0 (/home/runner/work/tock/tock/capsules)
   Compiling rv32i v0.1.0 (/home/runner/work/tock/tock/arch/rv32i)
   Compiling lowrisc v0.1.0 (/home/runner/work/tock/tock/chips/lowrisc)
   Compiling earlgrey v0.1.0 (/home/runner/work/tock/tock/chips/earlgrey)
   Compiling components v0.1.0 (/home/runner/work/tock/tock/boards/components)
    Finished release [optimized + debuginfo] target(s) in 29.51s
   text	   data	    bss	    dec	    hex	filename
 143556	     28	  17808	 161392	  27670	/home/runner/work/tock/tock/target/riscv32imc-unknown-none-elf/release/earlgrey-cw310
e619a39aa1c627be3c698c18e53815344b21a1a3d2c9a22c22528330849cef81  /home/runner/work/tock/tock/target/riscv32imc-unknown-none-elf/release/earlgrey-cw310.bin
make[1]: Leaving directory '/home/runner/work/tock/tock/boards/opentitan/earlgrey-cw310'
thread 'main' panicked at 'earlgrey_cw310 job failed with Timeout Error: Expected "OpenTitan initialisation complete. Entering main loop" but got "make[1]: Entering directory '/home/runner/work/tock/tock/boards/opentitan/earlgrey-cw310'`\r``\n`
`^`[0m`^`[0m`^`[1m`^`[32m    Finished`^`[0m release [optimized + debuginfo] target(s) in 0.05s`\r``\n`
   text	   data	    bss	    dec	    hex	filename`\r``\n`
 143556	     28	  17808	 161392	  27670	/home/runner/work/tock/tock/target/riscv32imc-unknown-none-elf/release/earlgrey-cw310`\r``\n`
../../../tools/qemu/build/qemu-system-riscv32 -M opentitan -kernel /home/runner/work/tock/tock/target/riscv32imc-unknown-none-elf/release/earlgrey-cw310.elf -nographic -serial mon:stdio`\r``\n`
" (after waiting 10000 ms)', src/main.rs:78:41
note: run with `RUST_BACKTRACE=1` environment variable to display a backtrace
make: *** [Makefile:553: ci-job-qemu] Error 101
Error: Process completed with exit code 2.

@twilfredo
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twilfredo commented Sep 14, 2022

CI error:

   Compiling capsules v0.1.0 (/home/runner/work/tock/tock/capsules)
   Compiling rv32i v0.1.0 (/home/runner/work/tock/tock/arch/rv32i)
   Compiling lowrisc v0.1.0 (/home/runner/work/tock/tock/chips/lowrisc)
   Compiling earlgrey v0.1.0 (/home/runner/work/tock/tock/chips/earlgrey)
   Compiling components v0.1.0 (/home/runner/work/tock/tock/boards/components)
    Finished release [optimized + debuginfo] target(s) in 29.51s
   text	   data	    bss	    dec	    hex	filename
 143556	     28	  17808	 161392	  27670	/home/r
8000
unner/work/tock/tock/target/riscv32imc-unknown-none-elf/release/earlgrey-cw310
e619a39aa1c627be3c698c18e53815344b21a1a3d2c9a22c22528330849cef81  /home/runner/work/tock/tock/target/riscv32imc-unknown-none-elf/release/earlgrey-cw310.bin
make[1]: Leaving directory '/home/runner/work/tock/tock/boards/opentitan/earlgrey-cw310'
thread 'main' panicked at 'earlgrey_cw310 job failed with Timeout Error: Expected "OpenTitan initialisation complete. Entering main loop" but got "make[1]: Entering directory '/home/runner/work/tock/tock/boards/opentitan/earlgrey-cw310'`\r``\n`
`^`[0m`^`[0m`^`[1m`^`[32m    Finished`^`[0m release [optimized + debuginfo] target(s) in 0.05s`\r``\n`
   text	   data	    bss	    dec	    hex	filename`\r``\n`
 143556	     28	  17808	 161392	  27670	/home/runner/work/tock/tock/target/riscv32imc-unknown-none-elf/release/earlgrey-cw310`\r``\n`
../../../tools/qemu/build/qemu-system-riscv32 -M opentitan -kernel /home/runner/work/tock/tock/target/riscv32imc-unknown-none-elf/release/earlgrey-cw310.elf -nographic -serial mon:stdio`\r``\n`
" (after waiting 10000 ms)', src/main.rs:78:41
note: run with `RUST_BACKTRACE=1` environment variable to display a backtrace
make: *** [Makefile:553: ci-job-qemu] Error 101
Error: Process completed with exit code 2.

@alistair23 This is happening because of the diff between the entry point in the app vs the where reset vector points to in qemu.

Having a quick look at the test elf (tock/target/riscv32imc-unknown-none-elf/release/deps/earlgrey_cw310-ec5e3eac60b97f7a ), the entry point is at 0x20000400. Changing this in qemu, gets the tests working fine. Is there a way to "fix" the entry point for tock? Otherwise we will have to keep changing this.

@alistair23
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Urgh, the linker changes changed the start address and as we don't have the ROM we jump to the wrong place.

Patches have been sent to QEMU to fix this and allow changing the resetvec from the command line. It might also be worth parsing the manifest in QEMU boot code so it's fully dynamic! @twilfredo if you are interested in that

@hudson-ayers
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How are we going without the boot ROM in this PR? Or is the change here just that the QEMU tests no longer exercise the boot ROM, but verilator / hardware tests still assume it will be present?

@twilfredo
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twilfredo commented Sep 14, 2022

How are we going without the boot ROM in this PR? Or is the change here just that the QEMU tests no longer exercise the boot ROM, but verilator / hardware tests still assume it will be present?

We basically just skip the bootrom entirely in QEMU (with this change) mainly because the bootrom has gotten more complex and now runs tests against hwip that aren't supported in QEMU (i.e lifecycle contoller, flash_ctrl).

For the functionality we test for currently, the bootrom doesn't seem to make any changes (atleast so far...) so we don't load the bootrom when running tests/apps on qemu (-bios $(OPENTITAN_BOOT_ROM) with this removed). But this might change with additional hw configurations/init being added to the bootrom later down the line. For hw/verilator, they load the bootrom as before.

@bradjc bradjc added the blocked-upstream Waiting on something from an upstream project label Sep 15, 2022
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bradjc commented Sep 19, 2022

What is the status of this?

vcoracolombo pushed a commit to PPC64/qemu that referenced this pull request Sep 19, 2022
The following patch updates opentitan to match the new configuration,
as per, lowRISC/opentitan@217a016

Note: with this patch we now skip the usage of the opentitan
`boot_rom`. The Opentitan boot rom contains hw verification
for devies which we are currently not supporting in qemu. As of now,
the `boot_rom` has no major significance, however, would be good to
support in the future.

Tested by running utests from the latest tock [1]
(that supports this version of OT).

[1] tock/tock#3056

Signed-off-by: Wilfred Mallawa <wilfred.mallawa@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220812005229.358850-1-wilfred.mallawa@opensource.wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
@twilfredo
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twilfredo commented Sep 19, 2022

What is the status of this?

On the Tock side It's ready, but we are waiting on this qemu patch series to fix the CI failure (jumping into the wrong resetvector)

Bump to a newer hardware SHA, including support fot signing the
binaries, Manifests and Bazel.

Updates to the correct #IRQs for opentitan commit as per [1].

[1] https://github.com/lowRISC/opentitan/blob/217a0168ba118503c166a9587819e3811eeb0c0c/hw/top_earlgrey/sw/autogen/top_earlgrey.h#L1169

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Wilfred Mallawa <wilfred.mallawa@wdc.com>
Signed-off-by: Chris Frantz <cfrantz@google.com>
@alistair23
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Tests are passing again!

@bradjc bradjc removed the blocked-upstream Waiting on something from an upstream project label Sep 28, 2022
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bradjc commented Sep 28, 2022

bors r+

F438

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bors bot commented Sep 28, 2022

@bors bors bot merged commit 8c888f6 into tock:master Sep 28, 2022
bors bot added a commit that referenced this pull request Sep 29, 2022
3208: opentitan: add watchdog/aon_timer r=bradjc a=twilfredo

### Pull Request Overview

Uses the `Always on timer` (AON_TIMER) for Opentitan [hw_ip](https://docs.opentitan.org/hw/ip/aon_timer/doc/), to implement watchdog for OpenTitan. 

This AON_TIMER has both a `watchdog` timer and a `wakeup` timer. The driver implemented has support for both hw functionality but only runs the watch dog timer for now  (unused code tagged with `#[cfg(aon_wkup_timer)]`, that should be (?) compiled out and is left for reference/use later.

The following patch for [qemu](https://www.mail-archive.com/qemu-devel@nongnu.org/msg907656.html) adds support to the watchdog, so we can use this in the future with qemu also. 

### Testing Strategy

Driver has been written to support to latest version of OpenTitan supported by TockOS, testing was done on Verilator on this #3056. 


### TODO

- Tested on Verilator, would be good to test on CW130  (since the AON_TIMER runs on different clock rates on both devices)
- Implement a WakeUp timer interface (?) and connect it to this driver.

### Documentation Updated

- [x] No updates are required.

### Formatting

- [x] Ran `make prepush`.


Co-authored-by: Wilfred Mallawa <wilfred.mallawa@wdc.com>
bors bot added a commit that referenced this pull request Sep 29, 2022
3220: boards/opentitan: Improve README for OT bump r=bradjc a=twilfredo

### Pull Request Overview

This adds extensive build instructions/commands to simplify the process of building OpenTitan and running it with Tock.

Since OT has moved onto a new build system with `bazel` this adds commands/instructions to build only the target we need to run Tock.

### Testing Strategy

Building OpenTitan using these commands and running Tock on Verilator.

Tested with: #3056

### Documentation Updated

- [x] Updated the relevant files in `/docs`, or no updates are required.

### Formatting

- [x] Ran `make prepush`.


Co-authored-by: Wilfred Mallawa <wilfred.mallawa@wdc.com>
bors bot added a commit that referenced this pull request Sep 30, 2022
3208: opentitan: add watchdog/aon_timer r=alistair23 a=twilfredo

### Pull Request Overview

Uses the `Always on timer` (AON_TIMER) for Opentitan [hw_ip](https://docs.opentitan.org/hw/ip/aon_timer/doc/), to implement watchdog for OpenTitan. 

This AON_TIMER has both a `watchdog` timer and a `wakeup` timer. The driver implemented has support for both hw functionality but only runs the watch dog timer for now  (unused code tagged with `#[cfg(aon_wkup_timer)]`, that should be (?) compiled out and is left for reference/use later.

The following patch for [qemu](https://www.mail-archive.com/qemu-devel@nongnu.org/msg907656.html) adds support to the watchdog, so we can use this in the future with qemu also. 

### Testing Strategy

Driver has been written to support to latest version of OpenTitan supported by TockOS, testing was done on Verilator on this #3056. 


### TODO

- Tested on Verilator, would be good to test on CW130  (since the AON_TIMER runs on different clock rates on both devices)
- Implement a WakeUp timer interface (?) and connect it to this driver.

### Documentation Updated

- [x] No updates are required.

### Formatting

- [x] Ran `make prepush`.


Co-authored-by: Wilfred Mallawa <wilfred.mallawa@wdc.com>
bors bot added a commit that referenced this pull request Sep 30, 2022
3208: opentitan: add watchdog/aon_timer r=bradjc a=twilfredo

### Pull Request Overview

Uses the `Always on timer` (AON_TIMER) for Opentitan [hw_ip](https://docs.opentitan.org/hw/ip/aon_timer/doc/), to implement watchdog for OpenTitan. 

This AON_TIMER has both a `watchdog` timer and a `wakeup` timer. The driver implemented has support for both hw functionality but only runs the watch dog timer for now  (unused code tagged with `#[cfg(aon_wkup_timer)]`, that should be (?) compiled out and is left for reference/use later.

The following patch for [qemu](https://www.mail-archive.com/qemu-devel@nongnu.org/msg907656.html) adds support to the watchdog, so we can use this in the future with qemu also. 

### Testing Strategy

Driver has been written to support to latest version of OpenTitan supported by TockOS, testing was done on Verilator on this #3056. 


### TODO

- Tested on Verilator, would be good to test on CW130  (since the AON_TIMER runs on different clock rates on both devices)
- Implement a WakeUp timer interface (?) and connect it to this driver.

### Documentation Updated

- [x] No updates are required.

### Formatting

- [x] Ran `make prepush`.


Co-authored-by: Wilfred Mallawa <wilfred.mallawa@wdc.com>
bors bot added a commit that referenced this pull request Oct 6, 2022
3214: chips/earlgrey/aes: Fixup AES for Verilator r=bradjc a=twilfredo

### Pull Request Overview

On the latest commit of OpenTitan supported by Tock (#3056), on `Verilator` AES does not work as per the tests. The driver returns `ErrorCode::BUSY` since the hw_ip has not moved into the `idle` state when we expect. This issue only occurs on Verilator and works as expected on HW.

This patch adds a Verilator specific change to make sure we add a small wait where appropriate. Now passing all AES tests on Verilator.

### Testing Strategy

Running the `aes_test` on Verilator. 

````
OpenTitan initialisation complete. Entering main loop
check run AES128 CCM...
AES CCM* encryption/decryption tests
aes_ccm_test passed: (current_test=0, encrypting=true, tag_is_valid=true)
aes_ccm_test passed: (current_test=0, encrypting=false, tag_is_valid=true)
aes_ccm_test passed: (current_test=1, encrypting=true, tag_is_valid=true)
aes_ccm_test passed: (current_test=1, encrypting=false, tag_is_valid=true)
aes_ccm_test passed: (current_test=2, encrypting=true, tag_is_valid=true)
aes_ccm_test passed: (current_test=2, encrypting=false, tag_is_valid=true)
    [ok]
check run AES128 ECB...
aes_test passed (ECB Enc Src/Dst)
aes_test passed (ECB Dec Src/Dst)
aes_test passed (ECB Enc In-place)
aes_test passed (ECB Dec In-place)
    [ok]
check run AES128 CBC...
aes_test passed (CBC Enc Src/Dst)
aes_test passed (CBC Dec Src/Dst)
aes_test passed (CBC Enc In-place)
aes_test passed (CBC Dec In-place)
    [ok]
check run AES128 CTR...
aes_test CTR passed: (CTR Enc Ctr Src/Dst)
aes_test CTR passed: (CTR Dec Ctr Src/Dst)
    [ok]

````

### TODO or Help Wanted

N/A

### Documentation Updated

- [x] No updates are required.

### Formatting

- [x] Ran `make prepush`.


Co-authored-by: Wilfred Mallawa <wilfred.mallawa@wdc.com>
bors bot added a commit that referenced this pull request Oct 24, 2022
3249: boards/opentitan: bump to latest master RTL SHA r=hudson-ayers a=twilfredo

### Pull Request Overview

This patch series adds support for OpenTitan [latest master](lowRISC/opentitan@7550a35) (**as of this PR**).  Most of the heavy lifting for this was done in #3056.

This PR updates the since changes, registers/irqs etc... to bring Tock up to speed.

Going forward: Latest master of OT will most likely work, I'll test any major  changes (maybe weekly) and update here as necessary. 

### Testing Strategy

Running OpenTitan tests on Verilator (with the latest master build of OT).

```
I00000 test_rom.c:98] Version: earlgrey_silver_release_v5-7719-g7550a3512, Build Date: 2022-09-29 11:24:47
I00001 test_rom.c:180] Test ROM complete, jumping to flash!
Unable to find otbn-rsa, disabling RSA support
OpenTitan initialisation complete. Entering main loop
check run AES128 CCM... 
AES CCM* encryption/decryption tests
aes_ccm_test passed: (current_test=0, encrypting=true, tag_is_valid=true)
aes_ccm_test passed: (current_test=0, encrypting=false, tag_is_valid=true)
aes_ccm_test passed: (current_test=1, encrypting=true, tag_is_valid=true)
aes_ccm_test passed: (current_test=1, encrypting=false, tag_is_valid=true)
aes_ccm_test passed: (current_test=2, encrypting=true, tag_is_valid=true)
aes_ccm_test passed: (current_test=2, encrypting=false, tag_is_valid=true)
    [ok]
check run AES128 ECB... 
aes_test passed (ECB Enc Src/Dst)
aes_test passed (ECB Dec Src/Dst)
aes_test passed (ECB Enc In-place)
aes_test passed (ECB Dec In-place)
    [ok]
check run AES128 CBC... 
aes_test passed (CBC Enc Src/Dst)
aes_test passed (CBC Dec Src/Dst)
aes_test passed (CBC Enc In-place)
aes_test passed (CBC Dec In-place)
    [ok]
check run AES128 CTR... 
aes_test CTR passed: (CTR Enc Ctr Src/Dst)
aes_test CTR passed: (CTR Dec Ctr Src/Dst)
    [ok]
check run CSRNG Entropy 32... 
Entropy32 test: first get Ok(())
Entropy test: obtained all 8 values. They are:
[00]: 735b27a0
[01]: 497b246f
[02]: 9a8f9420
[03]: 91618fe9
[04]: e07e680b
[05]: 01aec0b9
[06]: 3ca6b2a0
[07]: 19078a9d
    [ok]
[FLASH_CTRL] Test page read/write....
    [ok]
[FLASH_CTRL] Test page erase....
    [ok]
check hmac load binary... 
    [ok]
check hmac check verify... 
    [ok]
start multi alarm test...
    [ok]
check otbn run binary...
    [FAIL] No OTBN binary
Not running RSA tests
Not running RSA tests
check rsa key import... 
    [ok]
check rsa 4096 bit key import... 
    [ok]
Not running RSA tests
start SHA256 verify test
Sha256Test: Setting slice to 12..24
Sha256Test: Setting slice to 24..36
Sha256Test: Setting slice to 36..48
Sha256Test: Setting slice to 48..60
Sha256Test: Setting slice to 60..72
Sha256Test: Verification result: Ok(true)
    [ok]
check SipHash 2-4... 
    [ok]
[SPI] Setup spi_host0 partial_transfer... 
    [ok]
[SPI] Setup spi_host0 transfers... 
    [ok]
[SPI] Setup spi_host0 transfer...x2 
    [ok]
trivial assertion... 
    [ok]
```

### TODO 

Although QEMU still works for the tests we have now, we need to update some of the IRQs (patches to QEMU).

### Documentation Updated
The README changes required by this PR are all documented in #3220 .  No major changes required since last OT bump. I will send new update to update some OT paths when #3220 merges. 
 
- [x] Updated the relevant files in `/docs`, or no updates are required.

### Formatting

- [x] Ran `make prepush`.


Co-authored-by: Wilfred Mallawa <wilfred.mallawa@wdc.com>
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