Non-iterative division circuit design with accuracy and performance trade-off based on mixed integer linear programming approach
A wide range of applications such as image/video processing involve arithmetic division and demand high computing performance but can tolerate some degree of errors or allow small deviations from their theoretical results. This paper ...
Hybrid small-signal modeling of GaN HEMTs based on improved genetic algorithm
—In this paper, an improved genetic algorithm-based hybrid direct-optimal extraction method for small-signal model of GaN HEMT devices is proposed. Simulated annealing algorithm and fuzzy adaptive strategy are incorporated into genetic ...
Low power and high I/O efficiency hybrid memory for Internet of Things edge devices
The performance of the Internet of Things (IoT) devices is gradually improving. However, traditional memory devices cannot meet the requirements of IoT devices in terms of energy consumption, capacity, I/O efficiency, and so on. This ...
Highlights
- We proposed the hybrid storage class memory to improve the performance of Internet of things edge devices.
Improvement in the electrical properties of a-IGZO TFTs by using PA-PI as a modification layer
High performance display requires thin film transistors (TFTs) to have better electrical characteristics. In this study, we used photoalignment polyimide (PA-PI) as the modification layer to modify the morphology of the insulating ...
Logarithm-approximate floating-point multiplier
Approximate computing is a useful approach to save power and increase performance by trading Energy and accuracy. This paper proposes an efficient inexact floating-point (FP) multiplier using the idea of a semi-logarithm multiplier. In ...
An effective method to suppress high-order modes of SIW filters with compact size
In this paper, an effective method for substrate integrated waveguide (SIW) filter with improved stop band performance is proposed. By configuring the position and the direction of the coupling window, the transmission of the parasitic ...
A 14-bit 1.2-V low power SAR ADC with digital background calibration in 0.18 μm CMOS
A 14-bit successive-approximation-register analog-to-digital converter is proposed for intelligent sensing application. A redundant integer sub-radix-2 capacitor array is adopted to recover the conversion errors. The capacitor mismatch ...
A 14-bit 5MS/s SAR ADC with digital calibration algorithm for OLED display touch system
In this article, we propose a 14-bit successive approximation register (SAR) analog-to-digital converter (ADC) based on digital calibration algorithm for large-size organic light-emitting diode (OLED) display touch chip. The SAR ADC ...
Highlights
- A novel SAR ADC based on digital calibration algorithm for large-size OLED display touch system is proposed to improve the SFDR over 30 dB.
Minimization of crosstalk noise and delay using reduced graphene nano ribbon (GNR) interconnect
- Sandip Bhattacharya,
- Subhajit Das,
- Shubham Tayal,
- J. Ajayan,
- Leo Joseph,
- Tarun Kumar Juluru,
- Arnab Mukhopadhyay,
- Sayan Kanungo,
- Debaprasad Das,
- Shashank Rebelli
In this paper, we proposed a side-contact reduced graphene nano-ribbon (SC-RGNR) interconnect model to reduce crosstalk noise and delay for next generation high performance integrated circuit (IC) design. The SC-RGNR interconnect ...
High-performance polymer top-contact thin-film transistor with orthogonal photolithographic process
Based on fluorinated photoresist, an orthogonal lift-off process was introduced to directly fabricate patterning metallic source and drain contacts on polymeric thin films to obtain the top-contact structure device. Top-contact ...
Analysis of performance for novel pocket-doped NCFET under the influence of interface trap charges and temperature variation
This paper explores the DC characteristics and trap analysis of single gate NCFET (SG-NCFET) and highly doped double pocket double gate NCFET (HDDP-DG-NCFET) with spacer at different temperatures. The effect of temperature and the trap ...
Highlights
- Temperature and Trap charges determines the reliability of the device.
- Novel ...
Steep-subthreshold slope dual gate negative capacitance junction less FET with dead channel: TCAD approach for digital/ RF applications
In pursuit of lowering power densities and reducing energy efficiency constraints, execution grid of arising electronic devices are being investigated to track down alternative options for MOSFETs. Herein we present and examine a new ...
A reconfigurable millimeter-wave wideband low-noise amplifier in 55-nm CMOS
This paper presents a dual-wideband millimeter-wave (mm-wave) low-noise amplifier (LNA) that can be reconfigured covering dual bandwidths of 22.8–28.9 GHz and 23.2–29.5 GHz by RF-switched passive inductors for 5G applications. The ...
X-parameter modeling investigation for microwave power devices
In order to address the complex problem of large-signal parameter extraction for microwave power devices, in this paper an X-parameter modeling approach for microwave power devices based on artificial neural network (ANN) is proposed. ...