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Spin Orbit Torque Device based Stochastic Multi-bit Synapses for On-chip STDP Learning

Authors:

Jongsun ParkAuthors Info & Claims

ISLPED '18: Proceedings of the International Symposium on Low Power Electronics and Design

Article No.: 21, Pages 1 - 6

https://doi.org/10.1145/3218603.3218654

Published: 23 July 2018 Publication History

Abstract

As a large number of neurons and synapses are needed in spike neural network (SNN) design, emerging devices have been employed to implement synapses and neurons. In this paper, we present a stochastic multi-bit spin orbit torque (SOT) memory based synapse, where only one SOT device is switched for potentiation and depression using modified Gray code. The modified Gray code based approach needs only N devices to represent 2N levels of synapse weights. Early read termination scheme is also adopted to reduce the power consumption of training process by turning off less associated neurons and its ADCs. For MNIST dataset, with comparable classification accuracy, the proposed SNN architecture using 3-bit synapse achieves 68.7% reduction of ADC overhead compared to the conventional 8-level synapse.

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Cited By

Verma GNisar ADhull SKaushik B(2023)Neuromorphic Accelerator for Spiking Neural Network Using SOT-MRAM Crossbar ArrayIEEE Transactions on Electron Devices10.1109/TED.2023.331735770:11(6012-6020)Online publication date: Nov-2023
https://doi.org/10.1109/TED.2023.3317357
Kim TJang YKang MPark BLee KPark J(2022)SOT-MRAM Digital PIM Architecture With Extended Parallelism in Matrix MultiplicationIEEE Transactions on Computers10.1109/TC.2022.315527771:11(2816-2828)Online publication date: 1-Nov-2022
https://doi.org/10.1109/TC.2022.3155277
Kwak MKim Y(2022)Do Not Forget: Exploiting Stability-Plasticity Dilemma to Expedite Unsupervised SNN Training for Neuromorphic Processors2022 IEEE 40th International Conference on Computer Design (ICCD)10.1109/ICCD56317.2022.00069(419-426)Online publication date: Oct-2022
https://doi.org/10.1109/ICCD56317.2022.00069
Show More Cited By

Index Terms

Spin Orbit Torque Device based Stochastic Multi-bit Synapses for On-chip STDP Learning
1. Hardware
  1. Emerging technologies
    1. Analysis and design of emerging devices and systems
      1. Emerging architectures
    2. Spintronics and magnetic technologies
  2. Very large scale integration design
    1. Application-specific VLSI designs
      1. Application specific integrated circuits

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Published In

cover image ACM Conferences

ISLPED '18: Proceedings of the International Symposium on Low Power Electronics and Design

July 2018

327 pages

ISBN:9781450357043

DOI:10.1145/3218603

Copyright © 2018 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 23 July 2018

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ISLPED '18: International Symposium on Low Power Electronics and Design

July 23 - 25, 2018

WA, Seattle, USA

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Cited By

Verma GNisar ADhull SKaushik B(2023)Neuromorphic Accelerator for Spiking Neural Network Using SOT-MRAM Crossbar ArrayIEEE Transactions on Electron Devices10.1109/TED.2023.331735770:11(6012-6020)Online publication date: Nov-2023
https://doi.org/10.1109/TED.2023.3317357
Kim TJang YKang MPark BLee KPark J(2022)SOT-MRAM Digital PIM Architecture With Extended Parallelism in Matrix MultiplicationIEEE Transactions on Computers10.1109/TC.2022.315527771:11(2816-2828)Online publication date: 1-Nov-2022
https://doi.org/10.1109/TC.2022.3155277
Kwak MKim Y(2022)Do Not Forget: Exploiting Stability-Plasticity Dilemma to Expedite Unsupervised SNN Training for Neuromorphic Processors2022 IEEE 40th International Conference on Computer Design (ICCD)10.1109/ICCD56317.2022.00069(419-426)Online publication date: Oct-2022
https://doi.org/10.1109/ICCD56317.2022.00069
Jang YKang GKim TSeo YLee KPark BPark J(2021)Stochastic SOT device based SNN architecture for On-chip Unsupervised STDP LearningIEEE Transactions on Computers10.1109/TC.2021.3119180(1-1)Online publication date: 2021
https://doi.org/10.1109/TC.2021.3119180
Verma GBindal NNisar ADhull SKaushik B(2021)Advances in Neuromorphic Spin-Based Spiking Neural Networks: A reviewIEEE Nanotechnology Magazine10.1109/MNANO.2021.309821915:5(33-44)Online publication date: Oct-2021
https://doi.org/10.1109/MNANO.2021.3098219
Shreya SGuglani SKaushik BRoy S(2020)Statistical Analysis of Temperature Variability on the Write Efficiency of Spin-Orbit Torque MRAM using Polynomial Chaos Metamodels2020 21st International Symposium on Quality Electronic Design (ISQED)10.1109/ISQED48828.2020.9137004(87-92)Online publication date: Mar-2020
https://doi.org/10.1109/ISQED48828.2020.9137004

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