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A Synthesizable Datapath-Oriented Embedded FPGA Fabric for Silicon Debug Applications

Authors:

Steven J.E. Wilton,

Bradley Quinton,

Philip H.W. Leong,

Wayne LukAuthors Info & Claims

ACM Transactions on Reconfigurable Technology and Systems (TRETS), Volume 1, Issue 1

Article No.: 7, Pages 1 - 25

https://doi.org/10.1145/1331897.1331903

Published: 17 March 2008 Publication History

Abstract

We present an architecture for a synthesizable datapath-oriented FPGA core that can be used to provide post-fabrication flexibility to an SoC. Our architecture is optimized for bus-based operations and employs a directional routing architecture, which allows it to be synthesized using standard ASIC design tools and flows. The primary motivation for this architecture is to provide an efficient mechanism to support on-chip debugging. The fabric can also be used to implement other datapath-oriented circuits such as those needed in signal processing and computation-intensive applications. We evaluate our architecture using a set of benchmark circuits and compare it to previous fabrics in terms of area, speed, and power.

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Cited By

KUGA MZHAO QNAKAZATO YAMAGASAKI MIIDA M(2023)An eFPGA Generation Suite with Customizable Architecture and IDEIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences10.1587/transfun.2022VLP0008E106.A:3(560-574)Online publication date: 1-Mar-2023
https://doi.org/10.1587/transfun.2022VLP0008
Renzini FMucci CRossi DScarselli ECanegallo R(2020)A Fully Programmable eFPGA-Augmented SoC for Smart Power ApplicationsIEEE Transactions on Circuits and Systems I: Regular Papers10.1109/TCSI.2019.293041267:2(489-501)Online publication date: Feb-2020
https://doi.org/10.1109/TCSI.2019.2930412
AMAGASAKI MZHAO QIIDA MKUGA MSUEYOSHI T(2015)Fault-Tolerant FPGA: Architectures and Design for Programmable Logic Intellectual Property Core in SoCIEICE Transactions on Information and Systems10.1587/transinf.2014RCP0009E98.D:2(252-261)Online publication date: 2015
https://doi.org/10.1587/transinf.2014RCP0009

Index Terms

A Synthesizable Datapath-Oriented Embedded FPGA Fabric for Silicon Debug Applications
1. Hardware
  1. Very large scale integration design
    1. Application-specific VLSI designs

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Information & Contributors

Information

Published In

cover image ACM Transactions on Reconfigurable Technology and Systems

ACM Transactions on Reconfigurable Technology and Systems Volume 1, Issue 1

Special edition on the 15th international symposium on FPGAs

March 2008

139 pages

ISSN:1936-7406

EISSN:1936-7414

DOI:10.1145/1331897

Issue’s Table of Contents

Copyright © 2008 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 17 March 2008

Accepted: 01 December 2007

Revised: 01 September 2007

Received: 01 May 2007

Published in TRETS Volume 1, Issue 1

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Refereed

Funding Sources

Natural Sciences and Engineering Research Council of Canada
Altera Corporation, the NSERC of Canada, and the Research Grants Council of Hong Kong
Engineering and Physical Sciences Research Council
Research Grants Council, University Grants Committee, Hong Kong

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Cited By

KUGA MZHAO QNAKAZATO YAMAGASAKI MIIDA M(2023)An eFPGA Generation Suite with Customizable Architecture and IDEIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences10.1587/transfun.2022VLP0008E106.A:3(560-574)Online publication date: 1-Mar-2023
https://doi.org/10.1587/transfun.2022VLP0008
Renzini FMucci CRossi DScarselli ECanegallo R(2020)A Fully Programmable eFPGA-Augmented SoC for Smart Power ApplicationsIEEE Transactions on Circuits and Systems I: Regular Papers10.1109/TCSI.2019.293041267:2(489-501)Online publication date: Feb-2020
https://doi.org/10.1109/TCSI.2019.2930412
AMAGASAKI MZHAO QIIDA MKUGA MSUEYOSHI T(2015)Fault-Tolerant FPGA: Architectures and Design for Programmable Logic Intellectual Property Core in SoCIEICE Transactions on Information and Systems10.1587/transinf.2014RCP0009E98.D:2(252-261)Online publication date: 2015
https://doi.org/10.1587/transinf.2014RCP0009

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