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Article

Coherence decoupling: making use of incoherence

Authors:

Gurindar S. SohiAuthors Info & Claims

ASPLOS XI: Proceedings of the 11th international conference on Architectural support for programming languages and operating systems

Pages 97 - 106

https://doi.org/10.1145/1024393.1024406

Published: 07 October 2004 Publication History

Abstract

This paper explores a new technique called coherence decoupling, which breaks a traditional cache coherence protocol into two protocols: a Speculative Cache Lookup (SCL) protocol and a safe, backing coherence protocol. The SCL protocol produces a speculative load value, typically from an invalid cache line, permitting the processor to compute with incoherent data. In parallel, the coherence protocol obtains the necessary coherence permissions and the correct value. Eventually, the speculative use of the incoherent data can be verified against the coherent data. Thus, coherence decoupling can greatly reduce --- if not eliminate --- the effects of false sharing. Furthermore, coherence decoupling can also reduce latencies incurred by true sharing. SCL protocols reduce those latencies by speculatively writing updates into invalid lines, thereby increasing the accuracy of speculation, without complicating the simple, underlying coherence protocol that guarantees correctness.The performance benefits of coherence decoupling are evaluated using a full-system simulator and a mix of commercial and scientific benchmarks. Our results show that 40% to 90% of all coherence misses can be speculated correctly, and therefore their latencies partially or fully hidden. This capability results in performance improvements ranging from 3% to over 16%, in most cases where the latencies of coherence misses have an effect on performance.

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Cited By

Nagarajan VSorin DHill MWood DNagarajan VSorin DHill MWood D(2022)Advanced Topics in CoherenceA Primer on Memory Consistency and Cache Coherence10.1007/978-3-031-01764-3_9(191-209)Online publication date: 28-Mar-2022
https://doi.org/10.1007/978-3-031-01764-3_9
Sorin DHill MWood DSorin DHill MWood D(2022)Advanced Topics in CoherenceA Primer on Memory Consistency and Cache Coherence10.1007/978-3-031-01733-9_9(177-195)Online publication date: 18-Oct-2022
https://doi.org/10.1007/978-3-031-01733-9_9
Kao HSan Miguel JEnright Jerger N(2021)Ghostwriter: A Cache Coherence Protocol for Error-Tolerant Applications50th International Conference on Parallel Processing Workshop10.1145/3458744.3474045(1-10)Online publication date: 9-Aug-2021
https://dl.acm.org/doi/10.1145/3458744.3474045
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Index Terms

Coherence decoupling: making use of incoherence

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Coherence decoupling: making use of incoherence
ASPLOS 2004

This paper explores a new technique called coherence decoupling, which breaks a traditional cache coherence protocol into two protocols: a Speculative Cache Lookup (SCL) protocol and a safe, backing coherence protocol. The SCL protocol produces a ...
Coherence decoupling: making use of incoherence
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This paper explores a new technique called coherence decoupling, which breaks a traditional cache coherence protocol into two protocols: a Speculative Cache Lookup (SCL) protocol and a safe, backing coherence protocol. The SCL protocol produces a ...
Coherence decoupling: making use of incoherence
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This paper explores a new technique called coherence decoupling, which breaks a traditional cache coherence protocol into two protocols: a Speculative Cache Lookup (SCL) protocol and a safe, backing coherence protocol. The SCL protocol produces a ...

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cover image ACM Conferences

ASPLOS XI: Proceedings of the 11th international conference on Architectural support for programming languages and operating systems

October 2004

296 pages

ISBN:1581138040

DOI:10.1145/1024393

General Chair:
Shubu Mukherjee
Intel Corporation
,
Program Chair:
Kathryn S. McKinley
University of Texas at Austin

ACM SIGARCH Computer Architecture News Volume 32, Issue 5
ASPLOS 2004
December 2004
283 pages
ISSN:0163-5964
DOI:10.1145/1037947
Issue’s Table of Contents
ACM SIGOPS Operating Systems Review Volume 38, Issue 5
ASPLOS '04
December 2004
283 pages
ISSN:0163-5980
DOI:10.1145/1037949
Issue’s Table of Contents
ACM SIGPLAN Notices Volume 39, Issue 11
ASPLOS '04
November 2004
283 pages
ISSN:0362-1340
EISSN:1558-1160
DOI:10.1145/1037187
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Copyright © 2004 ACM.

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Published: 07 October 2004

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Cited By

Nagarajan VSorin DHill MWood DNagarajan VSorin DHill MWood D(2022)Advanced Topics in CoherenceA Primer on Memory Consistency and Cache Coherence10.1007/978-3-031-01764-3_9(191-209)Online publication date: 28-Mar-2022
https://doi.org/10.1007/978-3-031-01764-3_9
Sorin DHill MWood DSorin DHill MWood D(2022)Advanced Topics in CoherenceA Primer on Memory Consistency and Cache Coherence10.1007/978-3-031-01733-9_9(177-195)Online publication date: 18-Oct-2022
https://doi.org/10.1007/978-3-031-01733-9_9
Kao HSan Miguel JEnright Jerger N(2021)Ghostwriter: A Cache Coherence Protocol for Error-Tolerant Applications50th International Conference on Parallel Processing Workshop10.1145/3458744.3474045(1-10)Online publication date: 9-Aug-2021
https://dl.acm.org/doi/10.1145/3458744.3474045
Nagarajan VSorin DHill MWood D(2020)A Primer on Memory Consistency and Cache Coherence, Second EditionSynthesis Lectures on Computer Architecture10.2200/S00962ED2V01Y201910CAC04915:1(1-294)Online publication date: 4-Feb-2020
https://doi.org/10.2200/S00962ED2V01Y201910CAC049
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Agarwal NNellans DEbrahimi EWenisch TDanskin JKeckler S(2016)Selective GPU caches to eliminate CPU-GPU HW cache coherence2016 IEEE International Symposium on High Performance Computer Architecture (HPCA)10.1109/HPCA.2016.7446089(494-506)Online publication date: Mar-2016
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Park SPrvulovic MHughes C(2016)PleaseTM: Enabling transaction conflict management in requester-wins hardware transactional memory2016 IEEE International Symposium on High Performance Computer Architecture (HPCA)10.1109/HPCA.2016.7446072(285-296)Online publication date: Mar-2016
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Huh JKim CShafi HZhang LBurger DKeckler S(2014)A NUCA substrate for flexible CMP cache sharingACM International Conference on Supercomputing 25th Anniversary Volume10.1145/2591635.2667186(380-389)Online publication date: 10-Jun-2014
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Chang JSohi G(2014)Author retrospective for cooperative cache partitioning for chip multiprocessorsACM International Conference on Supercomputing 25th Anniversary Volume10.1145/2591635.2591669(80-81)Online publication date: 10-Jun-2014
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