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Article

DECOUPLE: DEFECT CURRENT DETECTION IN DEEP SUBMICRON IDDQ

Author:

Yukio OkudaAuthors Info & Claims

ITC '00: Proceedings of the 2000 IEEE International Test Conference

Page 199

Published: 03 October 2000 Publication History

Abstract

IDDQ test concept for deep submicron (DSM) devices named DECOUPLE (Defect Current Observation Under the Proportion of intrinsic Leakage currents) is proposed.A new clustering method obtained two defect free groups from a production data set by abstracting from a signatureof intrinsic leakage current that is independent of processvariations. Possible pass/fail tests, diagnosis, and detection ofparametric defect currents are discussed on the data set. Anotherexample of the pass/fail tests on a second product ispresented.

References

[1]

C. F. Hawkins and J. M. Soden, "Deep submicron cmos current ic testing: Is there a future;' in Design & Test of Computers, pp. 14-15, Winter 1999.

Digital Library

[2]

P. C. Wiscombe, "A comparison of stuck-at fault coverage and i_DDQ testing on defect levels," in Int. Test Conf., pp. 293-299, 1993.

Digital Library

[3]

C. F. Hawkins, J. M. Soden, A. W. Righter, and F. J. Ferguson, "Defect class - an overdue paradigm for cmos ic testing," in Int. Test Conf., pp.413-425, 1994.

Digital Library

[4]

Y. Okuda, I. Kubota, and M. Watanabe, "Defect level prediction for iddq testing," in Int. Test Conf., pp. 900-909, 1998.

Digital Library

[5]

C. F. Hawkins and J. M. Soden, "Reliability and electrical property of gate oxide shorts in cmos ics," in Int. Test Canf., pp. 443-451, 1986.

[6]

C. F. Hawkins, A. Keshavarzi, and J. M. Soden, "Reliability, test, and iooQ measurements," in Workshop I_DDQ Testing, pp. 96-102, IEEE, 1997.

Digital Library

[7]

A. Keshavarzi, K. Roy, and C. F. Hawkins, "Intrinsic leakage in low power deep submicron cmos ics," in Int. Test Conf., pp. 146-155, 1997.

Digital Library

[8]

M. Sachdev, "Deep sub-micron iooQ test options," in Int. Test Conf., pp.942-942, 1996.

Digital Library

[9]

A. E. Gattiker and W. Maly, "Current signatures," in VTS, pp. 112-117, 1996.

Digital Library

[10]

A. E. Gattiker and W. Maly, "Toward understanding 'iddq-only' fails," in Int. Test Canf., pp. 174-183, 1998.

Digital Library

[11]

H. Mizuno, K. Ishibashi, T. Shimura, T. Hattori S. Narita, K. Shiozawa, S. Ikeda, and K. Uchiyama, "An 18-µa slandby current 1.8- v, 200-mhz microprocessor with self-substrate-based data-retention mode," J. Solid State Circuits, vol. SC-34, pp. 1492-1500, Nov. 1999.

[12]

A. C. Miller, "Delta i_DDQ testing," in USP-5889408, Mar. 1999.

[13]

A. C. Miller, "i_DDQ testing in deep-submicron integrated circuits;' in Int. Test Conf., pp. 724-729, 1999.

Digital Library

[14]

C. Thibeault, "On the comparison of ¿i_DDQ and i_DDQ testing," in VTS, pp. 143-150, 1999.

Digital Library

[15]

B. Chess, "Method of improving the quality and effeciency of iddq testing," in USP-5914615, June 1999.

[16]

P. Maxwell, P. O'Neill, R. Aitken, R. Dudley, N. Jaarsma, M. Quach, and D. Wiseman, "Current ratios: A self-scaling technique for production iddq testing," in Int. Test Conf., pp. 738-746, 1999.

Digital Library

[17]

A. Ferre and J. Figueras, "On estimating bounds of the quiescent current for iooQ testing," in VTS, pp. 106-111, 1996.

Digital Library

[18]

P. C. Maxwell and J. R. Rearick, "Estimation of defect-free iddq in submicron circuits using switch level simulation.' in Int. Test Conf., pp. 882-889, 1998.

Digital Library

[19]

M. C. Johnson, D. Somasekhar, and K. Roy, "Models and algorithms for bounds on leakage in cmos circuits," IEEE Tran. CAD IC Sys., vol. 18, pp. 714-725, June 1999.

Digital Library

[20]

S. Jandhyala, H. Balachandran, and A. P. Jayasumana, "Clustering based techniques for iooQ testing," in Int. Test Conf., pp. 730-737, 1999.

Digital Library

[21]

P. Nigh, D. Forlenza, and F. Motika, "Application & analysis of i_DDQ diagnostic software;' in Int. Test Conf., pp. 319-327, 1997.

Digital Library

[22]

A. W. Righter, J. M. Soden, and R. W. Beege, "High resolution i_DDQ characterization and testing - practical issues," in Int. Test Conf., pp.259-268, 1996.

Digital Library

[23]

J. W. Slotboom, M. J. J. Theunissen, and A. J. R de Kock, "Impact of silicon substrates on leakage currents," EDL, vol. EDL-4, pp. 403-406, Nov. 1983.

Cited By

Rao LBushnell MAgrawal V(2007)Graphical IDDQ signatures reduce defect level and yield lossIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2007.90412815:11(1245-1255)Online publication date: 1-Nov-2007
https://dl.acm.org/doi/10.1109/TVLSI.2007.904128
Thibeault C(2004)On New Current Signatures and Adaptive Test Technique CombinationProceedings of the 22nd IEEE VLSI Test Symposium10.5555/987684.987933Online publication date: 25-Apr-2004
https://dl.acm.org/doi/10.5555/987684.987933
Thibeault C(2003)On Faster IDDQ MeasurementsJournal of Electronic Testing: Theory and Applications10.1023/A:102741870494219:6(625-635)Online publication date: 1-Dec-2003
https://dl.acm.org/doi/10.1023/A%3A1027418704942
Show More Cited By

DECOUPLE: DEFECT CURRENT DETECTION IN DEEP SUBMICRON IDDQ
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cover image Guide Proceedings

ITC '00: Proceedings of the 2000 IEEE International Test Conference

October 2000

ISBN:0780365461

Copyright © Copyright (c) 2000 Institute of Electrical and Electronics Engineers, Inc. All rights reserved.

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IEEE Computer Society

United States

Publication History

Published: 03 October 2000

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Cited By

Rao LBushnell MAgrawal V(2007)Graphical IDDQ signatures reduce defect level and yield lossIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2007.90412815:11(1245-1255)Online publication date: 1-Nov-2007
https://dl.acm.org/doi/10.1109/TVLSI.2007.904128
Thibeault C(2004)On New Current Signatures and Adaptive Test Technique CombinationProceedings of the 22nd IEEE VLSI Test Symposium10.5555/987684.987933Online publication date: 25-Apr-2004
https://dl.acm.org/doi/10.5555/987684.987933
Thibeault C(2003)On Faster IDDQ MeasurementsJournal of Electronic Testing: Theory and Applications10.1023/A:102741870494219:6(625-635)Online publication date: 1-Dec-2003
https://dl.acm.org/doi/10.1023/A%3A1027418704942
Thibeault C(2003)Replacing IDDQ TestingJournal of Electronic Testing: Theory and Applications10.1023/A:102376141615619:3(325-340)Online publication date: 1-Jun-2003
https://dl.acm.org/doi/10.1023/A%3A1023761416156

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