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10.5555/648020.745770guideproceedingsArticle/Chapter ViewAbstractPublication PagesConference Proceedingsacm-pubtype
Article

DFT guidance through RTL test justification and propagation analysis

Published: 18 October 1998 Publication History

Abstract

We introduce a formal mechanism for capturing testjustification and propagation related behavior of blocks.Based on the identified test translation behavior, an RTLtestability analysis methodology for hierarchical designs isderived. An algorithm for pinpointing the local-to-globaltest translation controllability and observabilitybottlenecks is presented. The analysis results are validatedthrough an ATPG-based experimental flow and theapplicability of the scheme for addressing test challengesin large designs by guiding DFT decisions is discussed.

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Cited By

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  • (2019)Fast Hierarchical Test Path Construction for Circuits with DFT-Free Controller-Datapath InterfaceJournal of Electronic Testing: Theory and Applications10.1023/A:101372390589618:1(29-42)Online publication date: 1-Jun-2019

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Published In

cover image Guide Proceedings
ITC '98: Proceedings of the 1998 IEEE International Test Conference
October 1998
753 pages
ISBN:0780350936

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IEEE Computer Society

United States

Publication History

Published: 18 October 1998

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  • (2019)Fast Hierarchical Test Path Construction for Circuits with DFT-Free Controller-Datapath InterfaceJournal of Electronic Testing: Theory and Applications10.1023/A:101372390589618:1(29-42)Online publication date: 1-Jun-2019

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