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View all- Akgun O(2018)An Asynchronous Pipelined Time-to-Digital Converter Using Time-Domain Subtraction2018 IEEE International Symposium on Circuits and Systems (ISCAS)10.1109/ISCAS.2018.8351554(1-5)Online publication date: May-2018
- Kao C(2012)Interface circuit synthesis of system-on-chipInternational Journal of Electronics10.1080/00207217.2011.65169299:7(957-970)Online publication date: Jul-2012
- Venkataramani GGoldstein SGebotys CMartin G(2008)Slack analysis in the system design loopProceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis10.1145/1450135.1450189(231-236)Online publication date: 19-Oct-2008
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