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Automatic gate-level synthesis of speed-independent circuits

Authors:

Peter A. Beerel,

Teresa H.-Y. MengAuthors Info & Claims

ICCAD '92: Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design

Pages 581 - 586

Published: 08 November 1992 Publication History

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References

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Peter A. Beerel and Teresa H.-Y. Meng. "Semi-Modularity and Testability of Speed-Independent Circuits". Accepted for publication in INTEGRATION, The VI~I Journal.

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V.I. Varshavky, editor. Self-Timed Control of Concurrent Processes. Kluwer Academic Publishers, Dordrecht, The Netherlands, 1990.

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Peter A. Beerel and Teresa H.-Y. Meng. "Gate-Level Sythesis of Speed-Independent Asynchronous Control Circuits'', 1992. In collection of papers of the ACM International Workshop on Timing issues in the Specification of and Synthesis of Digital Systems.

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Chris Myers and Teresa H.-Y. Meng. "Synthesis of Timed Asynchronous Circuits". To appear in International Conference on Computer Design, ICCD-1992.

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Cited By

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Jacobson HMyers CGopalakrishnan GSentovich E(2000)Achieving fast and exact hazard-free logic minimization of extended burst-mode gC finite state machinesProceedings of the 2000 IEEE/ACM international conference on Computer-aided design10.5555/602902.602970(303-311)Online publication date: 5-Nov-2000
https://dl.acm.org/doi/10.5555/602902.602970
Cortadella JKishinevsky MKondratyev ALavagno LYakovlev A(2000)Hardware and Petri netsProceedings of the 21st international conference on Application and theory of petri nets10.5555/1754589.1754591(1-15)Online publication date: 26-Jun-2000
https://dl.acm.org/doi/10.5555/1754589.1754591
Jung SMyers CWhite JSentovich E(1999)Direct synthesis of timed asynchronous circuitsProceedings of the 1999 IEEE/ACM international conference on Computer-aided design10.5555/339492.340035(332-338)Online publication date: 7-Nov-1999
https://dl.acm.org/doi/10.5555/339492.340035
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Index Terms

Automatic gate-level synthesis of speed-independent circuits
1. Applied computing
  1. Arts and humanities
    1. Architecture (buildings)
      1. Computer-aided design
  2. Physical sciences and engineering
    1. Engineering
      1. Computer-aided design
2. Hardware
  1. Integrated circuits
    1. Logic circuits

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Information

Published In

ICCAD '92: Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design

November 1992

637 pages

ISBN:0897915402

Chairmen:
Louise Trevillyan
IBM Corp., Yorktown Heights, NY
,
Michael Lightner
Univ. of Colorado, Boulder

Publisher

IEEE Computer Society Press

Washington, DC, United States

Publication History

Published: 08 November 1992

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Overall Acceptance Rate 457 of 1,762 submissions, 26%

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Cited By

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Jacobson HMyers CGopalakrishnan GSentovich E(2000)Achieving fast and exact hazard-free logic minimization of extended burst-mode gC finite state machinesProceedings of the 2000 IEEE/ACM international conference on Computer-aided design10.5555/602902.602970(303-311)Online publication date: 5-Nov-2000
https://dl.acm.org/doi/10.5555/602902.602970
Cortadella JKishinevsky MKondratyev ALavagno LYakovlev A(2000)Hardware and Petri netsProceedings of the 21st international conference on Application and theory of petri nets10.5555/1754589.1754591(1-15)Online publication date: 26-Jun-2000
https://dl.acm.org/doi/10.5555/1754589.1754591
Jung SMyers CWhite JSentovich E(1999)Direct synthesis of timed asynchronous circuitsProceedings of the 1999 IEEE/ACM international conference on Computer-aided design10.5555/339492.340035(332-338)Online publication date: 7-Nov-1999
https://dl.acm.org/doi/10.5555/339492.340035
Carloni LMcMillan KSaldanha ASangiovanni-Vincentelli AWhite JSentovich E(1999)A methodology for correct-by-construction latency insensitive designProceedings of the 1999 IEEE/ACM international conference on Computer-aided design10.5555/339492.340032(309-315)Online publication date: 7-Nov-1999
https://dl.acm.org/doi/10.5555/339492.340032
Brunvand ENowick SYun K(1999)Practical advances in asynchronous design and in asynchronous/synchronous interfacesProceedings of the 36th annual ACM/IEEE Design Automation Conference10.1145/309847.309889(104-109)Online publication date: 1-Jun-1999
https://dl.acm.org/doi/10.1145/309847.309889
Senn EZavidovique B(1999)Hazard-Free Self-Timed DesignJournal of VLSI Signal Processing Systems10.1023/A:100812932258322:3(197-215)Online publication date: 20-Sep-1999
https://dl.acm.org/doi/10.1023/A%3A1008129322583
Kishinevsky MCortadella JKondratyev AChawla BBryant RRabaey J(1998)Asynchronous interface specification, analysis and synthesisProceedings of the 35th annual Design Automation Conference10.1145/277044.277046(2-7)Online publication date: 1-May-1998
https://dl.acm.org/doi/10.1145/277044.277046
Cortadella JKishinevsky MKondratyev ALavagno LYakovlev A(1997)Technology Mapping of Speed-Independent Circuits Based on Combinational Decomposition and ResynthesisProceedings of the 1997 European conference on Design and Test10.5555/787260.787643Online publication date: 17-Mar-1997
https://dl.acm.org/doi/10.5555/787260.787643
Cortadella JKishinevsky MKondratyev ALavagno LPastor EYakovlev AOtten RYasuura H(1997)Decomposition and technology mapping of speed-independent circuits using Boolean relationsProceedings of the 1997 IEEE/ACM international conference on Computer-aided design10.5555/266388.266476(220-227)Online publication date: 13-Nov-1997
https://dl.acm.org/doi/10.5555/266388.266476
Lin KKuo CLin C(1997)Synthesis of Hazard-Free Asynchronous Circuits Based on Characteristic GraphIEEE Transactions on Computers10.1109/12.64429946:11(1246-1263)Online publication date: 1-Nov-1997
https://dl.acm.org/doi/10.1109/12.644299
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