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45th ESSDERC 2015: Graz, Austria
- 45th European Solid State Device Research Conference, ESSDERC 2015, Graz, Austria, September 14-18, 2015. IEEE 2015, ISBN 978-1-4673-7133-9
- Jonas Hansryd
:
5G wireless communication beyond 2020. 1-3 - Giorgio Baccarani, Emanuele Baravelli, Elena Gnani, Antonio Gnudi
Theoretical analyses and modeling for nanoelectronics. 4-9 - Barbara Stadlober
Nature as microelectronic fab: Bioelectronics: Materials, transistors and circuits. 10-17 - Sandro Carrara:
New frontiers in digital health: Remote monitoring of animal and human metabolism on our smartphones and tablets. 18 - Shinichi Takagi, Mitsuru Takenaka:
Ge/III-V MOS device technologies for low power integrated systems. 20-25 - Toby Hallam, Hye-Young Kim, Maria O'Brien, Riley Gatensby
Investigations of vapor phase deposited transition metal dichalcogenide films for future electronic applications. 26-30 - Thomas Ernst
High performance NEMS devices for sensing applications. 31-35 - Mark S. Lundstrom:
Computational electronics for the 21st century: Reflections on the past, present, and future. 36-39 - Arnab Biswas, Luca De Michielis, Antonios Bazigos
Compact modeling of DG-Tunnel FET for Verilog-A implementation. 40-43 - Juli Blasco, Jordi Suñé
Modeling of the conduction characteristics of voltage-driven bipolar RRAMs including turning point effects. 44-47 - Jian Zhang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
A surface potential and current model for polarity-controllable silicon nanowire FETs. 48-51 - Tapas Kumar Maiti
Mixed-domain compact modeling framework for fluid flow driven by electrostatic organic actuators. 52-55 - S. A. Jauss, S. Schwaiger, W. Daves, S. Noll, O. Ambacher:
Charge trapping in gate-drain access region of AlGaN/GaN MIS-HEMTs after drain stress. 56-59 - Mattia Capriotti, Clément Fleury
E-mode AlGaN/GaN True-MOS, with high-k ZrO2 gate insulator. 60-63 - Peter Moens, Abhishek Banerjee, P. Coppens, Aurore Constant, Piet Vanmeerbeek, Z. Li, F. Declercq, L. De Schepper, H. De Vleeschouwer, C. Liu, B. Padmanabhan, W. Jeon, J. Guo, A. Salih, Marnix Tack:
Technology and design of GaN power devices. 64-67 - Victor Soler
Experimental analysis of planar edge terminations for high voltage 4H-SiC devices. 68-71 - Roberta Stradiotto, Gregor Pobegen, Clemens Ostermaier, Tibor Grasser:
On the fly characterization of charge trapping phenomena at GaN/dielectric and GaN/AlGaN/dielectric interfaces using impedance measurements. 72-75 - Thomas Skotnicki
UTBB FDSOI: Evolution and opportunities. 76-79 - Yves Laplanche:
Implementation of ARM® Cores in FinFET technolgies. 80-83 - Jean-Pierre Raskin:
FinFET versus UTBB SOI - A RF perspective. 84-88 - Gergo P. Szakmany, Alexei O. Orlov
Antenna-coupled single-metal thermocouple array for energy harvesting. 89-92 - Abhishek A. Sharma, Marek Skowronski, James A. Bain, Jeffrey A. Weldon:
Novel CMOS-compatible a-Si based oscillator and threshold switch. 93-96 - Grazvydas Ziemys, Andrew Giebfried, Markus Becherer
Modelling and simulation of nanomagnetic logic with cadence virtuoso using Verilog-A. 97-100 - György Csaba
Non-boolean computing based on linear waves and oscillators. 101-104 - Mitsuo Fukuda, Hiroki Sakai, T. Mano, Yu Kimura, Masashi Ota, Masashi Fukuhara
Plasmonic and electronic device integrated circuits and their characteristics. 105-108 - An Chen:
Emerging nonvolatile memory (NVM) technologies. 109-113 - Attilio Belmonte, Andrea Fantini, Augusto Redolfi, M. Houssa, Malgorzata Jurczak, Ludovic Goux:
Optimization of the write algorithm at low-current (10μA) in Cu/Al2O3-based conductive-bridge RAM. 114-117 - Johannes Ocker, Stefan Slesazeck, Thomas Mikolajick
On the voltage scaling potential of SONOS non-volatile memory transistors. 118-121 - Young Ho Lee, Min Yong Lee, Seung Beom Baek, Jong Chul Lee, Su Jin Chae, Hae Chan Park, Byoung Ki Lee, Hyeong Soo Kim:
High performance low A/R poly PN diode for 20nm node PCRAM cell switch. 122-125 - Turar Baltynov, Vineet Unni, E. M. Sankara Narayanan:
The world's first high voltage GaN-on-diamond power devices. 126-129 - Dong-Hyeok Son, Young-woo Jo, Ryun-Hwi Kim, Chan Heo, Jae Hwa Seo, Jin Su Kim, In Man Kang, Sorin Cristoloveanu, Jung-Hee Lee:
Fabrication of high performance AlGaN/GaN FinFET by utilizing anisotropic wet etching in TMAH solution. 130-133 - Antoine Litty, Sylvie Ortolland, Dominique Golanski, Christian Dutto, Sorin Cristoloveanu:
EDMOS in ultrathin FDSOI: Effect of doping and layout of the drift region. 134-137 - Abbas Khanmohammadi, Reinhard Enne, Michael Hofbauer
Monolithically integrated optical random pulse generator in high voltage CMOS technology. 138-141 - Christoph Steffan
Energy harvesting with on-chip solar cells and integrated DC/DC converter. 142-145 - Marc Sansa
Compact heterodyne NEMS oscillator for sensing applications. 146-148 - Issam Ouerghi, Willy Ludurczak, Laurent Duraffourg
Piezoresistive transduction optimization of p-doped poly-Silicon NEMS. 149-152 - A. Ziaei, S. Bansropun, P. Martins, M. Le Baillif:
Fast high power capacitive RF-MEMS switch for X-Band applications. 153-155 - Alice Pelamatti, Vincent Goiffon
Charge transfer speed analysis in pinned photodiode CMOS image sensors based on a pulsed storage-gate method. 156-159 - Bruce B. Doris, Terence Hook:
Scalability of planar FDSOI and FinFETs and What's in store for the future beyond that? 160-163 - Edith Beigné
UTBB FDSOI technology flexibility for ultra low power internet-of-things applications. 164-167 - Li Tao, Weinan Zhu, Joon-Seok Kim
(Invited) silicene and phosphorene: Progress on the intriguing case of buckled atomic sheets. 168-171 - Yury Illarionov
Interplay between hot carrier and bias stress components in single-layer double-gated graphene field-effect transistors. 172-175 - C. Mukherjee
Characterization and modeling of low-frequency noise in CVD-grown graphene FETs. 176-179 - Jorgue Daniel Aguirre Morales, Sébastien Fregonese, C. Mukherjee
A new physics-based compact model for Bilayer Graphene Field-Effect Transistors. 180-183 - Amit Gahoi, Vikram Passi
Systematic comparison of metal contacts on CVD graphene. 184-187 - Matthias Streiff:
Sensors and the Internet of Things. 188 - Werner Brockherde, Benjamin Bechen, Ernst Bodenstorfer, Jörg Brodersen, Konrad J. Mayer, Christian Nitta, Olaf Schrey:
A multi-functional 200, 000 lines/s tri-linear RGB line-scan sensor. 189 - Drago Strle, Janez Trontelj:
Unified system level model of adsorption/desorption process and sensing electronics for vapor trace detection of different molecules in the air. 190-193 - Lukas Zoscher, Jasmin Grosinger
Concept for a security aware automatic fare collection system using HF/UHF dual band RFID transponders. 194-197 - Sam Vaziri, Melkamu Belete
Step tunneling-enhanced hot-electron injection in vertical graphene base transistors. 198-201 - Guilhem Larrieu
Vertical field effect transistor with sub-15nm gate-all-around on Si nanowire array. 202-205 - A. Shaw, T. J. Whittles, Ivona Z. Mitrovic
Physical and electrical characterization of Mg-doped ZnO thin-film transistors. 206-209 - J. Pelloux-Prayer
Strain effect on mobility in nanowire MOSFETs down to 10nm width: Geometrical effects and piezoresistive model. 210-213 - Shraddha Kothari, Chandan Joishi, Dhirendra Vaidya, Hasan Nejad, Benjamin Colombeau, Swaroop Ganguly, Saurabh Lodha:
Metal gate VT modulation using PLAD N2 implants for Ge p-FinFET applications. 214-217 - Ben Kaczer, Jacopo Franco, Pieter Weckx, Philippe Roussel, Erik Bury, Moonju Cho, Robin Degraeve, Dimitri Linten, Guido Groeseneken
The defect-centric perspective of device and circuit reliability - From individual defects to circuits. 218-225 - Louis Gerrer, Razaidi Hussin
Experimental evidences and simulations of trap generation along a percolation path. 226-229 - V. Velayudhan, Javier Martín-Martínez, Marc Porti
Threshold voltage and on-current Variability related to interface traps spatial distribution. 230-233 - Andreas Mai
Reliability aspects of TiSi-Schottky barrier diodes in a SiGe BiCMOS technology. 234-237 - Razaidi Hussin
Statistical simulations of 6T-SRAM cell ageing using a reliability aware simulation flow. 238-241 - Gaspard Hiblot
Optimization of Trigate-On-Insulator MOSFET aspect ratio with MASTAR. 242-245 - Carlos Suarez-Segovia, Charles Leroux, Florian Domengie, Karen Dabertrand, Vincent Joseph, Giovanni Romano, Pierre Caubet, Stephane Zoll, Olivier Weber, Gérard Ghibaudo
Effective work function engineering by sacrificial lanthanum diffusion on HfON-based 14 nm NFET devices. 246-249 - Hassan El Dirani, Yohann Solaro, Pascal Fonteneau, Philippe Ferrari, Sorin Cristoloveanu:
Sharp-switching Z2-FET device in 14 nm FDSOI technology. 250-253 - Ning Li, Takeshi Inoue, Takuichi Hirano, Jian Pang, Rui Wu, Kenichi Okada
Substrate noise isolation improvement by helium-3 ion irradiation technique in a triple-well CMOS process. 254-257 - Chika Tanaka, Keiji Ikeda
New layout design methodology for monolithically integrated 3D CMOS logic circuits based on parasitics engineering. 258-261 - C. Y. Chen, Ludovic Goux, Andrea Fantini, Robin Degraeve, Augusto Redolfi, Guido Groeseneken
Engineering of a TiN\Al2O3\(Hf, Al)O2\Ta2O5\Hf RRAM cell for fast operation at low current. 262-265 - M. Azzaz, A. Benoist, Elisa Vianello, Daniele Garbin, Eric Jalaguier, Carlo Cagli, C. Charpin, Stefania Bernasconi, Simon Jeannot, T. Dewolf, G. Audoit, C. Guedj, S. Denorme, Philippe Candelier, Claire Fenouillet-Béranger, Luca Perniola:
Benefit of Al2O3/HfO2 bilayer for BEOL RRAM integration through 16kb memory cut characterization. 266-269 - Francesco Maria Puglisi
Characterization of anomalous Random Telegraph Noise in Resistive Random Access Memory. 270-273 - Panagiotis Bousoulas
Improving the resistive switching uniformity of forming-free TiO2-x based devices by embedded Pt nanocrystals. 274-277 - Mukta Singh Parihar
Back-gate effects and detailed characterization of junctionless transistor. 282-285 - Luca Pirro, Irina Ionica, Sorin Cristoloveanu, Gérard Ghibaudo
Low-frequency noise in bare SOI wafers: Experiments and model. 286-289 - Andrei Schmidt, Stefan Dreiner, Holger Vogt
Thin-film SOI PIN-diode leakage current dependence on back-gate-potential and HCI traps. 290-293 - Gabriella Ghidini, Daniele Merlini, Massimiliano Cannavo, Maria Luisa Polignano
H2 annealing for metallic contaminant reduction in BCD-SOI process: Benefits and drawbacks. 294-297 - Anibal Pacheco-Sanchez
Contact resistance extraction methods for CNTFETs. 298-301 - Hamilton Carrillo-Nunez, Mathieu Luisier, Andreas Schenk:
Analysis of InAs-Si heterojunction double-gate tunnel FETs with vertical tunneling paths. 302-305 - O. Badami, Enrico Caruso
Improved surface roughness modeling and mobility projections in thin film MOSFETs. 306-309 - Zlatan Stanojevic, Markus Karner, Martin Aichhorn, Ferdinand Mitterbauer, Volker Eyert, Christian Kernstock, Hans Kosina:
Predictive physical simulation of III/V quantum-well MISFETs for logic applications. 310-313 - Manouchehr Hosseini, Mohammad Elahi, Ebrahim Asl Soleimani, Mahdi Pourfath
Strain engineering of single-layer MoS2. 314-317 - Luca Lucci, Jean-Charles Barb, Marco Pala
Electric performance of AlGaN/GaN heterojunction devices: A full-quantum study. 318-321
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