default search action
Elisa Vianello
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
showing all ?? records
2020 – today
- 2024
- [j13]Hamidreza Erfanijazi
, Luis A. Camuñas-Mesa
A Fully Digital Relaxation-Aware Analog Programming Technique for HfOx RRAM Arrays. IEEE Trans. Circuits Syst. II Express Briefs 71(8): 3685-3689 (2024) - [i26]Clement Türck, Kamel-Eddine Harabi, Adrien Pontlevy, Théo Ballet, Tifenn Hirtzlin, Elisa Vianello, Raphaël Laurent, Jacques Droulez, Pierre Bessière, Marc Bocquet, Jean-Michel Portal, Damien Querlioz:
The Logarithmic Memristor-Based Bayesian Machine. CoRR abs/2406.03492 (2024) - [i25]Adnan Mehonic, Daniele Ielmini, Kaushik Roy, Onur Mutlu, Shahar Kvatinsky, Teresa Serrano-Gotarredona, Bernabé Linares-Barranco, Sabina Spiga
Roadmap to Neuromorphic Computing with Emerging Technologies. CoRR abs/2407.02353 (2024) - 2023
- [c52]Simone D'Agostino, Filippo Moro
Synaptic metaplasticity with multi-level memristive devices. AICAS 2023: 1-5 - [c51]Kamel-Eddine Harabi, Clement Türck, Marie Drouhin, Adrien Renaudineau, Thomas Bersani-Veroni, Damien Querlioz, Tifenn Hirtzlin, Elisa Vianello, Marc Bocquet, Jean-Michel Portal:
A Multimode Hybrid Memristor-CMOS Prototyping Platform Supporting Digital and Analog Projects. ASP-DAC 2023: 184-185 - [c50]Xabier Iturbe, Nassim Abderrahmane, Jaume Abella
NimbleAI: Towards Neuromorphic Sensing-Processing 3D-integrated Chips. DATE 2023: 1-6 - [c49]Clement Türck, Kamel-Eddine Harabi, Tifenn Hirtzlin, Elisa Vianello, Raphaël Laurent, Jacques Droulez, Pierre Bessière, Marc Bocquet, Jean-Michel Portal, Damien Querlioz:
Energy-Efficient Bayesian Inference Using Near-Memory Computation with Memristors. DATE 2023: 1-2 - [c48]Melika Payvand
Dendritic Computation through Exploiting Resistive Memory as both Delays and Weights. ICONS 2023: 27:1-27:4 - [c47]Ivan Diez-de-los-Rios
A multi-core memristor chip for Stochastic Binary STDP. ISCAS 2023: 1-5 - [c46]Joel Minguet Lopez, Manon Dampfhoffer
1S1R Sub-Threshold Operation in Crossbar Arrays for Neural Networks Hardware Implementation. MIXDES 2023: 1-6 - [i24]Hamid Reza Erfani Jazi, Luis A. Camuñas-Mesa, Elisa Vianello, Teresa Serrano-Gotarredona, Bernabé Linares-Barranco:
A Fully Digital Relaxation-Aware Analog Programming Technique for HfOx RRAM Arrays. CoRR abs/2301.08516 (2023) - [i23]Kamel-Eddine Harabi, Clement Türck, Marie Drouhin, Adrien Renaudineau, Thomas Bersani-Veroni, Damien Querlioz, Tifenn Hirtzlin, Elisa Vianello, Marc Bocquet, Jean-Michel Portal:
A Multimode Hybrid Memristor-CMOS Prototyping Platform Supporting Digital and Analog Projects. CoRR abs/2302.14577 (2023) - [i22]Melika Payvand, Simone D'Agostino, Filippo Moro, Yigit Demirag, Giacomo Indiveri, Elisa Vianello:
Dendritic Computation through Exploiting Resistive Memory as both Delays and Weights. CoRR abs/2305.06941 (2023) - [i21]Fadi Jebali, Atreya Majumdar, Clement Türck, Kamel-Eddine Harabi, Mathieu-Coumba Faye, Eloi Muhr, Jean-Pierre Walder, Oleksandr Bilousov, Amadeo Michaud, Elisa Vianello, Tifenn Hirtzlin, François Andrieu, Marc Bocquet, Stéphane Collin, Damien Querlioz, Jean-Michel Portal:
Powering AI at the Edge: A Robust, Memristor-based Binarized Neural Network with Near-Memory Computing and Miniaturized Solar Cell. CoRR abs/2305.12875 (2023) - [i20]Simone D'Agostino, Filippo Moro, Tifenn Hirtzlin, Julien Arcamone, Niccolo Castellani, Damien Querlioz, Melika Payvand, Elisa Vianello:
Synaptic metaplasticity with multi-level memristive devices. CoRR abs/2306.12142 (2023) - [i19]Simone D'Agostino, Filippo Moro, Tristan Torchet, Yigit Demirag, Laurent Grenouillet, Giacomo Indiveri, Elisa Vianello, Melika Payvand:
DenRAM: Neuromorphic Dendritic Architecture with RRAM for Efficient Temporal Processing with Delays. CoRR abs/2312.08960 (2023) - [i18]Djohan Bonnet
Bayesian Metaplasticity from Synaptic Uncertainty. CoRR abs/2312.10153 (2023) - 2022
- [j12]Eduardo Esmanhotto
Experimental Demonstration of Multilevel Resistive Random Access Memory Programming for up to Two Months Stable Neural Networks Inference Accuracy. Adv. Intell. Syst. 4(11) (2022) - [j11]Eduardo Esmanhotto
Experimental Demonstration of Multilevel Resistive Random Access Memory Programming for up to Two Months Stable Neural Networks Inference Accuracy. Adv. Intell. Syst. 4(11) (2022) - [j10]Luis A. Camuñas-Mesa
A CMOL-Like Memristor-CMOS Neuromorphic Chip-Core Demonstrating Stochastic Binary STDP. IEEE J. Emerg. Sel. Topics Circuits Syst. 12(4): 898-912 (2022) - [j9]Dennis V. Christensen
2022 roadmap on neuromorphic computing and engineering. Neuromorph. Comput. Eng. 2(2): 22501 (2022) - [c45]Ahmed Trabelsi, Carlo Cagli, Tifenn Hirtzlin, Olga Cueto, Marie Claire Cyrille, Elisa Vianello, Valentina Meli, Veronique Sousa, Guillaume Bourgeois, François Andrieu:
Frequency modulation of conductance level in PCM device for neuromorphic applications. ESSCIRC 2022: 129-132 - [c44]Joel Minguet Lopez, François Rummens, Lucas Reganaz, A. Heraud, Tifenn Hirtzlin, Laurent Grenouillet, Gabriele Navarro
1S1R sub-threshold operation in Crossbar arrays for low power BNN inference computing. IMW 2022: 1-4 - [c43]Eduardo Esmanhotto, Tifenn Hirtzlin, Niccolo Castellani, S. Martin, Bastien Giraud, François Andrieu, Jean-François Nodin, Damien Querlioz, Jean-Michel Portal, Elisa Vianello:
Experimental demonstration of Single-Level and Multi-Level-Cell RRAM-based In-Memory Computing with up to 16 parallel operations. IRPS 2022: 8-1 - [c42]Filippo Moro, Eduardo Esmanhotto, Tifenn Hirtzlin, Niccolo Castellani, Ahmed Trabelsi, Thomas Dalgaty, Gabriel Molas, François Andrieu, Stefano Brivio, Sabina Spiga
Hardware calibrated learning to compensate heterogeneity in analog RRAM-based Spiking Neural Networks. ISCAS 2022: 380-383 - [i17]Filippo Moro, Eduardo Esmanhotto, Tifenn Hirtzlin, Niccolo Castellani, Ahmed Trabelsi, Thomas Dalgaty, Gabriel Molas, François Andrieu, Stefano Brivio, Sabina Spiga, Giacomo Indiveri, Melika Payvand, Elisa Vianello:
Hardware calibrated learning to compensate heterogeneity in analog RRAM-based Spiking Neural Networks. CoRR abs/2202.05094 (2022) - [i16]Eduardo Esmanhotto, Tifenn Hirtzlin, Niccolo Castellani, S. Martin, Bastien Giraud, François Andrieu, Jean-Francois Nodin, Damien Querlioz, Jean-Michel Portal, Elisa Vianello:
Experimental demonstration of Single-Level and Multi-Level-Cell RRAM-based In-Memory Computing with up to 16 parallel operations. CoRR abs/2203.01680 (2022) - [i15]Luis A. Camuñas-Mesa, Elisa Vianello, Carlo Reita, Teresa Serrano-Gotarredona, Bernabé Linares-Barranco:
A CMOL-Like Memristor-CMOS Neuromorphic Chip-Core Demonstrating Stochastic Binary STDP. CoRR abs/2209.06068 (2022) - 2021
- [j8]Charanraj Mohan
Neuromorphic Low-Power Inference on Memristive Crossbars With On-Chip Offset Calibration. IEEE Access 9: 38043-38061 (2021) - [j7]Thomas Dalgaty
Ex Situ Transfer of Bayesian Neural Networks to Resistive Memory-Based Inference Hardware. Adv. Intell. Syst. 3(8): 2000103 (2021) - [j6]Axel Laborieux
Implementation of Ternary Weights With Resistive RAM Using a Single Sense Operation Per Synapse. IEEE Trans. Circuits Syst. I Regul. Pap. 68(1): 138-147 (2021) - [c41]Jean-René Léquepeys, Marc Duranton, Susana Bonnetier, Sandrine Catrou, Richard Fournel, Thomas Ernst
Overcoming the Data Deluge Challenges with Greener Electronics. ESSCIRC 2021: 7-14 - [c40]Jean-René Léquepeys, Marc Duranton, Susana Bonnetier, Sandrine Catrou, Richard Fournel, Thomas Ernst
Overcoming the Data Deluge Challenges with Greener Electronics. ESSDERC 2021: 7-14 - [c39]Thomas Dalgaty, Elisa Vianello, Damien Querlioz:
Harnessing intrinsic memristor randomness with Bayesian neural networks. ICICDT 2021: 1-4 - [c38]Laurent Grenouillet, Niccolo Castellani, Alain Persico, Valentina Meli, Simon Martin, Olivier Billoint, R. Segaud, Stefania Bernasconi, C. Pellissier, Carine Jahan, Christelle Charpin-Nicolle, P. Dezest, Catherine Carabasse, Paul Besombes, Sebastien Ricavy, N. P. Tran, A. Magalhaes-Lucas, A. Roman, C. Boixaderas, Thomas Magis, Messaoud Bedjaoui, M. Tessaire, A. Seignard, F. Mazen, S. Landis, Elisa Vianello, Gabriel Molas, Fred Gaillard, Julien Arcamone, Etienne Nowak
16kbit 1T1R OxRAM arrays embedded in 28nm FDSOI technology demonstrating low BER, high endurance, and compatibility with core logic transistors. IMW 2021: 1-4 - [c37]Yigit Demirag
PCM-Trace: Scalable Synaptic Eligibility Traces with Resistivity Drift of Phase-Change Materials. ISCAS 2021: 1-5 - [c36]Fadi Jebali, Atreya Majumdar, Axel Laborieux, Tifenn Hirtzlin, Elisa Vianello, Jean-Pierre Walder, Marc Bocquet, Damien Querlioz, Jean-Michel Portal:
CAPC: A Configurable Analog Pop-Count Circuit for Near-Memory Binary Neural Networks. MWSCAS 2021: 158-161 - [i14]Yigit Demirag, Filippo Moro, Thomas Dalgaty, Gabriele Navarro, Charlotte Frenkel, Giacomo Indiveri, Elisa Vianello, Melika Payvand:
PCM-trace: Scalable Synaptic Eligibility Traces with Resistivity Drift of Phase-Change Materials. CoRR abs/2102.07260 (2021) - [i13]Charanraj Mohan, Luis A. Camuñas-Mesa, Elisa Vianello, Carlo Reita, José M. de la Rosa, Teresa Serrano-Gotarredona, Bernabé Linares-Barranco:
Experimental Body-input Three-stage DC offset Calibration Scheme for Memristive Crossbar. CoRR abs/2103.02651 (2021) - [i12]Dennis V. Christensen, Regina Dittmann, Bernabé Linares-Barranco, Abu Sebastian, Manuel Le Gallo, Andrea Redaelli, Stefan Slesazeck, Thomas Mikolajick, Sabina Spiga, Stephan Menzel, Ilia Valov, Gianluca Milano, Carlo Ricciardi, Shi-Jun Liang, Feng Miao, Mario Lanza, Tyler J. Quill
2021 Roadmap on Neuromorphic Computing and Engineering. CoRR abs/2105.05956 (2021) - [i11]Atreya Majumdar, Marc Bocquet, Tifenn Hirtzlin, Axel Laborieux, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz:
Model of the Weak Reset Process in HfOx Resistive Memory for Deep Learning Frameworks. CoRR abs/2107.06064 (2021) - [i10]Kamel-Eddine Harabi, Tifenn Hirtzlin, Clement Türck, Elisa Vianello, Raphaël Laurent, Jacques Droulez, Pierre Bessière, Jean-Michel Portal, Marc Bocquet, Damien Querlioz:
A Memristor-Based Bayesian Machine. CoRR abs/2112.10547 (2021) - 2020
- [j5]Alexandre Levisse
Write Termination Circuits for RRAM: A Holistic Approach From Technology to Application Considerations. IEEE Access 8: 109297-109308 (2020) - [c35]Axel Laborieux
Low Power In-Memory Implementation of Ternary Neural Networks with Resistive RAM-Based Synapse. AICAS 2020: 136-140 - [c34]Bogdan Penkovsky
In-Memory Resistive RAM Implementation of Binarized Neural Networks for Medical Applications. DATE 2020: 690-695 - [c33]Florian Pebay-Peyroula, Thomas Dalgaty, Elisa Vianello:
Entropy source characterization in HfO2 RRAM for TRNG applications. DTIS 2020: 1-2 - [c32]Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein
Embracing the Unreliability of Memory Devices for Neuromorphic Computing. IRPS 2020: 1-5 - [c31]Charanraj Mohan
Experimental Body-Input Three-Stage DC Offset Calibration Scheme for Memristive Crossbar. ISCAS 2020: 1-5 - [c30]Melika Payvand
Analog Weight Updates with Compliance Current Modulation of Binary ReRAMs for On-Chip Learning. ISCAS 2020: 1-5 - [i9]Thomas Dalgaty, Niccolo Castellani, Damien Querlioz, Elisa Vianello:
In-situ learning harnessing intrinsic resistive memory variability through Markov Chain Monte Carlo Sampling. CoRR abs/2001.11426 (2020) - [i8]Maxence Bouvier, Alexandre Valentian, Thomas Mesquida, François Rummens, Marina Reyboz, Elisa Vianello, Edith Beigné:
Spiking Neural Networks Hardware Implementations and Challenges: a Survey. CoRR abs/2005.01467 (2020) - [i7]Axel Laborieux, Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Liza Herrera Diez, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz:
Low Power In-Memory Implementation of Ternary Neural Networks with Resistive RAM-Based Synapse. CoRR abs/2005.01973 (2020) - [i6]Bogdan Penkovsky, Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz:
In-Memory Resistive RAM Implementation of Binarized Neural Networks for Medical Applications. CoRR abs/2006.11595 (2020) - [i5]Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz:
Embracing the Unreliability of Memory Devices for Neuromorphic Computing. CoRR abs/2007.06238 (2020) - [i4]Axel Laborieux, Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz:
Implementation of Ternary Weights with Resistive RAM Using a Single Sense Operation per Synapse. CoRR abs/2007.14234 (2020)
2010 – 2019
- 2019
- [j4]Maxence Bouvier
Spiking Neural Networks Hardware Implementations and Challenges: A Survey. ACM J. Emerg. Technol. Comput. Syst. 15(2): 22:1-22:35 (2019) - [j3]Mouhamad Alayan
Switching Event Detection and Self-Termination Programming Circuit for Energy Efficient ReRAM Memory Arrays. IEEE Trans. Circuits Syst. II Express Briefs 66-II(5): 748-752 (2019) - [c29]Tifenn Hirtzlin, Marc Bocquet, Jacques-Olivier Klein
Outstanding Bit Error Tolerance of Resistive RAM-Based Binarized Neural Networks. AICAS 2019: 288-292 - [c28]Damien Querlioz, Julie Grollier, Tifenn Hirtzlin, Jacques-Olivier Klein
Memory-Centric Neuromorphic Computing With Nanodevices. BioCAS 2019: 1-4 - [c27]Thomas Dalgaty, Melika Payvand, Barbara De Salvo, Jerome Casas
Hybrid CMOS-RRAM Neurons with Intrinsic Plasticity. ISCAS 2019: 1-5 - [c26]Charanraj Mohan
A Current Attenuator for Efficient Memristive Crossbars Read-Out. ISCAS 2019: 1-5 - [c25]Tony F. Wu, Binh Q. Le, Robert M. Radway
A 43pJ/Cycle Non-Volatile Microcontroller with 4.7μs Shutdown/Wake-up Integrating 2.3-bit/Cell Resistive RAM and Resilience Techniques. ISSCC 2019: 226-228 - [i3]Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz:
In-Memory and Error-Immune Differential RRAM Implementation of Binarized Deep Neural Networks. CoRR abs/1902.02528 (2019) - [i2]Tifenn Hirtzlin, Marc Bocquet, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz:
Outstanding Bit Error Tolerance of Resistive RAM-Based Binarized Neural Networks. CoRR abs/1904.03652 (2019) - [i1]Tifenn Hirtzlin, Marc Bocquet, Bogdan Penkovsky, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz:
Digital Biologically Plausible Implementation of Binarized Neural Networks with Differential Hafnium Oxide Resistive Memory Arrays. CoRR abs/1908.04066 (2019) - 2018
- [j2]Alessandro Grossi
Experimental Investigation of 4-kb RRAM Arrays Programming Conditions Suitable for TCAM. IEEE Trans. Very Large Scale Integr. Syst. 26(12): 2599-2607 (2018) - [c24]Elisa Donati
Processing EMG signals using reservoir computing on an event-based neuromorphic system. BioCAS 2018: 1-4 - [c23]Elisa Vianello, Denys R. B. Ly
Metal Oxide Resistive Memory (OxRAM) and Phase Change Memory (PCM) as Artificial Synapses in Spiking Neural Networks. ICECS 2018: 561-564 - [c22]Gilbert Sassine, Cecile Nail, Luc Tillie, Diego Alfaro Robayo, Alexandre Levisse, Carlo Cagli, Khalil El Hajjam, Jean-Francois Nodin, Elisa Vianello, Mathieu Bernard, Gabriel Molas, Etienne Nowak
Sub-pJ consumption and short latency time in RRAM arrays for high endurance applications. IRPS 2018: 2-1 - [c21]Denys R. B. Ly
Role of synaptic variability in spike-based neuromorphic circuits with unsupervised learning. ISCAS 2018: 1-5 - [c20]Thomas Dalgaty, Elisa Vianello, Denys Ly
Insect-Inspired Elementary Motion Detection Embracing Resistive Memory and Spiking Neural Networks. Living Machines 2018: 115-128 - [c19]Lorena Anghel, Denys Ly
Neuromorphic Computing - From Robust Hardware Architectures to Testing Strategies. VLSI-SoC 2018: 176-179 - 2017
- [j1]Mouhamad Alayan
Correlated Effects on Forming and Retention of Al Doping in HfO2-Based RRAM. IEEE Des. Test 34(3): 23-30 (2017) - [c18]Benoit Sklénard
Advances in the understanding of microscopic switching mechanisms in ReRAM devices (Invited paper). ESSDERC 2017: 46-49 - [c17]Elisa Vianello, Thilo Werner, Alessandro Grossi, Etienne Nowak
Bioinspired Programming of Resistive Memory Devices for Implementing Spiking Neural Networks. ACM Great Lakes Symposium on VLSI 2017: 393-398 - 2016
- [c16]M. Barlas, Boubacar Traore, Laurent Grenouillet, Stefania Bernasconi, Philippe Blaise, Mouhamad Alayan, Benoit Sklénard, Eric Jalaguier, Philippe Rodriguez
Impact of Si/Al implantation on the forming voltage and pre-forming conduction modes in HfO2 based OxRAM cells. ESSDERC 2016: 168-171 - [c15]Nenad Jovanovic, Olivier Thomas, Elisa Vianello, Bosko Nikolic, Lirida A. B. Naviner
Design considerations for reliable OxRAM-based non-volatile flip-flops in 28nm FD-SOI technology. ISCAS 2016: 1146-1149 - [c14]Thilo Werner, Daniele Garbin, Elisa Vianello, Olivier Bichler, Daniel Cattaert, Blaise Yvert, Barbara De Salvo, Luca Perniola:
Real-time decoding of brain activity by embedded Spiking Neural Networks using OxRAM synapses. ISCAS 2016: 2318-2321 - 2015
- [c13]M. Azzaz, A. Benoist, Elisa Vianello, Daniele Garbin, Eric Jalaguier, Carlo Cagli, C. Charpin, Stefania Bernasconi, Simon Jeannot, T. Dewolf, G. Audoit, C. Guedj, S. Denorme, Philippe Candelier, Claire Fenouillet-Béranger, Luca Perniola:
Benefit of Al2O3/HfO2 bilayer for BEOL RRAM integration through 16kb memory cut characterization. ESSDERC 2015: 266-269 - [c12]Barbara De Salvo, Elisa Vianello, Olivier Thomas, Fabien Clermidy, Olivier Bichler, Christian Gamrat, Luca Perniola:
Emerging resistive memories for low power embedded applications and neuromorphic systems. ISCAS 2015: 3088-3091 - [c11]Daniele Garbin, Elisa Vianello, Olivier Bichler, M. Azzaz, Quentin Rafhay, Philippe Candelier, Christian Gamrat, Gérard Ghibaudo
On the impact of OxRAM-based synapses variability on convolutional neural networks performance. NANOARCH 2015: 193-198 - 2014
- [c10]Fabien Clermidy, Natalija Jovanovic, Santhosh Onkaraiah, Houcine Oucheikh, Olivier Thomas, Ogun Turkyilmaz, Elisa Vianello, Jean-Michel Portal, Marc Bocquet:
Resistive memories: Which applications? DATE 2014: 1-6 - [c9]Nenad Jovanovic, Olivier Thomas, Elisa Vianello, Jean-Michel Portal, Bosko Nikolic, Lirida A. B. Naviner
OxRAM-based non volatile flip-flop in 28nm FDSOI. NEWCAS 2014: 141-144 - 2013
- [c8]Boubacar Traore
On the forming-free operation of HfOx based RRAM devices: Experiments and ab initio calculations. ESSDERC 2013: 170-173 - [c7]Giorgio Palma, Elisa Vianello, Olivier Thomas, Houcine Oucheikh, Santhosh Onkaraiah, Alain Toffoli, Catherine Carabasse, Gabriel Molas, Barbara De Salvo:
A novel HfO2-GeS2-Ag based conductive bridge RAM for reconfigurable logic applications. ESSDERC 2013: 264-267 - [c6]Tsanka Z. Todorova, Philippe Blaise, Elisa Vianello, Leonardo R. C. Fonseca:
Understanding the conduction mechanism of the chalcogenide Ag2S silver-doped through ab initio simulation. ESSDERC 2013: 342-345 - [c5]Santhosh Onkaraiah, Marc Belleville, Marina Reyboz, Fabien Clermidy, Elisa Vianello, Jean-Michel Portal, Christophe Muller:
A CBRAM-based compact interconnect switch for non-volatile reconfigurable logic circuits. ICICDT 2013: 81-84 - [c4]Elisa Vianello, Olivier Thomas, M. Harrand, Santhosh Onkaraiah, T. Cabout, Boubacar Traore
Back-end 3D integration of HfO2-based RRAMs for low-voltage advanced IC digital design. ICICDT 2013: 235-238 - [c3]Santhosh Onkaraiah, Ogun Turkyilmaz, Marina Reyboz, Fabien Clermidy, Elisa Vianello, Jean-Michel Portal, Christophe Muller:
A hybrid CBRAM/CMOS Look-Up-Table structure for improving performance efficiency of Field-Programmable-Gate-Array. ISCAS 2013: 2440-2443 - [c2]Giorgio Palma, Manan Suri
Stochastic neuron design using conductive bridge RAM. NANOARCH 2013: 95-100 - 2012
- [c1]Elisa Vianello, Carlo Cagli, Gabriel Molas, Emeline Souchier, Philippe Blaise, Catherine Carabasse, G. Rodriguez, V. Jousseaume, Barbara De Salvo, Florian Longnos, Faiz Dahmani, P. Verrier, D. Bretegnier, J. Liebault:
On the impact of Ag doping on performance and reliability of GeS2-based Conductive Bridge Memories. ESSDERC 2012: 278-281 - 2010
- [b1]Elisa Vianello:
Characterization and modelling of silicon-nitride based non volatile memories. University of Udine, Italy, 2010
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from ,
, and
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and
to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-11-18 20:48 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by: