WO2024188151A1 - Reference signal sending method, receiving method, and apparatus - Google Patents

Abstract

The present application provides a reference signal sending method, receiving method, and apparatus. A first apparatus sends a reference signal and data. The reference signal comprises a first portion, a second portion, and a third portion. The first portion and third portion of the reference signal and the data are obtained via line coding, and for each of same the duration of each coded bit thereof is t1. The second portion is represented by a bit. In a bit sequence composed of the last two bits of the first portion, all of the second portion, and the first two bits of the third portion, the duration of the longest continuous bit 0 or continuous bit 1 is t2, where t2 > 2×t1. The reference signal sending method provided by the present application can reduce the influence of sampling clock deviation at a receiving end.

Description

Reference signal transmission method, reception method and device

This application claims the priority of Chinese patent application filed with the Patent Office of China on March 10, 2023, with application number CN 202310260761.X and application name “Method for transmitting, method for receiving and device for reference signal”, the entire contents of which are incorporated herein by reference.

Technical Field

The present invention relates to the field of communications, and more specifically, to a method for transmitting a reference signal, a method for receiving a reference signal, and a device for transmitting a reference signal.

Background Art

The demodulation reference signal DMRS of the NR (new radio) system is designed for the synchronous system. In the synchronous system, each wireless frame has a strictly fixed length. The base station will synchronize with the GPS, and the terminal will adjust the synchronization with the base station over a period of time. Therefore, the DMRS design of the data part of the synchronous system does not need to consider the impact of large SFO. The 3GPP protocol stipulates that the sampling clock deviation cannot be higher than ±0.1ppm. In the NR design, DMRS and data occupy the same time domain resource unit (symbol granularity). In the event of large SFO, DMRS and data cannot be distinguished, and data will be misjudged as DMRS.

As NR machine-type communication (MTC) and Internet of Things (IoT) communications are increasingly used, the number of IoT device connections is growing day by day. According to market forecasts, the number of global IoT connections will reach tens of billions or even hundreds of billions by 2030. The industry is increasingly demanding lower costs and power consumption for IoT devices.

The life cycle of an IoT terminal is usually measured in years, or even up to ten years. Moreover, the huge number of IoT terminals are widely distributed, and many are installed in locations where construction is difficult. The maintenance cost of regularly replacing batteries is too high, and there is an urgent need to avoid replacing batteries during the terminal life cycle. On the other hand, high-performance batteries with long life and that meet the rated voltage and power requirements of the terminal module are often expensive, which significantly increases the cost of the terminal. In summary, low-power, low-cost IoT terminals are an important evolutionary trend for the next generation of the Internet of Things. Due to the limitation of low power consumption, IoT terminals use low-precision, low-power ring oscillators, resulting in large frequency errors.

In the NR design, DMRS and data occupy the same time domain resource unit, resulting in large SFO, DMRS and data cannot be distinguished, and data may be misjudged as DMRS. The NR protocol stipulates that the sampling clock deviation cannot be higher than ±0.1ppm. However, the frequency error of low-power, low-cost IoT terminals cannot meet the requirements of the NR protocol. Therefore, it is necessary to redesign the reference signal for low-power, low-cost IoT terminals to reduce the performance loss caused by the sampling clock deviation introduced by the low-precision ring oscillator, thereby improving the receiving performance of network equipment.

Summary of the invention

The present application provides a method for sending a reference signal, which can reduce the performance loss caused by the sampling clock deviation introduced by a low-precision ring oscillator and improve the receiving performance of a network device.

In a first aspect, a method for sending a reference signal is provided, and the method for sending a reference signal may be performed by a first device, or may be performed by a chip or circuit disposed in the first device. The first device may be a terminal device.

The method includes:

The first device generates a first reference signal and data. The first reference signal is used for demodulation of data. The first reference signal includes a first part, a second part and a third part. The first part is before the second part, and the second part is before the third part. The first part is adjacent to the second part, and the second part is adjacent to the third part. The first part, the third part and the data are obtained through line coding. The second part is represented by one bit. The duration of each bit in the data, the first part and the third part is t1. In the bit sequence composed of the last two bits of the first part, the whole of the second part and the first two bits of the third part, the duration of the longest continuous bit 0 or continuous bit 1 is t2, t2>2×t1. The longest continuous bit 0 or continuous bit 1 includes the second part.

The first device sends a first reference signal and data.

In a second aspect, a method for receiving a reference signal is provided, and the method can be executed by a second device, or can also be executed by a chip or circuit disposed in the second device. The second device can be a network device.

The method includes:

The second device receives the first reference signal and data. The first reference signal is used for demodulation of data. The first reference signal includes a first part, a second part and a third part. The first part is before the second part, the second part is before the third part, the first part is adjacent to the second part, and the second part is adjacent to the third part. The first part, the third part and the data are line-coded bits. The second part is represented by one bit. The duration of each bit in the data, the first part and the third part is t1. In the bit sequence consisting of the last two bits of the first part, the whole of the second part and the first two bits of the third part, the duration of the longest continuous bit 0 or continuous bit 1 is t2, t2>2×t1, and the longest continuous bit 0 or continuous bit 1 includes the second part;

The second device demodulates data according to the first reference signal.

In a third aspect, a communication method is provided, the method comprising:

The first device generates a first reference signal and data. The first reference signal is used for demodulation of data. The first reference signal includes a first part, a second part and a third part. The first part is before the second part, and the second part is before the third part. The first part is adjacent to the second part, and the second part is adjacent to the third part. The first part, the third part and the data are obtained through line coding. The second part is represented by one bit. The duration of each bit in the data, the first part and the third part is t1. In the bit sequence composed of the last two bits of the first part, the whole of the second part and the first two bits of the third part, the duration of the longest continuous bit 0 or continuous bit 1 is t2, t2>2×t1. The longest continuous bit 0 or continuous bit 1 includes the second part.

The first device sends a first reference signal and data.

The second device receives the first reference signal and the data.

The second device demodulates data according to the first reference signal.

The method provided in the present application can reduce the performance loss caused by the sampling clock deviation introduced by the low-precision ring oscillator and improve the receiving performance of the network device.

In combination with the first to third aspects, there are also the following optional designs.

The first reference signal and the data are included in a frame, and the frame includes the second reference signal. The format of the second reference signal is similar to that of the second reference signal, and also includes three parts. In order to distinguish it from the first reference signal, the second reference signal includes a fourth part, a fifth part, and a sixth part. The fourth part is before the fifth part, and the fifth part is before the sixth part. The fourth part is adjacent to the fifth part, and the fifth part is adjacent to the sixth part. The fourth part and the sixth part are obtained through the line coding. The duration of each bit in the fourth part and the sixth part is t1. The fifth part is represented by one bit. The duration of one bit of the second part is t3, and the duration of the fifth part is t4, and t3≠t4.

In the bit sequence consisting of the last two bits of the first part, the entire second part, and the first two bits of the third part, the longest duration of consecutive bits 0 or consecutive bits 1 is t2, including:

In the bit sequence consisting of the last bit of the first part, the entire second part, and the first bit of the third part, the longest duration of consecutive bits 0 or consecutive bits 1 is t2. t2 includes the time of the first part and the third part. Compared with the case where t2 is not included, under the premise of obtaining the same t2, the time domain of the second part of DMRS is shorter and the DMRS overhead is lower.

The bits of the second part are associated with the last bit of the first part and the first bit of the third part.

The bits of the second part are associated with the last bit of the first part and the first bit of the third part, including:

The last bit of the first part is opposite to the first bit of the third part, and the duration of the second part is t3>t1. When t3>t1, it can be ensured that t2>2t1, so that the DMRS and the data part can be distinguished.

The bits of the second part are associated with the last bit of the first part and the first bit of the third part, including:

The last bit of the first part is the same as the first bit of the third part, and the bits of the second part are the same as the bits of the first part. The last bit of the first part, the second part and the first bit of the third part are all the same, which can save DMRS overhead.

The bits in the second part are associated with at least one of the following:

the last two bits of the first part; or,

The first two bits of the third part.

The last two bits of the first part are the same, the first two bits of the third part are different, the last bit of the first part is different from the first bit of the third part, and the bits of the second part are the same as the last bit of the first part. The bits of the second part are the same as the last two bits of the first part, which can reduce the DMRS overhead. Alternatively, the last two bits of the first part are different, the first two bits of the third part are the same, the last bit of the first part is different from the first bit of the third part, and the bits of the second part are the same as the first bit of the third part. The bits of the second part are the same as the first two bits of the third part, which can save DMRS overhead.

The first part is represented by a first bit sequence, and the third part is represented by a second bit sequence. The first bit sequence and the second bit sequence satisfy the following relationship:

The second bit sequence is the reverse order of the first bit sequence, which can reduce the influence of side lobes and improve performance under low signal-to-noise ratio.

The second device sends a signaling, and accordingly, the first device receives the signaling, where the signaling indicates a pattern of a first reference signal. The pattern of the first reference signal includes at least one of the following information:

a value of duration t3 of one bit of the second part;

the value of t2; or,

The values of the first part and the third part bits.

In a fourth aspect, a communication device is provided, which includes at least one processor, wherein the at least one processor is coupled to at least one memory, and the at least one processor is used to execute a computer program or instruction stored in the at least one memory so that the communication device performs the method described in the first aspect or the second aspect.

In a fifth aspect, the present application provides a computer-readable storage medium, which stores instructions. When the computer-readable storage medium is run on a computer, the computer executes the method described in the first aspect or the second aspect above.

In a sixth aspect, the present application provides a computer program product comprising instructions, which, when executed on a computer, enables the computer to execute the method described in the first aspect or the second aspect above.

In a seventh aspect, a chip device is provided, comprising a processing circuit, wherein the processing circuit is used to call and run a program from a memory, so that a communication device equipped with the chip device executes a method in any possible implementation of the first and second aspects above.

In an eighth aspect, a communication system is characterized by comprising:

A first device and a second device, the first device and the second device communicate with each other. The first device executes the method in any possible implementation of the first aspect, and the second device executes the method in any possible implementation of the second aspect.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG1 is a schematic diagram of a communication system to which the present application is applicable.

Figure 2 Schematic diagram of Manchester encoding.

Figure 3 Schematic diagram of FM0 encoding.

Figure 4 Schematic diagram of clock deviation.

FIG5 is a schematic diagram of a communication method provided in an embodiment of the present application.

FIG6 is a schematic flowchart of a communication method provided in an embodiment of the present application.

FIG. 7 is a schematic diagram of the duration of continuous 0 or 1 in a bit stream after line coding of data provided by an embodiment of the present application.

FIG8 is a schematic diagram of a DMRS generation process provided in an embodiment of the present application.

Figure 9a and Figure 9b are schematic diagrams of the three parts of the DMRS provided in the embodiments of the present application.

FIG. 10 a to FIG. 10 c are schematic diagrams of three parts of a DMRS provided in an embodiment of the present application.

11a to 11e are schematic diagrams of three parts of a DMRS provided in an embodiment of the present application.

Figures 12a to 12n are schematic diagrams of three parts of a DMRS provided in an embodiment of the present application.

FIG. 13 is a schematic flowchart of another communication method provided in an embodiment of the present application.

FIG. 14 is a schematic diagram of another DMRS generation process provided in an embodiment of the present application.

Figure 15a and Figure 15b are schematic diagrams of the three parts of the DMRS provided in the embodiments of the present application.

FIG. 16 is a schematic block diagram of an apparatus 1600 provided in an embodiment of the present application.

FIG. 17 is a schematic block diagram of an apparatus 1700 provided in an embodiment of the present application.

DETAILED DESCRIPTION

The technical solution in this application will be described below in conjunction with the accompanying drawings.

The technical solutions of the embodiments of the present application can be applied to various communication systems, such as: long term evolution (LTE) system, LTE frequency division duplex (FDD) system, LTE time division duplex (TDD) system, worldwide interoperability for microwave access (WiMAX) communication system, fifth generation (5G) system, NR or future network, etc. The 5G mobile communication system described in the present application includes a non-standalone (NSA) 5G mobile communication system or a standalone (SA) 5G mobile communication system. The technical solutions provided in the present application can also be applied to future communication systems, such as the sixth generation mobile communication system. The communication system can also be a public land mobile network (PLMN) network, a device-to-device (D2D) communication system, a machine-to-machine (M2M) communication system, an IoT communication system or other communication systems.

The terminal equipment in the embodiments of the present application may refer to an access terminal, a user unit, a user station, a mobile station, a mobile station, a relay station, a remote station, a remote terminal, a mobile device, a user terminal, a user equipment (UE), a terminal, a wireless communication device, a user agent or a user device. The terminal equipment may also be a cellular phone, a cordless phone, a session initiation protocol (SIP) phone, a wireless local loop (WLL) station, a personal digital assistant (PDA), a handheld device with wireless communication function, a computing device or other processing device connected to a wireless modem, a vehicle-mounted device, a wearable device, a terminal device in a 5G network or a terminal device in a future evolved public land mobile network (PLMN) or a terminal device in a future Internet of Vehicles, etc., and the embodiments of the present application are not limited to this.

As an example and not a limitation, in the embodiments of the present application, wearable devices may also be referred to as wearable smart devices, which are a general term for wearable devices that are intelligently designed and developed by applying wearable technology to daily wear, such as glasses, gloves, watches, clothing, and shoes. A wearable device is a portable device that is worn directly on the body or integrated into the user's clothes or accessories. Wearable devices are not only hardware devices, but also achieve powerful functions through software support, data interaction, and cloud interaction. Broadly speaking, wearable smart devices include full-featured, large-sized, and independent of smartphones to achieve complete or partial functions, such as smart watches or smart glasses, as well as devices that only focus on a certain type of application function and need to be used in conjunction with other devices such as smartphones, such as various types of smart bracelets and smart jewelry for vital sign monitoring.

In addition, in the embodiment of the present application, the terminal device can also be a terminal device in the IoT system, for example, the terminal device can also be a tag, for example, an active tag, a passive tag, etc. IoT is an important part of the future development of information technology. Its main technical feature is to connect objects to the network through communication technology, thereby realizing an intelligent network of human-machine interconnection and object-to-object interconnection. In the embodiment of the present application, IOT technology can achieve massive connections, deep coverage, and terminal power saving through narrowband (NB) technology, for example.

In addition, in an embodiment of the present application, the terminal device may also include sensors such as smart printers, train detectors, and gas stations. Its main functions include collecting data (partial terminal devices), receiving control information and downlink data from network devices, and sending electromagnetic waves to transmit uplink data to network devices.

The network device in the embodiment of the present application can be any communication device with wireless transceiver function for communicating with the terminal device. The device includes but is not limited to: evolved Node B (eNB), radio network controller The network device may be a radio network controller (RNC), a node B (NB), a home evolved NodeB (HeNB), or a home Node B (HNB), a baseband unit (BBU), an access point (AP) in a wireless fidelity (WIFI) system, a wireless relay node, a wireless backhaul node, a transmission point (TP) or a transmission and reception point (TRP), etc. It may also be a 5G system, such as a gNB in an NR system, or a transmission point (TRP or TP), one or a group of antenna panels (including multiple antenna panels) of a base station in a 5G system, or a network node constituting a gNB or a transmission point, such as a baseband unit (BBU) or a distributed unit (DU), etc. The network device may also be a reader/writer, etc.

In some deployments, the network device in the embodiments of the present application may refer to a central unit (CU) or a distributed unit (DU), or the network device includes a CU and a DU. The gNB may also include an active antenna unit (AAU). The CU implements some functions of the gNB, and the DU implements some functions of the gNB. For example, the CU is responsible for processing non-real-time protocols and services, and implements the functions of the radio resource control (RRC) and packet data convergence protocol (PDCP) layers. The DU is responsible for processing physical layer protocols and real-time services, and implements the functions of the radio link control (RLC) layer, the media access control (MAC) layer, and the physical (PHY) layer. The AAU implements some physical layer processing functions, RF processing, and related functions of the active antenna. Since the information of the RRC layer will eventually become the information of the PHY layer, or be converted from the information of the PHY layer, therefore, under this architecture, high-level signaling, such as RRC layer signaling, can also be considered to be sent by the DU, or, sent by the DU+AAU. It is understandable that the network device can be a device including one or more of a CU node, a DU node, and an AAU node. In addition, the CU can be divided into a network device in the access network (radio access network, RAN), and the CU can also be divided into a network device in the core network (core network, CN), and this application does not limit this.

Furthermore, the CU can be divided into the central unit of the control plane (central unit-control plane, CU-CP) and the central unit of the user plane (central unit-user plane, CU-UP). Among them, the CU-CP and CU-UP can also be deployed on different physical devices. The CU-CP is responsible for the control plane function. The CU-UP is responsible for the user plane function.

The network equipment and terminal equipment can be deployed on land, including indoors or outdoors, handheld or vehicle-mounted; they can also be deployed on the water surface; they can also be deployed on aircraft, balloons and satellites in the air. The embodiments of the present application do not limit the scenarios in which the network equipment and terminal equipment are located.

In an embodiment of the present application, a terminal device or a network device includes a hardware layer, an operating system layer running on the hardware layer, and an application layer running on the operating system layer. The hardware layer includes hardware such as a central processing unit (CPU), a memory management unit (MMU), and a memory (also called main memory). The operating system can be any one or more computer operating systems that implement business processing through processes, such as a Linux operating system, a Unix operating system, an Android operating system, an iOS operating system, or a Windows operating system. The application layer includes applications such as browsers, address books, word processing software, and instant messaging software.

In addition, various aspects or features of the present application can be implemented as methods, devices or products using standard programming and/or engineering techniques. The term "product" used in this application covers computer programs that can be accessed from any computer-readable device, carrier or medium. For example, computer-readable media may include, but are not limited to: magnetic storage devices (e.g., hard disks, floppy disks or tapes, etc.), optical disks (e.g., compact discs (CDs), digital versatile discs (DVDs), etc.), smart cards and flash memory devices (e.g., erasable programmable read-only memory (EPROM), cards, sticks or key drives, etc.). In addition, the various storage media described herein may represent one or more devices and/or other machine-readable media for storing information. The term "machine-readable storage medium" may include, but is not limited to, wireless channels and various other media capable of storing, containing and/or carrying instructions and/or data.

To facilitate understanding of the embodiments of the present application, the communication system applicable to the embodiments of the present application is first described in detail by taking the communication system shown in FIG. 1 as an example. As shown in FIG. 1 , the communication system 100 may include at least one network device, such as the network device 101 shown in FIG. 1 . The communication system 100 may also include at least one terminal device, such as the terminal devices 102 to 107 shown in FIG. 1 . Among them, the terminal devices 102 to 107 may be mobile or fixed. The network device 101 and one or more of the terminal devices 102 to 107 may communicate via a wireless link. Each network device may provide communication coverage for a specific geographic area and may communicate with terminal devices located within the coverage area.

Optionally, the terminal devices may communicate directly with each other. For example, direct communication between the terminal devices may be achieved using device to device (D2D) technology. As shown in FIG. 1 , the terminal devices 105 and 106 and the terminal devices 105 and 107 may communicate directly using D2D technology. The terminal devices 106 and 107 may communicate with the terminal device 105 individually or simultaneously.

Terminal devices 105 to 107 may also communicate with network device 101 respectively. For example, they may communicate directly with network device 101, such as terminal devices 105 and 106 in the figure may communicate directly with network device 101; or they may communicate indirectly with network device 101, such as terminal device 107 in the figure communicates with network device 101 via terminal device 105.

Each communication device may be configured with multiple antennas. For each communication device in the communication system 100, the multiple antennas configured may include at least one transmitting antenna for sending signals and at least one receiving antenna for receiving signals. Therefore, the communication devices in the communication system 100 may communicate with each other through multi-antenna technology.

Exemplarily, the terminal device involved in the embodiments of the present application has a low-power receiving circuit with envelope detection, which is used to receive information. In the communication system shown in Figure 1, it includes at least one terminal device with a low-power receiving circuit with envelope detection (such as, one or more low-power receiving circuits with envelope detection among terminal devices 102 to terminal devices 107).

Specifically, the terminal device with a low-power receiving circuit with envelope detection involved in the embodiments of the present application can be understood as an entity on the user side for receiving or transmitting signals, such as industrial network sensors, video surveillance cameras, wearable devices (such as smart watches), water meters, electricity meters and other terminal devices with auxiliary circuits.

It should be understood that FIG1 is only a simplified schematic diagram for ease of understanding, and the communication system 100 may also include other network devices or other terminal devices, which are not shown in FIG1 .

To facilitate understanding of the embodiments of the present application, several basic concepts involved in the embodiments of the present application are briefly explained. It should be understood that the basic concepts introduced below are briefly explained by taking the basic concepts specified in the NR protocol as an example, but the embodiments of the present application are not limited to the NR system. Therefore, the standard names that appear when describing the NR system as an example are all functional descriptions, and the specific names are not limited. They only represent the functions of the equipment and can be correspondingly extended to other systems, such as systems using OFDM technology, or systems similar to OFDM technology.

1. Amplitude shift keying (ASK)

If the possible states of a digital modulated signal correspond one-to-one with the binary information symbol or its corresponding baseband signal state, then the modulated signal is called a binary digital modulated signal. Keying with binary information symbols is called binary amplitude keying, denoted by ASK.

In a form of "binary amplitude shift keying," a carrier wave with amplitude A represents a bit "1," and a carrier wave turned off represents a bit 0. And vice versa.

ASK is a relatively simple modulation method, which is equivalent to amplitude modulation in analog signals, except that the carrier signal is multiplied by binary digits. Amplitude shift is to take frequency and phase as constants and amplitude as variable, and the information bit is transmitted through the amplitude of the carrier.

2. On-Off Keying (OOK) modulation

OOK modulation is binary amplitude keying. OOK is a special case of ASK modulation. A high amplitude (or envelope, level or energy, etc.) (e.g., higher than a certain threshold, or non-zero) is called OOK symbol 1, or OOK symbol on (ON), or OOK symbol through; a low amplitude (or envelope, level or energy, etc.) (e.g., lower than a certain threshold, or 0) is called OOK symbol 0, or OOK symbol off (OFF), or OOK symbol off. The amplitude is defined relative to the amplitude demodulation threshold of the receiver. Amplitudes greater than the demodulation threshold are called high amplitudes, and amplitudes lower than the demodulation threshold are called low amplitudes.

3. Phase shift keying (PSK)

A modulation technique that uses carrier phase to represent input signal information. Taking binary phase modulation as an example, when the code element is "1", the modulated carrier is in phase with the unmodulated carrier; when the code element is "0", the modulated carrier is in anti-phase with the unmodulated carrier; when "1" and "0", the modulated carrier has a phase difference of 180°.

4. Quadrature Amplitude Modulation (QAM)

The amplitude and phase change simultaneously, which belongs to non-constant envelope two-dimensional modulation. QAM is a combination of orthogonal carrier modulation technology and multi-level amplitude keying.

Quadrature Amplitude Keying is a method of combining two amplitude modulated signals (ASK and PSK) into one channel. The signal has two carriers of the same frequency, but with a phase difference of 90 degrees. One signal is the I signal and the other is the Q signal. Mathematically, one signal is represented as a sine and the other as a cosine. The two modulated carriers are mixed when they are transmitted. After reaching the destination, the carriers are separated, the data is extracted separately and then mixed with the original modulation information.

QAM uses two independent baseband signals to suppress the carrier double-sideband amplitude modulation of two mutually orthogonal same-frequency carriers, and utilizes the orthogonality of the spectrum of the modulated signals within the same bandwidth to achieve two-way parallel transmission of digital information.

Common QAM modulations include binary phase shift keying (BPSK), quadrature phase shift keying (QPSK), 16QAM, 64QAM, etc.

5. Constellation Points

A modulation symbol of a modulation method is represented as a constellation point. One axis of the modulation symbol coordinate system is I-channel, which represents the coordinate of the I-channel signal; the other axis of the coordinate system is Q-channel, which represents the coordinate of the Q-channel signal. For example, in QSPK modulation, the four modulation symbols are By constellation point For example, is the Q road coordinate; is the coordinate of the I path.

6. Coherent Demodulation

Coherent demodulation is also called synchronous detection, which is applicable to the demodulation of all linear modulated signals. The key to achieving coherent demodulation is that the receiving end must recover a coherent carrier that is strictly synchronized with the modulated carrier. Coherent demodulation refers to the use of a multiplier to input a reference signal that is coherent with the carrier (same frequency and same phase) and multiply it with the carrier.

7. Non-coherent demodulation

When the communication receiving end recovers the original digital baseband signal from the modulated high-frequency signal, the non-coherent demodulation method used is a demodulation method that does not require the extraction of carrier information, as opposed to the coherent demodulation method. Generally speaking, the non-coherent demodulation method has a simple circuit and is easy to implement, but its performance is slightly reduced compared to the coherent demodulation method.

8. Envelope Detection

Envelope detection is a signal detection method that uses a high-frequency signal as input and obtains the envelope or amplitude line of the low-frequency original signal through a half-wave or full-wave rectifier circuit. The receiver digitally samples the envelope of the original signal and compares it with the amplitude or energy threshold set by the receiver to determine whether the transmitted signal is 1 or 0, that is, whether the signal is on or off (ON/OFF).

9. Line Coding

Line coding ensures that there is enough clock information in the data stream to provide to the clock recovery circuit at the receiving end. Line coding technology can maintain good DC balance, increase the transmission distance of data, and provide a more effective error detection mechanism.

The bits after line coding are modulated into symbols through modulation methods such as BPSK and ASK, and sent to the air interface and transmitted as air interface waveforms. In BPSK, ASK, and OOK, one bit is mapped to one symbol, and the duration of one bit is the duration of one symbol, which is also the length of one symbol.

10. Manchester Encoding

Manchester coding is a line coding, also called phase encoding (PE), which is a synchronous clock coding technology used by the physical layer to encode the clock and data of a synchronous bit stream. Its application in the Ethernet media system belongs to the self-synchronization method (the other is the external synchronization method) of the two bit synchronization methods in data communication, that is, the receiver uses a special code containing a synchronization signal to extract the synchronization signal from the signal itself to lock its own clock pulse frequency to achieve synchronization.

Manchester coding is commonly used in LAN transmission. Manchester coding includes clock and data in the data stream. While transmitting code information, it also transmits the clock synchronization signal to the other party. There is a jump in each bit of coding, and there is no DC component, so it has self-synchronization ability and good anti-interference performance. However, each code element is adjusted to two levels, so the data transmission rate is only 1/2 of the modulation rate.

In Manchester encoding, there is a transition in the middle of each bit, and the transition in the middle of the bit serves as both a clock signal and a data signal. One way to represent it is: a transition from high to low represents 1, and a transition from low to high represents 0. Alternatively, a low-high level transition represents 1, and a high-low level transition represents 0.

FIG2 shows a schematic diagram of Manchester encoding, where data bit 1 is represented by 10 and data bit 0 is represented by 01.

11.FM0 encoding

FM0 (Bi-Phase Space Coding) is the full name of Bi-Phase Space Coding, which is also a line coding. Its working principle is that 1 bit of data is encoded by FM0 and then output as 2 bits, where the 2 bits of data 0 are different, 01 or 10, and the 2 bits of data 1 are the same, 00 or 11.

As shown in FIG3 , the value of the encoded bit of FM0 in FIG3 depends on its previous transmission form. As shown in the left figure of FIG3 , it is a schematic diagram of the FM0 encoding symbol of 1-bit data. An FM0 symbol consists of 2 bits. The 2 bits after FM0 encoding of data 0 may be 10 or 01, and the 2 bits after FM0 encoding of data 1 may be 11 or 00. As shown in FIG3 , it is a schematic diagram of the sequence after FM0 encoding of 2 bits. The bits before FM0 encoding are 00. When the 2 bits after FM0 encoding of the first 0 are 10, the 2 bits after FM0 encoding of the second 0 are 10; when the 2 bits after FM0 encoding of the first 0 are 01, the 2 bits after FM0 encoding of the second 0 are 01; similarly, the bits before encoding are 01, 10, and 11 as shown in the right figure of FIG3 . The 2 bits after FM0 encoding of the k+1th bit before FM0 encoding are related to the value of the k+1th bit before encoding, and are also related to the second bit of the 2 bits after FM0 encoding of the kth bit. The first bit after FM0 encoding of the k+1th bit before FM0 encoding is opposite to the second bit of the 2 bits after FM0 encoding of the kth bit. Table 1 shows the relationship between the kth bit and the k+1th bit before and after encoding.

Table 1. Relationship between the kth bit and the k+1th bit before and after FM0 encoding

12. Sampling clock deviation

Low-cost IoT terminals, due to their low power consumption and low cost, generally use ring oscillators with low frequency accuracy. The sampling clock of the terminal device is less accurate than that of the network device. The oscillators of the terminal send and the base station receive do not match, resulting in inconsistent sampling clocks, as shown in Figure 4. For example, the sending side is the terminal device and the receiving side is the network device. Due to the mismatch between the sending and receiving oscillators, the symbol lengths of the sending and receiving sides are different.

In the current typical situation, without calibration, the sampling clock deviation can reach ε～±10%. Ts represents the symbol length on the sending side, and Ts' represents the symbol length on the receiving side.

In the case of a sampling frequency offset (SFO), due to the cumulative effect of SFO, taking ε=10% as an example, T _s =1.1*T′ _s , a sampling point deviation of 1 symbol will occur every 10 symbols.

Sampling clock deviation will lead to symbol timing error. Taking BPSK as an example, a BPSK symbol, the modulated bit is called a symbol, and BPSK means 1 bit corresponds to 1 symbol.

Symbol timing error affects two consecutive inverted symbols. The timing error Δ=T _s -T′ _s . For two consecutive inverted symbols, the correlator output amplitude will decay by 1-(2|Δ|/T _s ). Normalized timing error ε, assuming that ε is a zero-mean Gaussian distribution, symbols are independent of each other, and the probability of two consecutive symbols being opposite is 0.5 (equal to the probability of two consecutive symbols being the same). ε will lead to an increase in the bit error rate, and thus raise the bit error rate. The bit error rate is:

The first term is the bit error caused by the timing error ε when the two consecutive symbols are inverted, _σε is the variance of the timing error ε, Q is the complementary error function, _Eb is the energy per information bit, and _N0 is the noise power spectral density.

The estimation and compensation of SFO in the system is very important to the data demodulation performance of the system.

13. Asynchronous Systems

Asynchronous communication is a very common communication method. Compared with synchronous communication, the time slots between symbols sent by asynchronous communication can be arbitrary. The sender can start sending symbols at any time, so it is necessary to add marks at the beginning and end of each symbol, that is, add start bits and stop bits, so that the receiver can correctly receive each symbol. After completing the corresponding operation, the internal processor uses a callback mechanism to notify the sender that the symbol sent has been replied.

Asynchronous communication can also use frames as transmission units. The receiving end must be ready to receive frames at any time. At this time, some special bit combinations are set at the header of the frame so that the receiving end can find the beginning of a frame. This is also called frame delimiter. The above special bit combination is called a preamble or a preamble sequence. Frame delimiter also includes determining the end position of the frame. There are two ways to do this. One is to set a special bit combination at the end of the frame to mark the end of the frame. Or a frame length field is set in the frame header. It should be noted that when sending frames asynchronously, it does not mean that the sending end must add a start bit and a stop bit to each character in the frame before sending it out, but that the sending end can send a frame at any time, and the time interval between frames can also be arbitrary. All bits in a frame are sent continuously. The sending end does not need to coordinate with the receiving end before sending a frame (no need to perform bit synchronization first). A system for asynchronous communication is called an asynchronous system. The embodiments of the present application can be applied to asynchronous systems.

In order to facilitate understanding of the embodiments of the present application, the following explanations are made.

First, the first, second, and various numerical numbers (e.g., "#1", "#2", etc.) shown in the present application are only for convenience of description and are used to distinguish objects, and are not used to limit the scope of the embodiments of the present application. For example, to distinguish different messages, etc., rather than to describe a specific order or sequence. It should be understood that the objects described in this way can be interchanged where appropriate so as to be able to describe solutions other than the embodiments of the present application.

Second, the term "and/or" in this application is merely a term used to describe the association relationship between associated objects, indicating that three relationships may exist. For example, A and/or B may represent three situations: A exists alone, A and B exist at the same time, and B exists alone.

In the following, without loss of generality, the communication method provided by the embodiment of the present application is described in detail by taking the interaction between a network device and a terminal device as an example. For example, the second device is a network device; the first device is a terminal device. The terminal device can be a low-power device, such as a tag. The network device can be a reader or a base station.

FIG5 is a schematic diagram of a communication method provided in an embodiment of the present application.

In FIG5 , the original bits are channel coded and output as data bits; the data bits are line coded and output as line coded bits; the line coded bits are modulated, such as BPSK modulation, and output as modulated symbols; the modulated symbols and DMRS are mapped to physical resources and then sent.

FIG6 is a schematic flowchart of a communication method provided in an embodiment of the present application.

The following steps are involved:

S601: The terminal device generates a reference signal and data.

S602: The terminal device sends a reference signal and data. The reference signal is recorded as a first reference signal. Correspondingly, the network device receives the reference signal and data sent by the terminal device. The network demodulates the data according to the reference signal.

The first reference signal is used for demodulation of data. The first reference signal includes a first part, a second part and a third part. The first part is before the second part, and the second part is before the third part.

The first part is adjacent to the second part, and the second part is adjacent to the third part. That is, there is no data inserted between the first part, the second part and the third part of the first reference signal. In the time domain, the DMRS can be before the data, after the data, or between two groups of data.

The first part, the third part and the data are obtained through line coding. That is, the first part, the third part and the data are bits after line coding. For example, the line coding is Manchester line coding. In Manchester coding, since each pre-coding bit is encoded into two bits, the two bits are 01 or 10. That is, the two bits have a transition from 0 to 1 or from 1 to 0, the longest continuous level that may appear in the data part can be determined to be 2*t1. If the data is not line coded, In the case of channel coding, multiple consecutive 0s or 1s may appear, and it is impossible to determine the longest continuous level that may appear in the data part.

The second part is represented by one bit. The duration of each bit in the first part and the third part is t1. The duration of one bit represents the duration of one line-coded bit being sent over the air interface. The second part is represented by one bit, which can be understood as the second part sending bits 0 or 1 during the transmission time of the air interface. For example, the second part is represented by bit 0, the duration of the second part is t3, and bit 0 is mapped to -1 over the air interface. Then the first device sends -1 during the duration of the second part. For example, t3=K*t1, K is a positive integer, the second part is represented by K bits, but these K bits are all 0 or all 1. In this case, the second part is also considered to be represented by one bit.

In the bit sequence consisting of the last two bits of the first part, the entire second part and the first two bits of the third part, the longest continuous bit 0 or continuous bit 1 duration is t2, t2>2×t1, and the longest continuous bit 0 or continuous bit 1 includes the second part. Figure 7 shows the duration of continuous 0 or 1 of the bit stream after the data is line coded. Taking Manchester line coding as an example, Figure 7 shows all 2 consecutive data bits, 4 Manchester coded bits, and possible encoded bit combinations. For Manchester line coding, the 2 encoded bits after each data bit is encoded are 01 or 10. As shown in Figure 7, the longest bit stream duration of the same continuous 0 or 1 in the encoded bit stream is 2t1. So t2>2×t1. The receiving end, that is, the network device, finds the boundary of t2 in the DMRS through the feature that t2 is the longest continuous level in the received time domain signal, which can be used to determine the time domain position of the DMRS signal. The data format sent at the terminal is known to both the network device and the terminal device. For example, the data format sent by the terminal is [preamble sequence, data 1, DMRS, data 2]. The number of bits of the preamble, data 1, DMRS, and data 2 and their respective positions in the time domain are known to both the network device and the terminal device. [Preamble, data 1, DMRS, data 2] form a frame. The preamble is used to determine the starting position of the frame. The network device determines the starting position of t2 and the starting position of the frame. Using the known number of bits before the starting position of the frame and the starting position of t2, the network device can calculate the time domain length of each encoded bit of the terminal device. The network device can estimate the impact of the sampling clock deviation on the bit length by comparing the calculated terminal device bit length with the network device's own bit length. The network device uses the characteristics that t2 is the longest continuous level in the received time domain signal and the known value of t2 is 1 or 0. When searching for the t2 boundary, correlation processing can be performed, and the correlation can be improved by 10*log10(t2/2t1)dB. This improves the accuracy of the network device in determining the t2 boundary.

In one example, the first reference signal and the data are included in a frame, and the frame includes a second reference signal. The second reference signal has a similar format to the first reference signal and also includes three parts. In order to distinguish it from the first reference signal, the second reference signal includes a fourth part, a fifth part, and a sixth part, the fourth part is before the fifth part, the fifth part is before the sixth part, the fourth part is adjacent to the fifth part, the fifth part is adjacent to the sixth part, the fourth part and the sixth part are obtained through the line coding, the duration of each bit in the fourth part and the sixth part is t1, the fifth part is represented by one bit, the duration of one bit of the second part is t3, the duration of one bit of the fifth part is t4, and t3≠t4.

In one example, in the bit sequence consisting of the last two bits of the first part, the entire second part, and the first two bits of the third part, the longest duration of consecutive bits 0 or consecutive bits 1 is t2, including:

In the bit sequence consisting of the last bit of the first part, the entire second part and the first bit of the third part, the longest duration of consecutive bits 0 or consecutive bits 1 is t2. The first two bits of the third part are the first two bits of the third part.

The bits of the first part are denoted as w1, the bits of the second part are denoted as w2, and the bits of the third part are denoted as w3. The bit sequence after DMRS line coding is [w1, w2, w3]. Figure 8 shows an example of the generation process of DMRS. In Figure 8, the line coding can be Manchester coding or FM0 coding. The DMRS bit before the first part coding is denoted as X, the DMRS bit before the second part coding is denoted as V, the DMRS bit before the third part coding is denoted as Y, and the DMRS bit before the second part coding is denoted as V, which is 1 bit, which is 0 or 1. X can be a bit sequence, and Y can be a bit sequence, which can be an m sequence, or all 0, all 1, etc. After line coding, X becomes w1; Y becomes w3 after line coding; V becomes w2 after coding, and w2 is a bit. w1, w2, and w3 are connected in parallel and serialized to obtain the DMRS bit sequence [w1 w2 w3], which is then modulated and mapped to the physical resource and sent out as DMRS. The modulation method can be BPSK, ASK, etc. Since the first and third parts are Manchester coded, the last bit of the first part is opposite to the second to last bit; similarly, the first bit of the third part is opposite to the second bit. t2 contains the time of the first and third parts, Compared with the case where it is not included, under the premise of obtaining the same t2, the time domain of the second part of the DMRS is shorter and the DMRS overhead is lower.

In one example, the bits of the second part are associated with the last bit of the first part and the first bit of the third part. The following two examples show how the bits of the second part are associated with the last bit of the first part and the first bit of the third part.

Example 1, the last bit of the first part is opposite to the first bit of the third part, and the duration of the second part is t3>t1. Since the last bit of the first part is opposite to the first bit of the third part, the bit of the second part is the same as the last bit of the first part or the first bit of the third part. When t3>t1, it can be guaranteed that t2>2t1, so that the DMRS and data parts can be distinguished. In Example 1, it can be understood that the bit duration of the second part is associated with the last bit of the first part and the first bit of the third part.

Table 2 shows two cases where the last bit of the first part and the first bit of the third part are opposite.

Table 2 The last bit of the first part is opposite to the first bit of the third part

In case 1 of Table 2, the last bit of w1 is 1, the first bit of w3 is 0, and w2 is 0 and 1 respectively. The schematic diagrams of the three parts of the DMRS are shown in Figures 9a and 9b. In Figure 9a, w2 is 0; in Figure 9b, w2 is 1. And t3>t1.

In case 2 of Table 2, the last bit of w1 is 0, and the first bit of w3 is 1. Schematic diagrams of the three parts of the DMRS when w2 is 0 and 1 are shown in Figures 10a and 10b. In Figure 10a, w2 is 0; in Figure 10b, w2 is 1. And t3>t1.

In Example 1, assume that X is an m-sequence and Y is an m-sequence. X and Y are of equal length and are symmetric sequences. X is [1 0 1], Y is [1 0 1], w1 is [10 01 10], w3 is [10 01 10], the last bit of w1 is 0, the first bit of w3 is 1, and w2 is 1. Figure 10c is a schematic diagram of the three parts of DMRS in this case.

Example 2, the last bit of the first part is the same as the first bit of the third part, and the bit of the second part is the same as the last bit of the first part. The line coding can be Manchester coding or FM 0 coding. Table 3 shows two cases where the last bit of the first part is the same as the first bit of the third part under Manchester coding. The last bit of the first part, the bit of the second part and the first bit of the third part are all the same, which can save DMRS overhead. In Example 2, it can be understood that the bit value of the second part is associated with the last bit of the first part and the first bit of the third part.

The last bit of the first part of Table 3 is the same as the first bit of the third part

In case 1 of Table 3, the last bit of w1 is 1, the first bit of w3 is 1, and the case where w2 is 1 is shown in Figure 11a; in case 1 of Table 3, the last bit of w1 is 0, the first bit of w3 is 0, and the case where w2 is 0 is shown in Figure 11b. As can be seen from Figures 11a and 11b, the last bit of the first part of Example 2 and the first bits of the second and third parts are centrally symmetrical in the waveform. The advantage of this is that t3 can be shorter, and the DMRS occupancy time is lower when the same length of t2 is obtained, reducing the DMRS overhead. As long as t3>0, t2>2*t1 can be satisfied.

Assume X is an m-sequence and Y is an m-sequence. X is [1 0 0 1 1 0 0], Y is [1 0 1], w1 is [10 01 01 10 10 01 01], w3 is [10 01 10], the last bit of w1 is 1, the first bit of w3 is 1, and w2 is 1. Figure 11c shows a schematic diagram of the three parts of DMRS in this case.

In Example 2, the first part is represented by a first bit sequence w1, and the third part is represented by a second bit sequence w3. The first bit sequence w1 and the second bit sequence w3 satisfy the following relationship:

The line coding is Manchester coding, and the second bit sequence w3 is the reverse order of the first bit sequence w1.

For example, X is an m-sequence, X and Y are of equal length, and Y is the inverse of X, that is, 0 is inverse to 1, and 1 is inverse to 0. For example, X is [1 0 1], Y is [0 1 0], w1 is [10 01 10], w3 is [01 10 01], the last bit of w1 is 0, the first bit of w3 is 0, and w2 is 0. Figure 11d shows a schematic diagram of the three parts of DMRS in this case. Since w3 is the reverse order of w1, the impact of side lobes can be reduced and the performance under low signal-to-noise ratio can be improved.

In Example 2, assuming that X is [1 0 0], Y is [1 1 0 0], w1 is [10 01 01], w3 is [10 10 01 01], the last bit of w1 is 1, the first bit of w3 is 1, and w2 is 1. Figure 11e shows a schematic diagram of the three parts of DMRS in this case.

The line coding may also be FM0 coding. The data, the first part and the third part of the DMRS use FM0 line coding. At this time, the line coding in FIG8 is FM0 line coding.

In one example, the bits of the second portion are associated with at least one of the following situations:

The last two bits of the first part; or,

The first two bits of the third part.

For example, the last two bits of the first part are the same, the first two bits of the third part are different, the last bit of the first part is different from the first bit of the third part, and the bit of the second part is the same as the last bit of the first part. As shown in Table 4, in Table 4, the line coding is FM0 coding.

Table 4 Values of w1, w2, w3

Figures 12a and 12b respectively represent the values of w1, w2, and w3 for Case 1 and Case 2 in Table 4. The values of w1, w2, and w3 can be understood as the waveforms of w1, w2, and w3. The bits in the second part are the same as the last two bits in the first part, which can reduce the overhead of DMRS.

In one example, the last two bits of the first part are the same, the first two bits of the third part are different, the last bit of the first part is different from the first bit of the third part, and the bit of the second part is the same as the first bit of the third part. Table 5 shows various values of w1, w2, and w3 in this case. In this case, t3>t1 is required, so that t2>2*t1 can be guaranteed. Figures 12c and 12d are waveforms of w1, w2, and w3 in case 1 and case 2 in Table 5, respectively.

Table 5 Values of w1, w2, w3

In one example, the last two bits of the first part are different, the first two bits of the third part are the same, the last bit of the first part is different from the first bit of the third part, and the bit of the second part is the same as the first bit of the third part. The bit of the second part is the same as the first two bits of the third part, which can reduce the overhead of DMRS.

Table 6 lists various values of w1, w2, and w3 in this case. Figures 12e and 12f are waveforms of w1, w2, and w3 in case 1 and case 2 in Table 6, respectively.

Table 6 Values of w1, w2, w3

Or, the last two bits of the first part are different, the first two bits of the third part are the same, the last bit of the first part is different from the first bit of the third part, and the bits of the second part are the same as the last bit of the first part. In this case, t3 requires t3>t1. Table 7 shows various values of w1, w2, and w3 in this case. Figures 12g and 12h are waveforms of w1, w2, and w3 in case 1 and case 2 in Table 7, respectively.

Table 7 Values of w1, w2, w3

In one example, the line coding is FM0 coding, the last bit of the first part is the same as the first bit of the third part, and the bit of the second part is the same as the last bit of the first part. Tables 8 and 9 show various values of w1, w2, and w3 under the above conditions. Table 8 shows various values of w1, w2, and w3 when the first two bits of w3 are the same. Figures 12i, 12j, 12k, and 12l are waveforms of w1, w2, and w3 in cases 1 to 4 in Table 8, respectively.

Table 8 Values of w1, w2, w3

Table 9 shows various values of w1, w2, and w3 when the first two bits of w3 are different and the last two bits of w1 are the same. Figures 12m and 12n are waveforms of w1, w2, and w3 in case 5 and case 6 in Table 8, respectively.

For the scenarios in Table 8 and Table 9, t3>0.

If the last two bits of w1 are different, the first two bits of w3 are different, and the last bit of w1 is different from the first bit of w3. Since the bits of w2 are either 0 or 1, the bits of w2 are the same as the last bit of w1 or the first bit of w3. In this case, t3>t1 is sufficient.

The terminal device receives signaling indicating a reference signal pattern. The reference signal pattern includes a value of t3. The signaling may be downlink control information (DCI) or radio resource control (RRC) signaling. The reference signal pattern includes the following information:

1. Bit values of w1 and w3. The signaling can directly indicate the bit values of w1 and w3. It can also indirectly indicate the bit values of w1 and w3, such as indicating the bit X and Y before the DMRS line coding and the line coding mode of the first part w1 and the third part w3. If the line coding is FM0, it can also indicate whether the last bit of w1 and the first bit of w3 are flipped. For example, if it indicates flipping and the last bit of w1 is 0, the first bit of w3 is 1.

2. The duration of t3, or the duration of t2. The duration of t3 is the value of t3. Similarly, the duration of t2 is the value of t2.

For example, three DMRS are inserted into a frame, and the frame format is as follows: [data DMRS1 data DMRS2 data DMRS3 data]. The bits before the three DMRS line coding constitute an m-sequence. For example, if the length of the m-sequence is 7, the sequence is: 1 0 0 1 1 0 0, the bits before DMRS1 coding are 10, the bits before DMRS2 coding are 01, and the bits before DMRS3 coding are 100. The formats of these three DMRS are the same as the format of the first reference signal, and all include three parts w1, w2, and w3. Taking Manchester coding as an example, the last bit of DMRS1 w1 is 0, and the first bit of w3 is 0; t3 is t3_1, and the last bit of w1 of DMRS2 is 01. One bit is 1, the first bit of w3 is 1, and t3 is t3_2; the first part of DMRS3 is 10 and the third part is 0101. For the second part, t3 is assumed to be t3_3, and t3_3>0. You can configure t3_1, t3_2, and t3_3 to be different to distinguish the relative position relationship of the three DMRSs. When the time domain position of a DMRS has large interference, you can distinguish which DMRS it is by the different t3 durations of the three DMRSs, and calculate the accurate bit duration.

In another example, two DMRS are inserted into a frame, namely DMRS1 and DMRS2. The first bit of DMRS1 is 1 before encoding, and the third bit is 1 before encoding; the first bit of DMRS2 is 1 before encoding, and the third bit is 0 before encoding. Taking Manchester encoding as an example, the last bit of the first part of DMRS1 is 0, and the first bit of the third part is 1. It is required that t3>t1, the last bit of the first part of DMRS2 is 0, and the first bit of the third part is 0, and t3>0. Considering the reduction of DMRS overhead, t3 in the two DMRS configuration patterns is different.

Fig. 13 is a schematic flow chart of a communication method provided in an embodiment of the present application. Fig. 13 is based on Fig. 6. The similar parts between Fig. 13 and Fig. 6 can refer to the description of Fig. 6.

The following steps are involved:

S1301: The terminal device generates a reference signal and data. The duration of one bit of the reference signal is a non-integer multiple of the duration of one bit of the data.

S1302: The terminal device sends a reference signal and data. The reference signal is recorded as a first reference signal.

The first reference signal includes a first part w1, a second part w2 and a third part w3. The first part is before the second part, and the second part is before the third part. The first part is adjacent to the second part, and the second part is adjacent to the third part. The second part is represented by one bit. The duration of each bit in the first part and the third part is t1.

Neither the data nor the first reference signal is line coded. Figure 14 is a schematic diagram of generating the first reference signal. Since DMRS has no line coding, the terminal device directly generates the first part w1, the second part w2 and the third part w3. Compared with Figure 8, it is equivalent to directly converting X=w1; V=w2; Y=w3 in Figure 8. Then the terminal device performs parallel-to-serial conversion to obtain w1, w2, w3. Finally, the terminal device modulates w1, w2, w3 into symbols for transmission.

The last bit of the first part is the same as the first bit of the third part, the bit of the second part is opposite to the last bit of the first part, and the duration t3 of the second part is not equal to an integer multiple of t1. The definition of t3 refers to the description of FIG6 .

Table 10 shows various values of w1, w2, and w3 in this case. Figures 15a and 15b are waveforms of w1, w2, and w3 in case 1 and case 2 in Table 10, respectively.

Table 10 Values of the last bit of w1, the first bit of w2, and w3

As can be seen from Figures 15a and 15b, the three parts w1, w2, w3 of DMRS include two jumps from 0 to 1 or from 1 to 0. One of the jumps is between w1 and w2, and the other jump is between w2 and w3. DMRS and data are distinguished by the bit duration of w2 being a non-integer multiple of the data bit duration t1. Finding DMRS can estimate SFO by knowing the DMRS position.

The position of the DMRS signal in a frame is known. When there is one DMRS in a frame, the receiver uses the number of bits between the DMRS and the start position of the frame to calculate the time domain length of each encoded bit of the transmitter. When there are multiple DMRS in a frame, the receiver can also use the positional relationship between DMRS and DMRS, that is, the number of bits encoded between DMRS intervals, to calculate the time domain length of each encoded bit of the transmitter. By comparing the bit length of the transmitter with the length of the encoded bit timed by the receiver itself, the impact of the sampling clock deviation on the bit length can be estimated.

The communication device provided in the embodiment of the present application is described in detail below in conjunction with Figures 16 and 17. It should be understood that the description of the device embodiment corresponds to the description of the method embodiment, so the content not described in detail can be referred to the method embodiment above, and some content will not be repeated for the sake of brevity.

In the embodiment of the present application, the transmitting end device or the receiving end device can be divided into functional modules according to the above method example. For example, each functional module can be divided according to each function, or two or more functions can be integrated into one processing module. The above integrated module can be implemented in the form of hardware or in the form of software functional modules. It should be noted that the division of modules in the embodiment of the present application is schematic and is only a logical function division. There may be other division methods in actual implementation. The following is an example of dividing each functional module according to each function.

FIG16 is a schematic block diagram of a device 1600 provided in an embodiment of the present application. The device 1600 includes a transceiver unit 1610, a processing unit 1620, and a storage unit 1630. The transceiver unit 1610 can implement corresponding communication functions, and the transceiver unit 1610 can also be called a communication interface or a communication unit. The processing unit 1620 is used to perform data processing. The storage unit 1630 is used to store instructions and/or data, and the processing unit 1620 can read the instructions and/or data in the storage unit so that the device implements the aforementioned method embodiment.

The device 1600 can be used to execute the actions performed by the devices in the above method embodiments, such as the above-mentioned sending end device (terminal device), receiving end device (network device), etc. In this case, the device 1600 can be a device or a component that can be configured on a device, the transceiver unit 1610 is used to execute the sending and receiving related operations of the device in the above method embodiments, and the processing unit 1620 is used to execute the processing related operations of the device in the above method embodiments.

As a design, the device 1600 is used to execute the actions performed by the sending device in the above method embodiment.

The processing unit 1620 is configured to generate a first reference signal, to generate data, etc.

The transceiver unit 1610 is configured to send a first reference signal, and to send data, etc.

For description of the first reference signal, etc., please refer to the method embodiment.

As a design, the device 1600 is used to execute the actions performed by the receiving device (network device) in the above method embodiment.

The transceiver unit 1610 is used to receive a first reference signal, to receive data, etc.

The processing unit 1620 is used to estimate the channel according to the first reference signal, demodulate the data, etc.

The device 1600 can implement the steps or processes performed by the transmitting end device in the method embodiment according to the embodiment of the present application, and the device 1600 may include a unit for executing the method performed by the transmitting end device in the method embodiment. In addition, each unit in the device 1600 and the above-mentioned other operations and/or functions are respectively for implementing the corresponding processes of the method embodiment in the transmitting end device in the method embodiment.

As shown in FIG17 , the embodiment of the present application further provides a device 1700. The device 1700 includes a processor 1710 and may also include one or more memories 1720.

The processor 1710 is coupled to the memory 1720. The memory 1720 is used to store computer programs or instructions and/or data. The processor 1710 is used to execute the computer programs or instructions and/or data stored in the memory 1720 so that the method in the above method embodiment is executed.

Optionally, as shown in Fig. 17, the device 1700 may further include a transceiver 1730, and the transceiver 1730 is used for receiving and/or sending signals. For example, the processor 1710 is used to control the transceiver 1730 to receive and/or send signals.

Among them, the processor 1710 in Figure 17 can be the processing unit 1620 in Figure 16, realizing the functions of the processing unit 1620, and the operations performed by the processor 1710 can be specifically referred to the above description of the processing unit 1620, which will not be repeated here; the transceiver 1730 in Figure 17 can be the transceiver unit 1610 in Figure 16, realizing the functions of the transceiver unit 1610, and the operations performed by the transceiver 1730 can be specifically referred to the above description of the transceiver unit 1610, which will not be repeated here; the memory 1720 in Figure 17 can be the storage unit 1630 in Figure 16, realizing the functions of the storage unit 1630.

Optionally, the device 1700 includes one or more processors 1710.

Optionally, the memory 1720 may be integrated with the processor 1710 or provided separately.

As a solution, the device 1700 is used to implement the operations performed by the device (such as the above-mentioned receiving device, sending device, etc.) in the above method embodiments.

An embodiment of the present application also provides a computer-readable storage medium on which are stored computer instructions for implementing the method executed by a device (such as the above-mentioned receiving device, sending device, etc.) in the above-mentioned method embodiment.

For example, when the computer program is executed by a computer, the computer can implement the method performed by the transmitting end device in the above method embodiment.

An embodiment of the present application also provides a computer program product including instructions, which, when executed by a computer, enables the computer to implement the method executed by a device (such as the above-mentioned receiving device, sending device, etc.) in the above-mentioned method embodiment.

An embodiment of the present application also provides a communication system, which includes the devices in the above embodiments (such as the above-mentioned receiving end device, sending end device, etc.).

An embodiment of the present application also provides a chip device, including a processing circuit, which is used to call and run a program from a memory, so that a communication device equipped with the chip device can implement the method executed by the device (such as the above-mentioned receiving device, sending device, etc.) in the above-mentioned method embodiment.

The explanation of the relevant contents and beneficial effects of any of the above-mentioned devices can be referred to the corresponding method embodiments provided above, which will not be repeated here.

It should be understood that the processor mentioned in the embodiments of the present application may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc.

It should also be understood that the memory mentioned in the embodiments of the present application may be a volatile memory and/or a non-volatile memory. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM). For example, a RAM may be used as an external cache. By way of example and not limitation, RAM may include the following forms: static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), and direct rambus RAM (DR RAM).

It should be noted that when the processor is a general-purpose processor, DSP, ASIC, FPGA or other programmable logic device, discrete gate or transistor logic device, discrete hardware component, the memory (storage module) can be integrated into the processor.

It should also be noted that the memory described herein is intended to include, but is not limited to, these and any other suitable types of memory.

Those of ordinary skill in the art will appreciate that the units and steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of protection of this application.

In the several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interfaces, devices or units, which may be It can be electrical, mechanical or other forms.

The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to implement the solution provided by the present application.

In addition, each functional unit in each embodiment of the present application may be integrated into one unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. For example, the computer can be a personal computer, a server, or a transmitting terminal device, etc. The computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions can be transmitted from a website site, computer, server or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) mode to another website site, computer, server or data center. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that contains one or more available media integrations. The available medium may be a magnetic medium (e.g., a floppy disk, a hard disk, a magnetic tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid state disk (SSD)). For example, the aforementioned available medium may include, but is not limited to: a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and other media that can store program codes.

The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims (30)

A reference signal sending method, characterized by comprising: Generate a first reference signal and data, wherein the first reference signal is used for demodulation of the data, the first reference signal includes a first part, a second part and a third part, the first part is before the second part, the second part is before the third part, the first part is adjacent to the second part, the second part is adjacent to the third part, the first part, the third part and the data are obtained through line coding, the second part is represented by one bit, the data, each bit duration in the first part and the third part is t1, in the bit sequence consisting of the last two bits of the first part, the whole of the second part and the first two bits of the third part, the longest continuous bit 0 or continuous bit 1 duration is t2, t2>2×t1, the longest continuous bit 0 or continuous bit 1 includes the second part; The first reference signal and the data are transmitted. The method according to claim 1 is characterized in that the first reference signal and the data are included in one frame, the frame includes a second reference signal, the second reference signal includes a fourth part, a fifth part and a sixth part, the fourth part is before the fifth part, the fifth part is before the sixth part, the fourth part is adjacent to the fifth part, the fifth part is adjacent to the sixth part, the fourth part and the sixth part are obtained through line coding, the duration of each bit in the fourth part and the sixth part is t1, the fifth part is represented by one bit, the duration of the second part is t3, the duration of the fifth part is t4, and t3≠t4. The method according to claim 1 or 2, characterized in that, in the bit sequence consisting of the last two bits of the first part, the entirety of the second part and the first two bits of the third part, the longest duration of consecutive bits 0 or consecutive bits 1 is t2, including: In the bit sequence consisting of the last bit of the first part, the entirety of the second part and the first bit of the third part, the longest duration of consecutive bits 0 or consecutive bits 1 is t2. The method according to any one of claims 1 to 3 is characterized in that the bits of the second part are associated with the last bit of the first part and the first bit of the third part. The method according to any one of claim 4, wherein the bits of the second part are associated with the last bit of the first part and the first bit of the third part, comprising: The last bit of the first part is opposite to the first bit of the third part, and the duration t3 of the second part is greater than t1. The method according to any one of claim 4, wherein the bits of the second part are associated with the last bit of the first part and the first bit of the third part, comprising: The last bit of the first part is the same as the first bit of the third part, and the bit of the second part is the same as the last bit of the first part. The method according to claim 1 or 3, characterized in that the bits of the second part are associated with at least one of the following situations: the last two bits of the first part; or, The first two bits of the third part. The method according to any one of claim 7, wherein the last two bits of the first part are the same, the first two bits of the third part are different, the last bit of the first part is different from the first bit of the third part, and the bit of the second part is the same as the last bit of the first part, or, The last two bits of the first part are different, the first two bits of the third part are the same, the last bit of the first part is different from the first bit of the third part, and the bits of the second part are the same as the first bit of the third part. The first bit of the fraction is the same. The method according to any one of claims 1 to 8, characterized in that the first part is represented by a first bit sequence, the third part is represented by a second bit sequence, and the first bit sequence and the second bit sequence satisfy the following relationship: The second bit sequence is the reverse order of the first bit sequence. The method according to any one of claims 1 to 9, characterized in that it comprises: Signaling is received, where the signaling indicates a pattern of the first reference signal. The method according to any one of claim 10, characterized in that The pattern of the first reference signal includes at least one of the following information: a value of duration t3 of one bit of the second part; the value of t2; or, The values of the first and third part bits. A reference signal receiving method, characterized by comprising: Receive a first reference signal and data, wherein the first reference signal is used for demodulation of the data, the first reference signal includes a first part, a second part and a third part, the first part is before the second part, the second part is before the third part, the first part is adjacent to the second part, the second part is adjacent to the third part, the first part, the third part and the data are line-coded bits, the second part is represented by one bit, the data, each bit duration in the first part and the third part is t1, in a bit sequence consisting of the last two bits of the first part, the whole of the second part and the first two bits of the third part, the longest continuous bit 0 or continuous bit 1 duration is t2, t2>2×t1, and the longest continuous bit 0 or continuous bit 1 includes the second part; The data is demodulated according to the first reference signal. The method according to claim 12 is characterized in that the first reference signal and the data are included in one frame, the frame includes a second reference signal, the first reference signal includes a fourth part, a fifth part and a sixth part, the fourth part is before the fifth part, the fifth part is before the sixth part, the fourth part is adjacent to the fifth part, the fifth part is adjacent to the sixth part, the fourth part and the sixth part are obtained through line coding, the duration of each bit in the fourth part and the sixth part is t1, the fifth part is represented by one bit, the duration of one bit of the second part is t3, the duration of the fifth part is t4, and t3≠t4. The method according to claim 12 or 13, characterized in that, in the bit sequence consisting of the last two bits of the first part, the entirety of the second part and the first two bits of the third part, the longest duration of consecutive bits 0 or consecutive bits 1 is t2, including: In the bit sequence consisting of the last bit of the first part, the entirety of the second part and the first bit of the third part, the longest duration of consecutive bits 0 or consecutive bits 1 is t2. The method according to any one of claims 12 to 14, characterized in that the bits of the second part are associated with the last bit of the first part and the first bit of the third part. The method according to any one of claim 15, wherein the bits of the second part are associated with the last bit of the first part and the first bit of the third part, comprising: The last bit of the first part is opposite to the first bit of the third part, and the second part Duration t3>t1. The method according to any one of claim 15, wherein the bits of the second part are associated with the last bit of the first part and the first bit of the third part, comprising: The last bit of the first part is the same as the first bit of the third part, and the bit of the second part is the same as the last bit of the first part. The method according to claim 12 or 14, characterized in that the bits of the second part are associated with at least one of the following situations: the last two bits of the first part; or, The first two bits of the third part. The method according to any one of claim 18, wherein the last two bits of the first part are the same, the first two bits of the third part are different, the last bit of the first part is different from the first bit of the third part, and the bit of the second part is the same as the last bit of the first part, or, The last two bits of the first part are different, the first two bits of the third part are the same, the last bit of the first part is different from the first bit of the third part, and the bit of the second part is the same as the first bit of the third part. The method according to any one of claims 12 to 19, characterized in that the first part is represented by a first bit sequence, the third part is represented by a second bit sequence, and the first bit sequence and the second bit sequence satisfy the following relationship: The second bit sequence is the reverse order of the first bit sequence. The method according to any one of claims 12 to 20, characterized in that it comprises: Sending signaling, where the signaling indicates a pattern of the first reference signal. The method according to any one of claim 21, characterized in that The pattern of the first reference signal includes at least one of the following information: a value of duration t3 of one bit of the second part; the value of t2; or, The values of the first and third part bits. A communication method, characterized by comprising: The first device generates a first reference signal and data, wherein the first reference signal is used for demodulation of the data, the first reference signal includes a first part, a second part and a third part, the first part is before the second part, the second part is before the third part, the first part is adjacent to the second part, the second part is adjacent to the third part, the first part, the third part and the data are obtained through line coding, the second part is represented by one bit, the data, each bit duration in the first part and the third part is t1, in the bit sequence consisting of the last two bits of the first part, the whole of the second part and the first two bits of the third part, the longest continuous bit 0 or continuous bit 1 duration is t2, t2>2×t1, and the longest continuous bit 0 or continuous bit 1 includes the second part; The first device sends the first reference signal and the data to the second device; The second device receives the first reference signal and the data; The second device demodulates the data according to the first reference signal. A communication device, characterized in that it comprises at least one processor, wherein the at least one processor is coupled to at least one memory, and the at least one processor is used to execute a computer program or instruction stored in the at least one memory, so that the communication device performs the method as described in any one of claims 1 to 11. A communication device, characterized in that it comprises at least one processor, wherein the at least one processor is coupled to at least one memory, and the at least one processor is used to execute a computer program or instruction stored in the at least one memory, so that the communication device performs the method as described in any one of claims 12 to 22. A computer-readable storage medium, characterized in that a computer program is stored on the computer-readable storage medium, and when the computer program is run on a computer, the computer is enabled to execute any one of the methods of claims 1 to 11. A computer-readable storage medium, characterized in that a computer program is stored on the computer-readable storage medium, and when the computer program is run on a computer, the computer is enabled to execute the method described in any one of claims 12 to 22. A chip system, characterized in that it includes: a processor, used to call and run a computer program from a memory, so that a communication device equipped with the chip system executes the method described in any one of claims 1 to 11. A chip system, characterized in that it includes: a processor, used to call and run a computer program from a memory, so that a communication device equipped with the chip system executes the method described in any one of claims 12 to 22. A communication system, comprising: a first device and a second device, the first device and the second device communicating with each other; The first device executes the method according to any one of claims 1 to 11, and the second device executes the method according to any one of claims 12 to 22.