WO2024144685A1 - A method for calculating interface temperature - Google Patents
A method for calculating interface temperature Download PDFInfo
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- WO2024144685A1 WO2024144685A1 PCT/TR2023/051699 TR2023051699W WO2024144685A1 WO 2024144685 A1 WO2024144685 A1 WO 2024144685A1 TR 2023051699 W TR2023051699 W TR 2023051699W WO 2024144685 A1 WO2024144685 A1 WO 2024144685A1
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- Prior art keywords
- chip
- integrating
- ultrasonic
- flip
- integration
- Prior art date
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- 238000000034 method Methods 0.000 title claims abstract description 98
- 230000010354 integration Effects 0.000 claims abstract description 57
- 239000000463 material Substances 0.000 claims abstract description 45
- 229910052751 metal Inorganic materials 0.000 claims description 6
- 239000002184 metal Substances 0.000 claims description 6
- 238000010438 heat treatment Methods 0.000 claims description 5
- 238000012546 transfer Methods 0.000 claims description 5
- 238000004364 calculation method Methods 0.000 claims description 4
- 230000015572 biosynthetic process Effects 0.000 claims description 3
- 229910001092 metal group alloy Inorganic materials 0.000 claims description 3
- 238000012935 Averaging Methods 0.000 claims description 2
- 230000000977 initiatory effect Effects 0.000 claims description 2
- 230000003287 optical effect Effects 0.000 claims description 2
- 238000004458 analytical method Methods 0.000 abstract description 3
- 238000004026 adhesive bonding Methods 0.000 description 5
- ALKZAGKDWUSJED-UHFFFAOYSA-N dinuclear copper ion Chemical compound [Cu].[Cu] ALKZAGKDWUSJED-UHFFFAOYSA-N 0.000 description 3
- 238000002844 melting Methods 0.000 description 3
- 230000008018 melting Effects 0.000 description 3
- 239000004593 Epoxy Substances 0.000 description 2
- 238000007906 compression Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910001128 Sn alloy Inorganic materials 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- -1 aluminium metals Chemical class 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- LQBJWKCYZGMFEV-UHFFFAOYSA-N lead tin Chemical compound [Sn].[Pb] LQBJWKCYZGMFEV-UHFFFAOYSA-N 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/802—Applying energy for connecting
- H01L2224/80201—Compression bonding
- H01L2224/80205—Ultrasonic bonding
- H01L2224/80207—Thermosonic bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/808—Bonding techniques
- H01L2224/80894—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces
- H01L2224/80895—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces between electrically conductive surfaces, e.g. copper-copper direct bonding, surface activated bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/80986—Specific sequence of steps, e.g. repetition of manufacturing steps, time sequence
Definitions
- the present invention relates to an analytical method for calculating the interface temperature of an integrating material that provides the bonding between the chips to be integrated together in an ultrasonic reverse chip (flip-chip bonding) integration or ultrasonic wire bonding process carried out at room temperature or at a temperature lower or higher than the room temperature, and for completing the ultrasonic reverse chip (flip-chip bonding) process.
- flip-chip bonding Integration of chips by being inverted relative to each other is known as flip-chip bonding in the literature.
- the reverse chip (flip-chip bonding) integration technique By means of the reverse chip (flip-chip bonding) integration technique, chips produced with different materials or different processes can be interconnected both mechanically and electrically.
- the reverse chip (flip-chip bonding) integration technique is used extensively both in academia and industry. It becomes possible to transfer information between systems made of different materials or different designs by integrating integrated circuits (integrated chip-IC), micro-electromechanical systems (MEMS) and printed circuit boards (PCB) by means of reverse chip (flip-chip bonding) integration techniques.
- the main objectives in the semiconductor industry are to gradually increase the number of functional elements on IC and MEMS chips and also to gradually reduce the area of IC and MEMS chips. These objectives lead to a gradual increase in the functionality of the products and a gradual decrease in their cost. Further functional elements require further electrical connections. Due to this requirement, reverse chip (flip-chip bonding) integration is preferred more than other packaging methods. In the upcoming years, the preference rate of the reverse chip (flip-chip bonding) integration technique will increase even more.
- the temperature values used in the reverse chip (flip-chip bonding) integration technique vary between 150-300°C for TC reverse chip (flip-chip bonding) integration, 150-250°C for TS reverse chip (flip-chip bonding) integration, and 80-200°C for AB reverse chip (flip-chip bonding) integration.
- the temperature value to be used during the process is selected according to the integrating metal or metal alloy or epoxy material used.
- the process times are 1.5-3 minutes for TC reverse chip (flip-chip bonding) integration, 1.5-2.5 minutes for TS reverse chip (flip-chip bonding) integration and 45 seconds-3 hours for AB reverse chip (flip-chip bonding) integration.
- TC reverse chip (flip-chip bonding) integration it is possible to perform the integration process without the use of heat and the total process time is less than 1 minute.
- US reverse chip (flip-chip bonding) integration it is possible to perform the integration process without the use of heat and the total process time is less than 1 minute.
- there is no method in the state of art to calculate the interface temperature of the integrating material used to integrate the chips at the room temperature or at temperatures different from room temperature before the process in US reverse chip (flip-chip bonding) integration.
- the Chinese patent document no. CN106206339 discloses an ultrasonic flip-chip bonding method.
- the said invention discloses a micro-copper-cylinder copper-copper direct thermosonic flip-chip bonding method and apparatus.
- the method comprises the steps of aligning microcopper cylinders between an upper chip and a lower chip, and heating the upper chip and the lower chip to the temperature of 60-220°C required for flip-chip bonding; pressing the upper chip on the lower chip; and when a pressure applied to the chip reaches an expected pressure of 10-30MPa, turning on an ultrasonic power supply and outputting high power of 1-6W for 10-200ms; and then increasing the pressure to 20-80MPa and reducing the ultrasonic output power to 1-3W for 100- 200ms, thereby finishing inter-micro-copper-cylinder copper-copper direct thermosonic flip-chip bonding of the upper and lower chips.
- the inter- micro-copper-cylinder copper-copper direct thermosonic flip-chip bonding method and apparatus the formation of a bonding interface microstructure and the strength and reliability after bonding can be ensured.
- Figure l is a flow chart related to the inventive method.
- Tinterface T proC ess + AT by summing the temperature (T prO cess) used in the process and the delta temperature (AT) (107); placing the chips to be integrated together into the reverse chip (flip-chip bonding) integration device after the calculations (108); aligning the chips relative to each other with the help of optical systems in a flip-chip bonding integration device (109); performing the alignment process with reference to the integrating material and the bonding pad where they will be bonded (110); contacting the chips with each other in such a way that the joints with the integrating material are in contact with each other (111); starting to apply force until the set force value is reached (112); initiating the vibration movement at the set ultrasonic power and frequency when the desired force value is reached (113); localised heating, without the need to heat all the mass of the chip, due to friction caused by vibration on the surfaces of the integrating materials in contact with the joints (114); formation of metallic bonds under the influence of heat and force (115); continuing the ultras
- the interface temperature of the reverse chip (flip-chip bonding) process can be calculated at room temperature, even at temperatures below room temperature, which is mentioned in the literature but no calculation technique is available.
- the interface temperature calculated by the method (100) and the deformation models known in the literature the amount of material deformation of the integrating materials during the process can also be calculated.
- the interface temperature can be calculated and the amount of material deformation that will occur during wire bonding can be calculated based on the interface temperature.
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Abstract
The present invention relates to an analytical method (100) for calculating the interface temperature of an integrating material that provides the bonding between the chips to be integrated together in an ultrasonic reverse chip (flip-chip bonding) integration or ultrasonic wire bonding process carried out at room temperature or at a temperature lower or higher than the room temperature, and for completing the ultrasonic reverse chip (flip-chip bonding) process.
Description
DESCRIPTION
A METHOD FOR CALCULATING INTERFACE TEMPERATURE
Technical Field
The present invention relates to an analytical method for calculating the interface temperature of an integrating material that provides the bonding between the chips to be integrated together in an ultrasonic reverse chip (flip-chip bonding) integration or ultrasonic wire bonding process carried out at room temperature or at a temperature lower or higher than the room temperature, and for completing the ultrasonic reverse chip (flip-chip bonding) process.
Background of the Invention
Integration of chips by being inverted relative to each other is known as flip-chip bonding in the literature. By means of the reverse chip (flip-chip bonding) integration technique, chips produced with different materials or different processes can be interconnected both mechanically and electrically. Today, the reverse chip (flip-chip bonding) integration technique is used extensively both in academia and industry. It becomes possible to transfer information between systems made of different materials or different designs by integrating integrated circuits (integrated chip-IC), micro-electromechanical systems (MEMS) and printed circuit boards (PCB) by means of reverse chip (flip-chip bonding) integration techniques.
There are four main groups of reverse chip (flip-chip bonding) techniques: namely, thermo-compression (TC), thermo-sonic (TS), ultrasonic (US) and adhesive bonding (AB). In the thermo-compression reverse chip (flip-chip bonding) technique, temperature and pressure are applied to provide the integration of chips. Ultrasonic energy, temperature and pressure are applied to provide the integration of chips in the thermo-sonic reverse chip (flip-chip bonding) technique. In the
ultrasonic reverse chip (flip-chip bonding) technique, ultrasonic energy and pressure are used to integrate chips. The TC reverse chip method uses gold, indium and lead-tin alloys; whereas the TS and US reverse chip methods mostly use gold, copper or aluminium metals as integrating elements between the chips. In the adhesive bonding reverse chip (flip-chip bonding) technique, integration of chips is achieved by the temperature and pressure applied to an electrically conductive epoxy material with an adhesive characteristic.
The main objectives in the semiconductor industry are to gradually increase the number of functional elements on IC and MEMS chips and also to gradually reduce the area of IC and MEMS chips. These objectives lead to a gradual increase in the functionality of the products and a gradual decrease in their cost. Further functional elements require further electrical connections. Due to this requirement, reverse chip (flip-chip bonding) integration is preferred more than other packaging methods. In the upcoming years, the preference rate of the reverse chip (flip-chip bonding) integration technique will increase even more.
Certain IC and MEMS chips used in the semiconductor industry cannot withstand the temperatures used during the integration by flip-chip bonding process. Even if integration of reverse chip (flip-chip bonding) is performed by means of IC and MEMS chips that are not resistant to temperature, it is quite likely that the chips will be damaged, lose some of their functions and their lifetime will be less than expected after the flip-chip bonding integration. The temperature values used in the reverse chip (flip-chip bonding) integration technique vary between 150-300°C for TC reverse chip (flip-chip bonding) integration, 150-250°C for TS reverse chip (flip-chip bonding) integration, and 80-200°C for AB reverse chip (flip-chip bonding) integration. The temperature value to be used during the process is selected according to the integrating metal or metal alloy or epoxy material used. In addition, since the temperature is raised to the selected value during integration process and reduced back to the room temperature after integration, the process times are 1.5-3 minutes for TC reverse chip (flip-chip bonding) integration, 1.5-2.5
minutes for TS reverse chip (flip-chip bonding) integration and 45 seconds-3 hours for AB reverse chip (flip-chip bonding) integration. In US reverse chip (flip-chip bonding) integration, it is possible to perform the integration process without the use of heat and the total process time is less than 1 minute. However, there is no method in the state of art to calculate the interface temperature of the integrating material used to integrate the chips at the room temperature or at temperatures different from room temperature before the process, in US reverse chip (flip-chip bonding) integration.
Therefore, there is a need for a method which facilitates the interconnection of chips by calculating the required interface temperature of the integrator materials used to interconnect the chips.
The Chinese patent document no. CN106206339, an application included in the state of the art, discloses an ultrasonic flip-chip bonding method. The said invention discloses a micro-copper-cylinder copper-copper direct thermosonic flip-chip bonding method and apparatus. The method comprises the steps of aligning microcopper cylinders between an upper chip and a lower chip, and heating the upper chip and the lower chip to the temperature of 60-220°C required for flip-chip bonding; pressing the upper chip on the lower chip; and when a pressure applied to the chip reaches an expected pressure of 10-30MPa, turning on an ultrasonic power supply and outputting high power of 1-6W for 10-200ms; and then increasing the pressure to 20-80MPa and reducing the ultrasonic output power to 1-3W for 100- 200ms, thereby finishing inter-micro-copper-cylinder copper-copper direct thermosonic flip-chip bonding of the upper and lower chips. According to the inter- micro-copper-cylinder copper-copper direct thermosonic flip-chip bonding method and apparatus, the formation of a bonding interface microstructure and the strength and reliability after bonding can be ensured.
Summary of the Invention
An objective of the present invention is to realize an analytical method for calculating the interface temperature of an integrating material that provides the bonding between the chips to be integrated together in an ultrasonic reverse chip (flip-chip bonding) integration or ultrasonic wire bonding process carried out at room temperature or at a temperature lower or higher than the room temperature, and for completing the ultrasonic reverse chip (flip-chip bonding) process.
Detailed Description of the Invention
“A Method for Calculating Interface Temperature” realized to fulfil the objective of the present invention is shown in the figure attached, in which:
Figure l is a flow chart related to the inventive method.
The components illustrated in the figure are individually numbered, where the numbers refer to the following:
100. Method
The inventive method (100) for calculating the interface temperature of an integrating material that provides the bonding between the chips to be integrated together in an ultrasonic reverse chip (flip-chip bonding) integration or ultrasonic wire bonding process carried out at room temperature or at a temperature lower or higher than the room temperature, and for completing the ultrasonic reverse chip (flip-chip bonding) process; comprises steps of measuring and averaging the height (h) and diameter (R=2r) of each integrating material assuming that an integrating material produced by any method between at least two chips intended to be serially integrated with each other has a cylindrical shape (101);
calculating the average volume for the integrating material with the formula v=(Kr2(pm2)h(pm))e-18(m3/pm3) (v=integrating material volume, m=integrating material mass) (102); calculating the average mass by taking into account the mass (p) of the integrating materials with the formula m(kg)=p(kg/m3)*v(m3) (103); calculating the total mass value according to the number of integrating materials used with the formula M(kg)=m(kg)*N (N=number of integrating materials) (104); determining the ultrasonic energy (Q) by multiplying the ultrasonic power (P) and ultrasonic time (t) to be used during the reverse chip (flip-chip bonding) integration process and taking 2% of the ultrasonic energy applied to the chip since 2% of the ultrasonic energy applied to the chip reaches the integration interface, i.e. Q(J)=P(W)t(s)*0.02 (105); calculating the delta temperature as (AT) as Q(J)=M(kg)*c(J/kg°C)*AT(°C) by dividing the ultrasonic energy reaching the interface by the total mass value and the specific heat value (c) of the integrating material (106);
- calculating the interface temperature (Tinterface) as Tinterface = TproCess + AT by summing the temperature (TprOcess) used in the process and the delta temperature (AT) (107); placing the chips to be integrated together into the reverse chip (flip-chip bonding) integration device after the calculations (108); aligning the chips relative to each other with the help of optical systems in a flip-chip bonding integration device (109); performing the alignment process with reference to the integrating material and the bonding pad where they will be bonded (110); contacting the chips with each other in such a way that the joints with the integrating material are in contact with each other (111); starting to apply force until the set force value is reached (112); initiating the vibration movement at the set ultrasonic power and frequency when the desired force value is reached (113);
localised heating, without the need to heat all the mass of the chip, due to friction caused by vibration on the surfaces of the integrating materials in contact with the joints (114); formation of metallic bonds under the influence of heat and force (115); continuing the ultrasonic power delivery during the set ultrasonic energy transfer time (116);
- terminating the vibratory motion when the ultrasonic energy transfer time is completed (117);
-integrating the materials deformed by ultrasonic vibration form a metallic bond with the joints and permanently integrate the chips (118); and obtaining integrated chips by interrupting the previously applied mechanical force and completing the reverse chip (flip-chip bonding) integration process (119).
The integrating material used in the inventive method (100) is a metal or metal alloy.
With the inventive method (100), even if coefficients of thermal expansions (CTEs) of the chips to be connected to each other are different from each other (i.e., even if the chips are made of different materials), after the ultrasonic flip-chip bonding integration processes that are performed while the temperatures of the chips to be joined are at room temperature, there is only minimal amount of residual stress in the interface connection elements caused by different thermal expansion coefficients of the connected chips. Furthermore, the inventive method (100) can be applied to bonding processes which are not carried out at room temperature, but at a common temperature, at which the chips will be continuously present during operation.
The temperature is increased to pre-set values in the process of thermo-sonic reverse chip (flip-chip bonding) processing. Since it takes longer time to increase the temperature compared to other parameters, the total process time is longer. As the
process is also carried out at room temperature in the said method (100), there is no need to increase the temperature and the total process time is shorter.
In the inventive method (100), instead of heating the chips to be integrated with each other, i.e. IC and MEMS chips, by increasing their temperatures; only the surface to be integrated locally is deliberately raised to the desired temperature and the integration process is completed by forming a metallic bond between the electrically conductive connecting elements at the desired local temperature. In this way, i.e. by controlling the temperature of the metallic bond interface, it becomes possible to carry out the reverse chip (flip-chip bonding) integration process even when IC and MEMS chips are at room temperature. This enables the integration of IC and MEMS chips that are not resistant to temperature and the integration of other IC and MEMS chips without temperature damage. In addition, since there are no heating and cooling steps during the reverse chip integration at room temperature with the said method (100), the total integration time is in the range of 6 to 30 seconds. Thereby, the total reverse chip integration process time, process cost and energy consumption are reduced and the reverse chip integration process is made a more environmentally friendly process.
The inventive method (100) analytically calculates the interfacial temperature generated by the vibration movements at ultrasonic frequency between the surfaces of the integrating materials and the bonding pads in contact. By means of the method (100), the process time and the probability of success of reverse chip (flipchip bonding) integration can be predicted by means of the interface temperature calculation made before the ultrasonic reverse chip (flip-chip bonding) process. During experiments with the said method (100), it has been observed more than 40 times that successful reverse chip integration process can be carried out by increasing the interfacial temperature to 50%-65% of the melting temperature. When the interfacial temperature is increased above 65% of the melting temperature of the metal, the integration quality starts to decrease due to excessive deformation of the integrating materials. It was observed that some elements could not be
integrated when the interfacial temperature was less than 50% of the melting temperature of the metal. In addition, thanks to the interfacial temperature calculated by method (100), the interface temperature of the reverse chip (flip-chip bonding) process can be calculated at room temperature, even at temperatures below room temperature, which is mentioned in the literature but no calculation technique is available. On the other hand, by using the interface temperature calculated by the method (100) and the deformation models known in the literature, the amount of material deformation of the integrating materials during the process can also be calculated. For the process known as wire bonding in the literature, after setting the process parameters and the desired temperature, the interface temperature can be calculated and the amount of material deformation that will occur during wire bonding can be calculated based on the interface temperature.
The said method (100) makes it possible to calculate the interfacial temperature analytically and to adjust the reverse chip integration process parameters according to the desired temperature. With the method (100), it is possible to process at room temperature. Processing at room temperature saves energy and time. In addition, it is possible to integrate IC and MEMS chips that are not resistant to temperature. IC and MEMS chips that are partially resistant to temperature can be made to last longer after integration. By saving time, more reverse chip integration processes can be completed in the same unit time during mass production and the cost can be reduced. By saving energy, the cost can be reduced and the reverse chip integration process can be a more environmentally friendly process. The said method (100) utilizes an ultrasonic frequency of 50 kHz - 60 kHz at the same level with the prior art. Thus, the method (100) is compatible with currently used reverse chip integration devices (flip chip bonder). It can be used right away both for R&D and for mass production.
Within these basic concepts; it is possible to develop various embodiments of the inventive “Method (100) for Calculating Interface Temperature”; the invention
cannot be limited to examples disclosed herein and it is essentially according to claims.
Claims
1. A method (100) for calculating the interface temperature of an integrating material that provides the bonding between the chips to be integrated together in an ultrasonic reverse chip (flip-chip bonding) integration or ultrasonic wire bonding process carried out at room temperature or at a temperature lower or higher than the room temperature, and for completing the ultrasonic reverse chip (flip-chip bonding) process; characterized in that it comprises steps of measuring and averaging the height (h) and diameter (R=2r) of each integrating material assuming that an integrating material produced by any method between at least two chips intended to be serially integrated with each other has a cylindrical shape (101); calculating the average volume for the integrating material with the formula v=(Kr2(pm2)h(pm))e-18(m3/pm3) (v=integrating material volume, m=integrating material mass) (102); calculating the average mass by taking into account the mass (p) of the integrating materials with the formula m(kg)=p(kg/m3)*v(m3) (103); calculating the total mass value according to the number of integrating materials used with the formula M(kg)=m(kg)*N (N=number of integrating materials) (104); determining the ultrasonic energy (Q) by multiplying the ultrasonic power (P) and ultrasonic time (t) to be used during the reverse chip (flip-chip bonding) integration process and taking 2% of the ultrasonic energy applied to the chip since 2% of the ultrasonic energy applied to the chip reaches the integration interface, i.e. Q(J)=P(W)t(s)*0.02 (105); calculating the delta temperature as (AT) as Q(J)=M(kg)*c(J/kg°C)*AT(°C) by dividing the ultrasonic energy reaching the interface by the total mass value and the specific heat value (c) of the integrating material (106);
- calculating the interface temperature (Tinterface) as Tinterface = TproCess + AT by summing the temperature (TprOcess) used in the process and the delta temperature (AT) (107);
placing the chips to be integrated together into the reverse chip (flip-chip bonding) integration device after the calculations (108); aligning the chips relative to each other with the help of optical systems in a flip-chip bonding integration device (109); performing the alignment process with reference to the integrating material and the bonding pad where they will be bonded (110); contacting the chips with each other in such a way that the joints with the integrating material are in contact with each other (111); starting to apply force until the set force value is reached (112); initiating the vibration movement at the set ultrasonic power and frequency when the desired force value is reached (113); localised heating, without the need to heat all the mass of the chip, due to friction caused by vibration on the surfaces of the integrating materials in contact with the joints (114); formation of metallic bonds under the influence of heat and force (115); continuing the ultrasonic power delivery during the set ultrasonic energy transfer time (116);
- terminating the vibratory motion when the ultrasonic energy transfer time is completed (117);
-integrating the materials deformed by ultrasonic vibration form a metallic bond with the joints and permanently integrate the chips (118); and obtaining integrated chips by interrupting the previously applied mechanical force and completing the reverse chip (flip-chip bonding) integration process (119).
2. A method (100) according to Claim 1, characterized in that the integration material is a metal or metal alloy.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TR2022/020932 TR2022020932A1 (en) | 2022-12-28 | A METHOD OF CALCULATION OF INTERFACE TEMPERATURE | |
| TR2022020932 | 2022-12-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2024144685A1 true WO2024144685A1 (en) | 2024-07-04 |
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ID=91719067
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/TR2023/051699 WO2024144685A1 (en) | 2022-12-28 | 2023-12-26 | A method for calculating interface temperature |
Country Status (1)
| Country | Link |
|---|---|
| WO (1) | WO2024144685A1 (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0953207A1 (en) * | 1997-01-16 | 1999-11-03 | Ford Motor Company | Method for doping metallic connecting wire |
| CN101075569A (en) * | 2006-05-18 | 2007-11-21 | 中南大学 | Method for loading bonding parameter |
| CN106206339A (en) * | 2016-07-12 | 2016-12-07 | 中南大学 | A kind of micro-the hottest ultrasonic back bonding method of copper intercolumniation copper copper and device thereof |
-
2023
- 2023-12-26 WO PCT/TR2023/051699 patent/WO2024144685A1/en unknown
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0953207A1 (en) * | 1997-01-16 | 1999-11-03 | Ford Motor Company | Method for doping metallic connecting wire |
| CN101075569A (en) * | 2006-05-18 | 2007-11-21 | 中南大学 | Method for loading bonding parameter |
| CN106206339A (en) * | 2016-07-12 | 2016-12-07 | 中南大学 | A kind of micro-the hottest ultrasonic back bonding method of copper intercolumniation copper copper and device thereof |
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