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WO2024087230A1 - 发光器件及其制备方法、显示基板 - Google Patents

发光器件及其制备方法、显示基板 Download PDF

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Publication number
WO2024087230A1
WO2024087230A1 PCT/CN2022/128442 CN2022128442W WO2024087230A1 WO 2024087230 A1 WO2024087230 A1 WO 2024087230A1 CN 2022128442 W CN2022128442 W CN 2022128442W WO 2024087230 A1 WO2024087230 A1 WO 2024087230A1
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WIPO (PCT)
Prior art keywords
electron transport
light
layer
sublayer
transport sublayer
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PCT/CN2022/128442
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English (en)
French (fr)
Inventor
李东
Original Assignee
京东方科技集团股份有限公司
北京京东方技术开发有限公司
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Application filed by 京东方科技集团股份有限公司, 北京京东方技术开发有限公司 filed Critical 京东方科技集团股份有限公司
Priority to CN202280003903.8A priority Critical patent/CN118382939A/zh
Priority to PCT/CN2022/128442 priority patent/WO2024087230A1/zh
Publication of WO2024087230A1 publication Critical patent/WO2024087230A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/16—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous

Definitions

  • the present disclosure relates to the field of display technology, and in particular to a light-emitting device and a preparation method thereof, and a display substrate.
  • Quantum dot light emitting diodes have the advantages of high color gamut, self-luminescence, low starting voltage, and fast response speed, so they have received widespread attention in the display field.
  • the working principle of the substrate of quantum dot light emitting diode devices is: electrons and holes are injected into both sides of the quantum dot light emitting layer respectively, and these electrons and holes are combined in the quantum dot light emitting layer to form photons, and finally emit light through photons.
  • a light-emitting device comprising: a first electrode, an electron transport layer, a light-emitting layer, a hole transport layer and a second electrode which are stacked in sequence;
  • the electron transport layer comprises at least one electron transport sublayer, and among the at least one electron transport sublayer, the electron transport sublayer closest to the light-emitting layer is a C-axis oriented electron transport sublayer; wherein the C-axis orientation is a direction perpendicular to the plane where the light-emitting layer is located, and in the C-axis oriented electron transport sublayer, along the direction perpendicular to the plane where the light-emitting layer is located, the number of grains that do not overlap with adjacent grains accounts for more than 85% of the total number of grains.
  • the number of grains whose spacing with adjacent grains is smaller than the size of the grains themselves accounts for more than 50% of the total number of grains, wherein the first direction is parallel to the plane where the light-emitting layer is located.
  • the electron transport layer is composed of a layer of the electron transport sublayer, the electron transport sublayer is a C-axis oriented electron transport sublayer, and the film thickness of the C-axis oriented electron transport sublayer is 30 nm to 90 nm.
  • the electron transport layer is composed of two electron transport sublayers, among which the electron transport sublayer close to the light-emitting layer is set as a C-axis oriented electron transport sublayer, and the electron transport sublayer away from the light-emitting layer is a non-C-axis oriented electron transport sublayer; the film thickness of each electron transport sublayer in the electron transport sublayer is 15nm to 40nm.
  • the electron transport layer includes at least three electron transport sublayers; among the at least three electron transport layers, the electron transport sublayer closest to the light-emitting layer is a C-axis oriented electron transport sublayer; the electron transport sublayer closest to the first electrode is a C-axis oriented electron transport sublayer or a non-C-axis oriented electron transport sublayer; the electron transport sublayer arranged between the electron transport sublayer closest to the light-emitting layer and the electron transport sublayer closest to the first electrode is a non-C-axis oriented electron transport sublayer.
  • the electron transport layer is composed of three transport sublayers, and the film thickness of each electron transport sublayer in the electron transport layer is 10 nm to 30 nm.
  • the ratio of the thickness of the electron transport sublayer in the middle to the total thickness of the electron transport layer is in the range of 0.25 to 0.35.
  • the electron transport sublayer closest to the first electrode is a C-axis oriented electron transport sublayer; the C-axis oriented electron transport sublayer closest to the light-emitting layer has a greater degree of C-axis orientation than the C-axis oriented electron transport sublayer closest to the first electrode.
  • the same atoms included in the material of each of the electron transport sublayers are oxygen atoms and zinc atoms.
  • the electron transport layer includes at least two electron transport sublayers, and the oxygen vacancy ratio of the electron transport sublayer closest to the light-emitting layer is lower than that of other electron transport sublayers.
  • the oxygen vacancies in the electron transport sublayer closest to the light emitting layer account for 5% to 25% less than the oxygen vacancies in other electron transport sublayers.
  • the LUMO energy level of the electron transport sublayer closest to the light-emitting layer is closer to the LUMO energy level of the light-emitting layer than the LUMO energy levels of other electron transport sublayers.
  • the electron transport layer includes three electron transport layers, and the electron transport sublayer in the middle position includes doping atoms and organic polymer materials, the doping atoms include at least one of magnesium and gallium, and the organic polymer material includes boron nitride.
  • the conduction band energy level of the electron transport sublayer containing dopant atoms is shallower than the conduction band energy level of the electron transport sublayer not containing dopant atoms.
  • the material of the electron transport layer is at least one of inorganic materials, and no ligand material is provided in each electron transport sublayer in the electron transport layer.
  • an intermediate layer is provided between the light-emitting layer and the electron transport sublayer closest to the light-emitting layer, the material of the intermediate layer is organic matter or high molecular polymer, and the material of the intermediate layer is filled in the pores between adjacent grains of the electron transport sublayer closest to the light-emitting layer.
  • the light-emitting device is an inverted structure, and the surface roughness of each electron transport sublayer in the electron transport layer away from the first electrode is 0.5nm ⁇ 2nm; or, the light-emitting device is an upright structure, and the surface roughness of each electron transport sublayer in the electron transport layer away from the second electrode is 0.5nm ⁇ 2nm.
  • a method for preparing a light-emitting device comprising: forming a first electrode; forming an electron transport layer on the first electrode; forming a light-emitting layer on the electron transport layer; forming a hole transport layer on the light-emitting layer; forming a second electrode on the hole transport layer; or forming a second electrode; forming a hole transport layer on the second electrode; forming a light-emitting layer on the hole transport layer; forming an electron transport layer on the light-emitting layer; forming a first electrode on the electron transport layer; wherein the electron transport layer comprises at least one electron transport sublayer, and among the at least one electron transport sublayer, the electron transport sublayer closest to the light-emitting layer is a C-axis oriented electron transport layer, wherein the C-axis orientation is a direction perpendicular to the plane where the light-emitting layer is located, and in the C-axis oriented electron transport sublayer, the number of grains that do
  • the step of forming the electron transport layer on the side closest to the light-emitting layer includes: forming the C-axis oriented electron transport sublayer by a magnetron sputtering process.
  • the light-emitting layer, the first electrode or the formed electron transport sublayer are all substrates for forming an electron transport sublayer in the next step, and forming a non-C-axis oriented electron transport sublayer on the substrate comprises: using a magnetron sputtering process, when the temperature of the substrate is a third temperature, depositing a material of the electron transport sublayer on the substrate to form a non-C-axis oriented electron transport sublayer; wherein the third temperature condition is a substrate temperature that can cause the material to form a non-C-axis oriented substrate; wherein the forming of the C-axis oriented electron transport sublayer on the substrate comprises: using a magnetron sputtering process, when the temperature of the substrate is At the first temperature or the second temperature, the material of the electron transport sublayer is deposited on the substrate to form a C-axis oriented electron transport sublayer; wherein the first temperature is a substrate temperature that can make the material form a C-axis orientation; or, using
  • the light-emitting layer, the first electrode or the formed electron transport sublayer are all substrates for forming an electron transport sublayer in the next step, and a non-C-axis oriented electron transport sublayer is formed on the substrate, which also includes: using a magnetron sputtering process to deposit the material of the electron transport sublayer on the substrate at a first sputtering power to form a non-C-axis oriented electron transport sublayer; wherein the first sputtering power is a sputtering power that can make the material form a non-C-axis orientation; wherein the C-axis oriented electron transport sublayer is formed on the substrate, including: using a magnetron sputtering process to deposit the material of the electron transport sublayer on the substrate at a second sputtering power to form a C-axis oriented electron transport sublayer; wherein the second sputtering power is a sputtering power that can make the material form a C-axis orientation
  • a display substrate comprising a plurality of light-emitting devices as described in any one of the above embodiments.
  • the display substrate further includes: a substrate and a pixel defining layer arranged on one side of the substrate, the pixel defining layer including a plurality of openings; the first electrodes of the plurality of light-emitting devices are located between the substrate and the pixel defining layer, each opening exposes at least a portion of the first electrode of a light-emitting device, the electron transport layer, the light-emitting layer, the hole transport layer and the second electrode of the light-emitting device are sequentially stacked on the first electrode and located in the opening; wherein the electron transport layer of the light-emitting device is located in the opening, and the electron transport layers of the plurality of light-emitting devices are not in contact with each other; or, the display substrate includes an electron transport film layer arranged on the pixel defining layer and the first electrodes of the plurality of light-emitting devices away from the side of the substrate, the portion of the electron transport film layer located in the plurality of openings is the electron transport layer of the plurality of
  • the display substrate further includes: a substrate and a pixel defining layer arranged on one side of the substrate, the pixel defining layer including a plurality of openings; the second electrodes of the plurality of light-emitting devices are located between the substrate and the pixel defining layer, each opening exposes at least a portion of the second electrode of a light-emitting device, the hole transport layer, the light-emitting layer, the electron transport layer and the first electrode of the light-emitting device are sequentially stacked on the second electrode and located in the opening; wherein the electron transport layer of the light-emitting device is located in the opening, and the electron transport layers of the plurality of light-emitting devices are not in contact with each other; or, the display substrate includes an electron transport film layer arranged on the pixel defining layer and the light-emitting layers of the plurality of light-emitting devices away from the side of the substrate, the portion of the electron transport film layer located in the plurality of openings is the electron transport layer of the
  • FIG1A is a structural diagram of a light emitting device provided by the present disclosure according to some embodiments in an upright position
  • FIG1B is a structural diagram of another inverted light emitting device provided by the present disclosure according to some embodiments.
  • FIG1C is a structural diagram of another upright light emitting device provided by the present disclosure according to some embodiments.
  • FIG1D is a structural diagram of an inverted light emitting device provided by another embodiment of the present disclosure.
  • FIG2A is a diagram showing XRD test results of an amorphous electron transport layer according to some embodiments of the present disclosure
  • FIG2B is a diagram showing XRD test results of a C-axis oriented electron transport sublayer according to some embodiments of the present disclosure
  • FIG2C is an AFM test result diagram of a C-axis-oriented electron transport sublayer according to some embodiments of the present disclosure
  • FIG2D is an AFM test result diagram of a C-axis-oriented electron transport sublayer according to some embodiments of the present disclosure
  • FIG2E is an AFM test result diagram of a C-axis-oriented electron transport sublayer according to some embodiments of the present disclosure.
  • FIG2F is an AFM test result diagram of a C-axis-oriented electron transport sublayer according to some embodiments of the present disclosure.
  • FIG3A is a cross-sectional view of a C-axis-oriented sputtered electron transport layer thin film according to some embodiments of the present disclosure
  • 3B is a cross-sectional view of a C-axis-oriented electrochemically deposited electron transport layer thin film according to some embodiments of the present disclosure
  • FIG4A is a structural diagram of an inverted light emitting device provided by the present disclosure according to some embodiments.
  • FIG4B is a structural diagram of a light emitting device provided by the present disclosure according to some embodiments in an upright position
  • FIG5A is a structural diagram of another inverted light emitting device provided by the present disclosure according to some embodiments.
  • FIG5B is a structural diagram of another light emitting device provided by the present disclosure according to some embodiments in an upright position
  • FIG6A is a structural diagram of an inverted light emitting device provided by another embodiment of the present disclosure.
  • FIG6B is a structural diagram of another light emitting device provided by the present disclosure according to some embodiments in an upright position
  • FIG7 is a structural diagram of an inverted light emitting device provided by another embodiment of the present disclosure.
  • FIG8A is a graph showing a current density versus voltage variation curve of a light emitting device provided by some embodiments of the present disclosure
  • FIG8B is a graph showing a current efficiency versus voltage variation curve of a light emitting device provided by some embodiments of the present disclosure.
  • FIG8C is a graph showing a current density versus voltage variation curve of a light emitting device provided by some embodiments of the present disclosure.
  • FIG8D is a graph showing a current efficiency versus voltage variation curve of a light emitting device provided by some embodiments of the present disclosure.
  • FIG9A is another current density versus voltage curve diagram of a light emitting device provided by the present disclosure according to some embodiments.
  • FIG9B is another curve diagram showing the variation of current efficiency with voltage of the light emitting device provided by the present disclosure according to some embodiments.
  • FIG10A is another curve diagram showing a change in current density versus voltage of a light-emitting device provided by some embodiments of the present disclosure
  • FIG10B is a curve diagram showing another variation of current efficiency versus voltage of a light emitting device provided by the present disclosure according to some embodiments.
  • FIG11 is a curve diagram showing another variation of current density with voltage of a light emitting device provided by some embodiments of the present disclosure.
  • FIG12 is a curve diagram showing another variation of current efficiency versus voltage of a light emitting device provided by some embodiments of the present disclosure.
  • FIG13 is a structural diagram of a light emitting device provided according to some embodiments of the present disclosure.
  • FIG14A is another structural diagram of a light emitting device provided according to some embodiments of the present disclosure.
  • FIG14B is another structural diagram of a light emitting device provided by the present disclosure according to some embodiments.
  • FIG15A is a flow chart of a method for preparing a light-emitting device according to some embodiments of the present disclosure
  • FIG15B is a flow chart of a method for preparing a light-emitting device according to some embodiments of the present disclosure
  • FIG16 is another flow chart of a method for preparing a light-emitting device according to some embodiments of the present disclosure.
  • FIG17A is another flow chart of a method for preparing a light-emitting device according to some embodiments of the present disclosure
  • FIG17B is another flow chart of a method for preparing a light-emitting device according to some embodiments of the present disclosure.
  • FIG18 is another flow chart of a method for preparing a light-emitting device according to some embodiments of the present disclosure.
  • FIG19A is another flow chart of a method for preparing a light-emitting device according to some embodiments of the present disclosure.
  • FIG19B is another flow chart of a method for preparing a light-emitting device according to some embodiments of the present disclosure.
  • FIG20 is a structural diagram of a display substrate provided according to some embodiments of the present disclosure.
  • FIG21A is a structural diagram of a display substrate provided by the present disclosure according to some embodiments.
  • FIG21B is a structural diagram of another display substrate provided by the present disclosure according to some embodiments.
  • FIG21C is a structural diagram of another display substrate provided by the present disclosure according to some embodiments.
  • FIG21D is a structural diagram of yet another display substrate provided by the present disclosure according to some embodiments.
  • FIG. 22 is a structural diagram of a display device provided by the present disclosure according to some embodiments.
  • first and second are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features.
  • a feature defined as “first” or “second” may explicitly or implicitly include one or more of the features.
  • plural means two or more.
  • connection can be a fixed connection, a detachable connection, or an integral connection; it can be directly connected or indirectly connected through an intermediate medium.
  • connection can be a fixed connection, a detachable connection, or an integral connection; it can be directly connected or indirectly connected through an intermediate medium.
  • coupled indicates, for example, that two or more components are in direct physical or electrical contact.
  • coupled or “communicatively coupled” may also refer to two or more components that are not in direct contact with each other, but still cooperate or interact with each other.
  • At least one of A, B, and C has the same meaning as “at least one of A, B, or C” and both include the following combinations of A, B, and C: A only, B only, C only, the combination of A and B, the combination of A and C, the combination of B and C, and the combination of A, B, and C.
  • a and/or B includes the following three combinations: A only, B only, and a combination of A and B.
  • the term “if” is optionally interpreted to mean “when” or “upon” or “in response to determining” or “in response to detecting,” depending on the context.
  • the phrases “if it is determined that” or “if [a stated condition or event] is detected” are optionally interpreted to mean “upon determining that” or “in response to determining that” or “upon detecting [a stated condition or event]” or “in response to detecting [a stated condition or event],” depending on the context.
  • parallel includes absolute parallelism and approximate parallelism, wherein the acceptable deviation range of approximate parallelism can be, for example, a deviation within 5°;
  • perpendicular includes absolute perpendicularity and approximate perpendicularity, wherein the acceptable deviation range of approximate perpendicularity can also be, for example, a deviation within 5°.
  • equal includes absolute equality and approximate equality, wherein the acceptable deviation range of approximate equality can be, for example, the difference between the two equalities is less than or equal to 5% of either one.
  • Exemplary embodiments are described herein with reference to cross-sectional views and/or plan views that are idealized exemplary drawings.
  • the thickness of the layers and the area of the regions are exaggerated for clarity. Therefore, variations in shape relative to the drawings due to, for example, manufacturing techniques and/or tolerances are conceivable. Therefore, the exemplary embodiments should not be interpreted as being limited to the shapes of the regions shown herein, but include shape deviations due to, for example, manufacturing. For example, an etched region shown as a rectangle will typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to illustrate the actual shape of the regions of the device, and are not intended to limit the scope of the exemplary embodiments.
  • Quantum dots as a new type of luminescent material, have the advantages of high light color purity, high luminescent quantum efficiency, adjustable luminescent color, and long service life. They are currently a hot research topic for new LED (Light Emitting Diodes) luminescent materials. Therefore, quantum dot light emitting diodes (QLEDs) with quantum dot materials as the luminescent layer have become the main research direction of new display devices.
  • LED Light Emitting Diodes
  • AQLED active electroluminescent quantum dot light emitting diodes
  • OLED Organic light emitting diode
  • AMQLED has also received more and more attention due to its potential advantages in wide color gamut and long life.
  • the efficiency of quantum dots has been continuously improved and has basically reached the level of industrialization. It is of great significance to further adopt new processes and technologies. Due to the characteristics of quantum dot materials themselves, they generally use printing technology or printing methods, which can effectively improve the utilization rate of materials and provide an effective way for large-area preparation. For high-resolution backplanes, due to the small size of the pixel definition area, there are extremely high requirements for the accuracy and stability of the equipment.
  • a photoresist material is coated on a common layer thin film at the bottom of the light-emitting device, and red, green and blue sub-pixel light-emitting layers are prepared respectively by exposure and development, and then a top common layer is deposited.
  • this structure has a serious signal crosstalk problem between different sub-pixels due to the close distance between sub-pixels, which affects the display effect of the device.
  • an inverted device structure is often used, and the bottom layer is an electron transport layer prepared by a sputtering process, which can effectively avoid solution erosion.
  • Lateral current refers to the current in the direction of the plane where the film is located, thereby generating signal crosstalk.
  • some embodiments of the present disclosure provide a light emitting device and a method for manufacturing the same, and a display substrate.
  • the light emitting device 10 can effectively solve the problem of excessive lateral conductivity of the electron transport layer, causing lateral leakage and signal crosstalk.
  • the light-emitting device and its preparation method, and the display substrate provided by the present disclosure are introduced below respectively.
  • the light-emitting device 10 includes: a first electrode 1, an electron transport layer 2, a light-emitting layer 3, a hole transport layer 4, and a second electrode 5, which are stacked in sequence.
  • the electron transport layer 2 includes at least one electron transport sublayer 21, and among the at least one electron transport sublayer 21, the electron transport sublayer 21 closest to the light-emitting layer 3 is a C-axis oriented electron transport sublayer.
  • the C-axis direction is a direction perpendicular to the plane where the light-emitting layer 3 is located.
  • the number of grains whose spacing with adjacent grains is smaller than the size of the grains themselves accounts for more than 50% of the total number of grains, for example, the ratio may be 60%, 70%, 80%, 90% or 95%, wherein the first direction X is parallel to the plane where the light-emitting layer 3 is located.
  • the number of grains that do not overlap with adjacent grains accounts for more than 85% of the total number of grains, for example, the ratio may be 90% or 95%.
  • the light-emitting device 10 can be inverted or upright, the first electrode 1 is the anode, and the second electrode 5 is the cathode, as shown in Figures 1A and 1C.
  • the first electrode 1 is the top electrode
  • the second electrode 5 is the bottom electrode.
  • the stacking method of the light-emitting device 10 is not limited to upright and inverted.
  • the electron transport layer sublayer 21 closest to the side of the light-emitting layer 3 is a C-axis oriented electron transport sublayer.
  • Figure 2A is the XRD test result of the amorphous (i.e., non-C-axis oriented) electron transport layer. There is no obvious characteristic diffraction signal peak in the result, indicating that the amorphous electron transport layer is amorphous as a whole and is isotropic.
  • Figure 2B is the XRD test result of the C-axis oriented electron transport sublayer. The result shows that there is an obvious characteristic diffraction signal peak compared to the amorphous electron transport layer, and this signal represents a 002 crystal plane.
  • the C-axis oriented electron transport sublayer is amorphous as a whole in other directions other than the vertical direction, for example, it is amorphous in the horizontal direction, but has obvious crystallinity in the vertical direction.
  • the vertical direction is the C axis, that is, the direction perpendicular to the plane where the light-emitting layer 3 is located
  • the horizontal direction is the direction parallel to the plane where the light-emitting layer 3 is located.
  • the conductivity of the amorphous electron transport sublayer film in all directions is relatively large, which is on the order of 10 3 to 10 6 ⁇ /cm, taking the nanoparticle-type electron transport layer film as an example, its resistance in all directions is 10 7 to 10 8 ⁇ /cm.
  • the lateral leakage of electrons will also cause signal crosstalk of the light-emitting device.
  • Figures 2C, 2D, 2E and 2F are AFM test result diagrams of the electron transport sublayer oriented in the C axis.
  • the C axis orientation is a direction perpendicular to the plane where the light-emitting layer 3 is located. It can be seen that the electron transport sublayer oriented in the C axis has obvious crystallinity on the C axis, so the electron transport sublayer oriented in the C axis has good conductivity in this direction, and in the horizontal direction, due to the presence of obvious grain boundaries, the conductivity is poor.
  • the horizontal direction here is a direction parallel to the plane where the light-emitting layer 3 is located, and the first direction X is one of the horizontal directions.
  • the conductivity of the C-axis oriented electron transport sublayer in the vertical direction is similar to that of the amorphous electron transport sublayer film, which is about 10 3 to 10 6 ⁇ /cm; while in the horizontal direction, the film conductivity drops sharply, which is about 10 12 to 10 14 ⁇ /cm. It can be seen that in the C-axis oriented electron transport sublayer, the ratio of the conductivity of the 002 crystal plane in the vertical direction to that in the horizontal direction is 10 6 to 10 11.
  • some embodiments of the present disclosure provide a light-emitting device including a C-axis oriented electron transport sublayer disposed on one side of the light-emitting layer, the conductivity of the electron transport sublayer in the direction perpendicular to the plane where the light-emitting layer 3 is located is greater than the conductivity of the electron transport sublayer in the direction parallel to the plane where the light-emitting layer 3 is located, and the ratio of the conductivity of the electron transport sublayer in the direction perpendicular to the plane where the light-emitting layer 3 is located to the conductivity of the electron transport sublayer in the direction parallel to the plane where the light-emitting layer 3 is located is 10 6 to 10 11 . Therefore, electrons are vertically transmitted from the first electrode to the light-emitting layer without leaking to the side, thereby avoiding large electron leakage and crosstalk problems.
  • the electron transport layer 2 is a sputtered electron transport layer, that is, the electron transport layer is formed by a sputtering process.
  • Figure 3A is a cross-sectional view of a C-axis oriented sputtered electron transport layer film
  • Figure 3B is a cross-sectional view of a C-axis oriented electrochemically deposited electron transport layer film, that is, the electron transport layer is made by an electrochemical deposition process.
  • the grains in the C-axis oriented sputtered electron transport layer film in Figure 3A all extend along the C-axis direction, and the spacing between adjacent grains in the first direction X is smaller than the spacing between adjacent grains in the C-axis oriented electrochemically deposited electron transport layer film in Figure 3B, and the alignment of the grains in the C-axis oriented sputtered electron transport layer film in Figure 3A is better than the alignment of the grains in the C-axis oriented electrochemically deposited electron transport layer film in Figure 3B.
  • the sputtered electron transport layer oriented along the C axis has obvious grain boundaries in the first direction X, so that the conductivity in the horizontal direction is lower.
  • a test area with an area of 1 square micron in the electron transport layer oriented along the C axis is selected, and the grain size, i.e., the spacing, in the test area is measured. It can be seen that the spacing d1 of some adjacent grains in the first direction X is smaller than the size D1 of the grain itself in the first direction X, the distance between adjacent grains is closer, the grains are more compact, and the channels are fewer.
  • m/M is greater than 50%, for example, m/M can be 60%, 70%, 80%, 90% or 95%, which can be extended to the entire C-axis oriented electron transport layer, and the ratio of the number of grains whose spacing with adjacent grains is smaller than the size of the grain itself to the total number of grains is greater than 50%. It can be seen that in the C-axis oriented sputtered electron transport layer, the spacing between most adjacent grains is small, which can avoid longitudinal leakage.
  • the film layer has better conductivity in the vertical direction and has fewer leakage paths.
  • the size relationship between the grains in the electron transport layer described above can be reflected in the cross-sectional view of the film layer shown in Figures 2D and 2F and the plan view of the film layer shown in Figures 2C and 2E.
  • the grains of the sputtered electron transport layer have good collimation.
  • a test area with an area of 1 square micron in the C-axis oriented electron transport layer is selected to measure the overlap of the grains in the test area. It can be seen that in the test area, along the direction perpendicular to the plane where the light-emitting layer 3 is located, the number of grains that do not overlap with adjacent grains accounts for more than 85% of the total number of grains in the test area, for example, it can be 90% or 95%. This can be extended to the entire C-axis oriented electron transport layer.
  • the number of grains that do not overlap with adjacent grains accounts for more than 85% of the total number of grains, indicating that the proportion of grains that do not overlap with each other is high, and most of the grains extend along the C axis with a low degree of inclination.
  • the cross-sectional views of the film layers shown in Figures 2D and 2F and the plan views of the film layers shown in Figures 2C and 2E can all reflect the overlapping relationship between the grains described above.
  • the spacing d2 between adjacent grains in the C-axis oriented electrochemically deposited electron transport layer in the first direction X is large, the spacing d2 between adjacent grains in the first direction X is greater than the size D2 of the grain itself in the first direction X, and the number of grains overlapping with adjacent grains in the plurality of grains is greater, the alignment of the grains is lower, and there are more channels in the film layer, so that there may be more leakage paths in the light-emitting device, making the device leakage greater. Therefore, the embodiment of the present disclosure preferably uses the C-axis oriented sputtering electron transport layer film in FIG3A, and the sputtering preparation process is relatively simple.
  • the light-emitting device can be an upright light-emitting device or an inverted light-emitting device.
  • the referenced figures all take the inverted light-emitting device as an example.
  • the structure of the upright light-emitting device can refer to the figures and related introduction of the inverted light-emitting device.
  • the electron transport layer 2 includes an electron transport sublayer
  • the electron transport sublayer 21 is a C-axis oriented electron transport sublayer
  • the film thickness of the C-axis oriented electron transport sublayer is 30 nm to 90 nm.
  • the electron transport layer 2 is composed of an electron transport sublayer 21, and the electron transport sublayer is a C-axis oriented electron transport sublayer, that is, the C-axis oriented electron transport sublayer is located between the first electrode 1 and the light-emitting layer.
  • the C-axis oriented electron transport layer has good conductivity in the vertical direction and poor conductivity in the horizontal direction. Therefore, the setting of the C-axis oriented electron transport layer can also weaken its conductivity in the horizontal direction, thereby inhibiting the side leakage phenomenon of the light-emitting device 10.
  • the thickness of the C-axis oriented electron transport sublayer is 30 nm to 90 nm.
  • the thickness of the C-axis oriented electron transport sublayer is 30 nm, 50 nm, 70 nm or 90 nm, etc.
  • the thickness is not limited.
  • the electron transport layer 2 is composed of two electron transport sublayers 21, among which the electron transport sublayer 21 close to the light-emitting layer 3 is set as a C-axis oriented electron transport sublayer, and the electron transport sublayer 21 away from the light-emitting layer 3 is a non-C-axis oriented electron transport sublayer, and the film thickness of each electron transport sublayer 21 in the electron transport sublayer 21 is 15nm to 40nm.
  • the electron transport layer 2 is composed of two electron transport sublayers 21, wherein the electron transport sublayer 21 (the second electron transport sublayer 210) close to the light-emitting layer 3 is set as a C-axis oriented electron transport sublayer, and the electron transport sublayer 21 (the first electron transport sublayer 211) away from the light-emitting layer 3 is a non-C-axis oriented electron transport sublayer, and the first electron transport sublayer and the second electron transport sublayer are both formed by a sputtering process.
  • Such a setting can also suppress the side leakage phenomenon of the light-emitting device 10.
  • the electron transport layer By setting the electron transport layer to include two electron transport sublayers 21, while ensuring that the electron transport sublayer 21 close to the side of the light-emitting layer 3 is C-axis oriented, it plays a role in suppressing side leakage. At the same time, by performing oxygen supplementation or doping operations in the formation process of a certain electron transport sublayer, the conductivity of the electron transport sublayer in the C-axis direction is weakened, which is beneficial to the carrier balance of the light-emitting device. This part of the content will be introduced in detail later.
  • the film thickness of each electron transport sublayer 21 in the electron transport sublayer 21 is 15nm ⁇ 40nm, that is, the film thickness of the C-axis oriented electron transport sublayer and the non-C-axis oriented electron transport sublayer is 15nm ⁇ 40nm.
  • the film thickness of the C-axis oriented electron transport sublayer and the non-C-axis oriented electron transport sublayer is 15nm, 25nm, 35nm or 40nm, etc., and the film thickness here is not limited.
  • the electron transport layer 2 includes at least three electron transport sublayers 21, among which the electron transport sublayer 21 (the second electron transport sublayer 210) closest to the light-emitting layer 3 is a C-axis oriented electron transport sublayer; the electron transport sublayer (the first electron transport sublayer 211) closest to the first electrode 1 is a C-axis oriented electron transport sublayer or a non-C-axis oriented electron transport sublayer; the electron transport sublayer 21 (the intermediate electron transport sublayer 212) arranged between the electron transport sublayer 21 closest to the light-emitting layer 3 and the electron transport sublayer 21 closest to the first electrode 1 is a non-C-axis oriented electron transport sublayer, wherein the intermediate electron transport sublayer 212 includes at least one layer.
  • the electron transport layer 2 includes three electron transport sublayers 21, wherein the first electron transport sublayer 211 closest to the first electrode 1 is a C-axis oriented electron transport sublayer, the second electron transport sublayer 210 closest to the light-emitting layer 3 is a C-axis oriented electron transport sublayer, and the intermediate electron transport sublayer 212 disposed between the two C-axis oriented electron transport sublayers is a non-C-axis oriented electron transport sublayer.
  • the electron transport layer 2 includes three electron transport sublayers, wherein the first electron transport sublayer 211 closest to the first electrode 1 is a non-C-axis oriented electron transport sublayer, the second electron transport sublayer 210 closest to the light-emitting layer 3 is a C-axis oriented electron transport sublayer, and the intermediate electron transport sublayer 212 arranged between the two C-axis oriented electron transport sublayers is a non-C-axis oriented electron transport sublayer.
  • the electron transport layer 2 in the above two examples is provided with three electron transport sublayers 21, and the three electron transport sublayers 21 are provided with C-axis oriented electron transport sublayers. According to the aforementioned C-axis orientation characteristics, such a setting method can also suppress the side leakage phenomenon of the light-emitting device 10.
  • the electron transport layer includes at least three electron transport sublayers
  • the electron transport layer By setting the electron transport layer to include at least three electron transport sublayers 21, while ensuring that the electron transport sublayer 21 close to the light-emitting layer 3 is C-axis oriented, it plays a role in suppressing side leakage.
  • the conductivity of the electron transport sublayer in the C-axis direction is weakened, which is beneficial to the carrier balance of the light-emitting device 10. This part of the content will be described in detail later.
  • the electron transport layer 2 includes three transport sublayers 21 , and the film thickness of each electron transport sublayer 21 is 10 nm to 30 nm.
  • the electron transport layer 2 is composed of three electron transport sublayers, wherein the film layer stacked on the first electrode 1 is a C-axis oriented electron transport sublayer, the electron transport sublayer 21 closest to the light-emitting layer 3 is a C-axis oriented electron transport sublayer, and the film layer arranged between the two C-axis oriented electron transport sublayers is a non-C-axis oriented electron transport sublayer, and the film thickness of each electron transport sublayer 21 in the electron transport sublayer 21 is 10nm to 30nm.
  • the film thickness of the C-axis oriented electron transport sublayer and the non-C-axis oriented electron transport sublayer is 10nm, 20nm or 30nm, etc., and the film thickness here is not limited.
  • the electron transport layer 2 is composed of three electron transport sublayers, wherein the film layer stacked on the first electrode 1 is a non-C-axis oriented electron transport sublayer, the electron transport sublayer 21 closest to the light-emitting layer 3 is a C-axis oriented electron transport sublayer, and the film layer arranged between the two C-axis oriented electron transport sublayers is a non-C-axis oriented electron transport sublayer, and the film thickness of each electron transport sublayer 21 in the electron transport sublayer 21 is 10nm to 30nm.
  • the film thickness of the C-axis oriented electron transport sublayer and the non-C-axis oriented electron transport sublayer is 10nm, 20nm or 30nm, etc., and the film thickness here is not limited.
  • the electron transport sublayer (second electron transport sublayer 210) closest to the light-emitting layer in the electron transport layer 2 and the electron transport sublayer 21 (first electron transport sublayer 211) closest to the first electrode 1 are both C-axis oriented electron transport sublayers, and the C-axis oriented electron transport sublayer closest to the light-emitting layer 3 has a greater degree of C-axis orientation than the C-axis oriented electron transport sublayer closest to the first electrode 1.
  • the C-axis orientation of the electron transport sublayer can be tested by the following method: perform XRD test on the electron transport sublayer, and the film thickness is selected to be about 50nm, and the grazing angle is within 1-2°; illustratively, in the XRD test results of the C-axis oriented electron transport sublayer, the film baseline signal is 500-1500a.u., and the signal intensity of the 002 crystal plane exceeds the baseline by more than 500a.u., which is considered to have C-axis orientation; and in the C-axis oriented film layer, the signal intensity of the 002 crystal plane exceeds the baseline by 500-5000a.u., which is a relatively common range.
  • the 002 crystal plane signal intensity in the C-axis oriented electron transport sublayer close to the side of the light-emitting layer 3 exceeds the baseline more than the 002 crystal plane signal intensity in the C-axis oriented electron transport sublayer close to the first electrode 1.
  • the C-axis oriented electron transport sublayer close to the side of the light-emitting layer 3 is more effective in suppressing the side leakage phenomenon of the light-emitting device 10 than the C-axis oriented electron transport sublayer close to the first electrode 1, which is beneficial to the carrier balance in the light-emitting device 10 and improves the efficiency of the light-emitting device 10.
  • the same atoms included in the material of each electron transport sublayer 21 are oxygen atoms and zinc atoms.
  • each electron transport sublayer 21 when the electron transport layer 2 is one layer, two layers or three layers respectively, the material of each electron transport sublayer 21 includes the same atoms, namely oxygen atoms and zinc atoms.
  • the material of each electron transport sublayer 21 is zinc oxide (ZnO) or zinc oxide doped with other atoms, and the doping atoms are, for example, magnesium (Mg) or gallium (Ga).
  • Figures 8A to 12 are simulation tests of current density and current efficiency of the light-emitting device conducted by the inventors of the present disclosure.
  • the structure of the light-emitting device based on the above simulation test and the materials and thickness of other film layers except the electron transport layer, and the preparation process are as follows:
  • the light-emitting device includes a first electrode 1, an electron transport layer 2, a light-emitting layer 3, a hole transport layer 4, a hole injection layer 6, a second electrode 5 and a covering layer 7 stacked in sequence, wherein the first electrode 1 is prepared by depositing opaque silver with a thickness of 80nm to 100nm, and then depositing ITO (indium tin oxide) with a thickness of 8nm to 10nm on the top, and the light-emitting layer 3 is prepared by depositing a thickness of 15n
  • the hole transport layer 4 is prepared by depositing two layers of hole transport materials, wherein the hole transport material close to the light-emitting layer is molybdenum oxide (M
  • the hole injection layer 6 is prepared by depositing 5nm to 10nm of molybdenum oxide (MoOx) material
  • the second electrode 5 is prepared by depositing opaque silver material with a thickness of 10nm
  • the covering layer 7 arranged on the second electrode 5 is prepared by an organic material with a thickness of 70nm, and all are explained by taking an inverted light-emitting device as an example.
  • the material, thickness and preparation process of the electron transport layer are variables in each simulation test, that is, in each simulation test, other film layers except the electron transport layer meet the above settings.
  • the marked ZnO in the figure indicates that the material of the electron transport sublayer is ZnO; c-ZnO indicates that the material of the electron transport sublayer is ZnO, and the electron transport sublayer is C-axis oriented; ZMO indicates that the material of the electron transport sublayer is Mg-doped ZnO (also known as magnesium zinc oxide (ZnMgO)).
  • ZMO/c-ZnO indicates that the two electron transport sublayers are respectively a magnesium zinc oxide film layer and a C-axis oriented zinc oxide film layer, which are sequentially arranged on one side of the first electrode
  • c-ZnO/ZMO/c-ZnO indicates that the three electron transport sublayers are respectively a C-axis oriented zinc oxide film layer, a magnesium zinc oxide film layer, and a C-axis oriented zinc oxide film layer, which are sequentially arranged on one side of the first electrode, that is, a magnesium zinc oxide film layer is inserted between the two zinc oxide films.
  • the following is an introduction to the relationship between the thickness of the electron transport sublayer and the current efficiency in a light-emitting device.
  • the ratio of the thickness of the electron transport sublayer 21 in the middle to the total thickness of the electron transport layer 2 is in the range of 0.23 to 0.35.
  • the electron transport layer 2 of the light-emitting device in FIG. 6A and FIG. 6B includes three electron transport sublayers, wherein the ratio of the thickness of the electron transport sublayer 21 in the middle position to the total thickness of the electron transport layer 2 is in the range of 0.23 to 0.35, for example, the thickness of the electron transport sublayer 21 in the middle position is 10nm, and the total thickness of the electron transport layer 2 is 30nm, the thickness of the electron transport sublayer 21 in the middle position is 20nm, and the total thickness of the electron transport layer 2 is 60nm, and the thickness of the electron transport sublayer 21 in the middle position is 30nm, and the total thickness of the electron transport layer 2 is 90nm.
  • the total thickness of the two electron transport layers adjacent to the electron transport sublayer 21 in the middle position is not limited here.
  • c-ZnO/ZMO/c-ZnO indicates that the three electron transport sublayers are respectively a C-axis oriented zinc oxide film layer, a magnesium zinc oxide film layer and a C-axis oriented zinc oxide film layer arranged in sequence on one side of the first electrode, that is, a magnesium zinc oxide film layer is inserted between the two zinc oxide film layers.
  • Figure 11 shows that when the electron transport layer includes three electron transport sublayers, and the total thickness of the electron transport layer remains unchanged, all of which are 39nm, the current efficiency of the corresponding electron transport layer changes with the voltage. It can be seen from the figure that when the thickness of the three electron transport sublayers is 13.5nm, 12nm, and 13.5nm, the efficiency of the corresponding light-emitting device 10 is the highest. At this time, the ratio of the thickness of the electron transport sublayer 21nm in the middle position to the total thickness of the electron transport layer 2 is 0.31; when the thickness of the three electron transport sublayers is 12nm, 15nm, and 12nm, the efficiency of the corresponding light-emitting device 10 is good.
  • the ratio of the thickness of the electron transport sublayer 21 in the middle position to the total thickness of the electron transport layer 2 is 0.23. It can be obtained that when the electron transport layer includes three electron transport sublayers, the ratio of the thickness of the electron transport sublayer 21 in the middle position to the total thickness of the electron transport layer 2 is in the range of 0.23 to 0.35, the current density is low, and the electric signal crosstalk can be effectively weakened, the efficiency of the light-emitting device 10 is improved, and the service life of the light-emitting device 10 is longer.
  • Figure 12 shows that the electron transport layer includes three electron transport sublayers.
  • the current efficiency of the corresponding electron transport layer changes with the voltage. It can be seen from the figure that the greater the total thickness of the electron transport layer, the higher the current efficiency of the light-emitting device 10, and the longer the service life of the light-emitting device 10.
  • the electron transport layer 2 includes at least two electron transport sublayers 21 , and the electron transport sublayer 21 closest to the light emitting layer 3 has a lower oxygen vacancy ratio than other electron transport sublayers 21 .
  • the electron transport layer 2 includes two electron transport sublayers 21, wherein the oxygen vacancy ratio of the electron transport sublayer 21 (the second electron transport sublayer 210) closest to the light-emitting layer 3 is lower than that of other electron transport sublayers (the first electron transport sublayer 211), or, as shown in Figure 6A, the electron transport layer 2 includes three electron transport sublayers 21, wherein the oxygen vacancy ratio of the electron transport sublayer 21 (the second electron transport sublayer 210) closest to the light-emitting layer 3 is lower than that of other electron transport sublayers (the first electron transport sublayer 211 and the intermediate electron transport sublayer 210).
  • oxygen vacancies are a kind of metal oxide defects, which are caused by the detachment of oxygen in the lattice of metal oxides under specific external environments (such as high temperature, reduction treatment, etc.), resulting in oxygen deficiency to form oxygen vacancies.
  • oxygen vacancies in zinc oxide thin films refer to vacancies formed in the zinc oxide lattice due to the detachment of oxygen.
  • the low proportion of oxygen vacancies in the electron transport sublayer indicates that the zinc oxide lattice has less oxygen detachment and smaller zinc oxide defects.
  • the reduction of the oxygen vacancy ratio is mainly achieved by supplementing oxygen in the process of preparing the electron transport sublayer 21 closest to the light-emitting layer 3, thereby filling oxygen atoms in the oxygen vacancies in the zinc oxide lattice.
  • the electron transport sublayer 21 prepared after supplementing oxygen in the process has a lower oxygen vacancy ratio than the electron transport sublayer prepared without supplementing oxygen.
  • the current density and current efficiency of two light-emitting devices are tested, wherein the electron transport layer in one of the light-emitting devices includes a single-layer zinc oxide film having a thickness of 39 nm and is prepared by a magnetron sputtering process, and the electron transport layer in the other light-emitting device includes two electron transport sublayers, both of which are zinc oxide films having a thickness of 19.5 nm and are prepared by a magnetron sputtering process, wherein 10% oxygen is introduced in the preparation process of the second electron transport sublayer, the second electron transport sublayer refers to the electron transport sublayer close to the light-emitting layer, and the second electron transport sublayer is a C-axis oriented electron transport sublayer, as can be seen from FIG8A, compared with the single-layer zinc oxide film, after oxygen is supplemented in the second electron transport sublayer, the current density is reduced, indicating that the conductivity of the second electron transport sublayer 21 is weakened, and
  • oxygen may be added to each electron transport sublayer in the electron transport layer so that the conductivity of each electron transport sublayer is weakened, thereby reducing electron injection and improving the carrier balance of the light-emitting device to obtain better luminous efficiency.
  • the amount of oxygen supplementation in the preparation of the electron transport sublayer 21 on the side closest to the light-emitting layer 3 is 0-10%.
  • the amount of oxygen supplementation is 8%.
  • the electron transport layers of the five light-emitting devices all included three electron transport sublayers, wherein the first electron transport sublayer 211 and the second electron transport sublayer 210 of the three electron transport sublayers were both C-axis oriented zinc oxide films, and the middle electron transport sublayer 212 was a magnesium zinc oxide film.
  • the thicknesses of the first electron transport sublayer 211, the middle electron transport sublayer 212, and the second electron transport sublayer 210 were 13.5 nm, 12 nm, and 13.5 nm, respectively, and were all prepared by magnetron sputtering technology. Different oxygen contents were introduced in the preparation process of the second electron transport sublayer.
  • the oxygen vacancy ratio of the electron transport sublayer 21 closest to the light emitting layer 3 is 5% to 25% lower than the oxygen vacancy ratio of other electron transport sublayers 21 .
  • the electron transport sublayer 21 closest to the light-emitting layer 3 has a lower oxygen vacancy ratio, that is, the electron transport sublayer 21 closest to the light-emitting layer 3 has a high oxygen content, which can reduce the conductivity of the electron transport sublayer 21 and reduce electron injection, thereby facilitating the carrier balance in the light-emitting device 10 and improving the efficiency of the light-emitting device 10.
  • the LUMO energy level of the electron transport sublayer (the second electron transport sublayer 210 ) closest to the light-emitting layer is closer to the LUMO energy level of the light-emitting layer than the LUMO energy levels of other electron transport sublayers.
  • the LUMO (Lowest Unoccupied Molecular Orbital) energy level represents the lowest orbital energy level of unoccupied electrons.
  • the energy level difference between the second electron transport sublayer 210 and the light-emitting layer 3 is adjusted, so that the LUMO energy level of the second electron transport sublayer 210 is closer to the LUMO energy level of the light-emitting layer, which can improve the carrier mobility, thereby reducing the operating voltage of the light-emitting device 10 and extending the life of the light-emitting device 10.
  • the change in the LUMO energy level of the second electron transport sublayer 210 brought about by the introduction of oxygen is conducive to balancing the increase in device voltage caused by the reduction in the conductivity of the electron transport layer 2, thereby improving the efficiency of the light-emitting device 10.
  • the electron transport layer 2 includes three electron transport layers 21, and the electron transport sublayer 21 in the middle position includes doping atoms and organic polymer materials, the doping atoms include at least one of magnesium and gallium, and the organic polymer material includes boron nitride.
  • the electron transport layer 2 includes three electron transport sublayers 21, and the electron transport sublayer 21 in the middle position (intermediate electron transport sublayer 212) is a non-C-axis oriented electron transport sublayer.
  • the intermediate electron transport sublayer 212 also includes doping atoms and organic polymer materials.
  • the doping atoms include at least one of magnesium (Mg) and gallium (Ga).
  • the non-C-axis oriented electron transport sublayer is a magnesium-doped zinc oxide (ZnO) film layer or a gallium-doped zinc oxide (ZnO) film layer, or it can be a magnesium zinc oxide (ZnMgO) film layer and a film layer containing a boron nitride organic polymer material.
  • ZnO magnesium-doped zinc oxide
  • ZnMgO magnesium zinc oxide
  • the conductivity of the second electron transport sublayer 210 can be weakened, electron injection can be reduced, which is beneficial to the carrier balance of the light-emitting device and improves the efficiency. The above effect is verified by the simulation test of the light-emitting device below.
  • Figure 9A is a curve diagram of current density versus voltage
  • Figure 9B is a curve diagram of current efficiency versus voltage.
  • the electron transport layer in the first light-emitting device includes a single-layer C-axis oriented zinc oxide film with a thickness of 39nm
  • the electron transport layer in the second light-emitting device includes two electron transport sublayers, namely, a magnesium zinc oxide film layer and a C-axis oriented zinc oxide film layer, and the thickness of both film layers is 19.5nm
  • the electron transport layer of the third light-emitting device includes three electron transport sublayers, namely, a C-axis oriented zinc oxide film layer, a magnesium zinc oxide film layer, and a C-axis oriented zinc oxide film layer, that is, a magnesium zinc oxide film layer is inserted between the two zinc oxide film layers, and the thickness of the three film
  • a light-emitting device provided with a magnesium zinc oxide film layer has a lower current density, thereby weakening the conductivity of the electron transport layer and reducing electron injection.
  • 9B when the electron transport layer of the light-emitting device 10 is two layers of zinc oxide film with a layer of magnesium zinc oxide film inserted in the middle, the carrier balance effect in the light-emitting device 10 is better and the current efficiency of the light-emitting device 10 is higher, indicating that the current efficiency of the light-emitting device can be improved by doping atoms (such as magnesium) into the intermediate electron transport sublayer.
  • the current density and current efficiency of two light-emitting devices are tested, wherein the electron transport layer in one of the light-emitting devices includes a magnesium zinc oxide film layer and a zinc oxide film layer, both of which have a thickness of 19.5 nm and are prepared by a sputtering process, and the electron transport layer in the other light-emitting device includes two electron transport sublayers, both of which are zinc oxide films, both of which have a thickness of 19.5 nm and are prepared by a sputtering process.
  • 10% oxygen is introduced in the preparation process of the second electron transport sublayer, and the second electron transport sublayer refers to the electron transport sublayer close to the light-emitting layer.
  • the light-emitting device provided with a magnesium zinc oxide film has a lower current density, and the conductivity of the electron transport sublayer 21 is weakened, which reduces electron injection.
  • the light-emitting device provided with a magnesium zinc oxide film has a better carrier balance effect, and the efficiency of the light-emitting device 10 is higher, indicating that compared with adding oxygen to the electron transport sublayer, adding doping ions to the electron transport sublayer has a better effect on improving the efficiency of the light-emitting device.
  • the conduction band energy level of the electron transport sublayer 21 containing dopant atoms is shallower than the conduction band energy level of the electron transport sublayer 21 not containing dopant atoms.
  • the conduction band energy level of the magnesium-doped zinc oxide film is shallower than the conduction band energy level of the zinc oxide film.
  • the rewinding energy level of the layer can be reduced, so that the conduction band energy levels of the multi-layered electron transport sublayers are inconsistent.
  • the resulting conduction band energy level difference can change the electron transmission efficiency, which is beneficial to adjust the balance of carrier injection of the light-emitting device 10, thereby achieving the purpose of reducing the operating voltage of the light-emitting device 10 and extending the service life of the light-emitting device 10.
  • the material of the electron transport layer 2 is at least one of inorganic materials, and no ligand material is disposed in each electron transport sublayer 21 in the electron transport layer 2 .
  • the proportion of organic materials in the electron transport sublayer 21 is smaller than the proportion of organic materials in the hole transport material, the light-emitting layer or the hole injection layer, the materials of the electron transport layer 2 are all inorganic materials, and the proportion of organic materials in the electron transport sublayer 21 is 0, for example, it does not contain zinc oxide nanoparticles.
  • an intermediate layer 22 is arranged between the light-emitting layer 3 and the electron transport sublayer 21 closest to the light-emitting layer 3.
  • the material of the intermediate layer 22 is organic matter or a high molecular polymer.
  • the material of the intermediate layer 22 is filled in the pores between adjacent grains of the electron transport sublayer 21 closest to the light-emitting layer 3.
  • the material of the intermediate layer 22 is an organic matter or a high molecular polymer, for example, a high molecular polymer such as PEIE, PMMA, or an alkylamine, aromatic amine type organic matter.
  • the electron transport sublayer 21 closest to the light-emitting layer 3 is a C-axis oriented electron transport sublayer, and there are gaps between the multiple grains included therein. Filling the material of the intermediate layer into the pores between adjacent grains of the electron transport sublayer 21 closest to the light-emitting layer 3 can further suppress side leakage, and is beneficial to the carrier balance in the light-emitting device 10, thereby improving the current efficiency of the light-emitting device 10.
  • the thickness of the intermediate layer 22 is smaller than the thickness of the electron transport sublayer 21 on the side closest to the light-emitting layer 3 , and the thickness of the intermediate layer 22 is smaller than the thickness of the light-emitting layer 3 .
  • the light emitting device 10 is an inverted structure, and the surface roughness of each electron transport sublayer 21 in the electron transport layer 2 on a side away from the first electrode 1 is 0.5 nm to 2 nm.
  • the electron transport layer 2 is formed by a magnetron sputtering process and has a surface roughness.
  • the surface roughness (RMS, root mean square of roughness) of each electron transport sublayer 21 in the electron transport layer 2 on the side away from the first electrode 1 ranges from 0.5nm to 2.0nm.
  • each electron transport sublayer 21 in the electron transport layer 2 is formed by a magnetron sputtering process, and its surface roughness is 0.5nm, 0.7nm or 2.0nm, etc., and its surface flatness is good, meeting the requirement of flat film surface.
  • the light emitting device is of a vertical structure, and the surface roughness of each electron transport sublayer 21 in the electron transport layer 2 on a side away from the second electrode 5 is 0.5 nm to 2 nm.
  • the electron transport layer is formed by a magnetron sputtering process and has a surface roughness.
  • the surface roughness (RMS, root mean square of roughness) of each electron transport sublayer 21 in the electron transport layer 2 on the side away from the second electrode 5 ranges from 0.5nm to 2.0nm.
  • each electron transport sublayer 21 in the electron transport layer 2 is formed by a magnetron sputtering process, and its surface roughness is 0.5nm, 0.7nm or 2.0nm, etc., and its surface flatness is good, meeting the requirement of flat surface of the film layer.
  • the first electrode 1 is an opaque metal electrode of aluminum, silver, titanium, or molybdenum, and the thickness of the metal electrode is 60nm to 150nm.
  • ITO indium tin oxide
  • FTO fluorine-doped tin oxide
  • a conductive polymer is deposited on it, and the thickness of the conductive polymer is 5nm-50nm.
  • the light-emitting layer 3 is a quantum dot light-emitting layer, which emits one of the three colors of red, green and blue.
  • the quantum dots may be cadmium-containing materials such as CdSe (cadmium selenide), or cadmium-free materials such as InP (indium phosphide).
  • CdSe cadmium selenide
  • InP indium phosphide
  • the hole transport layer 4 includes at least one hole transport material, and the hole transport material includes at least one of an organic transport material and an inorganic oxide transport material.
  • the organic transmission material mainly includes polyvinylcarbazole, 1,2,4,5-tetrakis(trifluoromethyl)benzene, N,N'-diphenyl-N,N'-di(3-methylphenyl)-1,1'-biphenyl-4,4'-diamine, and the like.
  • the inorganic oxide material mainly includes nickel oxide, vanadium oxide, etc., which can improve the energy conversion efficiency and conductivity of the hole transport layer.
  • the thickness of the hole transport layer is 10 nm to 40 nm, preferably 25 nm to 35 nm.
  • the second electrode 2 is a transparent conductive indium tin oxide (ITO), indium zinc oxide (IZO), a semiconductor electrode (FTO glass electrode) or a conductive polymer, and the thickness of the second electrode 2 may be 40 nm to 200 nm.
  • ITO transparent conductive indium tin oxide
  • IZO indium zinc oxide
  • FTO glass electrode semiconductor electrode
  • the thickness of the second electrode 2 may be 40 nm to 200 nm.
  • the second electrode 2 is an opaque metal electrode such as aluminum or silver, and the thickness of the metal electrode is 10 nm to 20 nm.
  • the light-emitting device 10 further includes a hole injection layer 6 disposed on a side of the hole transport layer 4 away from the light-emitting layer 3 .
  • the material of the hole injection layer 6 includes aqueous polymer solution (PEDOT:PSS), 2,3,6,7,10,11-hexacyano-1,4,5,8,9,12-hexaazatriphenylene (HAT-CN), etc. It can also be an inorganic oxide, such as molybdenum oxide (MoO x ), which has a strong electron-withdrawing ability.
  • PEDOT:PSS polymer solution
  • HAT-CN 2,3,6,7,10,11-hexacyano-1,4,5,8,9,12-hexaazatriphenylene
  • MoO x molybdenum oxide
  • the light emitting device 10 further includes a covering layer 7 , which is disposed on a side of the second electrode 5 away from the light emitting layer 3 , and has a thickness of 40 nm to 90 nm.
  • the thickness of the cover layer 7 is 40 nm to 90 nm, preferably 70 nm.
  • the cover layer 7 is made of an organic material with a relatively large refractive index and a relatively small light absorption coefficient, which can improve the light extraction effect.
  • the above-mentioned light-emitting device 10 is an inverted structure, and the covering layer 7 is arranged on the side of the second electrode 5 away from the light-emitting layer 3.
  • the covering layer 7 is arranged on the side of the first electrode 1 away from the light-emitting layer 3.
  • Some embodiments of the present disclosure further provide a method for preparing a light-emitting device 10 , as shown in FIG. 15A .
  • the method for preparing the light-emitting device 10 is introduced by taking the light-emitting device 10 inverted as an example.
  • the method includes S1 to S5 .
  • the substrate may be glass or a flexible PET (polyethylene terephthalate) substrate, and the first electrode 1 is a cathode.
  • the first electrode 1 may be an opaque metal electrode such as aluminum, silver, titanium, molybdenum, etc.
  • the thickness of the metal electrode may be 60nm to 150nm, and ITO (indium tin oxide), FTO (fluorine-doped tin oxide), etc. may be deposited on it.
  • the first electrode 1 may be an opaque metal electrode such as aluminum, silver, titanium, molybdenum, etc.
  • the thickness of the metal electrode may be 60nm to 150nm, and a conductive polymer is deposited on it, and the thickness of the conductive polymer is 5nm-50nm.
  • the first electrode 1 in the present disclosure is an opaque silver metal electrode with a thickness of 80 nm, on which indium tin oxide is deposited with a thickness of 10 nm.
  • the formed electron transport layer 2 includes at least one electron transport sublayer 21, and among the at least one electron transport sublayer 21, the electron transport sublayer 21 closest to the light-emitting layer 3 is a C-axis oriented electron transport layer.
  • the C-axis orientation is a direction perpendicular to the plane where the light-emitting layer 3 is located.
  • the number of grains whose spacing with adjacent grains is smaller than the size of the grains themselves accounts for more than 50% of the total number of grains, wherein the first direction X is parallel to the plane where the light-emitting layer 3 is located; along the direction perpendicular to the plane where the light-emitting layer 3 is located, the number of grains that do not overlap with adjacent grains accounts for more than 85% of the total number of grains.
  • the light-emitting layer 3 is a quantum dot light-emitting layer, which is deposited by inkjet printing, photolithography, etc.
  • the quantum dot light-emitting layer can emit one of the three colors of red, green and blue.
  • the quantum dots may be cadmium-containing materials such as CdSe (cadmium selenide), or cadmium-free materials such as InP (indium phosphide).
  • CdSe cadmium selenide
  • InP indium phosphide
  • the thickness of the light emitting layer 3 is 10 nm to 40 nm, preferably 20 nm to 30 nm.
  • the hole transport layer 4 includes at least one hole transport material, and the hole transport material includes at least one of an organic transport material and an inorganic oxide transport material.
  • the organic transmission material mainly includes polyvinylcarbazole, 1,2,4,5-tetrakis(trifluoromethyl)benzene, N,N'-diphenyl-N,N'-di(3-methylphenyl)-1,1'-biphenyl-4,4'-diamine, and the like.
  • the inorganic oxide material mainly includes nickel oxide, vanadium oxide, etc., which can improve the energy conversion efficiency and conductivity of the hole transport layer.
  • the HOMO energy level of the hole transport material on the side close to the light-emitting layer 3 is -6.2eV to -5.5eV, and the material may be molybdenum oxide (MoO x ), which is conducive to hole injection; the HOMO energy level of the hole transport material on the side away from the light-emitting layer is -5.3eV to -5.0eV, and the material may be any one of vanadium pentoxide (V 2 O 5 ) and nickel oxide (NiO x ).
  • the thickness of the hole transport layer is 10 nm to 40 nm, and in the embodiments of the present application, it is preferably 25 nm to 35 nm.
  • the second electrode 2 is an anode, which may be a transparent conductive indium tin oxide (ITO), indium zinc oxide (IZO), a semiconductor electrode (FTO glass electrode) or a conductive polymer, etc., and its thickness may be 40 nm to 200 nm.
  • ITO transparent conductive indium tin oxide
  • IZO indium zinc oxide
  • FTO glass electrode semiconductor electrode
  • conductive polymer etc.
  • the second electrode 2 may also be an opaque metal electrode such as aluminum or silver deposited by evaporation, and the thickness of the metal electrode may be 10 nm to 20 nm.
  • a step of forming a hole injection layer 6 on the hole transport layer 4 is further included.
  • the hole injection layer 6 is formed by a deposition process, and the thickness of the hole injection layer 6 is 3nm to 7nm, preferably 5nm.
  • the material of the hole injection layer 6 is an organic material.
  • the light-emitting device 10 is placed upright, as shown in FIG. 15B , and the preparation method of the upright light-emitting device includes S1’ to S5’.
  • a second electrode 5 is formed on one side of the substrate.
  • a step of forming a hole injection layer 6 on the second electrode 5 is also included.
  • the hole injection layer 6 is formed by a deposition process, and the thickness of the hole injection layer 6 is 3nm to 7nm, preferably 5nm.
  • the material of the hole injection layer 6 is an organic material.
  • the electron transport layer 2 is formed by depositing corresponding materials on the substrate through a magnetron sputtering process, and the degree of C-axis orientation of the formed electron transport sublayer can be adjusted by controlling the temperature of the substrate during the deposition process or the power of the magnetron sputtering. For example, when the substrate temperature is 100°C, the formed electron transport layer has almost no C-axis orientation, while when the substrate temperature is at room temperature or a high temperature above 200°C, the C-axis orientation of the formed electron transport layer is more obvious. By increasing the sputtering power, the degree of C-axis orientation of the formed electron transport layer can also be reduced.
  • the light-emitting layer 3, the first electrode 1 or the formed electron transport sublayer 21 are all substrates for forming an electron transport sublayer in the next step.
  • the following describes the method for forming the electron transport layer 2 in the inverted light-emitting device in different cases.
  • the formed electron transport layer 2 includes a layer of electron transport sublayer 21, wherein the layer of electron transport sublayer 21 is a C-axis oriented electron transport sublayer 21.
  • the step of forming the electron transport layer 2 on the first electrode 1 in step S2 includes: forming a C-axis oriented electron transport sublayer on the first electrode by a magnetron sputtering process.
  • step S2 includes S21 - 1 .
  • S21 - 1 using a process such as magnetron sputtering, when the temperature of the first electrode is a first temperature, depositing a material of the electron transport sublayer 21 on the first electrode 1 to form a C-axis oriented electron transport sublayer.
  • the first temperature is a substrate temperature that enables the material to form a C-axis orientation.
  • the first temperature is room temperature, that is, 25°C.
  • a material may be deposited on the first electrode 1 at room temperature by magnetron sputtering or the like, and the material may be ZnO, thereby forming a C-axis oriented electron transport sublayer.
  • step S2 includes S21 - 2 .
  • S21-2 using a magnetron sputtering process, when the temperature of the first electrode 1 is the second temperature, depositing a material of an electron transport sublayer on the first electrode, and annealing the material of the electron transport sublayer to form a C-axis oriented electron transport sublayer.
  • the second temperature is a substrate temperature that enables the deposited material to form a C-axis orientation.
  • the second temperature is 200 to 500 degrees Celsius.
  • a material may be deposited on the first electrode 1 at a temperature of 300 degrees Celsius by magnetron sputtering or the like, and the material may be ZnO, and the ZnO material is annealed to form a C-axis oriented electron transport sublayer.
  • the material of the electron transport sublayer is annealed under the second temperature condition to form an electron transport sublayer with a C-axis orientation, whose conductivity in the horizontal direction is much lower than that in the vertical direction, thereby effectively reducing the leakage of the film side and avoiding the occurrence of crosstalk.
  • step S2 includes S21 - 3 .
  • S21-3 using a magnetron sputtering process to deposit the material of the electron transport sublayer on the first electrode 1 at a second sputtering power to form a C-axis oriented electron transport sublayer; wherein the second sputtering power is a sputtering power that can cause the material to form a C-axis orientation.
  • the second sputtering power in the above magnetron sputtering process is 3 to 30 W/cm2, and the second sputtering power is less than the first sputtering power.
  • the first sputtering power is a sputtering power that can make the material form a non-C-axis orientation.
  • the following introduces the specific steps of S2 when the formed electron transport layer 2 includes two electron transport sublayers 21, wherein the electron transport sublayer 21 on the side away from the light-emitting layer 3 is a non-C-axis oriented electron transport sublayer, and the two electron transport sublayers 21 are a first electron transport sublayer 211 and a second electron transport sublayer 210, and the first electron transport sublayer 211 is farther away from the light-emitting layer 3.
  • the step of forming the electron transport layer 2 on the first electrode 1 in step S2 includes: S22 to S23 .
  • S22 includes S22-1.
  • S22-1 using a process such as magnetron sputtering, depositing the material of the electron transport sublayer 21 on the first electrode 1 under the condition that the temperature of the first electrode is a third temperature, to form a first electron transport sublayer 211 that is not C-axis oriented.
  • the third temperature condition is a substrate temperature that can cause the material to form a non-C-axis orientation.
  • the third temperature is 100°C.
  • a material may be deposited on the first electrode 1 at a temperature of 100° C. by magnetron sputtering or the like, and the material may be ZnO, thereby forming a first electron transport sublayer 211 that is not oriented along the C axis.
  • S22 includes S22-2.
  • S22-2 Using a magnetron sputtering process, depositing a material of an electron transport sublayer on the first electrode at a first sputtering power to form an electron transport sublayer with a non-C-axis orientation; wherein the first sputtering power is a sputtering power that can cause the material to form a non-C-axis orientation.
  • the first sputtering power is 3-30 W/cm 2
  • the second sputtering power is less than the first sputtering power
  • S23 includes S23-1.
  • the first temperature is a substrate temperature that enables the material to form a C-axis orientation.
  • the first temperature is room temperature, that is, 25°C.
  • magnetron sputtering or the like can be used to deposit a material, which may be ZnO, on the non-C-axis oriented first electron transport sublayer 211 when the temperature of the first electron transport sublayer 211 is at room temperature to form a C-axis oriented second electron transport sublayer 210 .
  • oxygen can also be introduced to increase the oxygen content and replace argon with oxygen. This can reduce the oxygen vacancies in the formed C-axis oriented second electron transport sublayer 210, thereby reducing its conductivity, thereby balancing the carriers and preventing current crosstalk, thereby improving the efficiency of the light-emitting device 10.
  • S23 includes S23-2.
  • S23-2 Using a magnetron sputtering process, when the temperature of the first electron transport sublayer 211 is at a second temperature, depositing the material of the electron transport sublayer on the first electron transport sublayer 211 which is not C-axis oriented, and annealing the material of the electron transport sublayer under the second temperature condition to form a second electron transport sublayer 210 which is C-axis oriented.
  • the second temperature is a substrate temperature that enables the deposited material to form a C-axis orientation.
  • the second temperature is 200-500°C.
  • magnetron sputtering or the like can be used to deposit a material on the first electron transport sublayer 211 at a temperature of 300° C.
  • the material may be ZnO, and the ZnO material is annealed to form a C-axis oriented second electron transport sublayer 210 .
  • the second electron transport sublayer 210 is C-axis oriented, and its conductivity in the horizontal direction is much lower than that in the vertical direction, so it can effectively reduce the leakage of the film side and avoid the occurrence of crosstalk.
  • S23 includes S23-3.
  • S23-3 Using a magnetron sputtering process, deposit the material of the electron transport sublayer on the first electron transport sublayer 211 at a second sputtering power to form a C-axis oriented second electron transport sublayer 210; wherein the second sputtering power is a sputtering power that can cause the material to form a C-axis orientation.
  • the sputtering power in the above magnetron sputtering process is 3 to 30 W/cm2.
  • oxygen can also be introduced to increase the oxygen content and replace argon with oxygen. This can reduce the oxygen vacancies in the formed C-axis oriented second electron transport sublayer 210, thereby reducing its conductivity, thereby balancing the carriers and preventing current crosstalk, thereby improving the efficiency of the light-emitting device 10.
  • the formed electron transport layer 2 includes three electron transport sublayers 21, wherein the electron transport sublayer 21 close to the side of the light-emitting layer 3 is a C-axis oriented electron transport sublayer, and the electron transport sublayer 21 close to the side of the first electrode 1 is a C-axis oriented electron transport sublayer or a non-C-axis oriented electron transport sublayer;
  • the three electron transport sublayers include a first electron transport sublayer, a second electron transport sublayer and an intermediate electron transport sublayer, the first electron transport sublayer is farthest from the light-emitting layer, the second electron transport sublayer is closest to the light-emitting layer, and the intermediate electron transport sublayer is located between the first electron transport sublayer and the second electron transport sublayer, and is a non-C-axis oriented electron transport sublayer.
  • the light-emitting device 10 is inverted, and the electron transport layer 2 includes three or more electron transport sublayers 21.
  • the step of forming the electron transport layer 2 on the first electrode 1 in step S2 corresponds to: S24 ⁇ S26.
  • each intermediate electron transport sublayer 212 is a non-C-axis oriented electron transport sublayer.
  • S24 includes S24-1.
  • S24 - 1 using a process such as magnetron sputtering, when the temperature of the first electrode 1 is a first temperature, depositing a material of the electron transport sublayer 21 on the first electrode 1 to form a C-axis oriented first electron transport sublayer 211 .
  • the first temperature is a substrate temperature that enables the material to form a C-axis orientation.
  • the first temperature is room temperature, that is, 25°C.
  • a material may be deposited on the first electrode 1 at room temperature by magnetron sputtering or the like, and the material may be ZnO to form a C-axis oriented first electron transport sublayer 211 .
  • S24 includes S24-2.
  • S24-2 Using a magnetron sputtering process, when the temperature of the first electrode 1 is the second temperature, depositing the material of the electron transport sublayer on the first electrode 1, and annealing the material of the electron transport sublayer under the second temperature condition to form a C-axis oriented first electron transport sublayer 211.
  • the second temperature is a substrate temperature that enables the deposited material to form a C-axis orientation.
  • the second temperature is 200-500°C.
  • magnetron sputtering or the like may be used to deposit a material on the first electrode 1 at a temperature of 300° C.
  • the material may be ZnO, and the ZnO material may be annealed to form a C-axis oriented first electron transport sublayer 211 .
  • the first electron transport sublayer 211 is C-axis oriented, and its conductivity in the horizontal direction is much lower than that in the vertical direction, so it can effectively reduce the leakage of the film side and avoid the occurrence of crosstalk.
  • S24 includes S24-3.
  • S24-3 Using a magnetron sputtering process, as shown in FIG6A , deposit the material of the electron transport sublayer on the first electrode 1 at a second sputtering power to form a C-axis oriented first electron transport sublayer 211 ; wherein the second sputtering power is a sputtering power that enables the material to form a C-axis orientation.
  • the sputtering power in the above magnetron sputtering process is 3 to 30 W/cm2.
  • S25 includes S25-1.
  • the third temperature condition is a substrate temperature that can cause the material to form a non-C-axis orientation.
  • the third temperature is 100°C.
  • a material such as ZnO may be deposited on the first electron transport sublayer 211 at a temperature of 100° C. by magnetron sputtering or the like, thereby forming a non-C-axis oriented intermediate electron transport sublayer 212 .
  • S25 includes S25-2.
  • S25-2 Using a magnetron sputtering process, deposit the material of the electron transport sublayer on the first electron transport sublayer 211 at a first sputtering power to form a non-C-axis oriented electron transport sublayer; wherein the first sputtering power is a sputtering power that can cause the material to form a non-C-axis orientation.
  • the first sputtering power is 3-30 W/cm 2
  • the second sputtering power is less than the first sputtering power
  • S26 includes S26 - 1.
  • the first temperature is a substrate temperature that enables the material to form a C-axis orientation.
  • the first temperature is room temperature, that is, 25°C.
  • magnetron sputtering or the like can be used to deposit a material on the intermediate electron transport sublayer 212 when the temperature of the intermediate electron transport sublayer 212 is at room temperature.
  • the material may be ZnO to form a C-axis oriented second electron transport sublayer 210 .
  • S26 includes S26-2.
  • S26-2 Using a magnetron sputtering process, when the temperature of the intermediate electron transport sublayer 212 is a second temperature, depositing the material of the electron transport sublayer on the intermediate electron transport sublayer 212, and annealing the material of the electron transport sublayer under the second temperature condition to form a C-axis oriented second electron transport sublayer 210.
  • the second temperature is a substrate temperature that enables the deposited material to form a C-axis orientation.
  • the second temperature is 200-500°C.
  • magnetron sputtering or the like can be used to deposit a material on the intermediate electron transport sublayer 212 at a temperature of 300° C.
  • the material may be ZnO, and the ZnO material is annealed to form a C-axis oriented second electron transport sublayer 210 .
  • the second electron transport sublayer 210 is C-axis oriented, and its conductivity in the horizontal direction is much lower than that in the vertical direction, so it can effectively reduce the leakage of the film side and avoid the occurrence of crosstalk.
  • S26 includes S26-3.
  • S26-3 Using a magnetron sputtering process, deposit the material of the electron transport sublayer on the intermediate electron transport sublayer 212 at a second sputtering power to form a C-axis oriented second electron transport sublayer 210; wherein the second sputtering power is a sputtering power that can cause the material to form a C-axis orientation.
  • the sputtering power in the above magnetron sputtering process is 3 to 30 W/cm2.
  • the step of forming the electron transport layer 2 on the first electrode 1 in step S2 includes: S27 to S29. It should be noted that S27 to S29 and S24 to S26 are parallel steps.
  • each intermediate electron transport sublayer 212 is a non-C-axis oriented electron transport sublayer.
  • S29 forming a second electron transport sublayer 210 on the intermediate electron transport sublayer 212 by a magnetron sputtering process, wherein the second electron transport sublayer 210 is a C-axis oriented electron transport sublayer.
  • S27 includes S27 - 1.
  • S27-1 Using a process such as magnetron sputtering, the material of the electron transport sublayer 21 is deposited on the first electrode 1 under the condition that the temperature of the first electrode 1 is a third temperature, to form a first electron transport sublayer 211 that is not oriented along the C axis.
  • the third temperature condition is a substrate temperature that can cause the material to form a non-C-axis orientation.
  • the third temperature is 100°C.
  • a material which may be ZnO, may be deposited on the first electrode 1 at a temperature of 100° C. by magnetron sputtering or the like, thereby forming a first electron transport sublayer 211 that is not oriented along the C axis.
  • S27 includes S27-2.
  • S27-2 Using a magnetron sputtering process, deposit the material of the electron transport sublayer on the first electrode 1 at a first sputtering power to form a non-C-axis oriented electron transport sublayer; wherein the first sputtering power is a sputtering power that can cause the material to form a non-C-axis orientation.
  • the first sputtering power is 3-30 W/cm 2
  • the second sputtering power is less than the first sputtering power
  • the electron transport layer in the light-emitting device includes more than three electron transport sublayers
  • the intermediate electron transport layer 2 includes at least two electron transport sublayers 21
  • each of the at least two electron transport sublayers 21 is a non-C-axis oriented intermediate electron transport sublayer 212.
  • the preparation method of each non-C-axis oriented intermediate electron transport sublayer 212 refers to the specific preparation method of the intermediate electron transport sublayer 212 in the case where the electron transport layer 2 includes three electron transport sublayers, which will not be repeated here.
  • the following describes the method for forming the electron transport layer 2 in the upright light-emitting device in different cases.
  • the formed electron transport layer 2 includes a layer of electron transport sublayer 21 (as shown in FIG4B ), wherein the layer of electron transport sublayer 21 is a C-axis oriented electron transport sublayer 21.
  • the step of forming the electron transport layer 2 on the light-emitting layer 3 in step S4′ includes: forming a C-axis oriented electron transport layer on the light-emitting layer 3 by a magnetron sputtering process.
  • step S4' includes S41-1.
  • the first temperature is a substrate temperature that enables the material to form a C-axis orientation.
  • the first temperature is room temperature, that is, 25°C.
  • a material may be deposited on the light-emitting layer 3 at room temperature by magnetron sputtering or the like, and the material may be ZnO, thereby forming a C-axis oriented electron transport sublayer.
  • step S4' includes S41-2.
  • S41-2 using a magnetron sputtering process, when the temperature of the light-emitting layer 3 is a second temperature, depositing a material of an electron transport sublayer on the light-emitting layer 3, and annealing the material of the electron transport sublayer to form a C-axis oriented electron transport sublayer.
  • the second temperature is a substrate temperature that enables the deposited material to form a C-axis orientation.
  • the second temperature is 200 to 500 degrees Celsius.
  • a material which may be ZnO, may be deposited on the light-emitting layer 3 at a temperature of 300 degrees Celsius by magnetron sputtering or the like, and the ZnO material may be annealed to form a C-axis oriented electron transport sublayer.
  • the material of the electron transport sublayer is annealed under the second temperature condition to form an electron transport sublayer with a C-axis orientation, whose conductivity in the horizontal direction is much lower than that in the vertical direction, thereby effectively reducing the leakage of the film side and avoiding the occurrence of crosstalk.
  • step S4' includes S41-3.
  • S41-3 Using a magnetron sputtering process, as shown in FIG4B , deposit the material of the electron transport sublayer on the light-emitting layer 3 at a second sputtering power to form an electron transport sublayer with a C-axis orientation; wherein the second sputtering power is a sputtering power that enables the material to form a C-axis orientation.
  • the second sputtering power in the above magnetron sputtering process is 3 to 30 W/cm2, and the second sputtering power is less than the first sputtering power.
  • the first sputtering power is a sputtering power that can make the material form a non-C-axis orientation.
  • the following introduces the specific steps of S4' when the formed electron transport layer 2 includes two electron transport sublayers 21, wherein the electron transport sublayer 21 on the side away from the light-emitting layer 3 is a non-C-axis oriented electron transport sublayer, and the two electron transport sublayers 21 are a first electron transport sublayer 211 and a second electron transport sublayer 210, and the first electron transport sublayer 211 is farther away from the light-emitting layer 3.
  • the step of forming the electron transport layer 2 on the light-emitting layer 3 in step S4' includes: S42 to S43.
  • S42 includes S42-1.
  • the first temperature is a substrate temperature that enables the material to form a C-axis orientation.
  • the first temperature is room temperature, that is, 25°C.
  • a material such as ZnO may be deposited on the light-emitting layer 3 at room temperature by magnetron sputtering to form a second electron transport sublayer 210 oriented in the C-axis direction.
  • oxygen can also be introduced to increase the oxygen content and replace argon with oxygen. This can reduce the oxygen vacancies in the formed C-axis oriented second electron transport sublayer 210, thereby reducing its conductivity, thereby balancing the carriers and preventing current crosstalk, thereby improving the efficiency of the light-emitting device 10.
  • S42 includes S42-2.
  • S42-2 Using a magnetron sputtering process, when the temperature of the light-emitting layer 3 is a second temperature, depositing the material of the electron transport sublayer on the light-emitting layer 3, and annealing the material of the electron transport sublayer under the second temperature condition to form a C-axis oriented second electron transport sublayer 210.
  • the second temperature is a substrate temperature that enables the deposited material to form a C-axis orientation.
  • the second temperature is 200-500°C.
  • a material which may be ZnO, may be deposited on the light-emitting layer 3 at a temperature of 300° C. by magnetron sputtering or the like, and the ZnO material may be annealed to form a C-axis oriented second electron transport sublayer 210 .
  • the second electron transport sublayer 210 is C-axis oriented, and its conductivity in the horizontal direction is much lower than that in the vertical direction, so it can effectively reduce the leakage of the film side and avoid the occurrence of crosstalk.
  • S42 includes S42-3.
  • S42-3 Using a magnetron sputtering process, as shown in FIG5B , deposit the material of the electron transport sublayer on the light-emitting layer 3 at a second sputtering power to form a second electron transport sublayer 210 oriented in the C-axis direction; wherein the second sputtering power is a sputtering power that enables the material to form a C-axis orientation.
  • the sputtering power in the above magnetron sputtering process is 3 to 30 W/cm2.
  • S43 includes S43-1.
  • the third temperature condition is a substrate temperature that can cause the material to form a non-C-axis orientation.
  • the third temperature is 100°C.
  • a material such as ZnO may be deposited on the second electron transport sublayer 210 at a temperature of 100° C. by magnetron sputtering or the like, thereby forming a first electron transport sublayer 211 that is not oriented along the C axis.
  • S43 includes S43-2.
  • S43-2 Using a magnetron sputtering process, as shown in FIG5B , deposit the material of the electron transport sublayer on the second electron transport sublayer 210 at a first sputtering power to form a non-C-axis oriented electron transport sublayer; wherein the first sputtering power is a sputtering power that enables the material to form a non-C-axis orientation.
  • the first sputtering power is 3-30 W/cm 2
  • the second sputtering power is less than the first sputtering power
  • the formed electron transport layer 2 includes three electron transport sublayers 21, wherein the electron transport sublayer 21 close to the side of the light-emitting layer 3 is a C-axis oriented electron transport sublayer, and the electron transport sublayer 21 close to the side of the second electrode 5 is a C-axis oriented electron transport sublayer or a non-C-axis oriented electron transport sublayer;
  • the three electron transport sublayers include a first electron transport sublayer, a second electron transport sublayer and an intermediate electron transport sublayer, the first electron transport sublayer is farthest from the light-emitting layer, the second electron transport sublayer is closest to the light-emitting layer, and the intermediate electron transport sublayer is located between the first electron transport sublayer and the second electron transport sublayer, and is a non-C-axis oriented electron transport sublayer.
  • the light-emitting device 10 is placed upright, and the electron transport layer 2 includes three or more electron transport sublayers 21, wherein, as shown in FIG19A , the step of forming the electron transport layer 2 on the first electrode 1 in step S4' corresponds to: S44 to S46.
  • each intermediate electron transport sublayer 212 is a non-C-axis oriented electron transport sublayer.
  • S44 includes S44-1.
  • the first temperature is a substrate temperature that enables the material to form a C-axis orientation.
  • the first temperature is room temperature, that is, 25°C.
  • a material such as ZnO may be deposited on the light-emitting layer 3 at room temperature by magnetron sputtering to form a second electron transport sublayer 210 oriented in the C-axis direction.
  • S44 includes S44-2.
  • S44-2 Using a magnetron sputtering process, when the temperature of the light-emitting layer 3 is a second temperature, depositing the material of the electron transport sublayer on the light-emitting layer 3, and annealing the material of the electron transport sublayer under the second temperature condition to form a C-axis oriented second electron transport sublayer 210.
  • the second temperature is a substrate temperature that enables the deposited material to form a C-axis orientation.
  • the second temperature is 200-500°C.
  • a material which may be ZnO, may be deposited on the light-emitting layer 3 at a temperature of 300° C. by magnetron sputtering or the like, and the ZnO material may be annealed to form a C-axis oriented second electron transport sublayer 210 .
  • the second electron transport sublayer 210 is C-axis oriented, and its conductivity in the horizontal direction is much lower than that in the vertical direction, so it can effectively reduce the leakage of the film side and avoid the occurrence of crosstalk.
  • S44 includes S44-3.
  • S44-3 Using a magnetron sputtering process, as shown in FIG6B , deposit the material of the electron transport sublayer on the light-emitting layer 3 at a second sputtering power to form a C-axis-oriented second electron transport sublayer 210; wherein the second sputtering power is a sputtering power that enables the material to form a C-axis orientation.
  • the sputtering power in the above magnetron sputtering process is 3 to 30 W/cm2.
  • S45 includes S45-1.
  • S45-1 Using a process such as magnetron sputtering, deposit the material of the electron transport sublayer 21 on the second electron transport sublayer 210 under the condition that the temperature of the second electron transport sublayer 210 is the third temperature, to form a non-C-axis oriented intermediate electron transport sublayer 212.
  • the third temperature condition is a substrate temperature that can cause the material to form a non-C-axis orientation.
  • the third temperature is 100°C.
  • a material which may be ZnO, may be deposited on the second electron transport sublayer 210 at a temperature of 100° C. by magnetron sputtering or the like, thereby forming a non-C-axis oriented intermediate electron transport sublayer 212 .
  • S45 includes S45-2.
  • S45-2 Using a magnetron sputtering process, as shown in FIG6B , deposit the material of the electron transport sublayer on the second electron transport sublayer 210 at a first sputtering power to form a non-C-axis oriented electron transport sublayer; wherein the first sputtering power is a sputtering power that enables the material to form a non-C-axis orientation.
  • the first sputtering power in the above magnetron sputtering process is 3 to 30 W/cm2, and the second sputtering power is less than the first sputtering power.
  • S46 includes S46-1.
  • the first temperature is a substrate temperature that enables the material to form a C-axis orientation.
  • the first temperature is room temperature, that is, 25°C.
  • magnetron sputtering or the like can be used to deposit a material on the intermediate electron transport sublayer 212 when the temperature of the intermediate electron transport sublayer 212 is at room temperature.
  • the material may be ZnO to form a C-axis oriented first electron transport sublayer 211 .
  • S46 includes S46-2.
  • S46-2 Using a magnetron sputtering process, when the temperature of the intermediate electron transport sublayer 212 is at a second temperature, depositing the material of the electron transport sublayer on the intermediate electron transport sublayer 212, and annealing the material of the electron transport sublayer under the second temperature condition to form a C-axis oriented first electron transport sublayer 211.
  • the second temperature is a substrate temperature that enables the deposited material to form a C-axis orientation.
  • the second temperature is 200-500°C.
  • magnetron sputtering or the like can be used to deposit a material on the intermediate electron transport sublayer 212 at a temperature of 300° C.
  • the material may be ZnO, and the ZnO material is annealed to form a C-axis oriented first electron transport sublayer 211 .
  • the first electron transport sublayer 211 is C-axis oriented, and its conductivity in the horizontal direction is much lower than that in the vertical direction, so it can effectively reduce the leakage of the film side and avoid the occurrence of crosstalk.
  • S46 includes S46-3.
  • S46-3 Using a magnetron sputtering process, as shown in FIG6B , deposit the material of the electron transport sublayer on the intermediate electron transport sublayer 212 at a second sputtering power to form a C-axis oriented first electron transport sublayer 211; wherein the second sputtering power is a sputtering power that enables the material to form a C-axis orientation.
  • the sputtering power in the above magnetron sputtering process is 3 to 30 W/cm2.
  • the electron transport layer 2 includes three or more electron transport sublayers 21, wherein, as shown in FIG19B , the step of forming the electron transport layer 2 on the light-emitting layer 3 in step S4′ correspondingly includes: S47 to S49.
  • each intermediate electron transport sublayer 212 is a non-C-axis oriented electron transport sublayer.
  • S47 includes S47-1.
  • S47-1 Using a process such as magnetron sputtering, deposit the material of the electron transport sublayer 21 on the light emitting layer 3 under the condition that the temperature of the light emitting layer 3 is a first temperature, to form a C-axis oriented second electron transport sublayer 210.
  • the first temperature is a substrate temperature that enables the material to form a C-axis orientation.
  • the first temperature is room temperature, that is, 25°C.
  • a material such as ZnO may be deposited on the light-emitting layer 3 at room temperature by magnetron sputtering or the like, thereby forming a second electron transport sublayer 210 oriented in the C-axis direction.
  • S47 includes S47-2.
  • S47-2 Using a magnetron sputtering process, when the temperature of the light-emitting layer 3 is a second temperature, depositing the material of the electron transport sublayer on the light-emitting layer 3, and annealing the material of the electron transport sublayer under the second temperature condition to form a C-axis oriented electron transport sublayer.
  • the second temperature is a substrate temperature that enables the deposited material to form a C-axis orientation.
  • the second temperature is 200-500°C.
  • a material which may be ZnO, may be deposited on the light-emitting layer 3 at a temperature of 300° C. by magnetron sputtering or the like, and the ZnO material may be annealed to form a C-axis oriented second electron transport sublayer 210 .
  • the second electron transport sublayer 210 is C-axis oriented, and its conductivity in the horizontal direction is much lower than that in the vertical direction, so it can effectively reduce the leakage of the film side and avoid the occurrence of crosstalk.
  • S47 includes S47-3.
  • S47-3 Using a magnetron sputtering process, as shown in FIG6B , deposit the material of the electron transport sublayer on the light-emitting layer 3 at a second sputtering power to form a C-axis-oriented second electron transport sublayer 210; wherein the second sputtering power is a sputtering power that enables the material to form a C-axis orientation.
  • the sputtering power in the above magnetron sputtering process is 3 to 30 W/cm2.
  • S49 includes S49-1.
  • the third temperature condition is a substrate temperature that can cause the material to form a non-C-axis orientation.
  • the third temperature is 100°C.
  • a material which may be ZnO, may be deposited on the intermediate electron transport sublayer 212 at a temperature of 100° C. by magnetron sputtering or the like, thereby forming a first electron transport sublayer 211 that is not oriented along the C axis.
  • S49 includes S49-2.
  • S49-2 Using a magnetron sputtering process, as shown in FIG6B , deposit the material of the electron transport sublayer on the intermediate electron transport sublayer 212 at a first sputtering power to form a non-C-axis oriented electron transport sublayer; wherein the first sputtering power is a sputtering power that enables the material to form a non-C-axis orientation.
  • the first sputtering power in the above magnetron sputtering process is 3 to 30 W/cm2, and the second sputtering power is less than the first sputtering power.
  • the intermediate electron transport layer 212 includes at least two electron transport sublayers 21, and each of the at least two electron transport sublayers 21 is a non-C-axis oriented intermediate electron transport sublayer 212.
  • the preparation method of the non-C-axis oriented intermediate electron transport sublayer 212 refers to the specific preparation method of the intermediate electron transport sublayer 212 in the case where the above-mentioned electron transport layer 2 includes three electron transport sublayers, which will not be repeated here.
  • Some embodiments of the present disclosure further provide a display substrate 100 , as shown in FIG. 20 and FIG. 21A , the display substrate 100 includes the light emitting device 10 as described above.
  • the display substrate 100 can be, for example, a quantum dot organic light emitting diode (Quantum Dot Light Emitting Diodes, QLED) display substrate, a mini light emitting diode (Mini Light-Emitting Diode, Mini LED) display substrate, or a micro light emitting diode (Micro Light-Emitting Diode, Micro LED) display substrate.
  • QLED Quantum Dot Light Emitting Diodes
  • Mini LED mini light emitting diode
  • Micro LED Micro Light-Emitting Diode
  • the display substrate 100 includes a substrate 11 and a pixel defining layer 8 disposed on one side of the substrate 11, the pixel defining layer 8 includes a plurality of openings 81, the first electrodes 1 of a plurality of light-emitting devices 10 are disposed between the substrate 11 and the pixel defining layer 8, each opening 81 exposes at least a portion of the first electrode 1 of a light-emitting device 10, and the electron transport layer 2, the light-emitting layer 3, the hole transport layer 4 and the second electrode 5 of the light-emitting device 10 are sequentially stacked on the first electrode 1 and are located in the opening 81.
  • the light-emitting device is an inverted structure.
  • the display substrate 100 includes a substrate 11 and a pixel defining layer 8 disposed on one side of the substrate 11, the pixel defining layer 8 includes a plurality of openings 81, and the second electrodes 5 of a plurality of light-emitting devices 10 are disposed between the substrate 11 and the pixel defining layer 8, each opening 81 exposes at least a portion of the second electrode 5 of a light-emitting device 10, and the electron transport layer 2, the light-emitting layer 3, the hole transport layer 4 and the first electrode 1 of the light-emitting device 10 are sequentially stacked on the second electrode 5 and are located in the opening 81.
  • the light-emitting device is a positive structure.
  • the display substrate 100 includes a plurality of sub-pixels, each of which includes at least one light-emitting device, and the plurality of sub-pixels are red sub-pixels, green sub-pixels, and blue sub-pixels.
  • the light-emitting layers of the light-emitting devices in the red sub-pixels, the green sub-pixels, and the blue sub-pixels are made of different materials, wherein, as shown in FIGS. 21A to 21D , RGB represent the light-emitting layers in the red sub-pixels, the light-emitting layers in the green sub-pixels, and the light-emitting layers in the blue sub-pixels, respectively, and the display substrate 100 can emit light of three different colors: red, green, and blue.
  • the structures of the film layers included in the light-emitting device include the following embodiments.
  • the electron transport layer 21 of the light emitting device 10 is located within the opening 81 , and the electron transport layers 21 of the plurality of light emitting devices 10 are not in contact with each other.
  • the electron transport layers 2 of multiple light-emitting devices 10 do not contact each other, that is, the electron transport layers 2 of the sub-pixels of multiple light-emitting devices 10 are not shared.
  • the entire layer of the initial electron transport layer 2 needs to be exposed and etched to pattern it, forming multiple electron transport layers 2 respectively located in multiple openings, thereby further reducing crosstalk of electrical signals and improving device efficiency.
  • the hole transport layers 4 of the plurality of light emitting devices 10 are in contact with each other, and the hole injection layers 6 of the plurality of light emitting devices 10 are in contact with each other, so that the hole transport layers 4 and the hole injection layers 6 of the plurality of light emitting devices 10 may be shared.
  • the display substrate 100 includes an electron transport film layer 12 disposed on a side of the pixel defining layer 8 and the first electrode 1 of the plurality of light-emitting devices 10 away from the substrate 11, and a portion of the electron transport film layer 12 located within the opening 81 is the electron transport layer 2 of the plurality of light-emitting devices 10, and the electron transport layer 2 of the light-emitting device 10 includes a first portion G1 disposed on one side of the light-emitting layer and a second portion G2 disposed on the side wall of the opening 81, and the electron transport layers 2 of the plurality of light-emitting devices 10 are in contact with each other.
  • the electron transport film layer 12 also includes a portion located on the surface of the pixel defining layer 8, called the electron transport connection layer 2', and the electron transport layers 2 of the multiple light-emitting devices 10 are in contact with each other through the electron transport connection layer 2'.
  • the electron transport layers 2 of multiple light-emitting devices 10 are in contact with each other, that is, the sub-pixels of multiple light-emitting devices 10 share the electron transport film layer 12.
  • the electron transport layer does not need to be patterned. Since the lateral conductivity of the electron transport layer 2 is extremely low, it will not cause current leakage to the side.
  • the hole transport layers 4 of the plurality of light emitting devices 10 do not contact each other, and the hole injection layers 6 of the plurality of light emitting devices 10 do not contact each other, so that the hole transport layers 4 and the hole injection layers 6 of the plurality of light emitting devices 10 are not shared.
  • the first electrode 1 is the bottom electrode
  • the second electrode 5 is the top electrode
  • the multiple first electrodes are separated from each other and have no contact
  • the multiple second electrodes 5 are in contact with each other to form a whole, serving as a second electrode layer, which provides the same signal to multiple light-emitting devices.
  • the structures of the film layers included in the light-emitting device include the following embodiments.
  • the display substrate 100 includes an electron transport film layer 12 disposed on the pixel defining layer 8 and the light-emitting layer 3 of the plurality of light-emitting devices 10 away from the substrate 11, and the portion of the electron transport film layer 12 located within the plurality of openings 81 is the electron transport layer 2 of the plurality of light-emitting devices 10, and the electron transport layer 2 of the light-emitting device 10 includes a first portion G1 disposed on the light-emitting layer 3 and a second portion G2 disposed on the side wall of the opening 81, and the electron transport layers 2 of the plurality of light-emitting devices 10 are in contact with each other.
  • the electron transport film layer 12 also includes a portion located on the surface of the pixel defining layer 8, called the electron transport connection layer 2', and the electron transport layers 2 of the multiple light-emitting devices 10 are in contact with each other through the electron transport connection layer 2'.
  • the electron transport layers 2 of multiple light-emitting devices 10 are in contact with each other, that is, the sub-pixels of multiple light-emitting devices 10 share the electron transport film layer 12.
  • the electron transport layer does not need to be patterned. Since the lateral conductivity of the electron transport layer 2 is extremely low, it will not cause current leakage to the side.
  • the hole transport layers 4 of the plurality of light emitting devices 10 do not contact each other, and the hole injection layers 6 of the plurality of light emitting devices 10 do not contact each other, so that the hole transport layers 4 and the hole injection layers 6 of the plurality of light emitting devices 10 are not shared.
  • the electron transport layer 21 of the light emitting device 10 is located within the plurality of openings 81 , and the electron transport layers 21 of the plurality of light emitting devices 10 are not in contact with each other.
  • the electron transport layers 2 of multiple light-emitting devices 10 do not contact each other, that is, the electron transport layers 2 of the sub-pixels of multiple light-emitting devices 10 are not shared.
  • the entire layer of the initial electron transport layer 2 needs to be exposed and etched to pattern it, forming multiple electron transport layers 2 respectively located in multiple openings, thereby further reducing crosstalk of electrical signals and improving device efficiency.
  • the hole transport layers 4 of the plurality of light emitting devices 10 are in contact with each other, and the hole injection layers 6 of the plurality of light emitting devices 10 are in contact with each other, so that the hole transport layers 4 and the hole injection layers 6 of the plurality of light emitting devices 10 may be shared.
  • the first electrode 1 is the top electrode
  • the second electrode 5 is the bottom electrode
  • the multiple second electrodes are separated from each other and have no contact
  • the multiple first electrodes 5 are in contact with each other to form a whole, serving as a first electrode layer, which provides the same signal to multiple light-emitting devices.
  • the beneficial effects of the above-mentioned display substrate 100 are the same as the beneficial effects of the light-emitting device 10 provided in the first aspect of the present disclosure, and will not be described in detail here.
  • Some embodiments of the present disclosure further provide a display device 1000 , as shown in FIG. 22 , comprising the above-mentioned display substrate 100 .
  • the display device 1000 provided in the embodiments of the present disclosure may be any device that displays either motion (e.g., video) or fixed (e.g., still images) and whether text or images. More specifically, it is expected that the embodiments may be implemented in or associated with a variety of electronic devices, such as (but not limited to) mobile phones, wireless devices, personal data assistants (PDAs), handheld or portable computers, GPS receivers/navigators, cameras, MP4 video players, camcorders, game consoles, watches, clocks, calculators, television monitors, flat panel displays, computer monitors, automotive displays (e.g., odometer displays, etc.), navigators, cockpit controls and/or displays, displays of camera views (e.g., displays of rear-view cameras in vehicles), electronic photographs, electronic billboards or signs, projectors, architectural structures, packaging, and aesthetic structures (e.g., displays of images of a piece of jewelry), etc.
  • PDAs personal data assistants
  • GPS receivers/navigators cameras
  • MP4 video players

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Abstract

提供一种发光器件及其制备方法、显示基板。所述发光器件，包括：依次层叠设置的第一电极、电子传输层、发光层、空穴传输层和第二电极；所述电子传输层包括至少一层电子传输子层，所述至少一层电子传输子层中，最靠近所述发光层一侧的电子传输子层为C轴取向的电子传输子层；其中，C轴取向为垂直于发光层所在平面的方向，在所述C轴取向的电子传输子层中，沿垂直于所述发光层所在平面的方向上，与相邻的晶粒无交叠的晶粒的数量占总晶粒数量的比例大于85％。

Description

发光器件及其制备方法、显示基板 技术领域
本公开涉及显示技术领域，尤其涉及一种发光器件及其制备方法、显示基板。
背景技术
量子点发光二极管(Quantum Dot Light Emitting Diodes，QLED)器件具有色域高、自发光、启动电压低、响应速度快等优点，因此在显示领域中得到了广泛的关注。量子点发光二极管器件的基板工作原理是：分别向量子点发光层的两侧注入电子和空穴，这些电子和空穴在量子点发光层中复合后形成光子，最终通过光子发光。
发明内容
一方面，提供一种发光器件，发光器件包括：依次层叠设置的第一电极、电子传输层、发光层、空穴传输层和第二电极；所述电子传输层包括至少一层电子传输子层，所述至少一层电子传输子层中，最靠近所述发光层一侧的电子传输子层为C轴取向的电子传输子层；其中，C轴取向为垂直于所述发光层所在平面的方向，在所述C轴取向的电子传输子层中，沿垂直于所述发光层所在平面的方向上，与相邻的晶粒无交叠的晶粒的数量占总晶粒数量的比例大于85％。
在一些实施例中，在所述C轴取向的电子传输子层中，在第一方向上，与相邻晶粒的间距小于晶粒本身的尺寸的晶粒数量占总晶粒的数量的比例大于50％，其中，所述第一方向平行于所述发光层所在平面。
在一些实施例中，所述电子传输层由一层所述电子传输子层组成，所述电子传输子层为C轴取向的电子传输子层，所述C轴取向的电子传输子层的膜层厚度为30nm～90nm。
在一些实施例中，所述电子传输层由两层电子传输子层组成，所述两层电子传输子层中，靠近所述发光层一侧的电子传输子层设置为C轴取向的电子传输子层，远离所述发光层一侧的电子传输子层为非C轴取向的电子传输子层；所述电子传输子层中的每一层电子传输子层的膜层厚度均为15nm～40nm。
在一些实施例中，所述电子传输层包括至少三层电子传输子层；所述至少三层电子传输层中，最靠近发光层一侧的电子传输子层为C轴取向的电子传输子层；最靠近所述第一电极一侧的电子传输子层为C轴取向的电子传输 子层或非C轴取向的电子传输子层；设置于所述最靠近发光层一侧的电子传输子层与所述最靠近所述第一电极一侧的电子传输子层之间的电子传输子层为非C轴取向的电子传输子层。
在一些实施例中，所述电子传输层由三层传输子层组成，所述电子传输层中的每一层电子传输子层的膜层厚度均为10nm～30nm。
在一些实施例中，所述三层电子传输子层中，处于中间位置的电子传输子层的厚度与所述电子传输层的总厚度的比值范围为0.25～0.35。
在一些实施例中，最靠近所述第一电极一侧的电子传输子层为C轴取向的电子传输子层；所述最靠近发光层一侧的C轴取向的电子传输子层相对于最靠近所述第一电极一侧的C轴取向的电子传输子层的C轴取向程度更大。
在一些实施例中，各所述电子传输子层的材料包括的相同原子为氧原子和锌原子。
在一些实施例中，所述电子传输层包括至少两层电子传输子层，最靠近发光层一侧的电子传输子层的氧空位占比相比其他电子传输子层的氧空位占比低。
在一些实施例中，所述最靠近发光层一侧的电子传输子层的氧空位相比其他电子传输子层的氧空位占比低5％～25％。
在一些实施例中，所述最靠近发光层一侧的电子传输子层的LUMO能级相对其他电子传输子层的LUMO能级更接近所述发光层的LUMO能级。
在一些实施例中，所述电子传输层包括三层电子传输层，处于中间位置的电子传输子层包括掺杂原子和有机高分子材料，所述掺杂原子包括镁、镓中的至少一者，所述有机高分子材料包括氮化硼。
在一些实施例中，含掺杂原子的电子传输子层的导带能级相对不含有掺杂原子的电子传输子层的导带能级浅。
在一些实施例中，所述电子传输层的材料为无机材料中的至少一种，所述电子传输层中的各电子传输子层中均不设置配体材料。
在一些实施例中，所述发光层与最靠近所述发光层一侧的电子传输子层之间设置有中间层，所述中间层的材料为有机物或高分子聚合物，所述中间层的材料填充于所述最靠近所述发光层一侧的电子传输子层的相邻晶粒间的孔隙中。
在一些实施例中，所述发光器件为倒置结构，所述电子传输层中的每一电子传输子层的远离所述第一电极一侧的表面粗糙度是0.5nm～2nm；或者，所述发光器件为正置结构，所述电子传输层中的每一电子传输子层的远离所 述第二电极一侧的表面粗糙度是0.5nm～2nm。
另一方面，提供一种发光器件的制备方法，制备方法包括：形成第一电极；在所述第一电极上形成电子传输层；在所述电子传输层上形成发光层；在所述发光层上形成空穴传输层；在所述空穴传输层上形成第二电极；或者，形成第二电极；在所述第二电极上形成空穴传输层；在所述空穴传输层上形成发光层；在所述发光层上形成电子传输层；在所述电子传输层上形成第一电极；其中，所述电子传输层包括至少一层电子传输子层，所述至少一层电子传输子层中，最靠近所述发光层一侧的电子传输子层为C轴取向的电子传输层，其中，C轴取向为垂直于所述发光层所在平面的方向，在所述C轴取向的电子传输子层中，沿垂直于所述发光层所在平面的方向上，与相邻的晶粒无交叠的晶粒的数量占总晶粒的比例大于85％。
在一些实施例中，所述在所述最靠近发光层一侧形成电子传输层的步骤包括：采用磁控溅射工艺形成所述C轴取向的电子传输子层。
在一些实施例中，所述发光层、所述第一电极或已形成的电子传输子层均为下一步骤中形成电子传输子层的基底，在所述基底上形成非C轴取向的电子传输子层，包括：采用磁控溅射工艺，在所述基底的温度为第三温度下，在所述基底上沉积电子传输子层的材料，形成非C轴取向的电子传输子层；其中，所述第三温度条件为能够使得材料形成非C轴取向的基底温度；其中，所述在所述基底上形成C轴取向的电子传输子层，包括：采用磁控溅射工艺，在所述基底的温度为第一温度或第二温度下，在所述基底上沉积电子传输子层的材料，形成C轴取向的电子传输子层；其中，所述第一温度为能够使得材料形成C轴取向的基底温度；或者，采用磁控溅射工艺，在所述基底的温度为第二温度下，在所述基底上沉积电子传输层的材料，对电子传输层的材料退火，形成C轴取向的电子传输子层；其中，所述第二温度为能够使得所沉积的材料形成C轴取向的基底温度；其中，第一温度为常温，第二温度为200～500℃，第三温度为100℃。
在一些实施例中，所述发光层、所述第一电极或已形成的电子传输子层均为下一步骤中形成电子传输子层的基底，在所述基底上形成非C轴取向的电子传输子层，还包括：采用磁控溅射工艺，在第一溅射功率下在所述基底上沉积电子传输子层的材料，形成非C轴取向的电子传输子层；其中，所述第一溅射功率为能够使得材料形成非C轴取向的溅射功率；其中，所述在所述基底上形成C轴取向的电子传输子层，包括：采用磁控溅射工艺，在第二溅射功率下在所述基底上沉积电子传输子层的材料，形成C轴取向的电子传 输子层；其中，所述第二溅射功率为能够使得材料形成C轴取向的溅射功率；其中，第一溅射功率大于第二溅射功率。
又一方面，提供一种显示基板，包括多个如上任一实施例所述的发光器件。
在一些实施例中，所述显示基板还包括：基板和设置于所述基板一侧的像素界定层，所述像素界定层包括多个开口；所述多个发光器件的第一电极位于所述基板和所述像素界定层之间，每个开口暴露一个发光器件的第一电极的至少一部分，所述发光器件的电子传输层、发光层、空穴传输层和第二电极依次层叠于所述第一电极上，且位于所述开口内；其中，所述发光器件的电子传输层位于所述开口内，且多个发光器件的电子传输层彼此不接触；或者，所述显示基板包括设置于所述像素界定层和所述多个发光器件的第一电极远离所述基板一侧的电子传输膜层，所述电子传输膜层中位于所述多个开口内的部分为所述多个发光器件的电子传输层，每个发光器件的电子传输层包括设置于所述发光层一侧的第一部分和设置于所述开口的侧壁上的第二部分，所述多个发光器件的电子传输层彼此接触。
在一些实施例中，所述显示基板还包括：基板和设置于所述基板一侧的像素界定层，所述像素界定层包括多个开口；所述多个发光器件的第二电极位于所述基板和所述像素界定层之间，每个开口暴露一个发光器件的第二电极的至少一部分，所述发光器件的空穴传输层、发光层、电子传输层和第一电极依次层叠于所述第二电极上，且位于所述开口内；其中，所述发光器件的电子传输层位于所述开口内，且多个发光器件的电子传输层彼此不接触；或者，所述显示基板包括设置于所述像素界定层和所述多个发光器件的发光层远离所述基板一侧的电子传输膜层，所述电子传输膜层中位于所述多个开口内的部分为所述多个发光器件的电子传输层，每个发光器件的电子传输层包括设置于所述发光层一侧的第一部分和设置于所述开口的侧壁上的第二部分，所述多个发光器件的电子传输层彼此接触。
附图说明
为了更清楚地说明本公开中的技术方案，下面将对本公开一些实施例中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例的附图，对于本领域普通技术人员来讲，还可以根据这些附图获得其他的附图。此外，以下描述中的附图可以视作示意图，并非对本公开实施例所涉及的产品的实际尺寸、方法的实际流程、信号的实际时序等的限制。
图1A为本公开根据一些实施例所提供的一种发光器件正置的结构图；
图1B为本公开根据一些实施例所提供的另一种发光器件倒置的结构图；
图1C为本公开根据一些实施例所提供的又一种发光器件正置的结构图；
图1D为本公开根据一些实施例所提供的再一种发光器件倒置的结构图；
图2A为本公开根据一些实施例无定形的电子传输层的XRD测试结果图；
图2B为本公开根据一些实施例C轴取向的电子传输子层的XRD测试结果图；
图2C为本公开根据一些实施例C轴取向的电子传输子层的AFM测试结果图；
图2D为本公开根据一些实施例C轴取向的电子传输子层的AFM测试结果图；
图2E为本公开根据一些实施例C轴取向的电子传输子层的AFM测试结果图；
图2F为本公开根据一些实施例C轴取向的电子传输子层的AFM测试结果图；
图3A为本公开根据一些实施例C轴取向的溅射型电子传输层薄膜的截面图；
图3B为本公开根据一些实施例C轴取向的电化学沉积型电子传输层薄膜的截面图；
图4A为本公开根据一些实施例所提供的一种发光器件倒置的结构图；
图4B为本公开根据一些实施例所提供的一种发光器件正置的结构图；
图5A为本公开根据一些实施例所提供的另一种发光器件倒置的结构图；
图5B为本公开根据一些实施例所提供的另一种发光器件正置的结构图；
图6A为本公开根据一些实施例所提供的又一种发光器件倒置的结构图；
图6B为本公开根据一些实施例所提供的又一种发光器件正置的结构 图；
图7为本公开根据一些实施例所提供的再一种发光器件倒置的结构图；
图8A为本公开根据一些实施例所提供的发光器件的电流密度随电压变化曲线图；
图8B为本公开根据一些实施例所提供的发光器件的电流效率随电压变化曲线图；
图8C为本公开根据一些实施例所提供的发光器件的电流密度随电压变化曲线图；
图8D为本公开根据一些实施例所提供的发光器件的电流效率随电压变化曲线图；
图9A为本公开根据一些实施例所提供的发光器件的另一电流密度随电压的变化曲线图；
图9B为本公开根据一些实施例所提供的发光器件的另一电流效率随电压的变化曲线图；
图10A为本公开根据一些实施例所提供的发光器件的又一电流密度随电压的变化曲线图；
图10B为本公开根据一些实施例所提供的发光器件的又一电流效率随电压的变化曲线图；
图11为本公开根据一些实施例所提供的发光器件的再一电流密度随电压的变化曲线图；
图12为本公开根据一些实施例所提供的发光器件的再一电流效率随电压的变化曲线图；
图13为本公开根据一些实施例所提供的发光器件的一种结构图；
图14A为本公开根据一些实施例所提供的发光器件的又一种结构图；
图14B为本公开根据一些实施例所提供的发光器件的又一种结构图；
图15A为本公开根据一些实施例所提供的发光器件的制备方法的一种流程图；
图15B为本公开根据一些实施例所提供的发光器件的制备方法的一种流程图；
图16为本公开根据一些实施例所提供的发光器件的制备方法的又一种流程图；
图17A为本公开根据一些实施例所提供的发光器件的制备方法的又一种 流程图；
图17B为本公开根据一些实施例所提供的发光器件的制备方法的又一种流程图；
图18为本公开根据一些实施例所提供的发光器件的制备方法的又一种流程图；
图19A为本公开根据一些实施例所提供的发光器件的制备方法的又一种流程图；
图19B为本公开根据一些实施例所提供的发光器件的制备方法的又一种流程图；
图20为本公开根据一些实施例所提供的显示基板的结构图；
图21A为本公开根据一些实施例所提供的显示基板的结构图；
图21B为本公开根据一些实施例所提供的另一种显示基板的结构图；
图21C为本公开根据一些实施例所提供的又一种显示基板的结构图；
图21D为本公开根据一些实施例所提供的再一种显示基板的结构图；
图22为本公开根据一些实施例所提供的显示装置的结构图。
具体实施方式
下面将结合附图，对本公开一些实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本公开一部分实施例，而不是全部的实施例。基于本公开所提供的实施例，本领域普通技术人员所获得的所有其他实施例，都属于本公开保护的范围。
除非上下文另有要求，否则，在整个说明书和权利要求书中，术语“包括(comprise)”及其其他形式例如第三人称单数形式“包括(comprises)”和现在分词形式“包括(comprising)”被解释为开放、包含的意思，即为“包含，但不限于”。在说明书的描述中，术语“一个实施例(one embodiment)”、“一些实施例(some embodiments)”、“示例性实施例(exemplary embodiments)”、“示例(example)”、“特定示例(specific example)”或“一些示例(some examples)”等旨在表明与该实施例或示例相关的特定特征、结构、材料或特性包括在本公开的至少一个实施例或示例中。上述术语的示意性表示不一定是指同一实施例或示例。此外，所述的特定特征、结构、材料或特点可以以任何适当方式包括在任何一个或多个实施例或示例中。
以下，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在 本公开实施例的描述中，除非另有说明，“多个”的含义是两个或两个以上。
在描述一些实施例时，可能使用了“耦接”和“连接”及其衍伸的表达。术语“连接”应做广义理解，例如，“连接”可以是固定连接，也可以是可拆卸连接，或成一体；可以是直接相连，也可以通过中间媒介间接相连。术语“耦接”例如表明两个或两个以上部件有直接物理接触或电接触。术语“耦接”或“通信耦合(communicatively coupled)”也可能指两个或两个以上部件彼此间并无直接接触，但仍彼此协作或相互作用。这里所公开的实施例并不必然限制于本文内容。
“A、B和C中的至少一个”与“A、B或C中的至少一个”具有相同含义，均包括以下A、B和C的组合：仅A，仅B，仅C，A和B的组合，A和C的组合，B和C的组合，及A、B和C的组合。
“A和/或B”，包括以下三种组合：仅A，仅B，及A和B的组合。
如本文中所使用，根据上下文，术语“如果”任选地被解释为意思是“当……时”或“在……时”或“响应于确定”或“响应于检测到”。类似地，根据上下文，短语“如果确定……”或“如果检测到[所陈述的条件或事件]”任选地被解释为是指“在确定……时”或“响应于确定……”或“在检测到[所陈述的条件或事件]时”或“响应于检测到[所陈述的条件或事件]”。
本文中“适用于”或“被配置为”的使用意味着开放和包容性的语言，其不排除适用于或被配置为执行额外任务或步骤的设备。
另外，“基于”的使用意味着开放和包容性，因为“基于”一个或多个所述条件或值的过程、步骤、计算或其他动作在实践中可以基于额外条件或超出所述的值。
如本文所使用的那样，“约”、“大致”或“近似”包括所阐述的值以及处于特定值的可接受偏差范围内的平均值，其中所述可接受偏差范围如由本领域普通技术人员考虑到正在讨论的测量以及与特定量的测量相关的误差(即，测量系统的局限性)所确定。
如本文所使用的那样，“平行”、“垂直”、“相等”包括所阐述的情况以及与所阐述的情况相近似的情况，该相近似的情况的范围处于可接受偏差范围内，其中所述可接受偏差范围如由本领域普通技术人员考虑到正在讨论的测量以及与特定量的测量相关的误差(即，测量系统的局限性)所确定。例如，“平行”包括绝对平行和近似平行，其中近似平行的可接受偏差范围例如可以是5°以内偏差；“垂直”包括绝对垂直和近似垂直，其中近似垂直的可接受偏差范围例如也可以是5°以内偏差。“相等”包括绝对相等和近似相 等，其中近似相等的可接受偏差范围内例如可以是相等的两者之间的差值小于或等于其中任一者的5％。
应当理解的是，当层或元件被称为在另一层或基板上时，可以是该层或元件直接在另一层或基板上，或者也可以是该层或元件与另一层或基板之间存在中间层。
本文参照作为理想化示例性附图的剖视图和/或平面图描述了示例性实施方式。在附图中，为了清楚，放大了层的厚度和区域的面积。因此，可设想到由于例如制造技术和/或公差引起的相对于附图的形状的变动。因此，示例性实施方式不应解释为局限于本文示出的区域的形状，而是包括因例如制造而引起的形状偏差。例如，示为矩形的蚀刻区域通常将具有弯曲的特征。因此，附图中所示的区域本质上是示意性的，且它们的形状并非旨在示出设备的区域的实际形状，并且并非旨在限制示例性实施方式的范围。
量子点(Quantum Dots，QD)作为新型的发光材料，具有光色纯度高、发光量子效率高、发光颜色可调、使用寿命长等优点，称为目前新型LED(Light Emitting Diodes，发光二极管)发光材料的研究热点。因此，以量子点材料作为发光层的量子点发光二极管(Quantum Dot Light Emitting Diodes，QLED)成为了目前新型显示器件研究的主要方向。
随着消费者的消费水平的提升，高分辨率产品成为了显示产品的重点发展方向，而高分辨的全彩主动式电致量子点发光显示二极管(Active Electroluminescent Quantum Dot Light Emitting Diodes，AMQLED)产品由于需要采用掩膜蒸发的方法制备，存在一定的对位精度问题，需要有机发光二极管(Organic Light Emitting Diode，OLED)蒸镀掩模板进一步减小掩膜工艺线宽，因而无法实现更小的发光面积，限制了分辨率的进一步提升。
另一方面，AMQLED由于其在宽色域、高寿命等方面的潜在优势也得到了越来越广泛的关注，对其研究日益深入，量子点效率不断提升，基本达到产业化水平，进一步采用新的工艺和技术具有重要意义。由于量子点材料本身的特性，其一般采用印刷技术或者打印的方法，可以有效提高材料利用率，并且为大面积制备提供了有效的途径。而对于高分辨率的背板，由于像素定义区尺寸过小，对于设备的精度和稳定性都有极高的要求。
现有技术中，采用在发光器件的底部的公用层薄膜涂布光阻材料，通过曝光、显影后分别制备红、绿、蓝三种子像素发光层，并紧接着沉积顶部公用层。这种结构在高分辨率时，由于亚像素距离较近，因此不同的亚像素之间会存在严重的信号串扰问题，影响器件的显示效果。为配合量子点的湿法 成膜工艺，常采用倒置器件结构，底层为溅射工艺制备的电子传输层，能够有效避免溶液侵蚀。然后由于溅射型薄膜通常为无定形态，其导电性呈各向同性，其各个方向的导电性很高，因此容易形成侧向电流，侧向电流是指在薄膜所在平面方向上的电流，从而产生信号串扰。
基于此，本公开的一些实施例提供一种发光器件及其制备方法、显示基板。该发光器件10能够有效解决电子传输层侧向导电性过高，引起侧面漏电，信号串扰的问题。
以下对本公开提供的发光器件及其制备方法、显示基板分别进行介绍。
在本公开的一些实施例中，如图1A～图1D所示，发光器件10包括：依次层叠设置的第一电极1、电子传输层2、发光层3、空穴传输层4和第二电极5。如图1C和图1D所示，电子传输层2包括至少一层电子传输子层21，至少一层电子传输子层21中，最靠近发光层3一侧的电子传输层子层21为C轴取向的电子传输子层。
其中，C轴方向为垂直于发光层3所在平面的方向，在C轴取向的电子传输子层中，在第一方向X上，与相邻晶粒的间距小于晶粒本身的尺寸的晶粒数量占总晶粒的数量的比例大于50％，例如该比例可以为60％、70％、80％、90％或95％，其中，第一方向X平行于发光层3所在平面。沿垂直于发光层3所在平面的方向上，与相邻的晶粒无交叠的晶粒的数量占晶粒总数的比例大于85％，例如该比例可以为90％或95％。
示例性地，发光器件10可以倒置，也可以正置，第一电极1为阳极，第二电极5为阴极，如图1A和图1C所示，在发光器件10正置的情况下，第一电极1为顶电极，第二电极5为底电极，如图1B和图1D所示，在发光器件10倒置的情况下，第一电极1为底电极，第二电极5为顶电极，这里发光器件10的层叠方式并不对正置以及倒置作限定。
需要说明的是，最靠近发光层3一侧的电子传输层子层21为C轴取向的电子传输子层。如图2A所示，图2A为无定形(即非C轴取向)的电子传输层的XRD测试结果，结果中没有明显的特征衍射信号峰，表明无定形的电子传输层整体呈现无定型状态，呈各向同性。参照图2B所示，图2B为C轴取向的电子传输子层的XRD测试结果，结果相比无定形电子传输层存在一个明显的特征衍射信号峰，此信号代表一个002晶面。因此，表明C轴取向的电子传输子层在垂直方向之外的其他方向整体呈无定形状态，例如在水平方向上呈无定形状态，但是在垂直方向上有明显的结晶性。其中，垂直方向为C 轴，即垂直于发光层3所在平面的方向，水平方向为平行于发光层3所在平面的方向。
在非C轴取向的电子传输层中，由于无定形的电子传输子层薄膜的各个方向导电性均较大，为10 3～10 6Ω/cm量级，以纳米粒子型电子传输层薄膜为例，其各个方向电阻为10 7～10 8Ω/cm，除了垂直方向上的电流之外，还存在电子的侧面泄漏，电子侧面泄漏除了同样造成较大的电子漏电外，还会导致发光器件的信号串扰。参照图2C、图2D、图2E和图2F，图2C、图2D、图2E和图2F为C轴取向的电子传输子层的AFM测试结果图，C轴取向为垂直于发光层3所在平面的方向，可见C轴取向的电子传输子层在C轴上具有明显的结晶性，因此C轴取向的电子传输子层在此方向上具有良好的导电性，而在水平方向上由于存在明显的晶界，因而导电性差。这里的水平方向为平行于发光层3所在平面的方向，第一方向X为水平方向中的一个方向。通过测试，C轴取向的电子传输子层在垂直方向上导电性与无定型的电子传输子层薄膜的导电性类似，约为10 3～10 6Ω/cm量级；而在水平方向上，薄膜导电性急剧降低，约为10 12～10 14Ω/cm量级，由此可知，在C轴取向的电子传输子层中，002晶面在竖直方向上与其在水平方向上的导电性之比为10 6～10 11。因此，本公开的一些实施例提供的发光器件包括设置于靠近发光层一侧的C轴取向的电子传输子层，该电子传输子层在垂直发光层3所在平面的方向上的导电性大于该电子传输子层平行于发光层3所在平面的方向上的导电性，且该电子传输子层在垂直发光层3所在平面的方向上的导电性与该电子传输子层平行于发光层3所在平面的方向上的导电性之比为10 6～10 11。因此电子由第一电极向发光层垂直传输，而不会向侧面泄漏，从而避免造成较大的电子漏电以及串扰问题。
示例性地，电子传输层2为溅射型电子传输层，即电子传输层采用溅射工艺形成。参照图3A和图3B所示，图3A为C轴取向的溅射型电子传输层薄膜的截面图，图3B为C轴取向的电化学沉积型电子传输层薄膜的截面图，即该电子传输层采用电化学沉积工艺制成，从图3A和图3B中可知，图3A中C轴取向的溅射型电子传输层薄膜中的晶粒均沿C轴方向延伸，相邻晶粒在第一方向X上的间距相对图3B中C轴取向的电化学沉积型电子传输层薄膜中的相邻晶粒在第一方向X上的间距更小，且图3A中C轴取向的溅射型电子传输层薄膜中的晶粒的准直性相比图3B中C轴取向的电化学沉积型电子传输层薄膜中晶粒的准直性更好。
如图3A所示，C轴取向的溅射型电子传输层在第一方向X上存在明显的 晶界，从而在水平方向的导电性更低，且根据图3A所示，选取C轴取向的电子传输层中面积为1平方微米的测试区域，对该测试区域内的晶粒尺寸即间距进行测算，可以看出，部分相邻晶粒在第一方向上X的间距d1小于晶粒本身在第一方向X上的尺寸D1，相邻晶粒之间的距离更近，晶粒更紧凑，孔道更少，通过计算可得，在测试区域中，在第一方向X上，与相邻晶粒的间距小于晶粒本身的尺寸的晶粒数量为m，该测试区域内的总晶粒的数量为M，m/M大于50％，例如，m/M可以为60％、70％、80％、90％或95％，由此可以拓展到整个C轴取向的电子传输层中，与相邻晶粒的间距小于晶粒本身的尺寸的晶粒数量与总晶粒的数量的比值大于50％，由此可知，C轴取向的溅射型电子传输层中，大部分相邻晶粒之间的间距较小，这样能够避免纵向漏电，间距如果过大，各个晶体之间距离较远，存在更多的孔道，做成发光器件后可能会有较多的漏电路径，发光器件的漏电更大。因此该膜层在垂直方向上导电性更好，且有较少的漏电路径。参照图2C、图2D、图2E和图2F，在图2D和图2F所示膜层的截面图中和图2C、图2E所示的膜层的平面图中均能反映上述描述的电子传输层中晶粒之间的尺寸关系。
并且，溅射型电子传输层的晶粒具有较好的准直性，同样选取C轴取向的电子传输层中面积为1平方微米的测试区域，对该测试区域内晶粒的交叠情况进行测算，可以看出，在该测试区域内，沿垂直于发光层3所在平面的方向上，与相邻的晶粒无交叠的晶粒的数量占测试区域内晶粒总数的比例大于85％，例如，可以为90％或95％，由此可以拓展到整个C轴取向的电子传输层中，与相邻的晶粒无交叠的晶粒的数量占晶粒总数的比例大于85％，表明相互之间无交叠的晶粒的占比较高，大部分晶粒均沿C轴延伸，倾斜程度较低。参照图2C、图2D、图2E和图2F，在图2D和图2F所示膜层的截面图中和图2C、图2E所示的膜层的平面图中，均能够反映上述描述的晶粒之间的交叠关系。如图3B所示，C轴取向的电化学沉积型电子传输层中相邻晶粒在第一方向X上的间距d2较大，相邻晶粒在第一方向上X的间距d2大于晶粒本身在第一方向X上的尺寸D2，且多个晶粒中与相邻晶粒有交叠的晶粒的数量更多，晶粒的准直性较低，膜层中存在更多孔道，这样应用在发光器件中可能会有较多的漏电路径，使得器件漏电更大。因此，本公开的实施例优选图3A中C轴取向的溅射型电子传输层薄膜，且溅射制备工艺较简单。
以下介绍发光器件中电子传输层2的多种实施例，该发光器件可以为正置发光器件或倒置发光器件，所参照的附图均以倒置发光器件为例，正置发光器件的结构可参照倒置发光器件的附图以及相关介绍。
在一些实施例中，电子传输层2包括一层电子传输子层，电子传输子层21为C轴取向的电子传输子层，C轴取向的电子传输子层的膜层厚度为30nm～90nm。
在一些示例中，如图4A和图4B所示，电子传输层2由一层电子传输子层21组成，电子传输子层为C轴取向的电子传输子层，即C轴取向的电子传输子层位于第一电极1和发光层之间，C轴取向的电子传输层除制备工艺简单外，由于C轴取向的电子传输子层在垂直方向上具有良好的导电性，而在水平方向上的导电性差，因此，C轴取向的电子传输层的设置还能够减弱在其水平方向上的导电性，从而对发光器件10的侧面漏电现象具有抑制作用。
其中，C轴取向的电子传输子层的膜层厚度为30nm～90nm，例如，C轴取向的电子传输子层的膜层厚度为30nm、50nm、70nm或90nm等，这里的膜层厚度并不设限。
在另一些实施例中，电子传输层2由两层电子传输子层21组成，两层电子传输子层21中，靠近发光层3一侧的电子传输子层21设置为C轴取向的电子传输子层，远离发光层3一侧的电子传输子层21为非C轴取向的电子传输子层，电子传输子层21中的每一层电子传输子层21的膜层厚度均为15nm～40nm。
在一些示例中，如图5A和图5B所示，电子传输层2由两层电子传输子层21组成，其中，靠近发光层3一侧的电子传输子层21(第二电子传输子层210)设置为C轴取向的电子传输子层，远离发光层3一侧的电子传输子层21(第一电子传输子层211)为非C轴取向的电子传输子层，且第一电子传输子层和第二电子传输子层均为通过溅射工艺形成。这样的设置方式同样能够对发光器件10的侧面漏电现象起到抑制作用。
通过将电子传输层设置为包括两层电子传输子层21，在保证靠近发光层3一侧的电子传输子层21为C轴取向，起到抑制侧面漏电的作用的同时，通过在某一层电子传输子层的形成工艺中进行补氧或者掺杂等操作，减弱该电子传输子层在C轴方向上的导电性，有利于发光器件的载流子平衡，此部分内容在后边做详细介绍。
其中，电子传输子层21中的每一层电子传输子层21的膜层厚度均为15nm～40nm，即C轴取向的电子传输子层和非C轴取向的电子传输子层的膜层厚度均为15nm～40nm，例如，C轴取向的电子传输子层和非C轴取向的电子传输子层的膜层厚度为15nm、25nm、35nm或40nm等，这里的膜层厚度并不设限。
在又一些实施例中，电子传输层2包括至少三层电子传输子层21，至少三层电子传输层中，最靠近发光层3一侧的电子传输子层21(第二电子传输子层210)为C轴取向的电子传输子层；最靠近第一电极1一侧的电子传输子层(第一电子传输子层211)为C轴取向的电子传输子层或非C轴取向的电子传输子层；设置于最靠近发光层3一侧的电子传输子层21与最靠近第一电极1一侧的电子传输子层21之间的电子传输子层21(中间电子传输子层212)为非C轴取向的电子传输子层，其中，中间电子传输子层212包括至少一层。
在一些示例中，参照图6A和图6B所示，电子传输层2包括三层电子传输子层21，其中，最靠近第一电极1的第一电子传输子层211为C轴取向的电子传输子层，最靠近发光层3一侧的第二电子传输子层210为C轴取向的电子传输子层，设置于两层C轴取向的电子传输子层之间的中间电子传输子层212为非C轴取向的电子传输子层。
在另一些示例中，参照图6A和图6B所示，电子传输层2包括三层电子传输子层，其中，最靠近第一电极1的第一电子传输子层211为非C轴取向的电子传输子层，最靠近发光层3一侧的第二电子传输子层210为C轴取向的电子传输子层，设置于两层C轴取向的电子传输子层之间的中间电子传输子层212为非C轴取向的电子传输子层。
上述两种示例中的电子传输层2均设置有三层电子传输子层21，且三层电子传输子层21中均设置有C轴取向的电子传输子层，根据前述C轴取向的特性可知，这样的设置方式同样能够对发光器件10的侧面漏电现象起到抑制作用。
也就是说，在电子传输层包括至少三层电子传输子层的情况下，只要保证靠近发光层的电子传输子层为C轴取向，且中间电子传输子层212是非C轴取向即可，通过将电子传输层设置为包括至少三层电子传输子层21，在保证靠近发光层3一侧的电子传输子层21为C轴取向，起到抑制侧面漏电的作用的同时，通过在某一层电子传输子层的形成工艺中进行补氧或者掺杂等操作，减弱该电子传输子层在C轴方向上的导电性，有利于发光器件10的载流子平衡，此部分内容在后边做详细介绍。
在一些实施例中，电子传输层2包括三层传输子层21，电子传输子层21中的每一层电子传输子层21的膜层厚度均为10nm～30nm。
在一些示例中，参照图6A所示，电子传输层2由三层电子传输子层组成，其中，在第一电极1上层叠的膜层为C轴取向的电子传输子层，最靠近发光 层3一侧的电子传输子层21为C轴取向的电子传输子层，设置于两层C轴取向的电子传输子层之间的膜层为非C轴取向的电子传输子层，其电子传输子层21中的每一层电子传输子层21的膜层厚度均为10nm～30nm，例如，C轴取向的电子传输子层和非C轴取向的电子传输子层的膜层厚度为10nm、20nm或30nm等，这里的膜层厚度并不设限。
在另一些示例中，继续参照图6A和图6B所示，电子传输层2由三层电子传输子层组成，其中，在第一电极1上层叠的膜层为非C轴取向的电子传输子层，最靠近发光层3一侧的电子传输子层21为C轴取向的电子传输子层，设置于两层C轴取向的电子传输子层之间的膜层为非C轴取向的电子传输子层，其电子传输子层21中的每一层电子传输子层21的膜层厚度均为10nm～30nm，例如，C轴取向的电子传输子层和非C轴取向的电子传输子层的膜层厚度为10nm、20nm或30nm等，这里的膜层厚度并不设限。
在一些实施例中，如图6A和图6B所示，电子传输层2中的最靠近发光层一侧的电子传输子层(第二电子传输子层210)和最靠近第一电极1一侧的电子传输子层21(第一电子传输子层211)均为C轴取向的电子传输子层，最靠近发光层3一侧的C轴取向的电子传输子层相对于最靠近第一电极1一侧的C轴取向的电子传输子层的C轴取向程度更大。
需要说明的是，电子传输子层的C轴取向可以用以下方法进行测试：对电子传输子层进行XRD测试，其薄膜厚度选取50nm左右，掠角1-2°以内；示例性地，在C轴取向的电子传输子层的XRD测试结果中，薄膜基线信号在500-1500a.u.，002晶面的信号强度超过基线500a.u.以上，认为有C轴取向；且在C轴取向的膜层中，002晶面的信号强度超过基线500-5000a.u.是一个比较常见的范围，超过越多，002晶面的衍射信号更强，表明C轴取向的电子传输子层的C轴取向程度越大，同时代表C轴取向的电子传输子层在竖直方向上在明显的结晶性。通过以上测试可知，靠近发光层3一侧的C轴取向的电子传输子层中的002晶面信号强度与最靠近第一电极1一侧的C轴取向的电子传输子层中的002晶面信号强度相比，超过基线更多，也就是说，靠近发光层3一侧的C轴取向的电子传输子层的C轴取向程度更大，晶粒准直性越好，且该电子传输子层在垂直发光层3所在平面的方向上的导电性与在该电子传输子层平行于发光层3所在平面的方向上的导电性之比更大，因此，最靠近发光层3一侧的C轴取向的电子传输子层相对于最靠近第一电极1一侧的C轴取向的电子传输子层来说，对于发光器件10的侧面漏电现象的抑制作用更为明显，有利于发光器件10中的载流子平衡，提升发光器件10的效 率。
在一些实施例中，各电子传输子层21的材料包括的相同的原子为氧原子和锌原子。
示例性地，参照图4A、图5A和图6A所示，在电子传输层2分别为一层、两层或三层的情况下，每一电子传输子层21的材料均包括相同的原子，即氧原子和锌原子。示例性地，各层电子传输子层21的材料为氧化锌(ZnO)或者掺杂有其他原子的氧化锌，掺杂原子例如为镁(Mg)或者镓(Ga)。
需要说明的是，图8A～图12为本公开的发明人对发光器件做的电流密度以及电流效率的仿真测试，上述仿真测试所基于的发光器件的结构及除电子传输层之外的其他各膜层材料和厚度、制备工艺如下：如图7所示，该发光器件包括依次层叠的第一电极1、电子传输层2、发光层3、空穴传输层4、空穴注入层6、第二电极5和覆盖层7，其中第一电极1是通过沉积厚度80nm～100nm不透明的银，上方再沉积厚度为8nm～10nm的ITO(氧化铟锡)制备得到，发光层3是通过沉积的厚度为15nm～30nm的CdSe(硒化镉)得到，空穴传输层4是通过沉积两层空穴传输材料制备得到，其中靠近发光层一侧的空穴传输材料为厚度5nm～10nm的氧化钼(MoOx)，远离发光层3一侧的空穴传输材料为厚度20nm～30nm的氧化镍(NiOx)，空穴注入层6为沉积5nm～10nm的氧化钼(MoOx)材料制备得到，第二电极5通过沉积厚度10nm的不透明材料银制备得到，设置在第二电极5上的覆盖层7的厚度为70nm的有机材料制备得到，且均以倒置发光器件为例进行说明。电子传输层的材料及厚度、制备工艺为在每一仿真测试中的变量，即在每一仿真测试中，除电子传输层之外的其他膜层均满足上述设定。其中，图8A～图12所示，图中标注的ZnO表示该电子传输子层的材料是ZnO；c-ZnO表示该电子传输子层的材料是ZnO，且电子传输子层为C轴取向；ZMO表示该电子传输子层的材料是掺Mg的ZnO(也可称为氧化镁锌(ZnMgO))。ZMO/c-ZnO表示两层电子传输子层分别为依次设置于第一电极一侧的氧化镁锌膜层和一层C轴取向的氧化锌膜层，c-ZnO/ZMO/c-ZnO表示三层电子传输子层分别为依次设置在第一电极一侧的C轴取向的氧化锌膜层、氧化镁锌膜层和C轴取向的氧化锌膜层，即两层氧化锌膜层中间插入一层氧化镁锌膜层。
以下对发光器件中电子传输子层的厚度与电流效率之间的关系做介绍。
在一些实施例中，三层电子传输子层21中，处于中间位置的电子传输子层21的厚度与电子传输层2的总厚度的比值范围为0.23～0.35。
在一些示例中，参照图6A和图6B所示，图6A和图6B中的发光器件的 电子传输层2均包括三层电子传输子层，其中，处于中间位置的电子传输子层21的厚度与电子传输层2的总厚度的比值范围为0.23～0.35，例如，处于中间位置的电子传输子层21的厚度为10nm，则电子传输层2的总厚度为30nm，处于中间位置的电子传输子层21的厚度为20nm，则电子传输层2的总厚度为60nm，处于中间位置的电子传输子层21的厚度为30nm，则电子传输层2的总厚度为90nm。这里对与中间位置的电子传输子层21相邻的两层电子传输层的总厚度不作限定。
以下以发光器件的电子传输层2包括三层电子传输层时，对发光器件在三层电子传输子层具有不同厚度的情况下做的仿真实验，参照图11和图12所示，c-ZnO/ZMO/c-ZnO表示三层电子传输子层分别为依次设置在第一电极一侧的C轴取向的氧化锌膜层、氧化镁锌膜层和C轴取向的氧化锌膜层，即两层氧化锌膜层中间插入一层氧化镁锌膜层。其中，图11示出了电子传输层包括三层电子传输子层，且电子传输层的总厚度不变，均为39nm时，所对应的电子传输层的电流效率随电压的变化规律，从图中可得，在三层电子传输子层的厚度分别为13.5nm、12nm、13.5nm时，对应发光器件10的效率最高，此时处于中间位置的电子传输子层21nm的厚度与电子传输层2的总厚度的比值为0.31；在三层电子传输子层的厚度分别为12nm、15nm、12nm时，对应发光器件10的效率较好，此时处于中间位置的电子传输子层21的厚度与电子传输层2的总厚度的比值为0.23。由此可得，电子传输层包括三层电子传输子层时，处于中间位置的电子传输子层21的厚度与电子传输层2的总厚度的比值在0.23～0.35范围内，电流密度较低，能够有效减弱电信号串扰，提高发光器件10的效率，使得发光器件10的使用寿命更长。图12示出了电子传输层包括三层电子传输子层，电子传输层的总厚度改变，三层电子传输子层的厚度差保持相同时，所对应的电子传输层的电流效率随电压的变化规律，从图中能够看出，电子传输层的总厚度越大，则发光器件10的电流效率越高，发光器件10的使用寿命更长。
以下介绍对电子传输子层进行补氧操作所带来的结构及特性变化。
在一些实施例中，电子传输层2包括至少两层电子传输子层21，最靠近发光层3一侧的电子传输子层21的氧空位占比相比其他电子传输子层21的氧空位占比低。
需要说明的是，如图5A和图5B所示，电子传输层2包括两层电子传输子层21，其中，最靠近发光层3一侧的电子传输子层21(第二电子传输子层210)的氧空位占比相比其他电子传输子层(第一电子传输子层211)的氧空 位占比低，或者，如图6A所示，电子传输层2包括三层电子传输子层21，其中，最靠近发光层3一侧的电子传输子层21(第二电子传输子层210)的氧空位占比相比其他电子传输子层(第一电子传输子层211和中间电子传输子层210)的氧空位占比低。
其中，氧空位(OV)是金属氧化物缺陷的一种，是金属氧化物在特定外界环境下(如高温、还原处理等)造成的晶格中氧的脱离，导致氧缺失形成氧空位，例如在氧化锌薄膜中的氧空位是指氧化锌晶格中由于氧的脱离形成空位。电子传输子层中的氧空位占比低说明氧化锌晶格中由于氧的脱离更少，氧化锌缺陷更小，这里降低氧空位占比主要是通过在制备最靠近发光层3一侧的电子传输子层21的工艺中补充氧气来实现，从而将氧化锌晶格中氧空位补入氧原子，通过XPS测试，工艺中补充氧气后制备的电子传输子层21较未补入氧气制备得到的电子传输子层的氧空位占比降低，通过降低第二电子传输子层210的氧空位占比，能够减弱第二电子传输子层210的导电性，降低电子注入，有利于发光器件的载流子平衡，提高发光效率，以下通过对发光器件的仿真测试来印证上述效果。
如图8A和图8B所示，对两个发光器件的电流密度以及电流效率进行测试，其中一个发光器件中的电子传输层包括单层氧化锌薄膜，该氧化锌薄膜的厚度为39nm，采用磁控溅射工艺制备得到，另一个发光器件中的电子传输层包括两层电子传输子层，均为厚度为19.5nm的氧化锌薄膜，均采用磁控溅射工艺制备得到，其中在第二层电子传输子层的制备工艺中通入10％的氧气，第二层电子传输子层指靠近发光层的电子传输子层，且第二层电子传输子层为C轴取向的电子传输子层，从图8A中能够看出，相比单层氧化锌薄膜，第二层电子传输子层中补入氧气后，电流密度降低，说明第二层电子传输子层21的导电性减弱，降低了电子注入，参照图8B，相比单层氧化锌薄膜，第二层电子传输子层中补入氧气后，发光器件10中的载流子平衡得以提高，发光器件10的效率更高。
在一些示例中，可以将电子传输层中的每层电子传输子层均补充氧气，使得每层电子传输子层的导电性均减弱，从而降低电子注入，使得发光器件的载流子平衡性更好，以得到更优的发光效率。
在一些实施例中，在最靠近发光层3一侧的电子传输子层21的制备中的补氧量为0～10％，示例性地，该补氧量为8％。
如图8C和图8D所示，对五个发光器件的电流密度以及电流效率进行测试，五个发光器件的电子传输层均包括有三层电子传输子层，其中三层电子 传输子层中，第一电子传输子层211以及第二电子传输子层210均为C轴取向的氧化锌薄膜，中间电子传输子层212为氧化镁锌薄膜，第一电子传输子层211、中间电子传输子层212和第二电子传输子层210的厚度分别为13.5nm、12nm、13.5nm，均由磁控溅射工艺制备得到。在制备第二层电子传输子层的的制备工艺中分别通入不同的氧含量，从图8C中可以看出，在补氧量为0～10％时，发光器件10的电流密度降低，说明第二层电子传输子层21的导电性减弱，降低了电子注入，参照图8D，在第二层电子传输子层中补入氧气后，且补氧量为8％时，发光器件10中的载流子平衡得到的效果最佳，同时发光器件10的效率最高。
在一些实施例中，最靠近发光层3一侧的电子传输子层21的氧空位占比相比其他电子传输子层21的氧空位占比低5％～25％。
需要说明的是，最靠近发光层3一侧的电子传输子层21的氧空位占比更低，即最靠近发光层3一侧的电子传输子层21的氧含量高，能够降低该电子传输子层21的导电性，降低电子注入，从而有利于发光器件10中的载流子平衡，提升发光器件10的效率。
在一些实施例中，所述最靠近发光层一侧的电子传输子层(第二电子传输子层210)的LUMO能级相对其他电子传输子层的LUMO能级更接近所述发光层的LUMO能级。
需要说明的是，LUMO(Lowest Unoccupied Molecular Orbital)能级表示未占有电子的能级最低的轨道能级。示例性地，通过在第二电子传输子层210的制备过程中补入氧气，调整第二电子传输子层210和发光层3之间的能级差，使得第二电子传输子层210的LUMO能级更接近发光层的LUMO能级，这样能够提高载流子迁移率，进而降低发光器件10的工作电压，延长发光器件10的寿命。并且，通过通入氧气带来第二电子传输子层210的LUMO能级的变化，这样的设置有利于平衡由于电子传输层2的导电性降低带来的器件电压升高的情况，从而制备提升发光器件10的效率。
以下介绍对电子传输子层进行掺杂操作所带来的结构及特性变化。
在一些实施例中，电子传输层2包括三层电子传输层21，处于中间位置的电子传输子层21包括掺杂原子和有机高分子材料，掺杂原子包括镁、镓中的至少一者，有机高分子材料包括氮化硼。
示例性地，参照图6A所示，电子传输层2包括三层电子传输子层21，处于中间位置的电子传输子层21(中间电子传输子层212)为非C轴取向的电子传输子层，中间电子传输子层212除包括氧原子和锌原子之外，还包括 掺杂原子和有机高分子材料，掺杂原子包括镁(Mg)、镓(Ga)中的至少一者，也就是说，该非C轴取向的电子传输子层为掺镁的氧化锌(ZnO)膜层或者掺镓的氧化锌(ZnO)膜层，也可以为氧化镁锌(ZnMgO)膜层以及含有氮化硼有机高分子材料的膜层，通过对中间电子传输子层212进行掺杂，能够减弱第二电子传输子层210的导电性，降低电子注入，有利于发光器件的载流子平衡，提高效率，以下通过对发光器件的仿真测试来印证上述效果。
参照图9A和图9B所示，图9A为电流密度随电压的变化曲线图，图9B为电流效率随电压的变化曲线图，结合图9A和图9B，对三个发光器件的电流密度以及电流效率进行测试，其中第一个发光器件中的电子传输层包括单层C轴取向的氧化锌薄膜，厚度为39nm，第二个发光器件中电子传输层包括两层电子传输子层，分别为氧化镁锌膜层和C轴取向的氧化锌膜层，两膜层的厚度均为19.5nm；第三个发光器件的电子传输层包括三层电子传输子层，分别为C轴取向的氧化锌膜层、氧化镁锌膜层和C轴取向的氧化锌膜层，即两层氧化锌膜层中间插入一层氧化镁锌膜层，三膜层的厚度分别为13.5nm、12nm、13.5nm。从图9A中能够看出，相比单层C轴取向的氧化锌薄膜，设置有氧化镁锌膜层的发光器件，电流密度更低，从而能够减弱电子传输层的导电性，降低电子注入。参照图9B，发光器件10的电子传输层为两层氧化锌膜层中间插入一层氧化镁锌膜层的情况下，发光器件10中的载流子平衡效果更佳，发光器件10的电流效率更高，说明在中间电子传输子层中掺入掺杂原子(例如镁)可以提升发光器件的电流效率。
在一些示例中，参照图10A和图10B所示，对两个发光器件的电流密度以及电流效率进行测试，其中一个发光器件中的电子传输层包括氧化镁锌膜层和氧化锌膜层，两个薄膜的厚度均为19.5nm，且通过溅射工艺制备得到，另一个发光器件中的电子传输层包括两层电子传输子层，均为氧化锌薄膜，两薄膜的厚度均为19.5nm，且通过溅射工艺制备得到。其中在第二层电子传输子层的制备工艺中通入10％的氧气，第二层电子传输子层指靠近发光层的电子传输子层，从图10A中能够看出，相比双层氧化锌薄膜，设置有氧化镁锌膜的发光器件，电流密度更低，电子传输子层21的导电性减弱，降低了电子注入，参照图10B，相比双层氧化锌薄膜，设置有氧化镁锌膜的发光器件，载流子平衡效果更佳，发光器件10的效率更高，说明相比于在电子传输子层中补入氧气，在电子传输子层中掺入掺杂离子对发光器件的效率的提升效果更好。
在一些实施例中，含掺杂原子的电子传输子层21的导带能级相对不含有 掺杂原子的电子传输子层21的导带能级浅。例如掺镁的氧化锌膜层的导带能级相对氧化锌膜层的导带能级浅。
通过上述设置，在电子传输子层21中掺入掺杂原子，能够降低该层的倒带能级，这样使得多层层叠的电子传输子层的导带能级不一致，产生的导带能级差能够改变电子的传输效率，有利于调节发光器件10载流子注入的平衡性，从而达到降低发光器件10的工作电压的目的，延长发光器件10的使用寿命。
在一些实施例中，电子传输层2的材料为无机材料中的至少一种，电子传输层2中的各电子传输子层21中均不设置配体材料。
示例性地，电子传输子层21中的有机材料的比例小于空穴传输材料、发光层或空穴注入层中的有机材料的占比，电子传输层2的材料均为无机材料，电子传输子层21中的有机材料的比例是0，例如不含有氧化锌纳米粒子。
在一些实施例中，参照图13所示，发光层3与最靠近发光层3一侧的电子传输子层21之间设置有中间层22，中间层22的材料为有机物或高分子聚合物，中间层22的材料填充于最靠近发光层3一侧的电子传输子层21的相邻晶粒间的孔隙中。
示例性地，中间层22的材料为有机物或高分子聚合物，例如，PEIE、PMMA等高分子聚合物，或烷基胺、芳香胺类有机物，最靠近发光层3一侧的电子传输子层21为C轴取向的电子传输子层，其所包括的多个晶粒之间存在空隙，将中间层的材料填充于最靠近发光层3一侧的电子传输子层21的相邻晶粒间的孔隙中，能够进一步抑制侧面漏电，并且有利于发光器件10中的载流子平衡，提升发光器件10的电流效率。
示例性地，中间层22的厚度小于最靠近发光层3一侧的电子传输子层21的厚度，中间层22的厚度小于发光层3的厚度。
在一些实施例中，发光器件10为倒置结构，电子传输层2中的每一电子传输子层21的远离第一电极1一侧的表面粗糙度是0.5nm～2nm。
在一些示例中，电子传输层2采用磁控溅射工艺形成，具有表面粗糙度。参照图4A、图5A和图6A所示，电子传输层2中的每一电子传输子层21的远离第一电极1一侧表面的表面粗糙度(RMS，粗糙度的均方根)范围是0.5nm～2.0nm。例如，电子传输层2中的每一电子传输子层21通过磁控溅射工艺形成，其表面粗糙度为0.5nm，0.7nm或2.0nm等，其表面的平整度较好，满足膜层表面平整的要求。
在一些实施例中，发光器件为正置结构，电子传输层2中的每一电子传 输子层21的远离第二电极5一侧的表面粗糙度是0.5nm～2nm。
在一些示例中，电子传输层采用磁控溅射工艺形成，具有表面粗糙度。参照图4B、图5B和图6B所示，电子传输层2中的每一电子传输子层21的远离第二电极5一侧表面的表面粗糙度(RMS，粗糙度的均方根)范围是0.5nm～2.0nm。例如，电子传输层2中的每一电子传输子层21通过磁控溅射工艺形成，其表面粗糙度为0.5nm，0.7nm或2.0nm等，其表面的平整度较好，满足膜层表面平整的要求。
在一些实施例中，第一电极1为不透明的铝、银、钛、钼的金属电极，金属电极的厚度为是60nm～150nm，上方沉积ITO(氧化铟锡)、FTO(氟掺杂氧化锡)或者导电聚合物，导电聚合物的厚度为5nm-50nm。
在一些实施例中，发光层3为量子点发光层，量子点发光层出射红绿蓝三种颜色中的一种。
示例性地，量子点可以是CdSe(硒化镉)等含镉材料，也可以是InP(磷化铟)等无镉材料。
在一些实施例中，空穴传输层4包括至少一种空穴传输材料，空穴传输材料包括有机传输材料和无机氧化物传输材料中的至少一种。
示例性地，有机传输材料主要包括聚乙烯咔唑、1,2,4,5-四(三氟甲基)苯、N，N'-二苯基-N，N'-二(3-甲基苯基)-1，1'-联苯-4，4'-二胺等。
示例性地，无机氧化物材料主要包括氧化镍、氧化钒等，能够提高空穴传输层的能量转化效率以及导电性。
示例性地，空穴传输层厚度为10nm～40nm，优选25nm～35nm。
在一些实施例中，第二电极2为透明导电的氧化铟锡(ITO)、铟锌氧化物(IZO)、半导体电极(FTO玻璃电极)或者导电聚合物，第二电极2厚度可以是40nm～200nm。
示例性地，第二电极2为不透明的铝、银等金属电极，金属电极的厚度为10nm～20nm。
在一些实施例中，如图14A和图14B所示，发光器件10还包括设置于空穴传输层4远离发光层3一侧的空穴注入层6。
示例性地，空穴注入层6的材料包括高分子聚合物的水溶液(PEDOT：PSS)、2,3,6,7,10,11-六氰基-1,4,5,8,9,12-六氮杂苯并菲(HAT-CN)等，也可以为无机氧化物，例如氧化钼(MoO x)，具有较强的吸电子能力。
在一些实施例中，参照图7，发光器件10还包括覆盖层7，覆盖层7设置于第二电极5远离发光层3的一侧，覆盖层7的厚度为40nm～90nm。
示例性地，覆盖层7的厚度为40nm～90nm，优选70nm。覆盖层7的材料为有机材料，且折射率较大，吸光系数较小，能够提高出光效果。
需要说明的是，上述发光器件10为倒置结构，覆盖层7设置于第二电极5远离发光层3的一侧，在发光器件10为正置结构时，覆盖层7设置在第一电极1远离发光层3的一侧。
本公开的一些实施例还提供一种发光器件10的制备方法，如图15A所示，这里以发光器件10倒置为例，介绍发光器件10的制备方法，该制备方法包括S1～S5。
S1：在衬底的一侧形成第一电极1。
示例性地，该衬底可以是玻璃、或者柔性PET(聚对苯二甲酸类塑料)基底，第一电极1为阴极。
示例性地，第一电极1可以是不透明的铝、银、钛、钼等金属电极，金属电极的厚度可以是60nm～150nm，上方沉积ITO(氧化铟锡)、FTO(氟掺杂氧化锡)等。
示例性地，第一电极1可以是不透明的铝、银、钛、钼等金属电极，金属电极的厚度可以是60nm～150nm，上方沉积导电聚合物等，导电聚合物的厚度为5nm-50nm。
示例性地，本公开中的第一电极1为不透明的银作为金属电极，厚度为80nm，上方沉积氧化铟锡，厚度为10nm。
S2：在第一电极1上形成电子传输层2。
示例性的，如图4A、图5A和图6A所示，所形成的电子传输层2包括至少一层电子传输子层21，所述至少一层电子传输子层21中，最靠近所述发光层3一侧的电子传输子层21为C轴取向的电子传输层。
其中，C轴取向为垂直于所述发光层3所在平面的方向，在C轴取向的电子传输子层21中，在第一方向X上，与相邻晶粒的间距小于晶粒本身的尺寸的晶粒数量占总晶粒的数量的比例大于50％，其中，第一方向X平行于发光层3所在平面；沿垂直于发光层3所在平面的方向上，与相邻的晶粒无交叠的晶粒的数量占晶粒总数的比例大于85％。
S3：在电子传输层2上形成发光层3。
示例性地，发光层3为量子点发光层，通过喷墨打印、光刻等方式沉积量子点发光层，量子点发光层可以出射红绿蓝三种颜色中的一种。
示例性地，量子点可以是CdSe(硒化镉)等含镉材料，也可以是InP(磷化铟)等无镉材料。
示例性地，发光层3的厚度为10nm～40nm，优选20nm～30nm。
S4：在发光层3上形成空穴传输层4。
其中，空穴传输层4包括至少一种空穴传输材料，空穴传输材料包括有机传输材料和无机氧化物传输材料中的至少一种。
示例性地，有机传输材料主要包括聚乙烯咔唑、1,2,4,5-四(三氟甲基)苯、N，N'-二苯基-N，N'-二(3-甲基苯基)-1，1'-联苯-4，4'-二胺等。
示例性地，无机氧化物材料主要包括氧化镍、氧化钒等，能够提高空穴传输层的能量转化效率以及导电性。
示例性地，本申请中的空穴传输层4中，靠近发光层3一侧的空穴传输材料的HOMO能级为-6.2eV～-5.5eV，材料可以为氧化钼(MoO x)，利于空穴注入；远离发光层一侧的空穴传输材料的HOMO能级为-5.3eV～-5.0eV，材料可以为五氧化二钒(V 2O 5)和氧化镍(NiO x)中的任一种。
示例性地，空穴传输层厚度为10nm～40nm，本申请的实施例优选为25nm～35nm。
S5：在空穴传输层4上形成第二电极5。
示例性地，第二电极2为阳极，可以是透明导电的氧化铟锡(ITO)、铟锌氧化物(IZO)、半导体电极(FTO玻璃电极)或者导电聚合物等，其厚度可以是40nm～200nm。
示例性地，第二电极2也可以是采用蒸镀方式沉积的不透明的铝、银等金属电极，金属电极的厚度可以是10nm～20nm。
在一些示例中，在S4和S5之间，还包括在空穴传输层4上形成空穴注入层6的步骤。示例性地，采用沉积工艺形成空穴注入层6，空穴注入层6的厚度为3nm～7nm，优选5nm。空穴注入层6的材料为有机材料。
本申请的一些实施例为发光器件10正置，如图15B所示，正置发光器件的制备方法包括S1’～S5’。
S1’：在衬底一侧形成第二电极5。
S2’：在所述第二电极5上形成空穴传输层4。
S3’：在所述空穴传输层4上形成发光层3。
S4’：在所述发光层3上形成电子传输层2。
S5’：在所述电子传输层2上形成第一电极1。
在一些示例中，在S1’和S2’之间，还包括在第二电极5上形成空穴注入层6的步骤。示例性地，采用沉积工艺形成空穴注入层6，空穴注入层6的厚度为3nm～7nm，优选5nm。空穴注入层6的材料为有机材料。
其中，S1’～S5’的具体制备工艺参照上述倒置发光器件10的制备方法中相对应步骤的介绍，这里不一一赘述。以下主要介绍S2和S4’中电子传输层的形成工艺。
在一些实施例中，电子传输层2通过磁控溅射工艺，在基底上衬底沉积相对应的材料形成，可以通过控制沉积过程中的基底的温度或者磁控溅射的功率来调节所形成的电子传输子层的C轴取向的程度。例如，在基底温度在100℃时，所形成的电子传输层几乎没有C轴取向，而基底温度在常温或者200℃以上高温时，所形成电子传输层的C轴取向比较明显。通过增加溅射功率，也可以降低所形成的电子传输层的C轴取向的程度。
其中，所述发光层3、所述第一电极1或已形成的电子传输子层21均为下一步骤中形成电子传输子层的基底。
以下分情况介绍倒置发光器件中电子传输层2的形成方法。
以下介绍所形成的电子传输层2包括一层电子传输子层21的情况下，S2的具体步骤，其中，所述一层电子传输子层21为C轴取向的电子传输子层21。
其中，如图15A所示，步骤S2中在第一电极1上形成电子传输层2的步骤包括：采用磁控溅射工艺在所述第一电极上形成C轴取向的电子传输子层。
在一些实施例中，步骤S2包括S21-1。
S21-1：采用磁控溅射等工艺，在第一电极的温度为第一温度下，在所述第一电极1上沉积电子传输子层21的材料，形成C轴取向的电子传输子层。
其中，第一温度为能够使得材料形成C轴取向的基底温度，例如，第一温度为常温，即25℃。
示例性地，参照图4A所示，可以采用磁控溅射等方式，在常温下，在第一电极1上沉积材料，该材料可以是ZnO，从而形成C轴取向的电子传输子层。
或者，步骤S2包括S21-2。
S21-2：采用磁控溅射工艺，在第一电极1的温度为第二温度下，在第一电极上沉积电子传输子层的材料，并对电子传输子层的材退火，形成C轴取向的电子传输子层。
其中，第二温度为能够使得所沉积的材料形成C轴取向的基底温度，例如，第二温度为200～500摄氏度。
示例性地，可以采用磁控溅射等方式，在第一电极1的温度为300摄氏度下，在第一电极1上沉积材料，该材料可以是ZnO，并对ZnO材料退火， 形成C轴取向的电子传输子层。
对电子传输子层的材料在第二温度条件下退火，形成具有C轴取向的电子传输子层，其在水平方向上导电性远低于竖直方向，因此可以有效降低薄膜侧面漏电，避免串扰现象发生。
或者，步骤S2包括S21-3。
S21-3：采用磁控溅射工艺，在第二溅射功率下在第一电极1上沉积电子传输子层的材料，形成C轴取向的电子传输子层；其中，所述第二溅射功率为能够使得材料形成C轴取向的溅射功率。
示例性地，上述磁控溅射工艺中的第二溅射功率为3～30W/cm2，第二溅射功率小于第一溅射功率，第一溅射功率为能够使得材料形成非C轴取向的溅射功率。
以下介绍所形成的电子传输层2包括两层电子传输子层21的情况下，S2的具体步骤，其中，远离发光层3一侧的电子传输子层21为非C轴取向的电子传输子层，两层电子传输子层21为第一电子传输子层211和第二电子传输子层210，第一电子传输子层211更远离发光层3。
其中，如图16所示，步骤S2中在第一电极1上形成电子传输层2的步骤包括：S22～S23。
S22：采用磁控溅射工艺在第一电极上形成第一电子传输子层，第一电子传输子层为非C轴取向的电子传输层。
S23：采用磁控溅射工艺，在第一电子传输子层上形成第二电子传输子层，第一电子传输子层为C轴取向的电子传输层。
在一些实施例中，S22包括S22-1。
S22-1：采用磁控溅射等工艺，在第一电极的温度为第三温度条件下在所述第一电极1上沉积电子传输子层21的材料，形成非C轴取向的第一电子传输子层211。
其中，第三温度条件为能够使得材料形成非C轴取向的基底温度，例如，第三温度为100℃。
示例性地，参照图5A所示，可以采用磁控溅射等方式，在第一电极1的温度为100℃下，在第一电极1上沉积材料，该材料可以是ZnO，从而形成非C轴取向的第一电子传输子层211。
或者，S22包括S22-2。
S22-2：用磁控溅射工艺，在第一溅射功率下在第一电极上沉积电子传输子层的材料，形成非C轴取向的电子传输子层；其中，所述第一溅射功率为 能够使得材料形成非C轴取向的溅射功率。
例性地，上述磁控溅射工艺中的第一溅射功率为3～30W/cm2，第二溅射功率小于第一溅射功率。
在一些实施例中，S23包括S23-1。
S23-1：采用磁控溅射等工艺，在第一电子传输子层211的温度为第一温度下，在非C轴取向的第一电子传输子层211上沉积电子传输子层21的材料，形成C轴取向的第二电子传输子层210。
其中，第一温度为能够使得材料形成C轴取向的基底温度，例如，第一温度为常温，即25℃。
示例性地，参照图5A所示，可以采用磁控溅射等方式，在第一电子传输子层211的温度为常温下，在非C轴取向的第一电子传输子层211上沉积材料，该材料可以是ZnO，形成C轴取向的第二电子传输子层210。
在一些示例中，在S23中沉积电子传输子层21的材料形成第二电子传输子层210的过程中，还可以通入氧气，增加通入氧气含量，将氧气代替氩气，能够达到降低形成的C轴取向的第二电子传输子层210的氧空位，进而使其导电性降低，从而能平衡载流子，防止电流串扰，从而提高发光器件10的效率。
或者，S23包括S23-2。
S23-2：采用磁控溅射工艺，在第一电子传输子层211的温度为第二温度下，在非C轴取向的第一电子传输子层211上沉积电子传输子层的材料，并对电子传输子层的材料在第二温度条件下退火，形成C轴取向的第二电子传输子层210。
其中，所述第二温度为能够使得所沉积的材料形成C轴取向的基底温度，例如，第二温度为200～500℃。
示例性地，参照图5A所示，可以采用磁控溅射等方式，在第一电子传输子层211的温度为300℃，在第一电子传输子层211上沉积材料，该材料可以是ZnO，并对ZnO材料退火，形成C轴取向的第二电子传输子层210。
示例性地，第二电子传输子层210为C轴取向，其在水平方向上导电性远低于竖直方向，因此可以有效降低薄膜侧面漏电，避免串扰现象发生。
或者，S23包括S23-3。
S23-3：采用磁控溅射工艺，在第二溅射功率下在第一电子传输子层211上沉积电子传输子层的材料，形成C轴取向的第二电子传输子层210；其中，所述第二溅射功率为能够使得材料形成C轴取向的溅射功率。
示例性地，上述磁控溅射工艺中的溅射功率为3～30W/cm2。
在一些示例中，在S23中沉积电子传输子层21的材料形成第二电子传输子层210的过程中，还可以通入氧气，增加通入氧气含量，将氧气代替氩气，能够达到降低形成的C轴取向的第二电子传输子层210的氧空位，进而使其导电性降低，从而能平衡载流子，防止电流串扰，从而提高发光器件10的效率。
以下介绍所形成的电子传输层2包括三层电子传输子层21的情况下，S2的具体步骤，其中，靠近发光层3一侧的电子传输子层21为C轴取向的电子传输子层，靠近第一电极1一侧的电子传输子层21为C轴取向的电子传输子层或非C轴取向的电子传输子层；所述三层电子传输子层包括第一电子传输子层、第二电子传输子层和中间电子传输子层，所述第一电子传输子层最远离所述发光层，所述第二电子传输子层最靠近所述发光层，所述中间电子传输子层位于第一电子传输子层、第二电子传输子层之间，且为非C轴取向的电子传输子层。
其中，如图6A所示，发光器件10倒置，电子传输层2包括三多层电子传输子层21的情况下，其中，如图17A所示，步骤S2中在第一电极1上形成电子传输层2的步骤对应包括：S24～S26。
S24：采用磁控溅射工艺在第一电极1上形成第一电子传输子层211，第一电子传输子层211为C轴取向的电子传输子层。
S25：采用磁控溅射工艺在第一电子传输子层211上形成中间电子传输子层212；每层中间电子传输子层212为非C轴取向的电子传输子层。
S26：采用磁控溅射工艺，在中间电子传输子层212上形成第二电子传输子层210，第二电子传输子层210为C轴取向的电子传输子层。
在一些实施例中，S24包括S24-1。
S24-1：采用磁控溅射等工艺，在第一电极1的温度为第一温度下，在第一电极1上沉积电子传输子层21的材料，形成C轴取向的第一电子传输子层211。
其中，第一温度为能够使得材料形成C轴取向的基底温度，例如，第一温度为常温，即25℃。
示例性地，参照图6A所示，可以采用磁控溅射等方式，在第一电极1的温度为常温下，在第一电极1上沉积材料，该材料可以是ZnO，形成C轴取向的第一电子传输子层211。
或者，S24包括S24-2。
S24-2：采用磁控溅射工艺，在第一电极1的温度为第二温度下，在第一电极1上沉积电子传输子层的材料，并对电子传输子层的材料在第二温度条件下退火，形成C轴取向的第一电子传输子层211。
其中，所述第二温度为能够使得所沉积的材料形成C轴取向的基底温度，例如，第二温度为200～500℃。
示例性地，参照图6A所示，可以采用磁控溅射等方式，在第一电极1的温度为300℃，在第一电极1上沉积材料，该材料可以是ZnO，并对ZnO材料退火，形成C轴取向的第一电子传输子层211。
示例性地，第一电子传输子层211为C轴取向，其在水平方向上导电性远低于竖直方向，因此可以有效降低薄膜侧面漏电，避免串扰现象发生。
或者，S24包括S24-3。
S24-3：采用磁控溅射工艺，参照图6A所示，在第二溅射功率下在第一电极1上沉积电子传输子层的材料，形成C轴取向的第一电子传输子层211；其中，所述第二溅射功率为能够使得材料形成C轴取向的溅射功率。
示例性地，上述磁控溅射工艺中的溅射功率为3～30W/cm2。
在一些实施例中，S25包括S25-1。
S25-1：采用磁控溅射等工艺，在第一电子传输子层211的温度为第三温度条件下在所述第一电子传输子层211上沉积电子传输子层21的材料，形成非C轴取向的中间电子传输子层212。
其中，第三温度条件为能够使得材料形成非C轴取向的基底温度，例如，第三温度为100℃。
示例性地，参照图6A所示，可以采用磁控溅射等方式，在第一电子传输子层211的温度为100℃下，在第一电子传输子层211上沉积材料，该材料可以是ZnO，从而形成非C轴取向的中间电子传输子层212。
或者，S25包括S25-2。
S25-2：用磁控溅射工艺，在第一溅射功率下在第一电子传输子层211上沉积电子传输子层的材料，形成非C轴取向的电子传输子层；其中，所述第一溅射功率为能够使得材料形成非C轴取向的溅射功率。
例性地，上述磁控溅射工艺中的第一溅射功率为3～30W/cm2，第二溅射功率小于第一溅射功率。
在一些实施例中，S26包括S26-1。
S26-1：采用磁控溅射等工艺，在中间电子传输子层212的温度为第一温度下，在中间电子传输子层212上沉积电子传输子层21的材料，形成C轴取 向的第二电子传输子层210。
其中，第一温度为能够使得材料形成C轴取向的基底温度，例如，第一温度为常温，即25℃。
示例性地，参照图6A所示，可以采用磁控溅射等方式，在中间电子传输子层212的温度为常温下，在中间电子传输子层212上沉积材料，该材料可以是ZnO，形成C轴取向的第二电子传输子层210。
或者，S26包括S26-2。
S26-2：采用磁控溅射工艺，在中间电子传输子层212的温度为第二温度下，在中间电子传输子层212上沉积电子传输子层的材料，并对电子传输子层的材料在第二温度条件下退火，形成C轴取向的第二电子传输子层210。
其中，所述第二温度为能够使得所沉积的材料形成C轴取向的基底温度，例如，第二温度为200～500℃。
示例性地，参照图6A所示，可以采用磁控溅射等方式，在中间电子传输子层212的温度为300℃，在中间电子传输子层212上沉积材料，该材料可以是ZnO，并对ZnO材料退火，形成C轴取向的第二电子传输子层210。
示例性地，第二电子传输子层210为C轴取向，其在水平方向上导电性远低于竖直方向，因此可以有效降低薄膜侧面漏电，避免串扰现象发生。
或者，S26包括S26-3。
S26-3：采用磁控溅射工艺，在第二溅射功率下在中间电子传输子层212上沉积电子传输子层的材料，形成C轴取向的第二电子传输子层210；其中，所述第二溅射功率为能够使得材料形成C轴取向的溅射功率。
示例性地，上述磁控溅射工艺中的溅射功率为3～30W/cm2。
在另一些实施例中，电子传输层2包括三多层电子传输子层21的情况下，其中，如图17B所示，步骤S2中在第一电极1上形成电子传输层2的步骤对应包括：S27～S29。需要说明的是，S27～S29和S24～S26为并列步骤。
S27：采用磁控溅射工艺在第一电极1上形成第一电子传输子层211，第一电子传输子层211为非C轴取向的电子传输子层。
S28：采用磁控溅射工艺在第一电子传输子层211上形成中间电子传输子层212；每层中间电子传输子层212为非C轴取向的电子传输子层。
S29：采用磁控溅射工艺，在中间电子传输子层212上形成第二电子传输子层210，第二电子传输子层210为C轴取向的电子传输子层。
在一些实施例中，S27包括S27-1。
S27-1：采用磁控溅射等工艺，在第一电极1的温度为第三温度条件下在 所述第一电极1上沉积电子传输子层21的材料，形成非C轴取向的第一电子传输子层211。
其中，第三温度条件为能够使得材料形成非C轴取向的基底温度，例如，第三温度为100℃。
示例性地，参照图6A所示，可以采用磁控溅射等方式，在第一电极1的温度为100℃下，在第一电极1上沉积材料，该材料可以是ZnO，从而形成非C轴取向的第一电子传输子层211。
或者，S27包括S27-2。
S27-2：用磁控溅射工艺，在第一溅射功率下在第一电极1上沉积电子传输子层的材料，形成非C轴取向的电子传输子层；其中，所述第一溅射功率为能够使得材料形成非C轴取向的溅射功率。
例性地，上述磁控溅射工艺中的第一溅射功率为3～30W/cm2，第二溅射功率小于第一溅射功率。
S28的具体工艺步骤参照对于S25的介绍，S29的具体工艺步骤参照对于S26的介绍。
在一些实施例中，发光器件中的电子传输层包括三层以上电子传输子层，中间电子传输层2包括至少两层电子传输子层21，至少两层电子传输子层21中的每层电子传输子层21均为非C轴取向的中间电子传输子层212，每层非C轴取向的中间电子传输子层212的制备方法参照上述电子传输层2包括三层电子传输子层的情况下，中间电子传输子层212的具体制备方法，这里不一一赘述。
以下分情况介绍正置发光器件中电子传输层2的形成方法。
以下介绍所形成的电子传输层2包括一层电子传输子层21的情况下(如图4B所示)，S4’的具体步骤，其中，所述一层电子传输子层21为C轴取向的电子传输子层21。
其中，如图15B所示，步骤S4’中在发光层3上形成电子传输层2的步骤包括：采用磁控溅射工艺在所述发光层3上形成C轴取向的电子传输层。
在一些实施例中，步骤S4’包括S41-1。
S41-1：采用磁控溅射等工艺，在发光层3的温度为第一温度下，在所述发光层3上沉积电子传输子层21的材料，形成C轴取向的电子传输子层。
其中，第一温度为能够使得材料形成C轴取向的基底温度，例如，第一温度为常温，即25℃。
示例性地，参照图4B所示，可以采用磁控溅射等方式，在常温下，在发 光层3上沉积材料，该材料可以是ZnO，从而形成C轴取向的电子传输子层。
或者，步骤S4’包括S41-2。
S41-2：采用磁控溅射工艺，在发光层3的温度为第二温度下，在发光层3上沉积电子传输子层的材料，并对电子传输子层的材退火，形成C轴取向的电子传输子层。
其中，第二温度为能够使得所沉积的材料形成C轴取向的基底温度，例如，第二温度为200～500摄氏度。
示例性地，参照图4B所示，可以采用磁控溅射等方式，在发光层3的温度为300摄氏度下，在发光层3上沉积材料，该材料可以是ZnO，并对ZnO材料退火，形成C轴取向的电子传输子层。
对电子传输子层的材料在第二温度条件下退火，形成具有C轴取向的电子传输子层，其在水平方向上导电性远低于竖直方向，因此可以有效降低薄膜侧面漏电，避免串扰现象发生。
或者，步骤S4’包括S41-3。
S41-3:采用磁控溅射工艺，参照图4B所示，在第二溅射功率下在发光层3上沉积电子传输子层的材料，形成C轴取向的电子传输子层；其中，所述第二溅射功率为能够使得材料形成C轴取向的溅射功率。
示例性地，上述磁控溅射工艺中的第二溅射功率为3～30W/cm2，第二溅射功率小于第一溅射功率，第一溅射功率为能够使得材料形成非C轴取向的溅射功率。
以下介绍所形成的电子传输层2包括两层电子传输子层21的情况下，S4’的具体步骤，其中，远离发光层3一侧的电子传输子层21为非C轴取向的电子传输子层，两层电子传输子层21为第一电子传输子层211和第二电子传输子层210，第一电子传输子层211更远离发光层3。
其中，如图18所示，步骤S4’中在发光层3上形成电子传输层2的步骤包括：S42～S43。
S42：采用磁控溅射工艺在发光层3上形成第二电子传输子层，第二电子传输子层为C轴取向的电子传输层。
S43：采用磁控溅射工艺，在第二电子传输子层上形成第一电子传输子层，第一电子传输子层为非C轴取向的电子传输层。
在一些实施例中，S42包括S42-1。
S42-1：采用磁控溅射等工艺，在发光层3的温度为第一温度下，在发光层3上沉积电子传输子层21的材料，形成C轴取向的第二电子传输子层210。
其中，第一温度为能够使得材料形成C轴取向的基底温度，例如，第一温度为常温，即25℃。
示例性地，参照图5B所示，可以采用磁控溅射等方式，在发光层3的温度为常温下，在发光层3上沉积材料，该材料可以是ZnO，形成C轴取向的第二电子传输子层210。
在一些示例中，在S42中沉积电子传输子层21的材料形成第二电子传输子层210的过程中，还可以通入氧气，增加通入氧气含量，将氧气代替氩气，能够达到降低形成的C轴取向的第二电子传输子层210的氧空位，进而使其导电性降低，从而能平衡载流子，防止电流串扰，从而提高发光器件10的效率。
或者，S42包括S42-2。
S42-2：采用磁控溅射工艺，在发光层3的温度为第二温度下，在发光层3上沉积电子传输子层的材料，并对电子传输子层的材料在第二温度条件下退火，形成C轴取向的第二电子传输子层210。
其中，所述第二温度为能够使得所沉积的材料形成C轴取向的基底温度，例如，第二温度为200～500℃。
示例性地，参照图5B所示，可以采用磁控溅射等方式，在发光层3的温度为300℃，在发光层3上沉积材料，该材料可以是ZnO，并对ZnO材料退火，形成C轴取向的第二电子传输子层210。
示例性地，第二电子传输子层210为C轴取向，其在水平方向上导电性远低于竖直方向，因此可以有效降低薄膜侧面漏电，避免串扰现象发生。
或者，S42包括S42-3。
S42-3：采用磁控溅射工艺，参照图5B所示，在第二溅射功率下在发光层3上沉积电子传输子层的材料，形成C轴取向的第二电子传输子层210；其中，所述第二溅射功率为能够使得材料形成C轴取向的溅射功率。
示例性地，上述磁控溅射工艺中的溅射功率为3～30W/cm2。
在一些实施例中，S43包括S43-1。
S43-1：采用磁控溅射等工艺，在第二电子传输子层210的温度为第三温度条件下在所述第二电子传输子层210上沉积电子传输子层21的材料，形成非C轴取向的第一电子传输子层211。
其中，第三温度条件为能够使得材料形成非C轴取向的基底温度，例如，第三温度为100℃。
示例性地，参照图5B所示，可以采用磁控溅射等方式，在第二电子传输 子层210的温度为100℃下，在第二电子传输子层210上沉积材料，该材料可以是ZnO，从而形成非C轴取向的第一电子传输子层211。
或者，S43包括S43-2。
S43-2：用磁控溅射工艺，参照图5B所示，在第一溅射功率下在第二电子传输子层210上沉积电子传输子层的材料，形成非C轴取向的电子传输子层；其中，所述第一溅射功率为能够使得材料形成非C轴取向的溅射功率。
例性地，上述磁控溅射工艺中的第一溅射功率为3～30W/cm2，第二溅射功率小于第一溅射功率。
以下介绍所形成的电子传输层2包括三层电子传输子层21的情况下，S4’的具体步骤，其中，靠近发光层3一侧的电子传输子层21为C轴取向的电子传输子层，靠近第二电极5一侧的电子传输子层21为C轴取向的电子传输子层或非C轴取向的电子传输子层；所述三层电子传输子层包括第一电子传输子层、第二电子传输子层和中间电子传输子层，所述第一电子传输子层最远离所述发光层，所述第二电子传输子层最靠近所述发光层，所述中间电子传输子层位于第一电子传输子层、第二电子传输子层之间，且为非C轴取向的电子传输子层。
其中，如图6B所示，发光器件10正置，电子传输层2包括三多层电子传输子层21的情况下，其中，如图19A所示，步骤S4’中在第一电极1上形成电子传输层2的步骤对应包括：S44～S46。
S44：采用磁控溅射工艺在发光层3上形成第二电子传输子层210，所述第二电子传输子层210为C轴取向的电子传输子层。
S45：采用磁控溅射工艺在第二电子传输子层210上形成中间电子传输子层212；每层中间电子传输子层212为非C轴取向的电子传输子层。
S46：采用磁控溅射工艺，在所述中间电子传输子层212上形成第一电子传输子层211，所述第一电子传输子层211为C轴取向的电子传输子层。
在一些实施例中，S44包括S44-1。
S44-1：采用磁控溅射等工艺，在发光层3的温度为第一温度下，在发光层3上沉积电子传输子层21的材料，形成C轴取向的第二电子传输子层210。
其中，第一温度为能够使得材料形成C轴取向的基底温度，例如，第一温度为常温，即25℃。
示例性地，参照图6B所示，可以采用磁控溅射等方式，在发光层3的温度为常温下，在发光层3上沉积材料，该材料可以是ZnO，形成C轴取向的第二电子传输子层210。
或者，S44包括S44-2。
S44-2：采用磁控溅射工艺，在发光层3的温度为第二温度下，在发光层3上沉积电子传输子层的材料，并对电子传输子层的材料在第二温度条件下退火，形成C轴取向的第二电子传输子层210。
其中，所述第二温度为能够使得所沉积的材料形成C轴取向的基底温度，例如，第二温度为200～500℃。
示例性地，参照图6B所示，可以采用磁控溅射等方式，在发光层3的温度为300℃，在发光层3上沉积材料，该材料可以是ZnO，并对ZnO材料退火，形成C轴取向的第二电子传输子层210。
示例性地，第二电子传输子层210为C轴取向，其在水平方向上导电性远低于竖直方向，因此可以有效降低薄膜侧面漏电，避免串扰现象发生。
或者，S44包括S44-3。
S44-3：采用磁控溅射工艺，参照图6B所示，在第二溅射功率下在发光层3上沉积电子传输子层的材料，形成C轴取向的第二电子传输子层210；其中，所述第二溅射功率为能够使得材料形成C轴取向的溅射功率。
示例性地，上述磁控溅射工艺中的溅射功率为3～30W/cm2。
在一些实施例中，S45包括S45-1。
S45-1：采用磁控溅射等工艺，在第二电子传输子层210的温度为第三温度条件下在所述第二电子传输子层210上沉积电子传输子层21的材料，形成非C轴取向的中间电子传输子层212。
其中，第三温度条件为能够使得材料形成非C轴取向的基底温度，例如，第三温度为100℃。
示例性地，参照图6B所示，可以采用磁控溅射等方式，在第二电子传输子层210的温度为100℃下，在第二电子传输子层210上沉积材料，该材料可以是ZnO，从而形成非C轴取向的中间电子传输子层212。
或者，S45包括S45-2。
S45-2：用磁控溅射工艺，参照图6B所示，在第一溅射功率下在第二电子传输子层210上沉积电子传输子层的材料，形成非C轴取向的电子传输子层；其中，所述第一溅射功率为能够使得材料形成非C轴取向的溅射功率。
示例性地，上述磁控溅射工艺中的第一溅射功率为3～30W/cm2，第二溅射功率小于第一溅射功率。
在一些实施例中，S46包括S46-1。
S46-1：采用磁控溅射等工艺，在中间电子传输子层212的温度为第一温 度下，在中间电子传输子层212上沉积电子传输子层21的材料，形成C轴取向的第一电子传输子层211。
其中，第一温度为能够使得材料形成C轴取向的基底温度，例如，第一温度为常温，即25℃。
示例性地，参照图6B所示，可以采用磁控溅射等方式，在中间电子传输子层212的温度为常温下，在中间电子传输子层212上沉积材料，该材料可以是ZnO，形成C轴取向的第一电子传输子层211。
或者，S46包括S46-2。
S46-2：采用磁控溅射工艺，在中间电子传输子层212的温度为第二温度下，在中间电子传输子层212上沉积电子传输子层的材料，并对电子传输子层的材料在第二温度条件下退火，形成C轴取向的第一电子传输子层211。
其中，所述第二温度为能够使得所沉积的材料形成C轴取向的基底温度，例如，第二温度为200～500℃。
示例性地，参照图6B所示，可以采用磁控溅射等方式，在中间电子传输子层212的温度为300℃，在中间电子传输子层212上沉积材料，该材料可以是ZnO，并对ZnO材料退火，形成C轴取向的第一电子传输子层211。
示例性地，第一电子传输子层211为C轴取向，其在水平方向上导电性远低于竖直方向，因此可以有效降低薄膜侧面漏电，避免串扰现象发生。
或者，S46包括S46-3。
S46-3：采用磁控溅射工艺，参照图6B所示，在第二溅射功率下在中间电子传输子层212上沉积电子传输子层的材料，形成C轴取向的第一电子传输子层211；其中，所述第二溅射功率为能够使得材料形成C轴取向的溅射功率。
示例性地，上述磁控溅射工艺中的溅射功率为3～30W/cm2。
在另一些实施例中，电子传输层2包括三多层电子传输子层21的情况下，其中，如图19B所示，步骤S4’中在发光层3上形成电子传输层2的步骤对应包括：S47～S49。
S47：采用磁控溅射工艺在发光层3上形成第二电子传输子层210，所述第二电子传输子层210为C轴取向的电子传输子层。
S48：采用磁控溅射工艺在所述第二电子传输子层210上形成中间电子传输子层212；每层中间电子传输子层212为非C轴取向的电子传输子层。
S49：采用磁控溅射工艺，在所述中间电子传输子层212上形成第一电子传输子层211，所述第一电子传输子层211为非C轴取向的电子传输子层。
在一些实施例中，S47包括S47-1。
S47-1：采用磁控溅射等工艺，在发光层3的温度为第一温度条件下在所述发光层3上沉积电子传输子层21的材料，形成C轴取向的第二电子传输子层210。
其中，第一温度为能够使得材料形成C轴取向的基底温度，例如，第一温度为常温，即25℃。
示例性地，参照图6B所示，可以采用磁控溅射等方式，在发光层3的温度为常温下，在发光层3上沉积材料，该材料可以是ZnO，从而形成C轴取向的第二电子传输子层210。
或者，S47包括S47-2。
S47-2：采用磁控溅射工艺，在发光层3的温度为第二温度下，在发光层3上沉积电子传输子层的材料，并对电子传输子层的材料在第二温度条件下退火，形成C轴取向的电子传输子层。
其中，所述第二温度为能够使得所沉积的材料形成C轴取向的基底温度，例如，第二温度为200～500℃。
示例性地，参照图6B所示，可以采用磁控溅射等方式，在发光层3的温度为300℃，在发光层3上沉积材料，该材料可以是ZnO，并对ZnO材料退火，形成C轴取向的第二电子传输子层210。
示例性地，第二电子传输子层210为C轴取向，其在水平方向上导电性远低于竖直方向，因此可以有效降低薄膜侧面漏电，避免串扰现象发生。
或者，S47包括S47-3。
S47-3：采用磁控溅射工艺，参照图6B所示，在第二溅射功率下在发光层3上沉积电子传输子层的材料，形成C轴取向的第二电子传输子层210；其中，所述第二溅射功率为能够使得材料形成C轴取向的溅射功率。
示例性地，上述磁控溅射工艺中的溅射功率为3～30W/cm2。
S48的具体工艺步骤参照对于S45的介绍。
在一些实施例中，S49包括S49-1。
S49-1：采用磁控溅射等工艺，在中间电子传输子层212的温度为第三温度条件下，在中间电子传输子层212上沉积电子传输子层21的材料，形成非C轴取向的第一电子传输子层211。
其中，第三温度条件为能够使得材料形成非C轴取向的基底温度，例如，第三温度为100℃。
示例性地，参照图6B所示，可以采用磁控溅射等方式，在中间电子传输 子层212的温度为100℃下，在中间电子传输子层212上沉积材料，该材料可以是ZnO，从而形成非C轴取向的第一电子传输子层211。
或者，S49包括S49-2。
S49-2：用磁控溅射工艺，参照图6B所示，在第一溅射功率下在中间电子传输子层212上沉积电子传输子层的材料，形成非C轴取向的电子传输子层；其中，所述第一溅射功率为能够使得材料形成非C轴取向的溅射功率。
示例性地，上述磁控溅射工艺中的第一溅射功率为3～30W/cm2，第二溅射功率小于第一溅射功率。
在一些实施例中，中间电子传输层212包括至少两层电子传输子层21，至少两层电子传输子层21中的每层电子传输子层21均为非C轴取向的中间电子传输子层212，非C轴取向的中间电子传输子层212的制备方法参照上述电子传输层2包括三层电子传输子层的情况下，中间电子传输子层212的具体制备方法，这里不一一赘述。
本公开的一些实施例还提供一种显示基板100，如图20和图21A所示，显示基板100包括如上所述的发光器件10。
该显示基板100例如可以为量子点有机发光二级管(Quantum Dot Light Emitting Diodes，QLED)显示基板、迷你型发光二极管(Mini Light-Emitting Diode，Mini LED)显示基板或微型发光二极管(Micro Light-Emitting Diode，Micro LED)显示基板等。
在一些实施例中，参照图21A和图21B所示，显示基板100包括基板11以及设置于基板11一侧的像素界定层8，像素界定层8包括多个开口81，多个发光器件10的第一电极1设置于基板11和像素界定层8之间，每个开口81暴露一个发光器件10的第一电极1的至少一部分，发光器件10的电子传输层2、发光层3、空穴传输层4和第二电极5依次层叠于第一电极1上，且位于开口81内。发光器件为倒置结构。
在另一些实施例中，参照图21C和图21D所示，显示基板100包括基板11以及设置于基板11一侧的像素界定层8，像素界定层8包括多个开口81，和多个发光器件10的第二电极5设置于基板11和像素界定层8之间，每个开口81暴露一个发光器件10的第二电极5的至少一部分，发光器件10的电子传输层2、发光层3、空穴传输层4和第一电极1依次层叠于第二电极5上，且位于开口81内。发光器件为正置结构。
在一些实施例中，显示基板100包括多个子像素，每个子像素包括一个至少一个发光器件，且多个子像素为红色子像素、绿色子像素和蓝色子像素。 红色子像素、绿色子像素和蓝色子像素中的发光器件的发光层的材料不同，其中，如图21A～图21D所示，RGB分别表示红色子像素中的发光层、绿色子像素中的发光层和蓝色子像素中的发光层，显示基板100能够发出红、绿、蓝三种不同颜色的光。
如图21A和图21B所示，在显示基板所包括的发光器件为倒置结构的情况下，发光器件所包括的各膜层的结构有如下实施例。
在一些实施例中，如图21A所示，发光器件10的电子传输层21位于开口81内，且多个发光器件10的电子传输层21彼此不接触。
示例性地，多个发光器件10的电子传输层2彼此不接触，即多个发光器件10的子像素的电子传输层2不共用，在制备过程中，需要对整层设置的初始电子传输层2进行曝光、刻蚀使其图案化，形成分别位于多个开口内的多个电子传输层2，进一步减少了电信号的串扰，提高了器件效率。
在一些示例中，多个发光器件10的空穴传输层4彼此接触，多个发光器件10的空穴注入层6彼此接触，从而多个发光器件10的空穴传输层4和空穴注入层6可以共用。
在另一些实施例中，参照图21B，显示基板100包括设置于像素界定层8和多个发光器件10的第一电极1远离基板11一侧的电子传输膜层12，电子传输膜层12中位于开口81内的部分为多个发光器件10的电子传输层2，发光器件10的电子传输层2包括设置于发光层一侧的第一部分G1和设置于开口81的侧壁上的第二部分G2，多个发光器件10的电子传输层2彼此接触。
示例性地，电子传输膜层12还包括位于像素界定层8的表面的部分，称为电子传输连接层2’，多个发光器件10的电子传输层2通过电子传输连接层2’彼此接触。
示例性地，多个发光器件10的电子传输层2彼此接触，即多个发光器件10的子像素共用电子传输膜层12，在制备过程中，不需要对电子传输层进行图案化处理，由于电子传输层2侧向导电性极低，因此不会造成电流向侧面泄漏。
在一些示例中，多个发光器件10的空穴传输层4彼此不接触，多个发光器件10的空穴注入层6彼此不接触，从而多个发光器件10的空穴传输层4和空穴注入层6不共用。
如图21A和21B所示，第一电极1为底电极，第二电极5为顶电极，多个第一电极彼此分离无接触，多个第二电极5相互接触形成一个整体，作为第二电极层，第二电极层向多个发光器件提供相同的信号。
如图21C和图21D所示，在显示基板所包括的发光器件为正置结构的情况下，发光器件所包括的各膜层的结构有如下实施例。
在另一些实施例中，参照图21C，显示基板100包括设置于像素界定层8和多个发光器件10的发光层3远离基板11一侧的电子传输膜层12，电子传输膜层12中位于多个开口81内的部分为多个发光器件10的电子传输层2，发光器件10的电子传输层2包括设置于发光层3上的第一部分G1和设置于开口81的侧壁上的第二部分G2，多个发光器件10的电子传输层2彼此接触。
示例性地，电子传输膜层12还包括位于像素界定层8的表面的部分，称为电子传输连接层2’，多个发光器件10的电子传输层2通过电子传输连接层2’彼此接触。
示例性地，多个发光器件10的电子传输层2彼此接触，即多个发光器件10的子像素共用电子传输膜层12，在制备过程中，不需要对电子传输层进行图案化处理，由于电子传输层2侧向导电性极低，因此不会造成电流向侧面泄漏。
在一些示例中，多个发光器件10的空穴传输层4彼此不接触，多个发光器件10的空穴注入层6彼此不接触，从而多个发光器件10的空穴传输层4和空穴注入层6不共用。
在一些实施例中，如图21D所示，发光器件10的电子传输层21位于多个开口81内，且多个发光器件10的电子传输层21彼此不接触。
示例性地，多个发光器件10的电子传输层2彼此不接触，即多个发光器件10的子像素的电子传输层2不共用，在制备过程中，需要对整层设置的初始电子传输层2进行曝光、刻蚀使其图案化，形成分别位于多个开口内的多个电子传输层2，进一步减少了电信号的串扰，提高了器件效率。
在一些示例中，多个发光器件10的空穴传输层4彼此接触，多个发光器件10的空穴注入层6彼此接触，从而多个发光器件10的空穴传输层4和空穴注入层6可以共用。
如图21C和图21D所示，第一电极1为顶电极，第二电极5为底电极，多个第二电极彼此分离无接触，多个第一电极5相互接触形成一个整体，作为第一电极层，第一电极层向多个发光器件提供相同的信号。
上述显示基板100的有益效果与本公开的第一方面所提供的发光器件10的有益效果相同，此处不再赘述。
本公开的一些实施例还提供一种显示装置1000，如图22所示，包括上述的显示基板100。
本公开实施例所提供的显示装置1000可以是显示不论运动(例如，视频)还是固定(例如，静止图像)的且不论文字还是图像的任何装置。更明确地说，预期所述实施例可实施在多种电子装置中或与多种电子装置关联，所述多种电子装置例如(但不限于)移动电话、无线装置、个人数据助理(PDA)、手持式或便携式计算机、GPS接收器/导航器、相机、MP4视频播放器、摄像机、游戏控制台、手表、时钟、计算器、电视监视器、平板显示器、计算机监视器、汽车显示器(例如，里程表显示器等)、导航仪、座舱控制器和/或显示器、相机视图的显示器(例如，车辆中后视相机的显示器)、电子相片、电子广告牌或指示牌、投影仪、建筑结构、包装和美学结构(例如，对于一件珠宝的图像的显示器)等。
以上所述，仅为本公开的具体实施方式，但本公开的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本公开揭露的技术范围内，想到变化或替换，都应涵盖在本公开的保护范围之内。因此，本公开的保护范围应以所述权利要求的保护范围为准。

Claims (24)

  1. 一种发光器件，包括：
    依次层叠设置的第一电极、电子传输层、发光层、空穴传输层和第二电极；
    所述电子传输层包括至少一层电子传输子层，所述至少一层电子传输子层中，最靠近所述发光层一侧的电子传输子层为C轴取向的电子传输子层；
    其中，C轴取向为垂直于所述发光层所在平面的方向，在所述C轴取向的电子传输子层中，沿垂直于所述发光层所在平面的方向上，与相邻的晶粒无交叠的晶粒的数量占总晶粒数量的比例大于85％。
  2. 根据权利要求1所述的发光器件，其中，在所述C轴取向的电子传输子层中，在第一方向上，与相邻晶粒的间距小于晶粒本身的尺寸的晶粒数量占总晶粒的数量的比例大于50％，其中，所述第一方向平行于所述发光层所在平面。
  3. 根据权利要求1或2所述的发光器件，其中，所述电子传输层由一层所述电子传输子层组成，所述电子传输子层为C轴取向的电子传输子层，所述C轴取向的电子传输子层的膜层厚度为30nm～90nm。
  4. 根据权利要求1或2所述的发光器件，其中，所述电子传输层由两层电子传输子层组成，所述两层电子传输子层中，靠近所述发光层一侧的电子传输子层设置为C轴取向的电子传输子层，远离所述发光层一侧的电子传输子层为非C轴取向的电子传输子层；
    所述电子传输层中的每一层电子传输子层的膜层厚度均为15nm～40nm。
  5. 根据权利要求1或2所述的发光器件，其中，所述电子传输层包括至少三层电子传输子层；
    所述至少三层电子传输层中，最靠近发光层一侧的电子传输子层为C轴取向的电子传输子层；
    最靠近所述第一电极一侧的电子传输子层为C轴取向的电子传输子层或非C轴取向的电子传输子层；
    设置于所述最靠近发光层一侧的电子传输子层与所述最靠近所述第一电极一侧的电子传输子层之间的电子传输子层为非C轴取向的电子传输子层。
  6. 根据权利要求5所述的发光器件，其中，所述电子传输层由三层传输子层组成，所述电子传输子层中的每一层电子传输子层的膜层厚度均为10nm～30nm。
  7. 根据权利要求6所述的发光器件，其中，所述三层电子传输子层中，处于中间位置的电子传输子层的厚度与所述电子传输层的总厚度的比值范围 为0.23～0.35。
  8. 根据权利要求7所述的发光器件，其中，最靠近所述第一电极一侧的电子传输子层为C轴取向的电子传输子层；所述最靠近发光层一侧的C轴取向的电子传输子层相对于最靠近所述第一电极一侧的C轴取向的电子传输子层的C轴取向程度更大。
  9. 根据权利要求1～8中任一项中所述的发光器件，其中，各所述电子传输子层的材料包括的相同原子为氧原子和锌原子。
  10. 根据权利要求9所述的发光器件，其中，所述电子传输层包括至少两层电子传输子层，最靠近发光层一侧的电子传输子层的氧空位占比相比其他电子传输子层的氧空位占比低。
  11. 根据权利要求10所述的发光器件，其中，所述最靠近发光层一侧的电子传输子层的氧空位相比其他电子传输子层的氧空位占比低5％～25％。
  12. 根据权利要求11所述的发光器件，其中，所述最靠近发光层一侧的电子传输子层的LUMO能级相对其他电子传输子层的LUMO能级更接近所述发光层的LUMO能级。
  13. 根据权利要求9所述的发光器件，其中，所述电子传输层包括三层电子传输层，处于中间位置的电子传输子层还包括掺杂原子和有机高分子材料，所述掺杂原子包括镁、镓中的至少一者，所述有机高分子材料包括氮化硼。
  14. 根据权利要求13所述的发光器件，其中，含掺杂原子的电子传输子层的导带能级相对不含有掺杂原子的电子传输子层的导带能级浅。
  15. 根据权利要求1～14中任一项所述的发光器件，其中，所述电子传输层的材料为无机材料中的至少一种，所述电子传输层中的各电子传输子层中均不设置配体材料。
  16. 根据权利要求15所述的发光器件，其中，所述发光层与最靠近所述发光层一侧的电子传输子层之间设置有中间层，所述中间层的材料为有机物或高分子聚合物，所述中间层的材料填充于所述最靠近所述发光层一侧的电子传输子层的相邻晶粒间的孔隙中。
  17. 根据权利要求1～16中任一项所述的发光器件，其中，所述发光器件为倒置结构，所述电子传输层中的每一电子传输子层的远离所述第一电极一侧的表面粗糙度是0.5nm～2nm；
    或者，所述发光器件为正置结构，所述电子传输层中的每一电子传输子层的远离所述第二电极一侧的表面粗糙度是0.5nm～2nm。
  18. 一种发光器件的制备方法，包括，
    形成第一电极；
    在所述第一电极上形成电子传输层；
    在所述电子传输层上形成发光层；
    在所述发光层上形成空穴传输层；
    在所述空穴传输层上形成第二电极；
    或者，
    形成第二电极；
    在所述第二电极上形成空穴传输层；
    在所述空穴传输层上形成发光层；
    在所述发光层上形成电子传输层；
    在所述电子传输层上形成第一电极；
    其中，所述电子传输层包括至少一层电子传输子层，所述至少一层电子传输子层中，最靠近所述发光层一侧的电子传输子层为C轴取向的电子传输层，其中，在所述C轴取向的电子传输子层中，沿垂直于所述发光层所在平面的方向上，与相邻的晶粒无交叠的晶粒的数量占总晶粒的比例大于90％。
  19. 根据权利要求18所述的发光器件的制备方法，其中，形成所述最靠近发光层一侧的电子传输层的步骤包括：采用磁控溅射工艺形成C轴取向的电子传输子层。
  20. 根据权利要求18或19所述的发光器件的制备方法，其中，所述发光层、所述第一电极或已形成的电子传输子层均为下一步骤中形成电子传输子层的基底；
    在所述基底上形成非C轴取向的电子传输子层，包括：
    采用磁控溅射工艺，在所述基底的温度为第三温度下，在所述基底上沉积电子传输子层的材料，形成非C轴取向的电子传输子层；其中，所述第三温度条件为能够使得材料形成非C轴取向的基底温度；
    在所述基底上形成C轴取向的电子传输子层，包括：
    采用磁控溅射工艺，在所述基底的温度为第一温度或第二温度下，在所述基底上沉积电子传输子层的材料，形成C轴取向的电子传输子层；其中，所述第一温度为能够使得材料形成C轴取向的基底温度；或者，采用磁控溅射工艺，在所述基底的温度为第二温度下，在所述基底上沉积电子传输层的材料，对电子传输层的材料退火，形成C轴取向的电子传输子层；其中，所述第二温度为能够使得所沉积的材料形成C轴取向的基底温度；
    其中，第一温度为常温，第二温度为200～500℃，第三温度为100℃。
  21. 根据权利要求18或19所述的发光器件的制备方法，其中，所述发光层、所述第一电极或已形成的电子传输子层均为下一步骤中形成电子传输子层的基底；
    在所述基底上形成非C轴取向的电子传输子层，包括：
    采用磁控溅射工艺，在第一溅射功率下在所述基底上沉积电子传输子层的材料，形成非C轴取向的电子传输子层；其中，所述第一溅射功率为能够使得材料形成非C轴取向的溅射功率；
    其中，所述在所述基底上形成C轴取向的电子传输子层，包括：
    采用磁控溅射工艺，在第二溅射功率下在所述基底上沉积电子传输子层的材料，形成C轴取向的电子传输子层；其中，所述第二溅射功率为能够使得材料形成C轴取向的溅射功率；
    其中，第一溅射功率大于第二溅射功率。
  22. 一种显示基板，包括多个如权利要求1～17任一项所述的发光器件。
  23. 根据权利要求22所述的显示基板，其中，所述显示基板还包括：基板和设置于所述基板一侧的像素界定层，所述像素界定层包括多个开口；
    所述多个发光器件的第一电极位于所述基板和所述像素界定层之间，每个开口暴露一个发光器件的第一电极的至少一部分，所述发光器件的电子传输层、发光层、空穴传输层和第二电极依次层叠于所述第一电极上，且位于所述开口内；
    其中，所述发光器件的电子传输层位于所述开口内，且多个发光器件的电子传输层彼此不接触；
    或者，所述显示基板包括设置于所述像素界定层和所述多个发光器件的第一电极远离所述基板一侧的电子传输膜层，所述电子传输膜层中位于所述多个开口内的部分为所述多个发光器件的电子传输层，每个发光器件的电子传输层包括设置于所述发光层一侧的第一部分和设置于所述开口的侧壁上的第二部分，所述多个发光器件的电子传输层彼此接触。
  24. 根据权利要求22所述的显示基板，其中，所述显示基板还包括：基板和设置于所述基板一侧的像素界定层，所述像素界定层包括多个开口；
    所述多个发光器件的第二电极位于所述基板和所述像素界定层之间，每个开口暴露一个发光器件的第二电极的至少一部分，所述发光器件的空穴传输层、发光层、电子传输层和第一电极依次层叠于所述第二电极上，且位于所述开口内；
    其中，所述发光器件的电子传输层位于所述开口内，且多个发光器件的电子传输层彼此不接触；
    或者，所述显示基板包括设置于所述像素界定层和所述多个发光器件的发光层远离所述基板一侧的电子传输膜层，所述电子传输膜层中位于所述多个开口内的部分为所述多个发光器件的电子传输层，每个发光器件的电子传输层包括设置于所述发光层一侧的第一部分和设置于所述开口的侧壁上的第二部分，所述多个发光器件的电子传输层彼此接触。
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