WO2022252707A1 - Method and apparatus for processing and controlling semiconductor device, and high-energy particle beam photolithography device - Google Patents

Abstract

The present invention relates to a method and apparatus for processing and controlling a semiconductor device, and a high-energy particle beam photolithography device. The method comprises: converting several layers of integrated circuit sub-layouts respectively into grayscale images/digital files; according to the corresponding relationship between high-energy particle beam processing parameters and grayscale values/target parameter values, acquiring a high-energy particle beam processing parameter corresponding to each pixel point in the grayscale images/digital files; after each material layer has been made on a target substrate, providing a layer of hard mask on the material layer; according to the high-energy particle beam processing parameter corresponding to each pixel point in the corresponding grayscale images/digital files, controlling the photolithography device to emit a high-energy particle beam to pass through the hard mask and act upon the material layer; carving a pattern corresponding to each grayscale image/digital file to the material layer, then removing the hard mask on the material layer, sequentially making a next material layer, and repeatedly implementing the described steps until the hard mask on the last material layer is removed, so as to obtain a target semiconductor device. Compared with the prior art, the method can narrow the line width of the high-energy particle beam and improve the processing precision of the semiconductor device. The high-energy particle beam in the present application can be an ion beam, an electron beam, a laser beam, an X-ray, or the like, wherein a high-energy focused ion beam is used in an experiment. The high-energy particle beam has a smaller wavelength than an ordinary optical system, and thus can improve the resolution of layout transfer and is suitable for manufacturing small-size devices.

Description

Process control method and device for semiconductor device, and high-energy particle beam lithography equipment technical field

The embodiments of the present application relate to the technical field of semiconductor processing, and in particular, to a processing control method and device for semiconductor devices, and high-energy particle beam lithography equipment.

Background technique

In the field of traditional semiconductor processing technology, it is often based on the combination of integrated circuit mask and photolithography technology to realize the transfer of the integrated circuit layout to the silicon substrate, and then complete the manufacture of semiconductor devices.

However, as the size requirements for semiconductor devices become higher and higher, the manufacture of light source systems (such as EUV lithography machines) supporting lithography technology and the production of integrated circuit masks have become more and more difficult. Using integrated circuit masks It will also make the manufacturing cost of the semiconductor device huge, and if the layout of the integrated circuit is modified or fine-tuned, the mask plate needs to be made again, resulting in low processing efficiency.

The high-energy particle beams in this application can be ion beams, electron beams, laser beams, X-rays, etc., among which high-energy focused ion beams are used in the experiment. The high-energy particle beam has a smaller wavelength than ordinary optical systems, which can improve the resolution of layout transfer and is suitable for making smaller-sized devices. For example, due to the limitation of the wavelength, the DUV lithography machine is only suitable for the production of devices with a feature size larger than 7nm; for the production of devices below 7nm, EUV must be introduced. The high-energy particle beam has a smaller wavelength than EUV.

Contents of the invention

The embodiment of the present application provides a semiconductor device processing control method, device and high-energy particle beam lithography equipment, which can complete the processing of the semiconductor device without making an integrated circuit mask and improve the processing efficiency. The technical solution is as follows:

In a first aspect, an embodiment of the present application provides a processing control method for a semiconductor device, including:

Acquiring an integrated circuit layout corresponding to the target semiconductor device; wherein the integrated circuit layout includes several layers of integrated circuit sub-layouts, and each layer of integrated circuit sub-layout corresponds to the pattern of one or more material layers of the target semiconductor device;

Converting several layers of the integrated circuit sub-layout into several layers of grayscale images/digital files in a preset format;

Acquiring high-energy particle beam processing parameters corresponding to each pixel in the gray-scale picture/digital file according to the correspondence between preset high-energy particle beam processing parameters and grayscale values/target parameter values;

After each layer of the material layer is fabricated on the target substrate, a layer of hard mask is set on the layer of material layer, according to the high-energy particle beam corresponding to each pixel in the corresponding grayscale picture/digital file Processing parameters, control the high-energy particle beam lithography equipment to emit high-energy particle beams through the hard mask to act on the material layer, engrave the pattern corresponding to the grayscale picture/digital file to the material layer, and then remove the material layer For the hard mask on the material layer, the next material layer is sequentially fabricated, and the above steps are repeated until the hard mask on the last material layer is removed to obtain the target semiconductor device.

In a second aspect, an embodiment of the present application provides a processing control device for a semiconductor device, including:

The first acquisition module acquires the integrated circuit layout corresponding to the target semiconductor device; wherein, the integrated circuit layout includes several layers of integrated circuit sub-layouts, and each layer of integrated circuit sub-layouts corresponds to one or more layers of materials of the target semiconductor device layer pattern;

The layout conversion module is used to convert several layers of integrated circuit sub-layouts into several layers of grayscale images/digital files in a preset format;

The second acquisition module is used to obtain the high-energy particle beam processing parameters corresponding to each pixel in the gray-scale picture/digital file according to the correspondence between the preset high-energy particle beam processing parameters and the gray value/target parameter value ;

The processing control module is used to set a layer of hard mask on the material layer after each layer of the material layer is produced on the target substrate, according to each pixel in the corresponding grayscale image/digital file The high-energy particle beam processing parameters corresponding to the points control the high-energy particle beam lithography equipment to emit high-energy particle beams through the hard mask to act on the material layer of this layer, and engrave the pattern corresponding to the grayscale image/digital file to this layer material layer, and then remove the hard mask on the material layer, sequentially fabricate the next layer of the material layer, repeat the above steps until the hard mask on the last layer of the material layer is removed, and obtain The target semiconductor device.

In a third aspect, an embodiment of the present application provides a high-energy particle beam lithography apparatus, including: a particle beam generator, a particle beam controller, a working chamber, a working stage, a processor, a memory, and a and a computer program that can run on the processor, the particle beam generator, the particle beam controller, the work chamber and the work platform respectively establish data connections with the processor, the When the processor executes the computer program, the steps of the semiconductor device processing control method according to the first aspect are realized.

In the embodiment of the present application, by obtaining the integrated circuit layout corresponding to the target semiconductor device; wherein, the integrated circuit layout includes several layers of integrated circuit sub-layouts, and each layer of integrated circuit sub-layouts corresponds to one or more layers of the target semiconductor device. The pattern of the layer material layer; convert several layers of the integrated circuit sub-layout into several layers of grayscale pictures/digital files in the preset format; according to the preset high-energy particle beam processing parameters and the gray value/target parameter value Corresponding relationship, obtain the high-energy particle beam processing parameters corresponding to each pixel in the grayscale image/digital file; After each layer of the material layer is produced on the target substrate, set a layer on the material layer Layer hard mask, according to the high-energy particle beam processing parameters corresponding to each pixel in the corresponding grayscale image/digital file, control the high-energy particle beam lithography equipment to emit high-energy particle beams to pass through the hard mask and act on the layer On the material layer, engrave the pattern corresponding to the grayscale image/digital file to the material layer, then remove the hard mask on the material layer, make the next material layer in turn, and repeat the above steps , until the hard mask on the last layer of the material layer is removed to obtain the target semiconductor device. This semiconductor device processing control method not only does not need to make multiple masks, which reduces processing costs, but also can flexibly modify the layout of integrated circuits to improve processing efficiency. Before the layer, a hard mask is set on the material layer, and the hard mask is removed after engraving, so that the line width of the high-energy particle beam can be effectively narrowed, and the processing accuracy of the semiconductor device can be improved.

For better understanding and implementation, the technical solution of the present application will be described in detail below in conjunction with the accompanying drawings.

Description of drawings

FIG. 1 is a schematic flow chart of a processing control method for a semiconductor device provided by an embodiment of the present application;

Figure 2 is a schematic diagram of the principle of narrowing the linewidth of a high-energy particle beam provided by an embodiment of the present application;

FIG. 3 is a schematic flow chart of S104 in a semiconductor device processing control method provided by an embodiment of the present application;

FIG. 4 is a schematic flow chart of S104 in a semiconductor device processing control method provided by another embodiment of the present application;

FIG. 5 is a schematic flow chart of a semiconductor device processing control method provided by another embodiment of the present application;

FIG. 6 is a schematic diagram of a grayscale image corresponding to four MOS tube parallel integrated circuit layouts provided by an embodiment of the present application;

FIG. 7 is a schematic flow chart of S207 in a semiconductor device processing control method provided by another embodiment of the present application;

FIG. 8 is a schematic structural diagram of a processing control device for a semiconductor device provided by an embodiment of the present application;

FIG. 9 is a schematic structural diagram of a high-energy particle beam lithography device provided by an embodiment of the present application.

Detailed ways

Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numerals in different drawings refer to the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with aspects of the present application as recited in the appended claims.

The terminology used in this application is for the purpose of describing particular embodiments only, and is not intended to limit the application. As used in this application and the appended claims, the singular forms "a", "the", and "the" are intended to include the plural forms as well, unless the context clearly dictates otherwise. It should also be understood that the term "and/or" as used herein refers to and includes any and all possible combinations of one or more of the associated listed items.

It should be understood that although the terms first, second, third, etc. may be used in this application to describe various information, the information should not be limited to these terms. These terms are only used to distinguish information of the same type from one another. For example, without departing from the scope of the present application, first information may also be called second information, and similarly, second information may also be called first information. Depending on the context, the words "if"/"if" as used herein may be interpreted as "at" or "when" or "in response to a determination".

Please refer to FIG. 1, which is a schematic flow chart of a method for processing a semiconductor device provided by an embodiment of the present application. The method includes the following steps:

S101: Obtain an integrated circuit layout corresponding to the target semiconductor device; wherein, the integrated circuit layout includes several layers of integrated circuit sub-layouts, and each layer of integrated circuit sub-layouts corresponds to the pattern of one or more material layers of the target semiconductor device .

In an optional embodiment, the execution subject of the processing control method of a semiconductor device may be a high-energy particle beam lithography equipment, or a component of a high-energy particle beam lithography equipment, such as its internal processor or Microprocessor, etc.; in another optional embodiment, the execution subject of the processing control method of the semiconductor device may be an external device that establishes a data connection with the high-energy particle beam lithography equipment, or it may be a component in the external device part.

In the embodiment of the present application, the processing control method of the semiconductor device is executed by a high-energy particle beam lithography equipment.

Specifically, the high-energy particle beam lithography equipment obtains the integrated circuit layout corresponding to the target semiconductor device.

Wherein, the target semiconductor device may be any type of semiconductor device, and its specific type is not limited here.

The integrated circuit layout refers to mapping the circuit design circuit diagram or circuit description language to the physical description level. The integrated circuit layout includes the device type, device size, relative position between devices, and the connection relationship between each device, etc. relevant physical information.

The integrated circuit layout includes several layers of integrated circuit sub-layouts, and each layer of integrated circuit sub-layouts corresponds to the pattern of one or more material layers of the target semiconductor device.

In the embodiment of the present application, the material layer includes, but is not limited to, an active layer, an insulating layer, a polysilicon gate layer, a metal layer, and the like.

S102: Convert several layers of the integrated circuit sub-layout into several layers of grayscale images/digital files in a preset format.

The high-energy particle beam lithography equipment converts several layers of the integrated circuit sub-layout into several layers of grayscale images/digital files in a preset format.

In an optional embodiment, for grayscale pictures, the preset format can be TIF format, and in other optional embodiments, for grayscale pictures, the preset format can be high energy particle beam lithography Other image formats that the device can recognize and process.

The grayscale value of the pixel in the grayscale picture is 0 to 255, the grayscale value of 0 indicates that the brightness of the pixel is low, and the human body subjectively perceives it as black, and the grayscale value of 255 indicates that the brightness of the pixel is relatively high. Subjective visual perception is white.

In an optional embodiment, the digital file may be other types of files than the grayscale image, such as CAD files, DAT format files, and TIFF format files, etc., which are not limited here.

S103: Acquire the high-energy particle beam processing parameters corresponding to each pixel in the grayscale picture/digital file according to the preset correspondence between high-energy particle beam processing parameters and grayscale values/target parameter values; wherein, the The target parameter value is the parameter value used to embody the information stored in the digital file.

In an optional embodiment, the correspondence between the preset high-energy particle beam processing parameters and the gray value/target parameter value may be preset and stored in the high-energy particle beam lithography equipment. In another optional embodiment, the correspondence between the preset high-energy particle beam processing parameters and the gray value/target parameter value can be preset and stored in the cloud or the host computer, and then downloaded when used into the high energy particle beam lithography equipment.

Depending on the type of semiconductor device or the material difference of the material layer, the corresponding relationship between the corresponding high-energy particle beam processing parameters and the gray value/target parameter value is also different. In the high-energy particle beam lithography equipment, the cloud or the upper computer, the corresponding relationship between the corresponding high-energy particle beam processing parameters and the gray value/target parameter value can be found according to the identification of the semiconductor device, or according to the material layer Find the correspondence between the corresponding high-energy particle beam processing parameters and the gray value/target parameter value.

In an optional embodiment, the third-party semiconductor device design manufacturer can upload the designed semiconductor device identification or material identification to the cloud, and configure the corresponding relationship between high-energy particle beam processing parameters and gray value/target parameter value. The corresponding relationship between them can enable the high-energy particle beam lithography equipment to control the high-energy particle beam lithography equipment to complete the processing of more types of semiconductor devices and meet the needs of more third-party customers.

In the embodiment of the present application, the high-energy particle beam processing parameters include the high-energy particle beam acceleration voltage and/or the high-energy particle beam action time. In order to process semiconductor devices more accurately, the high-energy particle beam lithography equipment Correspondence between particle beam processing parameters and grayscale values/target parameter values, obtaining high-energy particle beam processing parameters corresponding to each pixel in the grayscale image/digital file, specifically as follows:

The high-energy particle beam lithography equipment obtains the high-energy particle beam acceleration voltage corresponding to each pixel in the gray-scale picture/digital file according to the gray-scale value/target parameter value of the pixel in the gray-scale picture/digital file, when the The smaller the grayscale value/target parameter value of the pixel in the grayscale picture/digital file is, the higher the high-energy particle beam acceleration voltage of the high-energy particle beam lithography equipment is. When the pixel in the grayscale picture/digital file When the gray value of the point/target parameter value is larger, the high-energy particle beam acceleration voltage of the high-energy particle beam lithography equipment is lowered. The higher the accelerating voltage of the high-energy particle beam, the higher the kinetic energy of the emitted high-energy particle beam. Therefore, in the same time, more materials can be engraved and deeper material grooves can be obtained.

Alternatively, the high-energy particle beam lithography equipment obtains the high-energy particle beam action time corresponding to each pixel in the gray-scale picture/digital file according to the gray-scale value/target parameter value of the pixel in the gray-scale picture/digital file, When the grayscale value/target parameter value of the pixel in the grayscale picture/digital file is smaller, the longer the high-energy particle beam action time of the high-energy particle beam lithography equipment is, when the grayscale picture/digital file The greater the gray value of the middle pixel/target parameter value, the shorter the action time of the high-energy particle beam of the high-energy particle beam lithography equipment. The longer the action time of the high-energy particle beam is, the more material can be engraved and the deeper the material groove can be obtained under the condition that other control conditions remain unchanged.

Or, the high-energy particle beam lithography equipment obtains the gray-scale mean value/target parameter mean value of all pixels in the gray-scale picture/digital file, and when the gray-scale mean value/target parameter mean value is smaller, the high-energy particle beam light The higher the acceleration voltage of the high-energy particle beam of the engraving equipment, and according to the gray value/target parameter value of the pixel point in the gray-scale picture/digital file, obtain the information obtained under the condition that the acceleration voltage of the high-energy particle beam remains unchanged. The high-energy particle beam action time corresponding to each pixel in the grayscale picture/digital file, when the grayscale value/target parameter value of the pixel point in the grayscale picture/digital file is smaller, the high-energy particle beam photolithography The longer the action time of the high-energy particle beam of the equipment is, the shorter the action time of the high-energy particle beam of the high-energy particle beam lithography equipment is when the gray value/target parameter value of the pixel in the grayscale picture/digital file is larger . Through the cooperation of the accelerating voltage of the high-energy particle beam and the action time of the high-energy particle beam, the manufacturing process of the semiconductor device can be accelerated and the manufacturing efficiency can be improved.

S104: After each layer of the material layer is fabricated on the target substrate, a layer of hard mask is set on the material layer, and according to the high-energy corresponding to each pixel in the corresponding grayscale image/digital file, Particle beam processing parameters, controlling the high-energy particle beam lithography equipment to emit high-energy particle beams through the hard mask to act on the material layer, engraving the pattern corresponding to the grayscale image/digital file to the material layer, and then removing the hard mask on the material layer, making the next material layer in turn, and repeating the above steps until the hard mask on the last material layer is removed to obtain the target semiconductor device.

After each layer of the material layer is fabricated on the target substrate by the high-energy particle beam lithography equipment, a layer of hard mask is set on the material layer, and each pixel in the corresponding grayscale image/digital file The high-energy particle beam processing parameters corresponding to the points control the high-energy particle beam lithography equipment to emit high-energy particle beams through the hard mask to act on the material layer of this layer, and engrave the pattern corresponding to the grayscale image/digital file to this layer material layer, then remove the hard mask on the layer of material layer, sequentially make the next layer of the material layer, repeatedly carry out the setting of the hard mask, the engraving of the next layer of material layer and the hard mask removing until the hard mask on the last material layer is removed to obtain the target semiconductor device

Because the high-energy particle beam lithography equipment sets a layer of hard mask on the material layer before engraving the pattern corresponding to each layer of the grayscale image/digital file to the corresponding material layer, and after the engraving is completed The layer of hard mask is then removed, so that the line width of the high-energy particle beam can be effectively narrowed, and the processing accuracy of the semiconductor device can be improved.

Specifically, please refer to FIG. 2 , which is a schematic diagram of the principle of narrowing the linewidth of a high-energy particle beam provided by an embodiment of the present application. The shape of the top of the high-energy particle beam emitted by the high-energy particle beam lithography equipment is similar to that of a cone. Therefore, when the high-energy particle beam acts on the material layer, the gully formed in the material layer is also in the shape of a cone. Please refer to the schematic diagram on the left side of Figure 2, it can be seen that after the high-energy particle beam acts on the material layer, the width of the ravine generated on the surface of the material is A, that is, the line width of the high-energy particle beam is A. Please refer to the schematic diagram on the right side of Figure 2. When a layer of hard mask is set on the material layer, the high-energy particle beam will first act on the hard mask and then on the material layer. After the hard mask is removed after engraving, the surface of the material The width of the generated trench is B, that is, the line width of the high-energy particle beam is B. Obviously, setting a layer of hard mask on the material layer and removing the layer of hard mask after engraving can Effectively narrow the linewidth of high-energy particle beams.

In an optional embodiment, the hard mask may be a silicon nitride film, a silicon oxide film, a carbon film, a platinum film or a tungsten film, and its specific material is not limited here.

In an optional embodiment, referring to FIG. 3 , removing the hard mask on the material layer in step S104 includes steps S1041-S1043, specifically as follows:

S1041: Control the high-energy particle beam lithography equipment to emit a high-energy particle beam to act on the hard mask, and bombard and remove the hard mask.

S1042: Control the high-energy particle beam lithography equipment to spray an etching reagent on the hard mask, and remove the hard mask by etching.

S1043: Control the chemical mechanical polishing device in the high-energy particle beam lithography equipment, and remove the hard mask by using the chemical mechanical polishing device.

Chemical mechanical polishing (CMP) is a combination of the advantages of mechanical polishing and chemical polishing. It can improve the grinding accuracy, reduce damage, and improve the grinding efficiency.

In the embodiment of the present application, the chemical mechanical polishing device is integrated in the high-energy particle beam lithography equipment.

Steps S1041 to S1043 respectively correspond to different ways of removing the hard mask, which can be reasonably selected according to differences in the processed semiconductor device or the material of the material layer, and are not limited here.

In an optional embodiment, the material layer is a material layer deposited by controlling high-energy particle beam lithography equipment. Specifically, please refer to FIG. 4 . After layering, before setting a layer of hard mask on the material layer, step S104 includes steps S1044～S1045, specifically as follows:

S1044: Obtain a material gas corresponding to the material layer and a corresponding deposition area of the material layer on the target substrate.

The material gas may be one gas or multiple gases, which are different according to the difference of material layers.

In some embodiments, in order to enable the high-energy particle beam to engrave a better graphic effect on the material layer, each layer of material layer includes multiple materials, for example, a layer of oxide oxide is first coated on the surface of single crystal silicon. Silicon, and then a layer of tantalum is plated on the surface of silicon oxide, so a variety of material gases are also required when preparing such a material layer.

S1045: Control the high-energy particle beam lithography equipment to spray the material gas in the deposition area, so that the material gas is decomposed and deposited in the deposition area, and the fabrication of the material layer is completed.

Since high-energy particle beams can decompose metal vapor or gas-phase insulating materials, etc., the gas injection device in the high-energy particle beam lithography equipment sprays the material gas in the deposition area, and at the same time emits high-energy particle beams to decompose the material gas, so that The decomposed material gas is deposited in the deposition area to complete the fabrication of the material layer.

In the above method, by controlling a high-energy particle beam lithography equipment, the laying of material layers and the engraving of patterns can be completed, and the processing of semiconductor devices can be realized, which can not only reduce costs, but also have a higher degree of automation.

In an optional embodiment, after each layer of the material layer is produced on the target substrate, the high-energy particle beam lithography equipment can also be based on the preset optimal thickness range and/or the preset optimal flatness range controlling the high-energy particle beam to process the material layer, so that the current thickness and/or current flatness of the material layer are respectively within the preset optimal thickness range and the preset optimal flatness range, Thereby, the subsequent engraving effect is further improved, and the processing of semiconductor devices is optimized.

Optionally, the preset optimized thickness range is 1 nm to 500 nm, and the preset optimized flatness range is 0.5 nm to 5 nm.

In another optional embodiment, due to the different properties and uses of different devices, the processing accuracy requirements for engraving are different. When controlling the high-energy particle beam lithography equipment to emit high-energy particle beams through the hard mask to act on Before the material layer is placed on the material layer, the high-energy particle beam lithography equipment can control the electromagnetic lens to shrink the high-energy particle beam according to the preset engraving size threshold, so that the engraving pixel size of the high-energy particle beam is smaller than the engraving size threshold.

In the embodiment of the present application, by obtaining the integrated circuit layout corresponding to the target semiconductor device; wherein, the integrated circuit layout includes several layers of integrated circuit sub-layouts, and each layer of integrated circuit sub-layouts corresponds to one or more layers of the target semiconductor device. The pattern of the layer material layer; convert several layers of the integrated circuit sub-layout into several layers of grayscale pictures/digital files in the preset format; according to the preset high-energy particle beam processing parameters and the gray value/target parameter value Corresponding relationship, obtain the high-energy particle beam processing parameters corresponding to each pixel in the grayscale image/digital file; After each layer of the material layer is produced on the target substrate, set a layer on the material layer Layer hard mask, according to the high-energy particle beam processing parameters corresponding to each pixel in the corresponding grayscale image/digital file, control the high-energy particle beam lithography equipment to emit high-energy particle beams to pass through the hard mask and act on the layer On the material layer, engrave the pattern corresponding to the grayscale image/digital file to the material layer, then remove the hard mask on the material layer, make the next material layer in turn, and repeat the above steps , until the hard mask on the last layer of the material layer is removed to obtain the target semiconductor device. This semiconductor device processing control method not only does not need to make multiple masks, which reduces processing costs, but also can flexibly modify the layout of integrated circuits to improve processing efficiency. Before the layer, a hard mask is set on the material layer, and the hard mask is removed after engraving, so that the line width of the high-energy particle beam can be effectively narrowed, and the processing accuracy of the semiconductor device can be improved.

In order to improve the processing efficiency of semiconductor devices, please refer to FIG. 5, which is a schematic flow chart of a processing control method for semiconductor devices provided by another embodiment of the present application, including steps S201-S207, wherein steps S201-S202, S206 are respectively related to step S101 ~S102 and S103 are the same, details are as follows:

S201: Obtain an integrated circuit layout corresponding to the target semiconductor device; wherein, the integrated circuit layout includes several layers of integrated circuit sub-layouts, and each layer of integrated circuit sub-layouts corresponds to the pattern of one or more material layers of the target semiconductor device .

S202: Transforming several layers of the integrated circuit sub-layout into several layers of grayscale images/digital files in a preset format.

S203: Obtain the target pixel in the grayscale image/digital file corresponding to the integrated circuit sub-layout of each layer and the coordinates of the target pixel in the grayscale image/digital file; wherein, the target pixel is the pixel whose gray value/target parameter value is lower than the preset threshold.

In the grayscale image/digital file corresponding to the sub-layout of the integrated circuit, there may be some target pixel grayscale values/target parameter values lower than the preset threshold, which indicates that the coordinates of the target pixel points in the corresponding material layer need to be detected. High energy particle beam penetration.

The preset threshold is related to the corresponding relationship between the preset high-energy particle beam processing parameters and the gray value/target parameter value, and can be set according to the actual situation, which is not limited here.

If there are target pixels with the same coordinates in the gray-scale pictures/digital files corresponding to the integrated circuit sub-layouts of the i to j layers, then these target pixels are the pixels to be adjusted, and by adjusting the grayscale of the pixels to be adjusted Value/target parameter value, so that when engraving the corresponding material layer, engraving is not performed at the coordinates of the pixel to be adjusted.

Wherein, the integrated circuit sub-layout has n layers in total, 1≤i<j≤n.

Please refer to FIG. 6 , which is a schematic diagram of a grayscale image corresponding to an integrated circuit layout of four MOS transistors connected in parallel according to an embodiment of the present application. The layout of the integrated circuit in Fig. 6 includes an active layer, a polysilicon gate layer, a metal layer, and an insulating layer (not shown) on the active layer, a polysilicon gate layer, and an insulating layer (not shown) on the metal layer, an insulating layer, and a polysilicon gate layer There are target pixels whose gray value is lower than the preset threshold.

S204: When target pixels with the same coordinates exist in the grayscale pictures/digital files of the i to j layers, obtain pixel points to be adjusted in the grayscale pictures/digital files of the i to j layers.

S205: Set the grayscale value/target parameter value of the pixel to be adjusted in the grayscale picture/digital file of the i-th layer to the highest value, or obtain the first value corresponding to the lowest high-energy particle beam processing parameter. Grayscale value/first target parameter value, the grayscale value/target parameter value of the pixel to be adjusted in the grayscale picture/digital file of the i-th layer is set as the first grayscale value/the first target parameter value A target parameter value.

In an optional embodiment, the grayscale value/target parameter value of the pixel to be adjusted in the grayscale picture/digital file corresponding to the i-th layer of the integrated circuit sub-layout is set to the highest value, so that In this way, when engraving the patterns corresponding to the sub-layouts of the integrated circuits in the i to j layers, the patterns composed of pixels to be adjusted will not be engraved.

In another optional embodiment, the high-energy particle beam lithography equipment first acquires the first grayscale value/first target parameter value corresponding to the lowest high-energy particle beam processing parameter.

The high-energy particle beam processing parameters include the high-energy particle beam acceleration voltage and/or the high-energy particle beam action time. In the embodiment of this application, the corresponding gray value/target when the high-energy particle beam acceleration voltage is 0 or the high-energy particle beam action time is 0 The parameter value is the first gray value/the first target parameter value.

Due to the difference in correspondence between the high-energy particle beam processing parameters and the grayscale value/target parameter value, the first grayscale value/first target parameter value will also be different, and the specific values thereof are not limited here.

Afterwards, the high-energy particle beam lithography equipment sets the grayscale value/target parameter value of the pixel to be adjusted to the specified The first grayscale value/first target parameter value, so that when engraving the pattern corresponding to the grayscale picture/digital file of the i-th layer, the composition of the pixels to be adjusted will not be engraved picture of.

S206: Acquire the high-energy particle beam processing parameters corresponding to each pixel in the grayscale image/digital file according to the preset correspondence between high-energy particle beam processing parameters and grayscale values/target parameter values.

S207: After each layer of the material layer is fabricated on the target substrate, a layer of hard mask is set on the material layer, and according to the high-energy corresponding to each pixel in the corresponding grayscale image/digital file, Particle beam processing parameters, controlling the high-energy particle beam lithography equipment to emit high-energy particle beams through the hard mask to act on the material layer, engraving the pattern corresponding to the grayscale image/digital file to the material layer, and then removing the hard mask on the material layer, making the next material layer in turn, and repeating the above steps until the hard mask on the last material layer is removed to obtain the target semiconductor device.

Step S207 is performed in the same manner as step S104. Each layer of material layer is made, and then a layer of hard mask is set, and then the engraving of the pattern corresponding to the sub-layout of the integrated circuit is completed on the material layer, and then the mask is removed. layer hard mask, and finally obtain the target semiconductor device.

However, since in this embodiment, when engraving the i to j material layers, there is no engraving pattern composed of pixels to be adjusted, so there is a difference between this step and step S104, please refer to FIG. 7, step S207 includes step S2071 ~S2072, the specific difference process is as follows:

S2071: sequentially fabricate the i-th to j-th material layers on the target substrate, and after each layer of the material layer is fabricated, set a layer of the hard mask on the material layer, respectively according to The high-energy particle beam processing parameters corresponding to each pixel in the grayscale image/digital file of the i-j layer, control the high-energy particle beam lithography equipment to emit high-energy particle beams to act on the material layer of the i-j layer , engraving all the patterns in the i-th layer of the grayscale image/digital file except the pattern composed of pixels to be adjusted to the corresponding i-j-th layer of the material layer, and after engraving each layer After the material layer, the hard mask on the material layer is removed.

After each layer of material layer (layer i to j) is laid in the high-energy particle beam lithography equipment, a layer of hard mask is laid on the layer of material layer, and then, according to the grayscale image/ The high-energy particle beam processing parameters corresponding to each pixel in the digital file, control the high-energy particle beam lithography equipment to emit high-energy particle beams to act on the material layer, and engrave the grayscale image/digital file corresponding to the integrated circuit sub-layout of this layer All patterns except the pattern composed of pixels to be adjusted are transferred to the material layer, and then the hard mask on the material layer is removed.

For the engraving of layers other than the i to j material layers, there is no difference from the engraving in step S104, and will not be repeated here.

S2072: After removing the hard mask on the j-th material layer, control the high-energy particle beam lithography equipment to emit a high-energy particle beam to act on the j-th material layer according to the coordinates of the pixels to be adjusted At the coordinates of the pixels to be adjusted, the i to jth material layers are penetrated at the coordinates of the pixels to be adjusted.

After the high-energy particle beam lithography equipment removes the hard mask on the material layer of the j-th layer, and then according to the coordinates of the pixels to be adjusted, the high-energy particle beam lithography equipment is controlled to emit high-energy particle beams to act on At the coordinates of the pixels to be adjusted in the jth material layer, the i to jth material layers are penetrated at the coordinates of the pixels to be adjusted.

Wherein, the high-energy particle beam processing parameters that penetrate each material layer can be obtained according to experiments and pre-stored in the high-energy particle beam lithography equipment, and the corresponding high-energy particle beam processing parameters can be found according to the identification of the material layer, thereby obtaining to the processing parameters of the high-energy particle beam that penetrates the i-th layer.

In this embodiment, by obtaining the target pixel and the coordinates of the target pixel in the grayscale image/digital file corresponding to each layer of the integrated circuit sub-layout, the grayscale corresponding to the i-th layer of the integrated circuit sub-layout is obtained. The target pixels with the same coordinates that exist in the high-degree pictures/digital files, that is, the pixels to be adjusted, and then reset the gray value/target parameter value of the pixels to be adjusted, so that the i to j When the patterns corresponding to the sub-layout of the integrated circuit described in the first layer are respectively on the i-th to j-th material layers, the pattern composed of pixels to be adjusted will not be engraved. Finally, after the j-th material layer is engraved and the hard mask is removed, According to the coordinates of the pixels to be adjusted, the high-energy particle beam lithography equipment is controlled to emit high-energy particle beams to act on the coordinates of the pixels to be adjusted in the jth material layer, and at the coordinates of the pixels to be adjusted The method penetrates through the i-th material layer to achieve combined engraving, which effectively improves the processing efficiency of semiconductor devices.

Please refer to FIG. 8 . FIG. 8 is a schematic structural diagram of a processing control device for a semiconductor device provided by an embodiment of the present application. The device can be realized as all or a part of the high-energy particle beam lithography equipment through software, hardware or a combination of the two. The device 8 includes a first acquisition module 81, a layout conversion module 82, a second acquisition module 83 and a processing control module 84:

The first acquisition module 81 is configured to acquire the integrated circuit layout corresponding to the target semiconductor device; wherein, the integrated circuit layout includes several layers of integrated circuit sub-layouts, and each layer of integrated circuit sub-layouts corresponds to one or more layers of the target semiconductor device. Patterns of multilayer material layers;

The layout conversion module 82 is used to convert several layers of integrated circuit sub-layouts into several layers of grayscale images/digital files in preset formats;

The second acquisition module 83 is used to obtain the high-energy particle beam processing corresponding to each pixel in the grayscale picture/digital file according to the correspondence between the preset high-energy particle beam processing parameters and the gray value/target parameter value parameter;

The processing control module 84 is used to set a layer of hard mask on the material layer after each layer of the material layer is fabricated on the target base material, according to each of the corresponding grayscale pictures/digital files The high-energy particle beam processing parameters corresponding to the pixels control the high-energy particle beam lithography equipment to emit high-energy particle beams to pass through the hard mask and act on the material layer, and engrave the pattern corresponding to the grayscale image/digital file to the layer of material, and then remove the hard mask on the material layer, sequentially fabricate the next material layer, and repeat the above steps until the hard mask on the last material layer is removed, The target semiconductor device is obtained.

It should be noted that, when the semiconductor device processing control device provided in the above-mentioned embodiments executes the semiconductor device processing control method, it only uses the division of the above-mentioned functional modules as an example. In practical applications, the above-mentioned functions can be allocated according to needs. It is completed by different functional modules, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above. In addition, the semiconductor device processing control device provided in the above embodiments and the semiconductor device processing control method belong to the same concept, and the implementation process thereof is detailed in the method embodiment, and will not be repeated here.

Please refer to FIG. 9 , which is a schematic structural diagram of a high-energy particle beam lithography device provided by an embodiment of the present application. As shown in Figure 9, the high-energy particle beam lithography equipment 9 may include: a particle beam generator 90, a particle beam controller 91, a working chamber 92, a working stage 93, a processor 94, a memory 95, and a In the memory 95 and the computer program 96 that can run on the processor 94, for example: the processing control program of the semiconductor device; the particle beam generator 90, the particle beam controller 91, the working chamber 92 and The work platforms 93 respectively establish data connections with the processors 94; when the processors 94 execute the computer programs 96, the steps in the above-mentioned method embodiments are implemented, such as steps S101 to S104 shown in FIG. 1 .

Wherein, the processor 94 may include one or more processing cores. The processor 94 uses various interfaces and lines to connect various parts in the high-energy particle beam lithography equipment 9, and runs or executes instructions, programs, code sets or instruction sets stored in the memory 95, and calls the memory 95. Data, perform various functions of the high-energy particle beam lithography equipment 9 and process data. Optionally, the processor 94 can use digital signal processing (Digital Signal Processing, DSP), field-programmable gate array (Field-Programmable Gate Array, FPGA), Programmable Logic Array (Programble Logic Array, PLA) in at least one hardware form to achieve. The processor 94 may integrate one or a combination of a central processing unit (Central Processing Unit, CPU), an image processor (Graphics Processing Unit, GPU), a modem, and the like. Among them, the CPU mainly processes the operating system, user interface and application programs, etc.; the GPU is used for rendering and drawing the content that needs to be displayed on the touch screen; the modem is used for processing wireless communication. It can be understood that, the above-mentioned modem may also not be integrated into the processor 94, but may be realized by a single chip.

Wherein, the memory 95 may include a random access memory (Random Access Memory, RAM), and may also include a read-only memory (Read-Only Memory). Optionally, the memory 95 includes a non-transitory computer-readable storage medium. Memory 95 may be used to store instructions, programs, codes, sets of codes or sets of instructions. The memory 95 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing the operating system, instructions for at least one function (such as touch instructions, etc.), and instructions for implementing the above-mentioned various method embodiments. Instructions, etc.; the storage data area can store the data, etc. involved in the above method embodiments. Optionally, the memory 95 may also be at least one storage device located away from the aforementioned processor 94 .

In the above-mentioned embodiments, the description of each embodiment has its own emphasis. For the part that is not detailed or recorded in a certain embodiment, you can refer to the relevant descriptions of other embodiments.

Those skilled in the art can appreciate that the units and algorithm steps of the examples described in conjunction with the embodiments disclosed herein can be implemented by electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are executed by hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art may use different methods to implement the described functions for each specific application, but such implementation should not be regarded as exceeding the scope of the present invention.

The present invention is not limited to the above-mentioned embodiments, if the various changes or deformations of the present invention do not depart from the spirit and scope of the present invention, if these changes and deformations belong to the claims of the present invention and the equivalent technical scope, then the present invention is also It is intended that such modifications and variations are included.

Claims (10)

1. A processing control method for a semiconductor device, characterized in that it comprises the steps of:

   Acquiring an integrated circuit layout corresponding to the target semiconductor device; wherein the integrated circuit layout includes several layers of integrated circuit sub-layouts, and each layer of integrated circuit sub-layout corresponds to the pattern of one or more material layers of the target semiconductor device;

   Converting several layers of the integrated circuit sub-layout into several layers of grayscale images/digital files in a preset format;

   According to the correspondence between preset high-energy particle beam processing parameters and grayscale values/target parameter values, obtain high-energy particle beam processing parameters corresponding to each pixel in the grayscale picture/digital file; wherein, the target parameters The value is a parameter value used to reflect the information stored in the digital file;

   After each layer of the material layer is fabricated on the target substrate, a layer of hard mask is set on the layer of material layer, according to the high-energy particle beam corresponding to each pixel in the corresponding grayscale picture/digital file Processing parameters, control the high-energy particle beam lithography equipment to emit high-energy particle beams through the hard mask to act on the material layer, engrave the pattern corresponding to the grayscale picture/digital file to the material layer, and then remove the material layer For the hard mask on the material layer, the next material layer is sequentially fabricated, and the above steps are repeated until the hard mask on the last material layer is removed to obtain the target semiconductor device.
2. The processing control method of a semiconductor device according to claim 1, wherein said removing the hard mask on the material layer comprises the steps of:

   controlling the high-energy particle beam lithography equipment to emit high-energy particle beams to act on the hard mask, and bombard to remove the hard mask;

   or,

   controlling the high-energy particle beam lithography equipment to spray an etching reagent on the hard mask, and etching and removing the hard mask;

   or,

   controlling a chemical mechanical polishing device in the high-energy particle beam lithography equipment, and removing the hard mask through the chemical mechanical polishing device.
3. The process control method of a semiconductor device according to claim 1 or 2, characterized in that the hard mask is a silicon nitride film, a silicon oxide film, a carbon film, a platinum film or a tungsten film.
4. The process control method of a semiconductor device according to claim 1, wherein:

   The high-energy particle beam processing parameters include high-energy particle beam acceleration voltage and/or high-energy particle beam action time,

   According to the correspondence between preset high-energy particle beam processing parameters and grayscale values/target parameter values, obtaining high-energy particle beam processing parameters corresponding to each pixel in the grayscale image/digital file includes the steps of:

   Acquire the high-energy particle beam acceleration voltage corresponding to each pixel in the grayscale picture/digital file according to the grayscale value/target parameter value of the pixel in the grayscale picture/digital file, when the grayscale picture/digital file The smaller the gray value/target parameter value of the pixel in the file, the higher the high energy particle beam acceleration voltage of the high energy particle beam lithography equipment, when the gray value of the pixel in the gray image/digital file/ When the target parameter value is larger, the high-energy particle beam acceleration voltage of the high-energy particle beam lithography equipment is lower;

   or,

   According to the grayscale value/target parameter value of the pixel in the grayscale picture/digital file, the high-energy particle beam action time corresponding to each pixel in the grayscale picture/digital file is obtained, when the grayscale picture/digital file The smaller the grayscale value/target parameter value of the pixel in the file, the longer the high-energy particle beam action time of the high-energy particle beam lithography equipment is, when the grayscale value of the pixel in the grayscale picture/digital file/ When the value of the target parameter is larger, the action time of the high-energy particle beam of the high-energy particle beam lithography equipment is shortened;

   or,

   Obtain the grayscale mean value/target parameter mean value of all pixels in the grayscale picture/digital file, and when the grayscale mean value/target parameter mean value is smaller, make the high-energy particle beam of the high-energy particle beam lithography equipment The higher the acceleration voltage is, and according to the gray value/target parameter value of the pixel in the gray scale picture/digital file, the acceleration voltage in the gray scale picture/digital file is obtained under the condition that the acceleration voltage of the high-energy particle beam is constant. The action time of the high-energy particle beam corresponding to each pixel point, when the gray value/target parameter value of the pixel point in the grayscale picture/digital file is smaller, the higher the action time of the high-energy particle beam of the high-energy particle beam lithography equipment is. Longer, when the grayscale value/target parameter value of the pixel in the grayscale picture/digital file is greater, the action time of the high-energy particle beam of the high-energy particle beam lithography equipment is shortened.
5. The processing control method of a semiconductor device according to claim 1, characterized in that, after converting several layers of the integrated circuit sub-layout into several layers of grayscale images/digital files in a preset format, the steps include:

   Obtain the target pixel in the grayscale picture/digital file corresponding to the integrated circuit sub-layout of each layer and the coordinates of the target pixel in the grayscale picture/digital file; wherein, the target pixel is gray Pixels whose degree value/target parameter value is lower than the preset threshold;

   When there are target pixels with the same coordinates in the grayscale picture/digital file of the i to j layers, obtain the pixel to be adjusted in the grayscale picture/digital file of the i to j layer;

   Set the grayscale value/target parameter value of the pixel to be adjusted in the grayscale picture/digital file of the i-th layer to the highest value, or obtain the first grayscale corresponding to the lowest high-energy particle beam processing parameter Value/first target parameter value, set the grayscale value/target parameter value of the pixel to be adjusted in the grayscale image/digital file of the i to j layers as the first grayscale value/first target parameter value.
6. The processing control method of a semiconductor device according to claim 5, characterized in that, after each layer of the material layer is fabricated on the target substrate, a layer of hard mask is arranged on the layer of material layer, According to the high-energy particle beam processing parameters corresponding to each pixel in the corresponding grayscale image/digital file, control the high-energy particle beam lithography equipment to emit high-energy particle beams to pass through the hard mask and act on the material layer, engraving The pattern corresponding to the grayscale picture/digital file is transferred to the material layer, and then the hard mask on the material layer is removed, and the next material layer is sequentially made, and the above steps are repeated until the last layer is removed. Layer the hard mask on the material layer to obtain the target semiconductor device, comprising the steps of:

   Fabricate the i to jth material layers sequentially on the target substrate, and after each layer of the material layer is fabricated, set a layer of the hard mask on the material layer, respectively according to the i-th to the high-energy particle beam processing parameters corresponding to each pixel in the grayscale image/digital file of the j-th layer, and control the high-energy particle beam lithography equipment to emit a high-energy particle beam to act on the material layer of the i-jth layer, engraving All the patterns in the grayscale picture/digital file of the i to j layer except the pattern formed by the pixels to be adjusted are transferred to the corresponding i to j layer of the material layer, and after the engraving of each layer, the After the material layer, removing the hard mask on the material layer;

   After removing the hard mask on the material layer of the jth layer, according to the coordinates of the pixels to be adjusted, the high-energy particle beam lithography equipment is controlled to emit a high-energy particle beam to act on the j-th material layer. At the coordinates of the pixel points to be adjusted, the i to jth material layers are penetrated at the coordinates of the pixel points to be adjusted.
7. The processing control method of a semiconductor device according to claim 1, wherein after each layer of the material layer is fabricated on the target substrate, before setting a layer of hard mask on the layer of material layer , including the steps:

   Acquiring the material gas corresponding to the material layer and the corresponding deposition area of the material layer on the target substrate;

   Controlling the high-energy particle beam lithography equipment to spray the material gas in the deposition area, so that the material gas is decomposed and deposited in the deposition area to complete the fabrication of the material layer.
8. The processing control method of a semiconductor device according to claim 1, wherein after each layer of the material layer is fabricated on the target substrate, before setting a layer of hard mask on the layer of material layer , including the steps:

   According to the preset optimal thickness range and/or the preset optimal flatness range, the high-energy particle beam is controlled to process the material layer, so that the current thickness and/or current flatness of the material layer are respectively within the Within the preset optimized thickness range and the preset optimized flatness range.
9. A processing control device for a semiconductor device, characterized in that it includes:

   The first acquisition module acquires the integrated circuit layout corresponding to the target semiconductor device; wherein, the integrated circuit layout includes several layers of integrated circuit sub-layouts, and each layer of integrated circuit sub-layouts corresponds to one or more layers of materials of the target semiconductor device layer pattern;

   The layout conversion module is used to convert several layers of integrated circuit sub-layouts into several layers of grayscale images/digital files in a preset format;

   The second acquisition module is used to obtain the high-energy particle beam processing parameters corresponding to each pixel in the gray-scale picture/digital file according to the correspondence between the preset high-energy particle beam processing parameters and the gray value/target parameter value ;

   The processing control module is used to set a layer of hard mask on the material layer after each layer of the material layer is produced on the target substrate, according to each pixel in the corresponding grayscale image/digital file The high-energy particle beam processing parameters corresponding to the points control the high-energy particle beam lithography equipment to emit high-energy particle beams through the hard mask to act on the material layer of this layer, and engrave the pattern corresponding to the grayscale image/digital file to this layer material layer, and then remove the hard mask on the material layer, sequentially fabricate the next layer of the material layer, repeat the above steps until the hard mask on the last layer of the material layer is removed, and obtain The target semiconductor device.
10. A high-energy particle beam lithography equipment, characterized in that it includes: a particle beam generator, a particle beam controller, a working chamber, a working platform, a processor, a memory, and a The computer program running on the device, the particle beam generator, the particle beam controller, the work chamber and the work platform respectively establish data connections with the processor, and the processor executes the computer The program realizes the steps of the method according to any one of claims 1 to 8.

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