WO2021184525A1

WO2021184525A1 - Extraction apparatus and method for defect pattern of tested object, and storage medium

Info

Publication number: WO2021184525A1
Application number: PCT/CN2020/090993
Authority: WO
Inventors: 小林尚弘; 李铭; 赵宇航; 卢意飞; 黄寅
Original assignee: 上海集成电路研发中心有限公司; 上海先综检测有限公司
Priority date: 2020-03-20
Filing date: 2020-05-19
Publication date: 2021-09-23
Also published as: JP7373675B2; JP2023517549A; CN111429426A; CN111429426B

Abstract

An extraction apparatus and method for a defect pattern of a tested object, and a storage medium. The extraction apparatus comprises a defect detection result reading module, a defect detection result analysis module, a layout data reading module, a layout data analysis module, a rule library analysis module, a physical simulation execution analysis module, a pattern matching execution analysis module, a data processing analysis module, an image display control module connected between the data processing analysis module and a display, and a keyboard control module connected between the data processing analysis module and a keyboard. All candidate patterns to be inspected are extracted in advance by means of analysis of design layout data and a simulation result of a semiconductor manufacturing process, and are compared with a defect pattern output from an inspection apparatus, so as to determine the degree of importance of inspection, without the need to determine whether all defect patterns relate to a nuisance defect, so that the analysis time for finding a defect pattern having a high degree of importance and needing to be inspected can be greatly reduced.

Description

Extraction device, extraction method and storage medium for detecting object defect pattern

cross reference

This application claims the priority of the Chinese patent application with the application number 202010201826.X filed on March 20, 2020. The content of the above application is included here by reference.

Technical field

The present invention relates to the technical field of semiconductor manufacturing, and more specifically, to an extraction device, an extraction method, and a storage medium for detecting a defect pattern of an object.

technical background

In the wafer manufacturing process, various physical components such as transistors, diodes, capacitors, resistors, and metal layers are formed on the surface or in the surface layer of the wafer in the form of fine patterns. When performing defect inspection on the fine patterns on semiconductor wafers or masks, the industry usually adopts two methods: implementing comprehensive inspection and narrowing the inspection scope. The comprehensive inspection method is to inspect all the defect patterns output by the device, but there is a problem of huge inspection time. The method of narrowing the detection range is to detect the selected defect pattern, and not to detect the defect pattern that is not selected. Although the method of narrowing the detection range can shorten the detection time, there is a problem that it is necessary to determine in advance which defect pattern to select (that is, to select a defect pattern with detection significance) for detection.

The method of narrowing the inspection scope (that is, the method of selecting defect patterns with inspection significance), can identify nuisance defects on the wafer from the defect patterns output by the device, and reduce the number of inspections by excluding them from the inspection objects . Nuisance defects (nuisance defects) refer to defects that are judged to be allowable. In the prior art (for example, Japanese Patent Publication No. 5628656, etc.), a method of using the design intent data (Designer Intent Data) at the time of wafer and mask design to select a defect pattern with real inspection significance is being used.

Please refer to FIG. 1, which is a schematic diagram of a pattern defect extraction mode of a detection object based on a method of narrowing the inspection range used in the prior art. As shown in Figure 1, the reference number 10 indicates the data to be inspected determined by the reticle, the reference number 20 indicates the design intent data, the reference number 22 indicates the allowable defects in the defined reticle, and the reference number 24 indicates that the coordinates of the reticle are converted to The coordinates of the wafer, the reference number 26 indicates the use of a reticle to form a pattern on the wafer, the reference number 28 indicates the inspection of the wafer, the reference number 30 indicates the identification of harmful defects on the wafer, and the reference number 32 indicates the actual defect from the wafer The nuisance defect is separated in the middle, the reference number 34 indicates the processing of the actual defect data, the reference number 36 indicates the two-dimensional map of the generated wafer, and the reference number 38 indicates whether the nuisance defect has an impact on the yield rate of the semiconductor device, the reference number 40 indicates that it is judged whether the allowable defect is correctly classified, and the reference number 42 indicates that the defect pattern of the inspection target in the reticle is analyzed to determine whether the wafer needs to be redone or discarded.

However, the above method requires analysis and determination of all defect patterns through design intent data. Since the number of defect patterns output from the inspection device and the amount of data are huge, there is a problem of time-consuming analysis, so as to be effective in a short time. It becomes difficult to detect the defect patterns that are of significance.

In addition, in the prior art, in addition to the above-mentioned use of design intent data as the basis for judging nuisance defects, it is also possible to use the results of the printing program of the simulation reticle and the results of electrical characteristics simulation as the basis for judging nuisance defects. That is, the design intent data, the results of the printing program of the simulation reticle, and the simulation results of the electrical characteristics are used as the basis for judging the nuisance defect. However, the above method does not include the physical dangerous position in the manufacturing process as the nuisance defect. Judgments based.

Summary of the invention

The purpose of the present invention is to provide an extraction device, an extraction method and a storage medium for detecting a defect pattern of an object. Based on the input design layout data, it uses a program that simulates the analysis of the design layout data and the semiconductor manufacturing process to extract dangerous locations in advance and determine the inspection importance of the defect pattern output from the inspection device, so the analysis time can be greatly reduced. .

In order to achieve the above objective, the technical solution of the present invention is as follows:

An extracting device for detecting a defect pattern of an object, which includes:

A defect detection result reading module for reading the defect pattern of the detection object;

A defect detection result analysis module, which receives the defect pattern and analyzes the defect pattern;

The layout data reading module receives the original design layout of the inspection object;

Layout data analysis module for analyzing the original design layout;

The rule base analysis module, based on the design node information of the original design layout, extracts the pattern laid out by the limit limit of the design rule as the first type of dangerous location;

The physical simulation execution analysis module simulates and predicts the original design layout including the first dangerous location based on the physical model of the semiconductor manufacturing process, and determines the location where manufacturing defects are likely to occur, and bases the surroundings on the location The layout pattern divided by the influence range of the physical model is extracted as the second type of dangerous location;

The pattern matching execution analysis module, based on all the first-type dangerous locations extracted from the rule base and all the second-type dangerous locations extracted based on simulation prediction, clusters and groups them according to the dangerous location matching grouping method. The candidate patterns in the same group are merged into one to form a candidate pattern set;

The data processing analysis module receives the defect pattern, and compares all the candidate patterns in the candidate pattern set with the corresponding part of the defect pattern to determine the inspection importance of the corresponding part of the defect pattern.

Further, the physical model of the semiconductor manufacturing process includes at least a photolithography process model for engraving the layout pattern on a wafer, an etching process model for completing each shape of the patterned wafer, and a model for the surface of the wafer. One of the chemical mechanical polishing (CMP) process models for polishing.

Further, the dangerous location matching grouping manner includes one or more of the following three types:

The first method: treat patterns with exactly the same shape as the same and group them together;

The second way: treat patterns with similar shapes as similar and group them together;

The third type: the way to select a representative pattern from the patterns classified in the same group.

Further, the device for extracting the defect pattern of the detection target further includes a storage module, which is connected to the data processing and analysis module, and is used to store all candidate patterns in the candidate pattern set.

In order to achieve the above objective, another technical solution of the present invention is as follows:

A method for extracting a defect pattern of a detection object, which includes the following steps:

Step S1: According to the design node information parameters in the rule library, specify the first type of dangerous location extraction rule;

Step S2: receiving the original design layout made by CAD etc. when designing the inspection object;

Step S3: According to the design node information in the original design layout, extract the patterns laid out by the limit limits of the design rules in the rule library as the first type of dangerous locations in the original design layout;

Step S4: Perform simulation prediction on the original design layout based on the physical model of the semiconductor manufacturing process, and determine the location where defects are likely to occur in the manufacturing, and divide the location around the location where the defect occurs, and arrange the layout according to the range of influence of the physical model The pattern is extracted as the second type of dangerous location;

Step S5: for all the first-type dangerous locations extracted based on the rule library and all the second-type dangerous locations extracted based on simulation prediction, clustering and grouping according to the dangerous location matching grouping mode;

Step S6: According to the matching result, the candidate patterns in the same group are merged into one to form a candidate pattern set;

Step S7: Read the defect pattern output from the defect inspection device;

Step S8: receiving the defect pattern, and judging the inspection importance of the corresponding part of the defect pattern by comparing all the candidate patterns in the candidate pattern set with the corresponding part of the defect pattern.

Further, the method for extracting the defect pattern of the inspection object further includes step S9, according to the inspection importance, the corresponding part of the defect pattern corresponding to the candidate pattern with high inspection importance is used as a priority inspection pattern, and then Then check the corresponding part of the defect pattern corresponding to each of the other candidate patterns in turn.

A program used to store a computer-executable detection target defect pattern extraction program, which is installed and run in the computer to perform a relatively high-importance inspection target defect pattern on the detection target defect pattern output from the inspection device Selection of patterns; the computer executes the following program:

Reading and analyzing the defect pattern of the inspection object;

Read and analyze the original design layout of the test object;

In the rule library, according to the design node, extract the pattern laid out by the limit limit of the design rule as the first type of dangerous position;

Simulate and predict the original design layout of the physical model of the semiconductor manufacturing process, including the first type of dangerous location, and determine the location where manufacturing defects are likely to occur, and the location of the bad conditions is based on the influence range of the physical model The segmented layout pattern is extracted as the second type of dangerous location;

Perform matching grouping according to the dangerous position matching grouping method for all the first-type dangerous locations extracted in the rule base and all the second-type dangerous locations extracted by simulation, and merge the candidate patterns in the same group into One, to form a candidate pattern set;

The defect pattern is received, and the inspection importance of the corresponding part of the defect pattern is determined by comparing all the candidate patterns in the candidate pattern set with the corresponding part of the defect pattern.

It can be seen from the above technical solutions that the present invention proposes an extraction device, an extraction method and a storage medium for detecting a defect pattern of the object. According to the input design layout data, the analysis of the design layout data and the simulation of the semiconductor manufacturing process are used. The program is used to extract dangerous locations in advance and compare them with the defect patterns from defect inspection to determine the importance. It is not necessary to judge whether each of the defect patterns is a nuisance defect (nuisance defect), which can greatly reduce the need for inspection The analysis time of the defect pattern with higher importance.

In addition, the present invention not only uses the lithography simulation results in the manufacturing process to determine the detection importance of the defect pattern of the inspection object, but also reflects the simulation results of other manufacturing processes (for example, etching, chemical mechanical polishing, CMP), that is, with light The simulation results of the manufacturing process other than the engraving process can more effectively extract and determine the detection importance of the defect pattern of the detection target.

Description of the drawings

Figure 1 shows a schematic diagram of a defect extraction mode based on a comprehensive inspection object defect pattern used in the prior art

Fig. 2 is a schematic structural diagram of a preferred embodiment of the device for extracting the defect pattern of the detected object according to the present invention

Fig. 3 is a schematic diagram of the first type of dangerous location extraction rules specified according to the design node parameters in the rule library in an embodiment of the present invention

Figure 4 is a schematic diagram of the first type of dangerous location extracted from the original design layout based on the extraction rule in an embodiment of the present invention

FIG. 5 shows a schematic diagram of using a physical model to simulate a semiconductor manufacturing process in an embodiment of the present invention

Figure 6 is a schematic diagram of the candidate pattern matching and filtering process in an embodiment of the present invention

FIG. 7 is a schematic flowchart of a method for extracting a defect pattern of a detection object in an embodiment of the present invention

Summary of the invention

The specific embodiments of the present invention will be further described in detail below in conjunction with the accompanying drawings.

In the embodiment of the present invention, please refer to FIG. 2. FIG. 2 is a schematic structural diagram of a preferred embodiment of an apparatus for extracting a defect pattern of a detection object according to the present invention. As shown in the figure, the extraction device includes a defect detection result reading module, a defect detection result analysis module, a layout data reading module, a layout data analysis module, a rule library analysis module, a physical simulation execution analysis module, and a pattern matching execution analysis module. The module and the data processing analysis module, the screen display control module connected between the data processing analysis module and the display, and the keyboard control module connected between the data processing analysis module and the keyboard.

In the embodiment of the present invention, the defect detection result reading module is used to read the defect pattern of the inspection object; the defect detection result analysis module is used to receive the defect detection result, read the defect pattern, and analyze the defect pattern.

As shown in Figure 2, the layout data reading module is used to receive the original design layout; the layout data analysis module receives the input original design layout data and analyzes it. The original design layout refers to the layered pattern data generated by the design of a large-scale integrated circuit (LSI), which can be made with CAD for layout. The layered pattern data may generally include data recorded in formats such as GDS or OASIS.

According to the design node information, the rule base analysis module finds the pattern laid out by the limit limit of the design rule, and obtains the first type of dangerous position.

Please refer to FIG. 3, which is a schematic diagram of specifying the first type of dangerous location extraction rule according to the design node information in the rule library in an embodiment of the present invention. In this embodiment, it is assumed that the standard design node is a layout of 40 nm, and there are two patterns whose layout patterns have a width of 40 nm and a pitch of 40 nm and 80 nm. At this time, the pitch of the pattern of the design node limit becomes 40 nm, which is extracted as the first type of dangerous position. In this example, the layout of the design node limit is targeted, and a percentage of the size above this (for example, if it is 40 nm in the 10% range, it will reach 44 nm) as a dangerous location.

As shown in Figure 3, the left picture shows the distance between the two wirings is 40nm, and the right picture shows the distance between the two wirings is 80nm. In contrast, the two wirings with a spacing of 40nm are more likely to have defects, and the distance between them is 80nm. Defects between the two wiring lines are less likely.

Please refer to FIG. 4, which is a schematic diagram of extracting the first type of dangerous location from the original design layout based on the extraction rule in an embodiment of the present invention. As shown in the figure, the left picture is the wiring of the original design layout, and the right picture is the original design layout with the extracted dangerous locations added.

Please refer to FIG. 2 again. In the embodiment of the present invention, the physical simulation execution analysis module uses the physical model of the semiconductor manufacturing process to simulate and predict all the original design layouts including the first type of dangerous location, and extract the second type of risk Position, forming a simulation result pattern including the second type of dangerous position.

It is clear to those skilled in the art that there can be multiple semiconductor manufacturing processes. In the process of wafer design or before the pattern is recorded on the wafer, it is usually necessary to perform modeling and simulation for each process of wafer manufacturing in order to meet the requirements of the qualified rate of manufactured wafers.

In the embodiment of the present invention, the physical model in the simulation software is used to simulate the change of the original design layout pattern after multiple semiconductor manufacturing processes, and to determine the location where manufacturing defects in the design layout may occur. The layout pattern divided by the influence range of the physical model around the position is extracted as the second-type dangerous position to form a simulation result pattern including the second-type dangerous position. In addition, a storage module connected to the data processing and analysis module may also be used to store the simulation result pattern including the second type of dangerous location.

Please refer to FIG. 5. FIG. 5 is a schematic diagram of simulating a semiconductor manufacturing process with a physical model in an embodiment of the present invention. Among them, the left picture is a schematic diagram of the chemical mechanical polishing (CMP) process. As shown in the figure, the device for performing the chemical mechanical polishing (CMP) process includes a polishing head, a grinding wheel dresser, a polishing pad, and an abrasive, etc. In the chemical mechanical polishing (CMP) process, the surface of the patterned wafer is polished through a polishing pad with the cooperation of an abrasive. The middle picture is a schematic diagram of the dry etching process, and the right picture is a schematic diagram of the photolithography process.

In the embodiment of the present invention, the physical model of the semiconductor manufacturing process includes at least a photolithography process model for recording a layout pattern on a wafer, an etching process model for completing each shape of a patterned wafer, and a One of the chemical-mechanical polishing process models for polishing the surface of a wafer. Of course, in the embodiment of the present invention, other physical models can also be selected, which is not limited here.

Please refer to Figure 2 again. After obtaining the simulation result pattern including the second type of dangerous position, the pattern matching execution analysis module performs the analysis on all the first type of dangerous positions extracted in the rule library and all the ones extracted by simulation. The second type of dangerous locations is clustered and grouped after matching according to the dangerous location matching grouping method, and the candidate patterns in the same group are merged into one to form a candidate pattern set. Preferably, the candidate pattern set can be stored in a storage module connected to the data processing and analysis module. In the embodiment of the present invention, the dangerous location matching grouping method may include one or more of the following three types:

①. Regarding patterns with exactly the same shape as the same way of grouping;

②. Regarding patterns with similar shapes as similar grouping methods;

③. Select the representative pattern from the patterns in the same group.

Specifically, please refer to FIG. 6, which is a schematic diagram of a candidate pattern matching and filtering process in an embodiment of the present invention. As shown in the figure, the above figure shows two candidate patterns from a set of multiple candidate patterns output from simulation result patterns including dangerous locations. The candidate patterns on the left and the right are almost the same. After the two candidate patterns are matched and grouped, they will be grouped into one group.

Please refer to FIG. 2 again. As shown in the figure, the data processing analysis module receives the defect pattern; by comparing all candidate patterns in the candidate pattern set with the corresponding part of the defect pattern, the inspection importance of the corresponding part of the defect pattern is determined. That is to say, the corresponding part of the defect pattern corresponding to the candidate pattern with high inspection importance can be used as the priority inspection pattern, and then the corresponding part of the defect pattern corresponding to each other candidate pattern can be inspected in turn.

The following is a summary and detailed description of a method for extracting a defect pattern of a detection object in an embodiment of the present invention. Please refer to FIG. 7, which is a schematic flowchart of a method for extracting a defect pattern of a detection object in an embodiment of the present invention.

A method for extracting a defect pattern of a detection object, which includes:

Step S1: Specify the first type of dangerous location extraction rule according to the design node parameters in the rule library;

Step S3: According to the design node information in the original design layout, extract the pattern laid out by the limit limit of the design rule in the rule library as the first type of dangerous position;

Step S4: Perform simulation prediction on the original design layout of the physical model of the semiconductor manufacturing process, and determine the location where manufacturing defects are likely to occur, and use the layout pattern divided according to the influence range of the physical model around the location as the second type of danger Location extraction

Step S5: For all the first-type dangerous locations extracted based on the rule library and all the second-type dangerous locations extracted based on simulation prediction, matching groups are matched according to the dangerous location matching grouping mode;

Step S6: According to the matching result, the candidate patterns in the same group are merged together to form a candidate pattern set;

Step S7: Read the defect pattern output from the defect inspection device;

In addition, in the embodiment of the present invention, a computer-readable medium is also provided for storing a computer-executable program for extracting the defect pattern of the inspection object, which is installed in a computer to run on the inspection object output from the inspection device. Select the defect pattern of the inspection object with higher importance; the computer executes the following procedures:

Reading and analyzing the defect pattern of the inspection object;

Read and analyze the original design layout of the test object;

In the rule library, according to the design node information, the pattern laid out by the limit limit of the design rule is extracted as the first type of dangerous position;

Simulate and predict the original design layout based on the physical model of the semiconductor manufacturing process, including all the dangerous locations of the first category, and determine the locations that are likely to be defective in manufacturing, and the surrounding locations are based on the influence of the physical model The layout pattern divided by the scope is extracted as the second type of dangerous position;

Based on all the first-type dangerous locations extracted in the rule base and all the second-type dangerous locations extracted by simulation prediction, cluster and group according to the dangerous location matching grouping method, and group them into the same group The candidate patterns of are merged into one to form a candidate pattern set;

Receiving the defect pattern, and determining the inspection importance of the corresponding part of the defect pattern by comparing all the candidate patterns in the candidate pattern set with the corresponding part of the defect pattern;

According to the inspection importance, the corresponding part of the defect pattern corresponding to the candidate pattern with high inspection importance is taken as the priority inspection pattern, and then the defect patterns corresponding to each of the other candidate patterns are sequentially inspected. The corresponding part.

The above are only the preferred embodiments of the present invention, and the described embodiments are not used to limit the scope of patent protection of the present invention. Therefore, any equivalent structural changes made using the contents of the description and drawings of the present invention should be included in the same reasoning. Within the protection scope of the appended claims of the present invention.

Claims

An extracting device for detecting a defect pattern of an object, which is characterized in that it comprises:

A defect detection result reading module for reading the defect pattern of the detection object;

A defect detection result analysis module, which receives the defect pattern and analyzes the defect pattern;

The layout data reading module receives the original design layout of the inspection object;

Layout data analysis module for analyzing the received original design layout;

The rule base analysis module extracts the pattern laid out by the limit limit of the design rule in the rule base as the first type of dangerous position according to the design node information in the original design layout;

The physical simulation execution analysis module simulates and predicts the original design layout based on the physical model of the semiconductor manufacturing process, including the first type of dangerous location, and determines the location where the manufacturing failure may occur, and the failure will occur The layout pattern divided according to the influence range of the physical model around the location is extracted as the second type of dangerous location;

The pattern matching execution analysis module performs matching and grouping based on all the first-type dangerous locations extracted from the rule base and all the second-type dangerous locations extracted based on simulation predictions according to the dangerous location matching grouping method, and grouping them into the same group The candidate patterns in are merged into one to form a candidate pattern set;

The data processing analysis module receives the defect pattern, and compares all the candidate patterns in the candidate pattern set with the corresponding part of the defect pattern to determine the inspection importance of the corresponding part of the defect pattern.
The device for extracting a defect pattern of an inspection object according to claim 1, wherein the physical model of the semiconductor manufacturing process includes at least one of a photolithography process model, an etching process model, and a chemical mechanical polishing process model. one.
The device for extracting a defect pattern of a detection object according to claim 1, wherein the dangerous location matching grouping method includes one or more of the following three types:

The first method: treat patterns with exactly the same shape as the same and group them;

The second method: treat patterns with similar shapes as similar and group them;

The third type: the way to select a representative pattern from the patterns classified in the same group.
The device for extracting defect patterns of a detection object according to claim 1, further comprising a storage module connected to the data processing and analysis module and configured to store all candidate patterns in the candidate pattern set.
The device for extracting a defect pattern of a detected object according to claim 1, further comprising a screen display control module connected between the data processing analysis module and the display, and a keyboard control module connected between the data processing analysis module and the keyboard Module.
A method for extracting a defect pattern of a detection object, which is characterized in that it comprises:

The step of reading and analyzing the defect pattern of the inspection object;

The step of receiving and analyzing the original design layout of the inspection object;

According to the design node information in the original design layout, the step of extracting the pattern laid out by the limit limit of the design rule in the rule library as the first type of dangerous location;

Simulate and predict the original design layout based on the physical model of the semiconductor manufacturing process that includes the first type of dangerous location, and determine the location where manufacturing failures are likely to occur, and the physical surroundings of the location where the failures will occur The step of extracting the layout pattern divided by the model's influence range as the second type of dangerous position;

For all the first-type dangerous locations extracted based on the rule library and all the second-type dangerous locations extracted based on simulation prediction, perform matching grouping according to the dangerous location matching grouping method, and merge the candidate patterns in the same group into One, the step of forming a candidate pattern set; and

The step of receiving the defect pattern and comparing all the candidate patterns in the candidate pattern set with the corresponding part of the defect pattern to determine the inspection importance of the corresponding part of the defect pattern.
The method for extracting a defect pattern of a detection object according to claim 6, further comprising the following step: according to the inspection importance, the corresponding part of the defect pattern corresponding to the candidate pattern with high inspection importance is checked , As a priority inspection pattern, and then sequentially inspect the corresponding part of the defect pattern corresponding to each of the other candidate patterns.
The method for extracting a defect pattern of a test object according to claim 6, wherein the device for extracting a defect pattern of a test object according to claim 1, wherein the dangerous location matching grouping method includes the following three One or more:

The first method: treat patterns with exactly the same shape as the same and group them;

The second method: treat patterns with similar shapes as similar and group them;

The third type: the way to select a representative pattern from the patterns classified in the same group.
A computer-readable medium for storing a computer-executable program for extracting a defect pattern of a test object, and by installing and running in the computer, the defect pattern of the test object output from the inspection device is highly important. The selection of the defect pattern of the inspection object; characterized in that the computer executes the following program:

Reading and analyzing the defect pattern of the inspection object;

Receiving and analyzing the original design layout of the inspection object;

According to the design node information in the original design layout, extract the pattern laid out by the limit limit of the design rule in the rule library as the first type of dangerous location;

Simulate and predict the original design layout based on the physical model of the semiconductor manufacturing process that includes the first type of dangerous location, and determine the location where manufacturing defects are likely to occur, and based on the physical model The layout pattern segmented from the affected area of the system is extracted as the second type of dangerous location;

For all the first-type dangerous locations extracted based on the rule library and all the second-type dangerous locations extracted based on simulation prediction, match the grouping according to the dangerous location matching grouping method, and merge the candidate patterns in the same group into one, Form a set of candidate patterns;

The defect pattern is received, and all the candidate patterns in the candidate pattern set are compared with corresponding parts of the defect pattern to determine the inspection importance of the corresponding part of the defect pattern.
The method for extracting a defect pattern of a detection object according to claim 9, wherein the dangerous location matching grouping method includes one or more of the following three types:

The first method: treat patterns with exactly the same shape as the same and group them;

The second method: treat patterns with similar shapes as similar and group them;

The third type: the way to select a representative pattern from the patterns classified in the same group.