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WO2020114193A1 - Line structure of circuit board, circuit board assembly and electronic device - Google Patents

Line structure of circuit board, circuit board assembly and electronic device Download PDF

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Publication number
WO2020114193A1
WO2020114193A1 PCT/CN2019/116594 CN2019116594W WO2020114193A1 WO 2020114193 A1 WO2020114193 A1 WO 2020114193A1 CN 2019116594 W CN2019116594 W CN 2019116594W WO 2020114193 A1 WO2020114193 A1 WO 2020114193A1
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WO
WIPO (PCT)
Prior art keywords
circuit board
circuit
layer
layers
traces
Prior art date
Application number
PCT/CN2019/116594
Other languages
French (fr)
Chinese (zh)
Inventor
张卫鹏
Original Assignee
维沃移动通信有限公司
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Filing date
Publication date
Application filed by 维沃移动通信有限公司 filed Critical 维沃移动通信有限公司
Publication of WO2020114193A1 publication Critical patent/WO2020114193A1/en

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0228Compensation of cross-talk by a mutually correlated lay-out of printed circuit traces, e.g. for compensation of cross-talk in mounted connectors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/0929Conductive planes
    • H05K2201/09327Special sequence of power, ground and signal layers in multilayer PCB

Definitions

  • the present disclosure relates to the technical field of circuit boards, and in particular, to a circuit board circuit structure, circuit board assembly, and electronic equipment.
  • circuit board layout of the electronic equipment in the related art has greater restrictions, and as the space of the circuit board becomes more and more tight, the layout problem becomes more and more serious.
  • the embodiments of the present disclosure provide a circuit board circuit structure, a circuit board assembly, and an electronic device, to solve the problem that the circuit board layout of the electronic device in the related art is relatively restrictive.
  • an embodiment of the present disclosure provides a circuit board circuit structure applied to a circuit board provided with devices, the circuit board being a multi-layer circuit board with a number of layers greater than or equal to 2;
  • the circuit board circuit has a circuit segment passing through the orthographic projection area of the device
  • the line segment includes even-numbered layer traces, and the layer traces of the line segment are respectively disposed on different layers of the circuit board, and the layer traces of the line segment are sequentially connected by a connecting segment, and the line segment The current directions of adjacent two layers of traces are opposite.
  • an embodiment of the present disclosure provides a circuit board assembly, including a circuit board, a magnetic sensitive device provided on the circuit board, and a circuit board circuit, the circuit board circuit adopts the structure of the first aspect.
  • an embodiment of the present disclosure provides an electronic device, including the circuit board assembly in the second aspect.
  • the even-numbered layer traces are arranged under the device, so that the magnetic fields generated by the current changes of the layer traces can cancel each other, thereby reducing the magnetic field interference around the device. In this way, there is no need to passively select an area where the magnetic field interference is small to set up the device, and the circuit board traces need not avoid the device. It can be seen that the embodiments of the present disclosure can make the circuit board layout more flexible.
  • FIG. 2 is a second structural diagram of a circuit board assembly provided by an embodiment of the present disclosure.
  • various electronic components are implemented on the circuit board to achieve different functions.
  • the current level generally occurs.
  • the change of the working scene of the electronic device such as charging scene, call scene, video scene, etc.
  • the change of the current size is also different.
  • the principle of electromagnetic induction a changing electric current produces a changing electric field, and a changing electric field produces a changing magnetic field. Therefore, the device will generate magnetic field interference to the device, especially the magnetic sensitive device, and the magnetic field interference may change at any time.
  • the continuous expansion of the functions of electronic equipment there are more and more scenes with large loads, and the current changes are more frequent, which makes the device more susceptible to magnetic field interference.
  • the methods to avoid magnetic field interference mainly include the following: First, the device is placed in an area away from the magnetic field interference, but as the layout area of the circuit board becomes more and more tight, the layout space restrictions are more and more, It is also getting harder and harder to find a location away from magnetic interference. Second, when laying out the circuit board traces, avoid the surrounding and bottom areas of the device, which limits the flexibility of the circuit board traces to a certain extent. Third, the device is placed in the clearance area of the radio frequency antenna, which reduces the effective clearance area of the radio frequency antenna, thereby reducing the sensitivity of the radio frequency antenna. It can be seen that none of the above methods can effectively solve the above-mentioned problems caused by installing devices in the electronic equipment.
  • embodiments of the present disclosure provide a circuit board circuit structure to solve the above-mentioned problems.
  • an embodiment of the present disclosure provides a circuit board circuit structure, which is applied to a circuit board 2 provided with a device 1.
  • the circuit board 2 is a multilayer circuit board with a number of layers greater than or equal to 2; a circuit board
  • the line 3 has a line segment 31 passing through the orthographic projection area of the device 1; the line segment 31 includes even-numbered layer traces, the layer traces of the line segment 31 are respectively disposed on different layers of the circuit board 2, and the layer traces of the line segment 31 pass through
  • the connection sections 313 are connected in sequence, and the current directions of the two adjacent layers of the line section 31 are opposite.
  • the circuit board circuit 3 is a circuit of other devices (not shown) provided on the circuit board 2.
  • the above-mentioned device 1 may be a device that realizes its function by a magnetic field (may be referred to as a "magnetic sensitive device"), such as a magnetic sensor.
  • Magnetically sensitive devices commonly used in related technologies include compasses, Hall elements, and so on.
  • the circuit board circuit 3 described above includes a current input terminal 32 and a current output terminal 33 in addition to the circuit segment 31 passing through the front projection area of the device 1.
  • the orthographic projection area of the device 1 on the circuit board 2 is a sealed area, and the line segment 31 passing through the orthographic projection area of the device 1 includes the first layer trace 311 passing through the orthographic projection area, which is outside the orthographic projection area It is connected to the connection section 313 and connected to the second layer trace 312 through the connection section 313.
  • the second layer trace 312 also passes through the orthographic projection area and forms the current output terminal 33.
  • the line segment 31 passing through the front projection area of the device 1 further includes that the first layer trace 311 extends from the front projection area to the front projection area, and is connected to the second layer trace 312 through the connection section 313 in the front projection area.
  • the second layer trace 312 passes through the orthographic projection area and forms the current output terminal 33.
  • the line segment 31 passing through the front projection area of the device 1 further includes that the first layer trace 311 extends from the front projection area to the outside of the front projection area, and is connected to the second layer trace 312 through the connecting section 313 outside the front projection area.
  • the second layer trace 312 extends into the orthographic projection area and forms a current output terminal 33.
  • the number of wiring layers of the above-mentioned line segment 31 is at least 2 layers, and the maximum number of wiring layers can be reasonably set according to the number of layers of the circuit board 2, for example, if the number of layers of the circuit board 2 is 4, the number of the line segment 31 The maximum number of trace layers is 4, and so on.
  • the connection section 313 between the adjacent two layers of traces of the line section 31 can be realized by copper plating through vias.
  • FIG. 2 shows a specific implementation manner in which the number of wiring layers of the line segment 31 is two layers.
  • the line segment 31 includes the first layer trace 311 and the second layer trace 312.
  • the first layer traces 311 and the second layer traces 312 are located on different layers of the circuit board 2 respectively.
  • the first layer traces 311 and the second layer traces 312 are arranged substantially in parallel (may be arranged in parallel or non-parallel);
  • the line section 31 further includes a connection section 313 connecting adjacent two layers of traces.
  • the connection section 313 may be a portion where the via on the circuit board 2 is located.
  • the first layer trace 311 and the second layer trace 312 will form current paths of equal size and substantially opposite directions.
  • the two current paths in the area where the device is located will produce magnetic fields with substantially opposite directions and almost equal sizes (due to the layer spacing between the first layer trace 311 and the second layer trace 312, the two current paths are in The size of the magnetic field in the area where the device 1 is located cannot be completely equal), so that the magnetic fields generated by the two current paths can be almost completely cancelled out, thus minimizing the magnetic field interference of the circuit board circuit 3 on the device.
  • the number of wiring layers of the line segment 31 may be two layers, or even layers such as four layers or six layers.
  • the number of wiring layers of the line segment 31 is optionally two layers, the reason is that, because there is only a magnetic field difference caused by the spacing between the two layers of wiring, the magnetic field cancellation effect is the best; and, the wiring layer The smaller the number, the fewer the number of layers occupying the circuit board 2, which can simplify the wiring arrangement inside the circuit board 2.
  • the number of wiring layers of the line segment 31 also needs to be set reasonably according to various parameters of the device.
  • the circuit board routing does not need to avoid the device, and the circuit board layout is more flexible; the circuit board can be laid out
  • the number of devices can also be appropriately increased, which can increase the layout density of the circuit board; and, it does not need to occupy the clearance area of the RF antenna to set the device, ensuring the working performance of the RF antenna and improving the sensitivity of the RF antenna.
  • each layer of the line segment 31 is parallel.
  • two adjacent layers of traces will form current paths of equal size and completely opposite directions.
  • the two current paths will generate magnetic fields with completely opposite directions and almost equal sizes in the area where the device is located, so as to offset the magnetic fields generated by the adjacent two layers of traces to the greatest extent.
  • the traces of each layer of the line segment 31 are respectively disposed on successive layers of the circuit board 2.
  • FIGS. 1 to 2 show an embodiment in which the first layer traces 311 and the second layer traces 312 are respectively disposed on the second layer and the third layer of the circuit board 2.
  • the distance between the trace of the line segment 31 closest to the device 1 and the device 1 is at least one Layer circuit board.
  • the line segment 31 should avoid the circuit board layer where the device 1 is located as much as possible.
  • the trace of the line segment 31 closest to the device 1 may be separated from the device 1 by at least one layer of circuit board. That is to say, the device 1 is arranged on the first layer of the circuit board 2, and the line segment 31 can be arranged from the second layer of the circuit board 2 or a layer below the second layer.
  • the circuit segment 31 can also be placed at the device 1 avoiding the connection structure such as solder legs and pads Circuit board layer.
  • the distance between the trace of the line segment 31 closest to the device 1 and the device 1 At least two layers of circuit boards.
  • the traces of each layer of the line segment 31 can be arranged on the layers of the circuit board 2 away from the device 1 .
  • the wiring of the line segment 31 may be provided on the third and fourth layers of the circuit board 2.
  • each layer of the line segment 31 also needs to be reasonably set according to the overall layout requirements of the circuit board 2.
  • the layer spacing of the circuit board 2 where the line segments 31 are provided is less than or equal to the layer spacing of the circuit board 2 where the line segments 31 are not provided.
  • the spacing between the layers of the circuit board 2 can be set differently, and the line segment 31 can be disposed on a layer with a smaller layer spacing of the circuit board 2.
  • the lengths of the traces of each layer of the line segment 31 are equal, and the connecting segment 313 between the traces of two adjacent layers is perpendicular to the traces of each layer. In this way, the closer the magnitude of the magnetic field generated by the traces of each layer to the device 1 is, the less the interference of the magnetic field generated by the device 1 to the device 1 is.
  • the vertical distance between the two ends of the traces of each layer of the line segment 31 and the edge of the device 1 is equal, and the connection segment 313 between the traces of two adjacent traces is perpendicular to the traces of each layer.
  • the two ends of the traces of each layer are arranged symmetrically with respect to the center of the device 1, and the resulting interference to the magnetic field of the device 1 is smaller.
  • each connection segment 313 connected to both ends of each layer trace in the line segment 31 to the edge of the device 1 is also approximately equal, and the vertical distance between each connection segment 313 and the edge of the device 1 is the same as the current input terminal 32
  • the vertical distance from the (or current output terminal 33) to the edge of the device 1 is also approximately equal. In this way, the magnetic field interference to the device 1 generated in the above-mentioned places can be substantially completely cancelled, thereby further reducing the magnetic field interference of the entire circuit board circuit 3 to the device 1.
  • the current input terminal 32 of the circuit board circuit 3 is located in the area from the edge of the device 1 to the outside of the device 1;
  • the current output terminal 33 of the circuit board line 3 is located in the area from the edge of the device 1 to the outside of the device 1.
  • circuit board lines 3 of other devices can be introduced from the outside of the device 1 and drawn out from the outside of the device 1 so as to avoid affecting the arrangement of the device 1 on the circuit board 2.
  • connection segment 313 between the adjacent two layers of traces of the line segment 31 is located in the area from the edge of the device 1 to the outside of the device 1.
  • each connecting section 313 and the edge of the device 1 is approximately equal to the vertical distance between the current input terminal 32 (or current output terminal 33) and the edge of the device 1.
  • the current output terminal 33 of the circuit board line 3 is directly led out from the last layer of the line segment 31 as shown in FIG. 1; when there is a surplus number of layers of the circuit board 2, the current of the circuit board line 3 The output terminal 33 is led out from the circuit board layer located under the last layer of the line segment 31, as shown in FIG. 2.
  • An embodiment of the present disclosure also provides a circuit board assembly.
  • the circuit board assembly includes a circuit board 2 and a device 1 provided on the circuit board 2 and a circuit board circuit 3.
  • the circuit board circuit 3 adopts the above disclosure The circuit board circuit structure in the embodiment.
  • the device 1 is a magnetic sensitive device, including at least one of a compass and a Hall element.
  • circuit board assembly can refer to the above description, and can achieve the same technical effect. In order to avoid repetition, it will not be repeated here.
  • An embodiment of the present disclosure also provides an electronic device, including the circuit board assembly in the above disclosed embodiment.
  • the specific implementation of the circuit board assembly in the electronic device can refer to the above description, and can achieve the same technical effect. In order to avoid repetition, it will not be repeated here.
  • the electronic device may be a computer, a mobile phone, a tablet, a laptop, a laptop, a personal computer, a personal digital assistant (PDA), or a mobile Internet electronic Device (Mobile Internet Device, MID), wearable device (Wearable Device), e-reader, navigator, digital camera, etc.
  • PDA personal digital assistant

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

A line structure of a circuit board, a circuit board assembly and an electronic device, wherein the line structure of a circuit board is applied to a circuit board (2) configured with a component (1), and the circuit board (2) is a multi-layered circuit board the number of layers of which is equal to or greater than two; a line of the circuit board (2) comprises a line section (31) that passes through an orthographic projection area of the component (1); the line section (31) comprises an even number of layers of wiring, each layer of wiring of the line section (31) is respectively provided on a different layer of the circuit board (2), each layer of wiring of the line section (31) is connected in sequence by means of a connection section (313), and the directions of the currents of two adjacent layers of wiring of the line section (31) are opposite.

Description

电路板线路结构、电路板组件和电子设备Circuit board circuit structure, circuit board assembly and electronic equipment
相关申请的交叉引用Cross-reference of related applications
本申请主张在2018年12月3日在中国提交的中国专利申请号No.201811466251.3的优先权,其全部内容通过引用包含于此。This application claims the priority of Chinese Patent Application No. 201811466251.3 filed in China on December 3, 2018, the entire contents of which are hereby incorporated by reference.
技术领域Technical field
本公开涉及电路板技术领域,尤其涉及一种电路板线路结构、电路板组件和电子设备。The present disclosure relates to the technical field of circuit boards, and in particular, to a circuit board circuit structure, circuit board assembly, and electronic equipment.
背景技术Background technique
随着电子设备功能的不断扩大,电子设备中设置的器件越来越多。电子设备中的器件在工作时存在电流的变化,这导致电子设备中存在磁场的变化,从而产生磁场干扰。磁场的变化将对器件的工作性能产生一定的影响,尤其是对磁场较为敏感的器件。一般将该类器件设置于远离磁场的区域。为了减小磁场干扰对器件工作性能的影响,在对电路板进行线路布局时,也需要避开器件。As the functions of electronic equipment continue to expand, more and more devices are provided in electronic equipment. There is a change in current during operation of the device in the electronic device, which results in a change in the magnetic field in the electronic device, thereby generating magnetic field interference. Changes in the magnetic field will have a certain impact on the performance of the device, especially devices that are more sensitive to magnetic fields. Such devices are generally placed in areas away from the magnetic field. In order to reduce the influence of magnetic field interference on the performance of the device, it is also necessary to avoid the device when performing circuit layout on the circuit board.
可见,相关技术中的电子设备的电路板布局存在较大的限制性,且随着电路板空间日趋紧张,其布局问题越来越严峻。It can be seen that the circuit board layout of the electronic equipment in the related art has greater restrictions, and as the space of the circuit board becomes more and more tight, the layout problem becomes more and more serious.
发明内容Summary of the invention
本公开实施例提供一种电路板线路结构、电路板组件和电子设备,以解决相关技术中的电子设备的电路板布局存在较大限制性的问题。The embodiments of the present disclosure provide a circuit board circuit structure, a circuit board assembly, and an electronic device, to solve the problem that the circuit board layout of the electronic device in the related art is relatively restrictive.
为了解决上述技术问题,本公开是这样实现的:In order to solve the above technical problems, the present disclosure is implemented as follows:
第一方面,本公开实施例提供了一种电路板线路结构,应用于设置有器件的电路板,所述电路板为层数大于或等于2的多层电路板;In a first aspect, an embodiment of the present disclosure provides a circuit board circuit structure applied to a circuit board provided with devices, the circuit board being a multi-layer circuit board with a number of layers greater than or equal to 2;
所述电路板线路具有经过所述器件正投影区域的线路段;The circuit board circuit has a circuit segment passing through the orthographic projection area of the device;
所述线路段包括偶数层走线,所述线路段的各层走线分别设置于所述电路板的不同层,所述线路段的各层走线通过连接段顺次连接,所述线路段的 相邻两层走线的电流方向相反。The line segment includes even-numbered layer traces, and the layer traces of the line segment are respectively disposed on different layers of the circuit board, and the layer traces of the line segment are sequentially connected by a connecting segment, and the line segment The current directions of adjacent two layers of traces are opposite.
第二方面,本公开实施例提供了一种电路板组件,包括电路板和设置于所述电路板的磁敏感器件及电路板线路,所述电路板线路采用第一方面中的结构。In a second aspect, an embodiment of the present disclosure provides a circuit board assembly, including a circuit board, a magnetic sensitive device provided on the circuit board, and a circuit board circuit, the circuit board circuit adopts the structure of the first aspect.
第三方面,本公开实施例提供了一种电子设备,包括第二方面中的电路板组件。In a third aspect, an embodiment of the present disclosure provides an electronic device, including the circuit board assembly in the second aspect.
本公开实施例中,通过在器件下方设置偶数层走线,以使各层走线因电流变化而产生的磁场能够相互抵消,从而能够降低器件周围的磁场干扰。这样,无需被动选择磁场干扰小的区域设置器件,电路板走线也无需避开器件。可见,本公开实施例能够使电路板布局更加灵活。In the embodiments of the present disclosure, the even-numbered layer traces are arranged under the device, so that the magnetic fields generated by the current changes of the layer traces can cancel each other, thereby reducing the magnetic field interference around the device. In this way, there is no need to passively select an area where the magnetic field interference is small to set up the device, and the circuit board traces need not avoid the device. It can be seen that the embodiments of the present disclosure can make the circuit board layout more flexible.
附图说明BRIEF DESCRIPTION
图1是本公开实施例提供的电路板组件的结构示意图之一;1 is one of the structural schematic diagrams of the circuit board assembly provided by the embodiment of the present disclosure;
图2是本公开实施例提供的电路板组件的结构示意图之二。2 is a second structural diagram of a circuit board assembly provided by an embodiment of the present disclosure.
具体实施方式detailed description
下面将结合本公开实施例中的附图,对本公开实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例是本公开一部分实施例,而不是全部的实施例。基于本公开中的实施例,本领域普通技术人员在没有作出创造性劳动前提下所获取的所有其他实施例,都属于本公开保护的范围。The technical solutions in the embodiments of the present disclosure will be described clearly and completely in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, but not all of the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by a person of ordinary skill in the art without creative efforts fall within the protection scope of the present disclosure.
电子设备中,例如手机、平板电脑、车载导航仪等等,通过在电路板上设置各种电子元器件(简称“器件”)实现不同的功能,器件在工作过程中,其电流大小一般会发生或多或少的变化,且随着电子设备工作场景的改变(例如充电场景、通话场景、视频场景等),电流大小的变化也不尽相同。根据电磁感应原理,变化的电流产生变化的电场,变化的电场产生变化的磁场。因此,器件会产生对器件,尤其是磁敏感器件的磁场干扰,且该磁场干扰随时可能发生变化。随着电子设备功能的不断扩大,大负载的场景也越来越多,电流变化也更加频繁,从而导致器件更容易受到磁场干扰。In electronic equipment, such as mobile phones, tablet computers, car navigation systems, etc., various electronic components (referred to as "devices") are implemented on the circuit board to achieve different functions. During the operation of the device, the current level generally occurs. There are more or less changes, and with the change of the working scene of the electronic device (such as charging scene, call scene, video scene, etc.), the change of the current size is also different. According to the principle of electromagnetic induction, a changing electric current produces a changing electric field, and a changing electric field produces a changing magnetic field. Therefore, the device will generate magnetic field interference to the device, especially the magnetic sensitive device, and the magnetic field interference may change at any time. With the continuous expansion of the functions of electronic equipment, there are more and more scenes with large loads, and the current changes are more frequent, which makes the device more susceptible to magnetic field interference.
相关技术中,规避磁场干扰的方法主要包括以下几种:其一,将器件设 置于远离磁场干扰的区域,但随着电路板布板面积越来越紧张,布板空间限制越来越多,寻找一个远离磁场干扰的位置也越来越难。其二,在对电路板走线进行布局时,避开器件的周围和底部区域,这在一定程度上限制了电路板走线的灵活性。其三,将器件设置于射频天线的净空区,这使得射频天线的有效净空区减小,从而使得射频天线的灵敏度降低。可见,上述方法均无法有效解决电子设备中因设置器件而导致的上述问题。In the related art, the methods to avoid magnetic field interference mainly include the following: First, the device is placed in an area away from the magnetic field interference, but as the layout area of the circuit board becomes more and more tight, the layout space restrictions are more and more, It is also getting harder and harder to find a location away from magnetic interference. Second, when laying out the circuit board traces, avoid the surrounding and bottom areas of the device, which limits the flexibility of the circuit board traces to a certain extent. Third, the device is placed in the clearance area of the radio frequency antenna, which reduces the effective clearance area of the radio frequency antenna, thereby reducing the sensitivity of the radio frequency antenna. It can be seen that none of the above methods can effectively solve the above-mentioned problems caused by installing devices in the electronic equipment.
鉴于此,本公开实施例提供一种电路板线路结构,以解决上述问题。In view of this, embodiments of the present disclosure provide a circuit board circuit structure to solve the above-mentioned problems.
如图1至图2所示,本公开实施例提供一种电路板线路结构,应用于设置有器件1的电路板2,电路板2为层数大于或等于2的多层电路板;电路板线路3具有经过器件1正投影区域的线路段31;线路段31包括偶数层走线,线路段31的各层走线分别设置于电路板2的不同层,线路段31的各层走线通过连接段313顺次连接,线路段31的相邻两层走线的电流方向相反。As shown in FIGS. 1 to 2, an embodiment of the present disclosure provides a circuit board circuit structure, which is applied to a circuit board 2 provided with a device 1. The circuit board 2 is a multilayer circuit board with a number of layers greater than or equal to 2; a circuit board The line 3 has a line segment 31 passing through the orthographic projection area of the device 1; the line segment 31 includes even-numbered layer traces, the layer traces of the line segment 31 are respectively disposed on different layers of the circuit board 2, and the layer traces of the line segment 31 pass through The connection sections 313 are connected in sequence, and the current directions of the two adjacent layers of the line section 31 are opposite.
上述电路板线路3为一设置于电路板2的其他器件(图中未示出)的线路。The circuit board circuit 3 is a circuit of other devices (not shown) provided on the circuit board 2.
上述器件1可以为通过磁场实现其功能的器件(可称之为“磁敏感器件”),例如磁传感器。相关技术中比较常用的磁敏感器件包括指南针、霍尔元件等等。The above-mentioned device 1 may be a device that realizes its function by a magnetic field (may be referred to as a "magnetic sensitive device"), such as a magnetic sensor. Magnetically sensitive devices commonly used in related technologies include compasses, Hall elements, and so on.
上述电路板线路3除了具有经过器件1正投影区域的线路段31之外,还包括电流输入端32和电流输出端33。器件1在电路板2上的正投影区域为一个密封的区域,经过器件1正投影区域的线路段31包括如图1中第一层走线311穿过该正投影区域,在正投影区域外和连接段313连接,并通过连接段313连接第二层走线312,第二层走线312也穿过该正投影区域,并形成电流输出端33。经过器件1正投影区域的线路段31还包括,第一层走线311从正投影区域外向正投影区域中延伸,并在正投影区域内通过连接段313连接至第二层走线312,第二层走线312穿出该正投影区域,并形成电流输出端33。经过器件1正投影区域的线路段31还包括,第一层走线311从正投影区域内向正投影区域外延伸,并在正投影区域外通过连接段313连接至第二层走线312,第二层走线312向该正投影区域内延伸,并形成电流输出端33。The circuit board circuit 3 described above includes a current input terminal 32 and a current output terminal 33 in addition to the circuit segment 31 passing through the front projection area of the device 1. The orthographic projection area of the device 1 on the circuit board 2 is a sealed area, and the line segment 31 passing through the orthographic projection area of the device 1 includes the first layer trace 311 passing through the orthographic projection area, which is outside the orthographic projection area It is connected to the connection section 313 and connected to the second layer trace 312 through the connection section 313. The second layer trace 312 also passes through the orthographic projection area and forms the current output terminal 33. The line segment 31 passing through the front projection area of the device 1 further includes that the first layer trace 311 extends from the front projection area to the front projection area, and is connected to the second layer trace 312 through the connection section 313 in the front projection area. The second layer trace 312 passes through the orthographic projection area and forms the current output terminal 33. The line segment 31 passing through the front projection area of the device 1 further includes that the first layer trace 311 extends from the front projection area to the outside of the front projection area, and is connected to the second layer trace 312 through the connecting section 313 outside the front projection area. The second layer trace 312 extends into the orthographic projection area and forms a current output terminal 33.
上述线路段31的走线层数最少为2层,其最大的走线层数可依据电路板2的层数进行合理设置,例如,电路板2的层数为4层,则线路段31的走线层数最多为4层,以此类推。线路段31的相邻两层走线之间的连接段313可通过过孔镀铜实现。The number of wiring layers of the above-mentioned line segment 31 is at least 2 layers, and the maximum number of wiring layers can be reasonably set according to the number of layers of the circuit board 2, for example, if the number of layers of the circuit board 2 is 4, the number of the line segment 31 The maximum number of trace layers is 4, and so on. The connection section 313 between the adjacent two layers of traces of the line section 31 can be realized by copper plating through vias.
图1至图2中示出了线路段31的走线层数为2层的具体实施方式,图1至图2中,线路段31包括第一层走线311和第二层走线312,第一层走线311和第二层走线312分别位于电路板2的不同层,第一层走线311和第二层走线312大致平行设置(可以平行设置,也可以非平行设置);线路段31还包括连接相邻两层走线的连接段313,该连接段313可以是电路板2上的过孔所在的部位。1 to FIG. 2 shows a specific implementation manner in which the number of wiring layers of the line segment 31 is two layers. In FIGS. 1 to 2, the line segment 31 includes the first layer trace 311 and the second layer trace 312. The first layer traces 311 and the second layer traces 312 are located on different layers of the circuit board 2 respectively. The first layer traces 311 and the second layer traces 312 are arranged substantially in parallel (may be arranged in parallel or non-parallel); The line section 31 further includes a connection section 313 connecting adjacent two layers of traces. The connection section 313 may be a portion where the via on the circuit board 2 is located.
当器件工作时,第一层走线311与第二层走线312会形成大小相等、方向基本相反的电流路径。根据安培定则,两电流路径在器件所在的区域会产生方向基本相反,大小几乎相等的磁场(由于第一层走线311与第二层走线312之间存在层距,使得两电流路径在器件1所在区域的磁场大小不可能完全相等),从而两电流路径产生的磁场几乎可以完全抵消,这样,最大限度地减小了电路板线路3对器件的磁场干扰。When the device operates, the first layer trace 311 and the second layer trace 312 will form current paths of equal size and substantially opposite directions. According to Ampere's rule, the two current paths in the area where the device is located will produce magnetic fields with substantially opposite directions and almost equal sizes (due to the layer spacing between the first layer trace 311 and the second layer trace 312, the two current paths are in The size of the magnetic field in the area where the device 1 is located cannot be completely equal), so that the magnetic fields generated by the two current paths can be almost completely cancelled out, thus minimizing the magnetic field interference of the circuit board circuit 3 on the device.
需要说明的是,线路段31的走线层数可以为两层,也可以为四层、六层等偶数层。其中,线路段31的走线层数可选地为两层,其原因在于,由于只存在两层走线之间的间距带来的磁场差异,使得磁场抵消效果最佳;并且,走线层数越少,占用电路板2的层数也越少,能够简化电路板2内部的线路设置。此外,线路段31的走线层数也需要根据器件的各项参数进行合理地设置。It should be noted that the number of wiring layers of the line segment 31 may be two layers, or even layers such as four layers or six layers. Among them, the number of wiring layers of the line segment 31 is optionally two layers, the reason is that, because there is only a magnetic field difference caused by the spacing between the two layers of wiring, the magnetic field cancellation effect is the best; and, the wiring layer The smaller the number, the fewer the number of layers occupying the circuit board 2, which can simplify the wiring arrangement inside the circuit board 2. In addition, the number of wiring layers of the line segment 31 also needs to be set reasonably according to various parameters of the device.
通过上述设置,无需被动选择磁场干扰小的区域设置器件,器件在电路板上的设置位置更加灵活;电路板走线也无需避开器件,电路板线路的布局也更加灵活;电路板上可布局的器件的数量也可适当增加,从而可提高电路板的布局密度;并且,无需占用射频天线的净空区来设置器件,确保了射频天线的工作性能,提高了射频天线的灵敏度。Through the above settings, there is no need to passively select the area where the magnetic field interference is small to set up the device, and the position of the device on the circuit board is more flexible; the circuit board routing does not need to avoid the device, and the circuit board layout is more flexible; the circuit board can be laid out The number of devices can also be appropriately increased, which can increase the layout density of the circuit board; and, it does not need to occupy the clearance area of the RF antenna to set the device, ensuring the working performance of the RF antenna and improving the sensitivity of the RF antenna.
可选的,线路段31的各层走线平行。这样,当器件工作时,相邻两层走线会形成大小相等、方向完全相反的电流路径。根据安培定则,两电流路径 在器件所在的区域会产生方向完全相反,大小几乎相等的磁场,从而能够最大程度地抵消相邻两层走线产生的磁场。Optionally, the wiring of each layer of the line segment 31 is parallel. In this way, when the device works, two adjacent layers of traces will form current paths of equal size and completely opposite directions. According to Ampere's rule, the two current paths will generate magnetic fields with completely opposite directions and almost equal sizes in the area where the device is located, so as to offset the magnetic fields generated by the adjacent two layers of traces to the greatest extent.
可选的,线路段31的各层走线分别设置于电路板2的连续层。Optionally, the traces of each layer of the line segment 31 are respectively disposed on successive layers of the circuit board 2.
如前所述,由于第一层走线311与第二层走线312之间存在层距,使得两电流路径在器件1所在区域的磁场大小不可能完全相等。并且,第一层走线311与第二层走线312之间的距离越小,两电流路径在器件1所在区域的磁场大小越接近。鉴于此,可以将线路段31的各层走线分别设置于电路板2的连续层,能够使各层走线之间的距离达到最小值,从而使两电流路径产生的磁场最大程度地抵消。图1至图2中示出了将第一层走线311与第二层走线312分别设置于电路板2的第二层和第三层的实施方式。As mentioned above, due to the layer distance between the first layer trace 311 and the second layer trace 312, the magnetic fields of the two current paths in the area where the device 1 is located cannot be completely equal. In addition, the smaller the distance between the first layer trace 311 and the second layer trace 312, the closer the magnetic fields of the two current paths in the area where the device 1 is located. In view of this, the traces of each layer of the line segment 31 can be respectively provided on the continuous layer of the circuit board 2, so that the distance between the traces of each layer can be minimized, so that the magnetic fields generated by the two current paths can be cancelled to the greatest extent. FIGS. 1 to 2 show an embodiment in which the first layer traces 311 and the second layer traces 312 are respectively disposed on the second layer and the third layer of the circuit board 2.
可选的,电路板2的层数大于2,且电路板2的层数大于线路段31的走线层数时,线路段31的最靠近器件1的走线与器件1之间间隔至少一层电路板。Optionally, when the number of layers of the circuit board 2 is greater than 2, and the number of layers of the circuit board 2 is greater than the number of traces of the line segment 31, the distance between the trace of the line segment 31 closest to the device 1 and the device 1 is at least one Layer circuit board.
考虑到器件1需要通过适当的连接结构,例如焊脚、焊盘等实现与电路板2之间的电连接以及机械连接,因此,为了不影响器件1与电路板2之间各种连接的稳定性,线路段31应当尽量避开器件1所在的电路板层。在电路板2的层数大于2时,线路段31的最靠近器件1的走线可与器件1之间间隔至少一层电路板。也就是说,器件1设置于电路板2的第一层,线路段31可以从电路板2的第二层或第二层以下的层开始设置。Considering that the device 1 needs to be electrically and mechanically connected to the circuit board 2 through appropriate connection structures, such as solder pins, pads, etc., in order not to affect the stability of the various connections between the device 1 and the circuit board 2 The line segment 31 should avoid the circuit board layer where the device 1 is located as much as possible. When the number of layers of the circuit board 2 is greater than 2, the trace of the line segment 31 closest to the device 1 may be separated from the device 1 by at least one layer of circuit board. That is to say, the device 1 is arranged on the first layer of the circuit board 2, and the line segment 31 can be arranged from the second layer of the circuit board 2 or a layer below the second layer.
在电路板2的层数有限,无法做到线路段31与器件1之间间隔至少一层电路板的情况下,线路段31也可以避开焊脚、焊盘等连接结构设置于器件1所在的电路板层。In the case where the number of layers of the circuit board 2 is limited and the circuit segment 31 cannot be separated from the device 1 by at least one circuit board, the circuit segment 31 can also be placed at the device 1 avoiding the connection structure such as solder legs and pads Circuit board layer.
可选的,电路板2的层数大于3,且电路板2的层数比线路段31的走线层数大2时,线路段31的最靠近器件1的走线与器件1之间间隔至少两层电路板。Optionally, when the number of layers of the circuit board 2 is greater than 3, and the number of layers of the circuit board 2 is greater than the number of wiring layers of the line segment 31 by 2, the distance between the trace of the line segment 31 closest to the device 1 and the device 1 At least two layers of circuit boards.
容易理解地,线路段31的走线距离器件1越近,其对器件1的磁场干扰越强,相邻两层走线对器件1的磁场差异也越大。因此,为了尽量削弱相邻两层走线对器件1的磁场差异,在电路板2的层数足够多时,可以将线路段31的各层走线设置于电路板2的远离器件1的数层。例如,在电路板2的层 数为4时,线路段31的走线层数为2时,线路段31的走线可设置于电路板2的第三层和第四层。It is easy to understand that the closer the traces of the line segment 31 are to the device 1, the stronger the interference to the magnetic field of the device 1, and the greater the difference in the magnetic field of the device 1 between the two adjacent traces. Therefore, in order to weaken the magnetic field difference of the adjacent two layers of traces to the device 1 as much as possible, when the number of layers of the circuit board 2 is sufficient, the traces of each layer of the line segment 31 can be arranged on the layers of the circuit board 2 away from the device 1 . For example, when the number of layers of the circuit board 2 is 4, and the number of wiring layers of the line segment 31 is 2, the wiring of the line segment 31 may be provided on the third and fourth layers of the circuit board 2.
此外,线路段31的各层走线的设置也需要根据电路板2的整体布局需求进行合理地设置。In addition, the routing of each layer of the line segment 31 also needs to be reasonably set according to the overall layout requirements of the circuit board 2.
可选的,电路板2的设置线路段31的层间距小于或等于电路板2的未设置线路段31的层间距。Optionally, the layer spacing of the circuit board 2 where the line segments 31 are provided is less than or equal to the layer spacing of the circuit board 2 where the line segments 31 are not provided.
如前所述,线路段31的相邻两层走线之间的距离越小,两电流路径在器件1所在区域的磁场大小越接近,由此产生的对器件1的磁场干扰越小。鉴于此,可以将电路板2的各层之间的间距进行差异化设置,并将线路段31设置于电路板2的层间距较小的层。As mentioned above, the smaller the distance between the adjacent two layers of traces of the line segment 31, the closer the magnetic fields of the two current paths in the area where the device 1 is located, and the smaller the magnetic field interference to the device 1 generated thereby. In view of this, the spacing between the layers of the circuit board 2 can be set differently, and the line segment 31 can be disposed on a layer with a smaller layer spacing of the circuit board 2.
可选的,线路段31的各层走线的长度相等,且相邻两层走线之间的连接段313垂直于各层走线。这样,各层走线对器件1产生的磁场大小越接近,由此产生的对器件1的磁场干扰越小。Optionally, the lengths of the traces of each layer of the line segment 31 are equal, and the connecting segment 313 between the traces of two adjacent layers is perpendicular to the traces of each layer. In this way, the closer the magnitude of the magnetic field generated by the traces of each layer to the device 1 is, the less the interference of the magnetic field generated by the device 1 to the device 1 is.
可选的,线路段31的各层走线两端至器件1边缘之间的垂直距离相等,且相邻两层走线之间的连接段313垂直于各层走线。这样,各层走线两端相对器件1的中心呈对称设置,由此产生的对器件1的磁场干扰越小。Optionally, the vertical distance between the two ends of the traces of each layer of the line segment 31 and the edge of the device 1 is equal, and the connection segment 313 between the traces of two adjacent traces is perpendicular to the traces of each layer. In this way, the two ends of the traces of each layer are arranged symmetrically with respect to the center of the device 1, and the resulting interference to the magnetic field of the device 1 is smaller.
另外,线路段31中与各层走线两端连接的各连接段313至器件1边缘之间的垂直距离也大致相等,各连接段313至器件1边缘之间的垂直距离与电流输入端32(或电流输出端33)至器件1边缘之间的垂直距离也大致相等。这样,上述各处产生的对器件1的磁场干扰也能够基本完全抵消,从而进一步减小了整个电路板线路3对器件1的磁场干扰。In addition, the vertical distance between each connection segment 313 connected to both ends of each layer trace in the line segment 31 to the edge of the device 1 is also approximately equal, and the vertical distance between each connection segment 313 and the edge of the device 1 is the same as the current input terminal 32 The vertical distance from the (or current output terminal 33) to the edge of the device 1 is also approximately equal. In this way, the magnetic field interference to the device 1 generated in the above-mentioned places can be substantially completely cancelled, thereby further reducing the magnetic field interference of the entire circuit board circuit 3 to the device 1.
可选的,电路板线路3的电流输入端32位于器件1的边缘至器件1外部的区域;Optionally, the current input terminal 32 of the circuit board circuit 3 is located in the area from the edge of the device 1 to the outside of the device 1;
电路板线路3的电流输出端33位于器件1的边缘至器件1外部的区域。The current output terminal 33 of the circuit board line 3 is located in the area from the edge of the device 1 to the outside of the device 1.
通过上述设置,能够使其他器件的电路板线路3从器件1的外侧引入,并从器件1的外侧引出,从而避免影响器件1在电路板2上的设置。Through the above arrangement, the circuit board lines 3 of other devices can be introduced from the outside of the device 1 and drawn out from the outside of the device 1 so as to avoid affecting the arrangement of the device 1 on the circuit board 2.
可选的,线路段31的相邻两层走线之间的连接段313位于器件1的边缘至器件1外部的区域。Optionally, the connection segment 313 between the adjacent two layers of traces of the line segment 31 is located in the area from the edge of the device 1 to the outside of the device 1.
进一步的,各连接段313至器件1边缘之间的垂直距离与电流输入端32 (或电流输出端33)至器件1边缘之间的垂直距离大致相等。Further, the vertical distance between each connecting section 313 and the edge of the device 1 is approximately equal to the vertical distance between the current input terminal 32 (or current output terminal 33) and the edge of the device 1.
可选的,电路板线路3的电流输出端33从线路段31的最后一层走线直接引出如图1所示;在电路板2的层数有富余的情况下,电路板线路3的电流输出端33从位于线路段31最后一层走线下方的电路板层引出,如图2所示。Optionally, the current output terminal 33 of the circuit board line 3 is directly led out from the last layer of the line segment 31 as shown in FIG. 1; when there is a surplus number of layers of the circuit board 2, the current of the circuit board line 3 The output terminal 33 is led out from the circuit board layer located under the last layer of the line segment 31, as shown in FIG. 2.
本公开实施例还提供一种电路板组件,如图1至图2所示,电路板组件包括电路板2和设置于电路板2的器件1及电路板线路3,电路板线路3采用上述公开实施例中的电路板线路结构。An embodiment of the present disclosure also provides a circuit board assembly. As shown in FIGS. 1 to 2, the circuit board assembly includes a circuit board 2 and a device 1 provided on the circuit board 2 and a circuit board circuit 3. The circuit board circuit 3 adopts the above disclosure The circuit board circuit structure in the embodiment.
其中,器件1为磁敏感器件,包括指南针和霍尔元件中的至少一项。Wherein, the device 1 is a magnetic sensitive device, including at least one of a compass and a Hall element.
电路板组件的具体实施方式均可以参照上述说明,并能够达到相同的技术效果,为避免重复,对此不作赘述。The specific implementation of the circuit board assembly can refer to the above description, and can achieve the same technical effect. In order to avoid repetition, it will not be repeated here.
本公开实施例还提供一种电子设备,包括上述公开实施例中的电路板组件。电子设备中电路板组件的具体实施方式均可以参照上述说明,并能够达到相同的技术效果,为避免重复,对此不作赘述。An embodiment of the present disclosure also provides an electronic device, including the circuit board assembly in the above disclosed embodiment. The specific implementation of the circuit board assembly in the electronic device can refer to the above description, and can achieve the same technical effect. In order to avoid repetition, it will not be repeated here.
本公开实施例中,上述电子设备可为计算机(Computer)、手机、平板电脑(Tablet Personal Computer)、膝上型电脑(Laptop Computer)、个人数字助理(personal digital assistant,简称PDA)、移动上网电子设备(Mobile Internet Device,MID)、可穿戴式设备(Wearable Device)、电子阅读器、导航仪、数码相机等。In the embodiment of the present disclosure, the electronic device may be a computer, a mobile phone, a tablet, a laptop, a laptop, a personal computer, a personal digital assistant (PDA), or a mobile Internet electronic Device (Mobile Internet Device, MID), wearable device (Wearable Device), e-reader, navigator, digital camera, etc.
以上所述,仅为本公开的具体实施方式,但本公开的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本公开揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本公开的保护范围之内。因此,本公开的保护范围应以权利要求的保护范围为准。The above are only specific implementations of the present disclosure, but the scope of protection of the present disclosure is not limited to this, and any person skilled in the art can easily think of changes or replacements within the technical scope disclosed in the present disclosure. It should be covered by the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.

Claims (12)

  1. 一种电路板线路结构,应用于设置有器件的电路板,所述电路板为层数大于或等于2的多层电路板;A circuit board circuit structure is applied to a circuit board provided with devices, and the circuit board is a multilayer circuit board with a number of layers greater than or equal to 2;
    所述电路板线路具有经过所述器件正投影区域的线路段;The circuit board circuit has a circuit segment passing through the orthographic projection area of the device;
    所述线路段包括偶数层走线,所述线路段的各层走线分别设置于所述电路板的不同层,所述线路段的各层走线通过连接段顺次连接,所述线路段的相邻两层走线的电流方向相反。The line segment includes even-numbered layer traces, and the layer traces of the line segment are respectively disposed on different layers of the circuit board, and the layer traces of the line segment are sequentially connected by a connecting segment, and the line segment The current directions of adjacent two layers of traces are opposite.
  2. 根据权利要求1所述的电路板线路结构,其中,所述线路段的各层走线平行。The circuit board circuit structure according to claim 1, wherein the traces of each layer of the circuit segment are parallel.
  3. 根据权利要求1所述的电路板线路结构,其中,所述线路段的各层走线分别设置于所述电路板的连续层。The circuit board circuit structure according to claim 1, wherein the traces of each layer of the circuit segment are respectively disposed on successive layers of the circuit board.
  4. 根据权利要求1所述的电路板线路结构,其中,所述电路板的层数大于2,且所述电路板的层数大于所述线路段的走线层数时,所述线路段的最靠近所述器件的走线与所述器件之间间隔至少一层电路板。The circuit board circuit structure according to claim 1, wherein when the number of layers of the circuit board is greater than 2, and the number of layers of the circuit board is greater than the number of wiring layers of the circuit segment, the most of the circuit segment At least one circuit board is spaced between the trace close to the device and the device.
  5. 根据权利要求1所述的电路板线路结构,其中,所述电路板的设置所述线路段的层间距小于或等于所述电路板的未设置所述线路段的层间距。The circuit board circuit structure according to claim 1, wherein the layer interval of the circuit board where the circuit segment is provided is less than or equal to the layer interval of the circuit board where the circuit segment is not provided.
  6. 根据权利要求1所述的电路板线路结构,其中,所述线路段的各层走线的长度相等,且相邻两层走线之间的连接段垂直于各层走线。The circuit board circuit structure according to claim 1, wherein the lengths of the traces of each layer of the circuit segment are equal, and the connection section between the traces of two adjacent layers is perpendicular to the traces of each layer.
  7. 根据权利要求1所述的电路板线路结构,其中,所述线路段的各层走线两端至所述器件边缘之间的垂直距离相等,且相邻两层走线之间的连接段垂直于各层走线。The circuit board circuit structure according to claim 1, wherein the vertical distance between the two ends of each layer trace of the circuit segment and the edge of the device is equal, and the connection segment between adjacent two layers of traces is vertical Route on all layers.
  8. 根据权利要求1所述的电路板线路结构,其中,所述电路板线路的电流输入端位于所述器件的边缘至所述器件外部的区域;The circuit board circuit structure according to claim 1, wherein the current input terminal of the circuit board circuit is located in a region from the edge of the device to the outside of the device;
    所述电路板线路的电流输出端位于所述器件的边缘至所述器件外部的区域。The current output end of the circuit board circuit is located in an area from the edge of the device to the outside of the device.
  9. 根据权利要求1所述的电路板线路结构,其中,所述线路段的走线层数为两层。The circuit board circuit structure according to claim 1, wherein the number of wiring layers of the circuit segment is two.
  10. 一种电路板组件,包括电路板和设置于所述电路板的器件及电路板 线路,所述电路板线路采用如权利要求1至9中任一项所述的结构。A circuit board assembly includes a circuit board, a device provided on the circuit board, and a circuit board circuit, and the circuit board circuit adopts the structure according to any one of claims 1 to 9.
  11. 根据权利要求10所述的电路板组件,其中,所述器件为磁敏感器件,包括指南针和霍尔元件中的至少一项。The circuit board assembly of claim 10, wherein the device is a magnetically sensitive device, including at least one of a compass and a Hall element.
  12. 一种电子设备,包括如权利要求10或11所述的电路板组件。An electronic device comprising the circuit board assembly according to claim 10 or 11.
PCT/CN2019/116594 2018-12-03 2019-11-08 Line structure of circuit board, circuit board assembly and electronic device WO2020114193A1 (en)

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EP4210446A4 (en) * 2020-09-11 2024-07-31 Guangdong Oppo Mobile Telecommunications Corp Ltd Circuit structure, battery, electronic device, and battery manufacturing method
CN114173542A (en) * 2020-09-11 2022-03-11 Oppo广东移动通信有限公司 Circuit structure, battery, electronic device, and method for manufacturing battery
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