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WO2020097986A1 - 显示控制装置以及显示设备 - Google Patents

显示控制装置以及显示设备 Download PDF

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Publication number
WO2020097986A1
WO2020097986A1 PCT/CN2018/118002 CN2018118002W WO2020097986A1 WO 2020097986 A1 WO2020097986 A1 WO 2020097986A1 CN 2018118002 W CN2018118002 W CN 2018118002W WO 2020097986 A1 WO2020097986 A1 WO 2020097986A1
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WO
WIPO (PCT)
Prior art keywords
signal
frame start
data
start signal
compensation
Prior art date
Application number
PCT/CN2018/118002
Other languages
English (en)
French (fr)
Inventor
王明良
Original Assignee
惠科股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 惠科股份有限公司 filed Critical 惠科股份有限公司
Priority to US17/044,095 priority Critical patent/US11120759B2/en
Publication of WO2020097986A1 publication Critical patent/WO2020097986A1/zh

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0232—Special driving of display border areas
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2370/00—Aspects of data communication
    • G09G2370/22—Detection of presence or absence of input display information or of connection or disconnection of a corresponding information source
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes

Definitions

  • the present application relates to the field of display technology, in particular to a display control device and a display device.
  • liquid crystal display technology With the development of display technology, various display devices have enriched people's production and life. Among them, the liquid crystal display technology has been very mature, and is constantly updated and improved. Liquid crystal display panels occupy an absolute market position, and are widely used in monitors, computers, televisions, and mobile phone screens.
  • the display panel driver adopts the AC driving method, that is, the previous frame uses the voltage of the first polarity (such as positive polarity) and the next frame uses the second polarity (such as Negative polarity) voltage drive. At this time, the sub-pixels in the first row of the next frame tend to be dark due to insufficient charging.
  • the first polarity such as positive polarity
  • the second polarity such as Negative polarity
  • a display control device and a display device are provided.
  • a display control device including:
  • Data driver set to output data signals
  • the timing controller includes a timing output circuit, the timing output circuit is configured to output a frame start signal, and the frame start signal is located at the beginning of a frame;
  • a control circuit electrically connected to the timing output circuit and the data driver, and configured to detect whether the frame start signal is present and output a compensation signal according to the detection result;
  • the control circuit When the control circuit detects that the frame start signal is present, the control circuit outputs a compensation signal to the data driver so that the switching speed of the data signal when the frame start signal is detected is faster than that of the The switching speed of the data signal when the frame start signal is detected.
  • the control circuit includes a detection circuit and a compensation circuit
  • the detection circuit is electrically connected to the timing output circuit and the compensation circuit, and is configured to detect whether the frame start signal is present;
  • the compensation circuit is electrically connected to the data driver, and is configured to output compensation according to the detection result signal;
  • the compensation circuit When the detection circuit detects the frame start signal, the compensation circuit outputs a compensation signal to the data driver.
  • the compensation circuit includes a compensation memory and a compensation processor
  • control circuit is located in the timing controller.
  • the data driver includes a basic data circuit configured to output a radix signal
  • the data driver When the control circuit detects the frame start signal, the data driver outputs the data signal according to the result of superimposing the compensation signal and the basic signal;
  • the data driver When the control circuit does not detect the frame start signal, the data driver outputs the data signal according to the basic signal.
  • the data driver includes a basic data circuit configured to output a radix signal
  • the data driver When the control circuit detects the frame start signal, the data driver outputs the data signal according to the compensation signal;
  • the data driver When the control circuit does not detect the frame start signal, the data driver outputs the data signal according to the basic signal.
  • the timing output circuit is further configured to output a regular signal, the regular signal is located after the frame start signal in the same frame; the level of the frame start signal is the same as the normal signal Level is different.
  • the display control device further includes a scan driver configured to output a scan signal, and the frame start signal and the normal signal are input signals of the scan driver.
  • a display control device including:
  • Scan driver set to output scan signal
  • Data driver set to output data signals
  • the timing controller includes a timing output circuit configured to output the input signal of the scan driver;
  • the input signal of the scan driver includes a frame start signal and a regular signal, and the frame start signal is located in a frame At the beginning of, the regular signal is located after the frame start signal in the same frame, the level of the frame start signal is higher than the level of the regular signal;
  • the control circuit located in the timing controller, is electrically connected to the timing output circuit and the data driver, and is configured to detect whether the frame start signal is present and output a compensation signal according to the detection result;
  • control circuit When the control circuit detects the frame start signal, the control circuit outputs a compensation signal to the data driver so that the switching speed of the data signal when the frame start signal is detected is greater than that of the undetected The switching speed of the data signal to the frame start signal.
  • a display device includes a display control device and a display panel
  • the display control device includes:
  • Data driver set to output data signals
  • the timing controller includes a timing output circuit, the timing output circuit is configured to output a frame start signal, and the frame start signal is located at the beginning of a frame;
  • a control circuit electrically connected to the timing output circuit and the data driver, and configured to detect whether the frame start signal is present and output a compensation signal according to the detection result;
  • control circuit When the control circuit detects that the frame start signal is present, the control circuit outputs a compensation signal to the data driver so that the switching speed of the data signal when the frame start signal is detected is greater than that of the undetected The switching speed of the data signal when the frame start signal is detected;
  • the display panel includes multiple rows of sub-pixels and multiple data lines, and the data lines are electrically connected to the data driver and the sub-pixels.
  • FIG. 1 is a schematic diagram of a display device in an embodiment of this application.
  • FIG. 2 is a partial schematic diagram of a display device in an embodiment of this application.
  • 3 is a timing diagram of data signals of an exemplary display device
  • FIG. 5 is a timing diagram of data control signals within a frame in an embodiment of the present application.
  • the display control device provided by the present application may be, but not limited to, applied to a liquid crystal display device (for example, an LCD computer, an LCD TV, an LCD mobile phone screen, etc.).
  • a liquid crystal display device for example, an LCD computer, an LCD TV, an LCD mobile phone screen, etc.
  • a display device including a display panel 100 and a display control device 200.
  • the display panel 100 includes a plurality of rows of sub-pixels 110 and a plurality of data lines 120.
  • the data lines 120 are electrically connected to the display control device and the sub-pixels 110, and then charge each row of sub-pixels 110.
  • the display panel 100 may include a plurality of sub-pixels 110 of different colors, such as a red sub-pixel R, a green sub-pixel G, a blue sub-pixel B, and the like.
  • a plurality of sub-pixels 110 of different colors may form a display circuit.
  • the sub-pixels 110 of various colors in a display circuit cooperate so that the display circuit can display any desired color.
  • all the sub-pixels 110 of the display panel are sequentially arranged in multiple rows, and the number of sub-pixels 110 in each row is multiple.
  • each row of sub-pixels 110 is turned on row by row.
  • the sub-pixel 110 may include a pixel electrode, a common electrode, and liquid crystal molecules therebetween.
  • the data lines 120 charge the pixel electrodes of each sub-pixel 110 while the sub-pixels 110 of each row are turned on, so that the liquid crystal molecules are deflected to transmit light transparently.
  • the display control device 200 is connected to the data line 120 to provide data signals to the data line 120.
  • the display control device 200 specifically includes a data driver 210 and a timing controller 220.
  • the data driver 210 may include a data output circuit 211.
  • the data output circuit 211 is configured to output data signals for the data line 120.
  • the data signal is in the form of alternating current. That is, when the display device is operating, the data output circuit 211 has the opposite polarity of the data signal output to the same data line 120 in the previous frame and the next frame. There will be an idle time between the previous frame and the next frame. During this idle time, the data output circuit 211 does not output the data signal, and the driving trace of the display device (the trace connecting the data output circuit 211 and the data line 120) will maintain the level of the last driving voltage of the previous frame a.
  • the voltage on the driving trace is switched from the level a.
  • the level of the target charging voltage to be switched is the level b having the polarity opposite to the level a.
  • the voltage of level a and the voltage of level b are very different due to the opposite polarities, so that the actual charging voltage level of the first row of sub-pixels 110 that are initially charged is likely to be lower than the target charging voltage level b.
  • the data output circuit 211 charges the sub-pixels 110 in other rows in the same frame, since the polarity of the data signal does not change, the level of the actual charging voltage in other rows can easily reach the target charging voltage . Therefore, the sub-pixels 110 in the first row are darker than those in the other rows.
  • the timing controller 220 includes a timing output circuit 221.
  • the timing output circuit 221 is set to output the frame start signal V S1 .
  • the frame start signal V S1 is located at the beginning of a frame.
  • the display control device 200 in the embodiment of the present application further includes a control circuit 230.
  • the control circuit 230 electrically connects the timing output circuit 221 and the data driver 210.
  • the control circuit 230 is configured to detect whether there is a frame start signal V S1 and then output a compensation signal according to the detection result.
  • the control circuit 230 detects that there is a frame start signal V S1 , the control circuit outputs a compensation signal to the data driver 210 so that the switching speed of the data signal when the frame start signal V S1 is detected is greater than that of the undetected The switching speed of the data signal when the frame start signal V S1 is reached.
  • the data signal setting when the frame start signal V S1 is not detected may be the same as the data signal setting in the exemplary display device.
  • the frame start signal V S1 is located at the beginning of a frame. Referring to FIG. 4, when a frame start signal V S1 is detected, that is, at the beginning of a frame, the control circuit outputs a compensation signal to the data driver 210 so that the input voltage on the data driver 210 may be greater than the data driver 210 in the exemplary display device Input voltage. As the input voltage increases, the voltage difference between the data driver 210 and the data line 120 can be increased, and the line impedance between the two does not change, so the output current of the data driver 210 becomes larger. The higher the output current, the faster the charge transfer speed, and the faster the switching speed of the data signal output by the data driver 210 to the data line 120.
  • the first row of sub-pixels 110 that are charged at the beginning of the next frame can achieve the purpose of reaching the predetermined target charging voltage in a short time through the larger data signal switching speed when the frame start signal is provided, thereby effectively improving the first The line shows a dark problem.
  • the control circuit 230 specifically includes a detection circuit 231 and a compensation circuit 232.
  • the detection circuit 231 is electrically connected to the timing output circuit 221. Therefore, the detection circuit 231 can detect whether the timing output circuit 221 outputs the frame start signal V S1 , that is, whether it has the frame start signal V S1 .
  • the detection circuit 231 is also electrically connected to the compensation circuit 232, so that the compensation circuit 232 can output a compensation signal according to the detection result.
  • the compensation circuit 232 is electrically connected to the data driver 210, and then can output the compensation signal to the data driver 210 when the detection circuit 231 detects the frame start signal V S1 .
  • the compensation circuit 232 includes a compensation memory 232a and a compensation processor 232b.
  • the compensation memory 232a is set to store the value of the compensation signal. The value of the compensation signal can be verified by experiment and stored in the compensation memory 232a in advance.
  • the compensation processor 232b is configured to read the value of the compensation signal stored in the memory 232a and output the compensation signal according to the value.
  • the compensation memory 232a is located in the timing controller 220.
  • the compensation memory 232a may be an original memory in the timing controller 220, thereby simplifying the circuit structure.
  • the compensation memory 232a may also be a memory additionally added in the timing controller 220, or the compensation memory 232a may also be located at another location.
  • the compensation circuit 232 is disposed in the timing controller 220, that is, the compensation memory 232a and the compensation processor 232b are both located in the timing controller 220, so that the compensation processor 232b reads the memory 232a The value of the compensation signal.
  • the entire control circuit 230 is disposed in the timing controller 220, that is, the compensation circuit 232 and the detection circuit 231 are both located in the timing controller 220, only the timing controller of the original display device is required Adding a set of input and output ports to 220 can easily and easily pull the frame start signal V S1 output by the timing controller 220 back into the timing controller 220 to detect and issue a compensation signal.
  • control circuit 230 is not limited to the timing controller 220, it can also be located at other locations (such as the data driver 210 or the scan driver 240, etc.), which is not limited in this application.
  • the data driver 210 includes a basic data circuit 212.
  • the basic data circuit 212 is configured to output a radix signal to the data output circuit 211.
  • the basic signal may be the same input signal as the input signal provided by the exemplary display device to the data output circuit 211 for the output of the data signal.
  • the control circuit 230 detects the frame start signal V S1 , both the basic signal output by the basic data circuit 212 and the compensation data output by the compensation circuit 232 are output to the data output circuit 211.
  • the data output circuit 211 is configured to directly output data signals. Therefore, the data driver outputs the data signal according to the result of superimposing the compensation signal and the basic signal.
  • the control circuit 230 does not detect the frame start signal V S1 , only the basic signal output by the basic data circuit 212 is output to the data output circuit 211, so the data driver 210 outputs the data signal according to the basic signal.
  • the compensation signal is a compensation difference signal.
  • the compensation form of the compensation signal in this application may also be different from the above form.
  • the compensation signal is a compensated full-value signal.
  • the value of the compensation full-value signal is equal to the sum of the value of the above-mentioned compensation difference signal and the value of the base signal.
  • the two different compensation forms of the above two embodiments enrich the application form of the display control device 200, so that the display control device 200 can output data signals more flexibly according to different needs and conditions.
  • the timing controller 220 is further configured to output the normal signal V S2 .
  • the normal signal V S2 is located after the frame start signal V S1 in the same frame. Refer to FIG. 5, which is a timing diagram of data control signals in a complete frame.
  • the frame start signal V S1 is located at the beginning of a frame and has a duration of t1.
  • the normal signal V S2 is located after the frame start signal in the same frame and has a duration of t2.
  • the level of the frame start signal V S1 is different from the level of the normal signal V S2 . Therefore, the frame start signal V S1 which is the input signal of the scan driver 240 has detectability and can be detected. Specifically, the level of the frame start signal V S1 may be lower than the level of the normal signal V S2 . At this time, in order to save energy consumption, t1 may be further set greater than t2.
  • the level of the frame start signal V S1 can also be set higher than the level of the normal signal V S2 .
  • t1 may be further set to be less than t2. Since the frame start signal V S1 determines whether the compensation circuit 232 outputs a compensation signal, the output duration of the required compensation signal is usually close to the duration of one line of scanning signal, which is much shorter than the duration of one frame. Therefore, the setting of t1 less than t2 also relatively meets the needs in this regard.
  • the display control device 200 further includes a scan driver 240 configured to output scan signals.
  • the frame start signal V S1 of high level and short duration and the normal signal V S2 of low level and long duration are both input signals of the scan driver 240.
  • the scan driver 240 After the input signal of the scan driver 240 is input into the scan driver 240, the scan driver 240 outputs the scan signal to the sub-pixel to turn on the sub-pixel. Setting the frame start signal V S1 and the normal signal V S2 as the input signal of the scan driver 240 makes the input signal of the scan driver 240 of the display control device multifunctional, simplifies the output circuit structure of the display control device 200 and reduces the display control device Energy consumption.
  • the frame start signal V S1 may not be an input signal of the scan driver 240, but is designed separately. There is no limitation on this in the present application.
  • t1 is the scan duration of the first row of sub-pixels within one frame (that is, the scan driver ’s scan signal duration of the first row within one frame)
  • T2 is the sum of the scan duration of the sub-pixels of the second row and the sub-pixels of all rows after the second row (ie, the sum of the scan durations of the scan signals of the scan driver in the second row and all rows after the second row in a frame ).
  • t1 is the scan duration of the first row of sub-pixels in one frame, that is, the duration t1 of the high-level frame start signal V S1 is equal to the duration of the scan signal of one row of the scan driver 240, which is equal to the first row of sub-pixels 110 Charging time. Therefore, it can be ensured that the first row of sub-pixels 110 can have a sufficiently fast voltage switching speed during the entire scanning period of the row, and sufficient charging can be achieved. At the same time, high-level signals are not wasted on the sub-pixels 110 of the second row and the second row that have already been fully charged, thereby saving energy consumption.
  • the display control device 200 includes a scan driver 240, a data driver 210, and a timing controller 220.
  • the scan driver 240 is configured to output scan signals.
  • the data driver 210 includes a data output circuit 211 and a basic data circuit 212.
  • the data output circuit 211 is configured to output data signals.
  • the basic data circuit 212 is configured to output a basic signal.
  • the timing controller 220 includes a timing output circuit 221 and a control circuit 230.
  • the timing output circuit 221 is configured to output the input signal of the scan driver 240.
  • the input signals of the scan driver 240 include a frame start signal V S1 and a normal signal V S2 .
  • the frame start signal V S1 is located at the beginning of a frame, and the normal signal V S2 is located after the frame start signal in the same frame.
  • the level of the frame start signal V S1 is higher than the level of the normal signal V S2 , so that the frame start signal V S1 can be detected and identified.
  • the control circuit 230 is located in the timing controller and is electrically connected to the timing output circuit 221, so that it can detect whether there is a frame start signal V S1 . At the same time, the control circuit 230 is electrically connected to the data driver 210 so that when the frame start signal V S1 is detected, it can output a compensation signal to the data driver 210.
  • the basic data circuit 212 outputs a basic signal.
  • the control circuit 230 does not detect the frame start signal V S1 , the data driver 210 only outputs the data signal according to the basic signal.
  • the compensation signal may be a compensation difference signal.
  • the control circuit 230 detects the frame start signal V S1
  • the data driver 210 outputs the data signal according to the result of the superimposition of the basic signal and the compensation signal. Since the compensation signal voltage compensation made on the basis of the signal on the basis of such detected data signal switching speed when a frame start signal V S1 is greater than the switching speed of the data signal is not detected when the frame start signal V S1 . Therefore, the first row of sub-pixels 110 that are charged at the beginning of a frame can achieve the purpose of reaching a predetermined target charging voltage in a short time through a larger data signal switching speed when the frame start signal V S1 is reached, and thus effectively improve The first line shows the dark question.
  • the compensation signal may also be a compensation full-value signal.
  • the value of the compensation full-value signal is equal to the sum of the value of the above-mentioned compensation difference signal and the value of the base signal.
  • the display control device when the control circuit detects the frame start signal, the control circuit outputs the compensation signal to the data driver, so that the switching speed of the data signal when the frame start signal is detected is greater than The switching speed of the data signal when the frame start signal is not detected.
  • the frame start signal is at the beginning of a frame. Therefore, the first row of sub-pixels that are charged at the beginning of a frame can achieve the purpose of reaching the predetermined target charging voltage in a short time through the larger data signal switching speed when the frame start signal is provided, and thus effectively improve the first row Shows a dark question.

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  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

本申请提供的显示控制装置包括数据驱动器、时序控制器以及控制电路。数据驱动器设置为输出数据信号。时序控制器包括时序输出电路，时序输出电路设置为输出帧起始信号，帧起始信号位于一帧的开始。控制电路电连接时序输出电路与数据驱动器，设置为侦测是否具有帧起始信号并根据侦测结果输出补偿信号。当控制电路侦测到具有帧起始信号时，控制电路输出补偿信号至数据驱动器。

Description

显示控制装置以及显示设备
本申请要求于2018年11月12日提交中国专利局、申请号为201811339280.3、发明名称为“显示控制装置以及显示面板”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示技术领域，特别是涉及一种显示控制装置以及显示设备。
背景技术
这里的陈述仅提供与本申请有关的背景信息，而不必然的构成现有技术。
随着显示技术的发展，各种显示设备丰富了人们的生产生活。其中，液晶显示技术已经非常成熟，且还在不断的更新改进。液晶显示面板占据绝对的市场地位，广泛应用于显示器、电脑、电视和手机屏等领域。
相关技术中，显示面板驱动为了防止液晶极化，采用了交流驱动的方式，即上一帧采用第一极性(如正极性)的电压驱动，下一帧就会采用第二极性(如负极性)的电压驱动。此时，下一帧的第一行子像素往往会因充电不足，而导致显示偏暗。
申请内容
根据本申请的各种实施例，提供一种显示控制装置以及显示设备。
一种显示控制装置，包括:
数据驱动器，设置为输出数据信号；
时序控制器，包括时序输出电路，所述时序输出电路设置为输出帧起始信号，所述帧起始信号位于一帧的开始；
控制电路，电连接所述时序输出电路与所述数据驱动器，设置为侦测是否具有所述帧起始信号并根据侦测结果输出补偿信号；
当所述控制电路侦测到具有所述帧起始信号时，所述控制电路输出补偿信号至所述数据驱动器，使得侦测到所述帧起始信号时的数据信号的切换速度大于未侦测到所述帧起始信号时的数据信号的切换速度。
在其中一个实施例中，
所述控制电路包括侦测电路与补偿电路；
所述侦测电路电连接所述时序输出电路与所述补偿电路，设置为侦测是否具有所述帧起始信号；所述补偿电路电连接所述数据驱动器，设置为根据侦测结果输出补偿信号；
当侦测电路侦测到所述帧起始信号时，所述补偿电路输出补偿信号至所述数据驱动器。
在其中一个实施例中，所述补偿电路包括补偿存储器与补偿处理 器；
所述补偿存储器中设置为存储所述补偿信号的数值；所述补偿处理器设置为读取所述存储器中的所述补偿信号的数值并输出所述补偿信号。
在其中一个实施例中，所述控制电路位于所述时序控制器内。
在其中一个实施例中，
所述数据驱动器包括基础数据电路，设置为输出基数信号；
当所述控制电路侦测到所述帧起始信号时，所述数据驱动器根据所述补偿信号与所述基础信号叠加的结果输出所述数据信号；
当所述控制电路未侦测到所述帧起始信号时，所述数据驱动器根据所述基础信号输出所述数据信号。
在其中一个实施例中，所述数据驱动器包括基础数据电路，设置为输出基数信号；
当所述控制电路侦测到所述帧起始信号时，所述数据驱动器根据所述补偿信号输出所述数据信号；
当所述控制电路未侦测到所述帧起始信号时，所述数据驱动器根据所述基础信号输出所述数据信号。
在其中一个实施例中，所述时序输出电路还设置为输出常规信号，所述常规信号位于同一帧内的所述帧起始信号之后；所述帧起始信号的电平与所述常规信号的电平不同。
在其中一个实施例中，显示控制装置还包括设置为输出扫描信号的扫描驱动器，所述帧起始信号以及所述常规信号为所述扫描驱动器 的输入信号。
一种显示控制装置，包括：
扫描驱动器，设置为输出扫描信号；
数据驱动器，设置为输出数据信号；
时序控制器，包括时序输出电路，所述时序输出电路设置为输出所述扫描驱动器的输入信号；所述扫描驱动器的输入信号包括帧起始信号与常规信号，所述帧起始信号位于一帧的开始，所述常规信号位于同一帧内的所述帧起始信号之后，所述帧起始信号的电平高于所述常规信号的电平；
控制电路，位于所述时序控制器内，电连接所述时序输出电路与所述数据驱动器，设置为侦测是否具有所述帧起始信号并根据侦测结果输出补偿信号；
当所述控制电路侦测到所述帧起始信号时，所述控制电路输出补偿信号至所述数据驱动器，使得侦测到所述帧起始信号时的数据信号的切换速度大于未侦测到所述帧起始信号时的数据信号的切换速度。
一种显示设备，包括显示控制装置以及显示面板，
显示控制装置包括:
数据驱动器，设置为输出数据信号；
时序控制器，包括时序输出电路，所述时序输出电路设置为输出帧起始信号，所述帧起始信号位于一帧的开始；
控制电路，电连接所述时序输出电路与所述数据驱动器，设置为侦测是否具有所述帧起始信号并根据侦测结果输出补偿信号；
当所述控制电路侦测到具有所述帧起始信号时，所述控制电路输出补偿信号至所述数据驱动器，使得侦测到所述帧起始信号时的数据信号的切换速度大于未侦测到所述帧起始信号时的数据信号的切换速度；
显示面板包括多行子像素以及多条数据线，所述数据线电连接所述数据驱动器与所述子像素。
本申请的一个或多个实施例的细节在下面的附图和描述中提出。本申请的其它特征、目的和优点将从说明书、附图以及权利要求书变得明显。
附图说明
为了更好地描述和说明这里公开的那些发明的实施例或示例，可以参考一幅或多幅附图。用于描述附图的附加细节或示例不应当被认为是对所公开的发明、目前描述的实施例或示例以及目前理解的这些发明的最佳模式中的任何一者的范围的限制。
图1为本申请的一个实施例中显示设备的示意图；
图2为本申请的一个实施例中显示设备的局部示意图；
图3为示例性显示设备的数据信号的时序图；
图4为本申请的一个实施例中数据信号的时序图；
图5为本申请的一个实施例中的一个帧内的数据控制信号的时序图。
具体实施方式
为了使本申请的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本申请进行进一步详细说明。应当理解，此处描述的具体实施例仅仅用以解释本申请，并不用于限定本申请。
本申请提供的显示控制装置，可以但不限于应用于液晶显示设备(例如，液晶电脑、液晶电视、液晶手机屏等等)之中。
参考图1以及图2，在一个实施例中，提供了一种显示设备，包括显示面板100、显示控制装置200。显示面板100包括多行子像素110以及多条数据线120，数据线120电连接显示控制装置与子像素110，进而为各行子像素110进行充电。
具体地，参考图2，显示面板100可以包括多个不同颜色的子像素110，例如红色子像素R、绿色子像素G、蓝色子像素B等。多种不同颜色的子像素110可以形成一个显示电路。一个显示电路内的各种颜色的子像素110配合，使得显示电路可以显示任意所需颜色。同时，显示面板的所有子像素110有序地排列成多行，每行子像素110的数量为多个。显示面板工作时，各行子像素110逐行打开。子像素110可以包括像素电极、公共电极以及二者之间的液晶分子。数据线120在各行子像素110打开的同时为各子像素110的像素电极进行充电，使得液晶分子偏转进而透光显示。
显示控制装置200连接数据线120，进而为数据线120提供数据信号。参考图1，显示控制装置200具体包括数据驱动器210以及时序控制器220。
数据驱动器210可以包括数据输出电路211。数据输出电路211设置为为数据线120输出数据信号。为了防止液晶极化，数据信号为交流电的形式。即显示设备工作时，数据输出电路211在上一帧与下一帧对同一数据线120输出的数据信号的极性相反。上一帧与下一帧之间会有一段空闲时间。这段空闲时间内，数据输出电路211不进行数据信号的输出，显示设备的驱动走线(连接数据输出电路211与数据线120的走线)上会维持上一帧最后一个驱动电压的准位a。
如图3所示，示例性显示设备中，数据输出电路211在下一帧对相同的数据线120输出数据信号的时候，驱动走线上的电压从准位a开始切换。假设切换的目标充电电压的准位为与准位a极性相反的准位b。准位a的电压和准位b的电压由于极性相反而差距很大，所以会造成最开始进行充电的第一行子像素110的实际充电电压的准位容易低于目标充电电压的准位b。第一行过后，数据输出电路211对同一帧内的其他行子像素110进行充电时，由于数据信号的极性不变，因此，其他行的实际充电电压的准位可以容易地达到目标充电电压。因此就会造成第一行子像素110相对其他行子像素110偏暗。
本申请实施例中，参考图1，时序控制器220包括时序输出电路221。时序输出电路221设置为输出帧起始信号V S1。帧起始信号V S1位于一帧的开始。
同时，本申请实施例中的显示控制装置200还包括控制电路230。控制电路230电连接时序输出电路221与数据驱动器210。显示设备工作时，控制电路230设置为侦测是否具有帧起始信号V S1，然后根 据侦测结果输出补偿信号。
具体地，当控制电路230侦测到具有帧起始信号V S1时，控制电路输出补偿信号至数据驱动器210，使得侦测到帧起始信号V S1时的数据信号的切换速度大于未侦测到帧起始信号V S1时的数据信号的切换速度。未侦测到帧起始信号V S1时的数据信号设置可以与示例性显示设备中的数据信号的设置相同。
帧起始信号V S1位于一帧的开始。参考图4，测到具有帧起始信号V S1时，即一帧开始时，控制电路输出补偿信号至数据驱动器210，使得数据驱动器210上的输入电压可以大于示例性显示设备中数据驱动器210上的输入电压。输入电压增大，可以增大数据驱动器210与数据线120之间的压差，而二者之间的线路阻抗未变，因此，数据驱动器210的输出电流变大。输出电流变大，电荷传输速度就越快，数据驱动器210输出至数据线120的数据信号的切换速度就越快。因此，在下一帧开始阶段进行充电的第一行子像素110可以通过具有帧起始信号时的较大的数据信号切换速度，实现短时间内到达既定目标充电电压的目的，进而有效改善第一行显示偏暗的问题。
继续参考图1，在一个实施例中，为了便于设计实施，控制电路230具体包括侦测电路231与补偿电路232。侦测电路231电连接时序输出电路221。因此，侦测电路231可以侦测时序输出电路221是否输出了帧起始信号V S1 ，即是否具有帧起始信号V S1 。侦测电路231还与补偿电路232电连接，进而使得补偿电路232可以根据侦测结果输出补偿信号。补偿电路232电连接数据驱动器210，进而可以在侦 测电路231侦测到帧起始信号V S1时将补偿信号输出至数据驱动器210。
在一个实施例中，补偿电路232包括补偿存储器232a与补偿处理器232b。补偿存储器232a中设置为存储补偿信号的数值。补偿信号的数值可经过实验验证，提前存储入补偿存储器232a中。当侦测电路231侦测到帧起始信号VS1时，补偿处理器232b设置为读取存储器232a中存储的补偿信号的数值，并依据该数值输出补偿信号。补偿存储器232a位于时序控制器220内。具体地，补偿存储器232a可以为时序控制器220内原有的存储器，进而简化电路结构。当然补偿存储器232a其也可以为时序控制器220内另行增设的存储器，或者补偿存储器232a也可位于其他位置。
在一个实施例中，进一步地，将补偿电路232设置于时序控制器220内，即补偿存储器232a与补偿处理器232b均位于时序控制器220内，以便于补偿处理器232b读取存储器232a中存储的补偿信号的数值。
此时，更进一步地，若将控制电路230整体设置于时序控制器220内，即补偿电路232与侦测电路231均位于时序控制器220内，则只需要在原有的显示设备的时序控制器220上增加一组输入输出端口即可简便易行地将时序控制器220输出的帧起始信号V S1拉回时序控制器220内进行侦测并发出补偿信号。
当然，控制电路230并不限于在时序控制器220内，其也可位于其他位置(例如数据驱动器210内或扫描驱动器240内等)，本申请 对此不做限制。
在一个实施例中，数据驱动器210包括基础数据电路212。基础数据电路212设置为输出基数信号至数据输出电路211。基础信号可为与示例性显示设备为数据信号的输出而提供给数据输出电路211的输入信号相同的输入信号。当控制电路230侦测到帧起始信号V S1时，基础数据电路212输出的基础信号与补偿电路232输出的补偿数据均输出至数据输出电路211。而数据输出电路211设置为直接输出数据信号。因此，数据驱动器会根据补偿信号与基础信号叠加的结果来输出数据信号。而当控制电路230未侦测到帧起始信号V S1时，只有基础数据电路212输出的基础信号输出至数据输出电路211，所以数据驱动器210根据基础信号输出数据信号。
上述实施例中，补偿信号为一补偿差值信号。当然，本申请补偿信号的补偿形式也可与上述形式不同。在另一个实施例中，补偿信号为一补偿全值信号。补偿全值信号的数值等于上述补偿差值信号的数值与基础信号的数值的加和。具体地，当控制电路230侦测到帧起始信号V S1时，只有补偿电路232输出的补偿数据输出至数据输出电路211。因此，数据驱动器会根据补偿信号来输出数据信号。而当控制电路230未侦测到帧起始信号V S1时，只有基础数据电路212输出的基础信号输出至数据输出电路211，所以数据驱动器210根据基础信号输出数据信号。
上述两个实施例的两种不同的补偿形式丰富了显示控制装置200的应用形式，使得显示控制装置200可以根据不同的需求与条件而更 加灵活地输出数据信号。
在一个实施例中，时序控制器220还设置为输出常规信号V S2。常规信号V S2位于同一帧内的帧起始信号V S1之后，参考图5，图5为一个完整帧内的数据控制信号时序图。帧起始信号V S1位于一帧的开始，时长为t1。常规信号V S2位于同一帧内的帧起始信号之后，时长为t2。
帧起始信号V S1的电平与常规信号V S2的电平不同，因此，作为扫描驱动器240的输入信号的帧起始信号V S1具有可侦测识别性，而可以被侦测到。具体地，帧起始信号V S1的电平可以低于常规信号V S2的电平。此时，为了节约能耗，可以进一步设置t1大于t2。
同时，也可以设置帧起始信号V S1的电平高于常规信号V S2的电平。此时，为了节约能耗，可以进一步设置t1小于t2。由于帧起始信号V S1决定补偿电路232是否输出补偿信号，而所需补偿信号的输出时长通常与一行扫描信号的时长相接近，其远小于一帧时长。因此t1小于t2的设置也相对更满足在此方面的需求。
一个实施例中，显示控制装置200还包括设置为输出扫描信号的扫描驱动器240。高电平短时长的帧起始信号V S1以及低电平长时长的常规信号V S2均为扫描驱动器240的输入信号。扫描驱动器240输入信号输入到扫描驱动器240内后，扫描驱动器240输出扫描信号给子像素而打开子像素。将帧起始信号V S1以及常规信号V S2设置为扫描驱动器240的输入信号，使得显示控制装置的扫描驱动器240的输入信号多功能化，简化显示控制装置200的输出电路结构，降低显示 控制装置的能耗。
当然，本申请实施例中，帧起始信号V S1也可不为扫描驱动器240的输入信号，而另行设计，本申请对此并无限制。
在一个实施例中，继续参考图5，设置t1小于t2，具体地，t1为第一行子像素在一帧内的扫描时长(即扫描驱动器在一帧内的第一行扫描信号的时长)，t2为第二行子像素以及第二行以后的所有行的子像素的扫描时长之和(即扫描驱动器在一帧内的第二行以及第二行以后的所有行扫描信号的时长之和)。
t1为第一行子像素在一帧内的扫描时长，即将高电平的帧起始信号V S1的时长t1与扫描驱动器240的一行扫描信号的时长相等，亦即等于第一行子像素110的充电时长。因此，可以保证第一行子像素110在该行整个扫描期间均能够具有足够快的电压切换速度，而实现充足的充电。同时，又不在原有已经具有充足充电的的第二行以及第二行以后的子像素110上浪费高电平信号，从而节省能耗。
在一个实施例中，显示控制装置200包括扫描驱动器240、数据驱动器210、时序控制器220。扫描驱动器240设置为输出扫描信号。数据驱动器210包括数据输出电路211与基础数据电路212。数据输出电路211设置为输出数据信号。基础数据电路212设置为输出基础信号。
时序控制器220包括时序输出电路221与控制电路230。时序输出电路221设置为输出扫描驱动器240的输入信号。扫描驱动器240的输入信号包括帧起始信号V S1与常规信号V S2。帧起始信号V S1位于 一帧的开始，常规信号V S2位于同一帧内的帧起始信号之后。帧起始信号V S1的电平高于常规信号V S2的电平，进而使得帧起始信号V S1可侦测识别。
控制电路230位于时序控制器内，并电连接时序输出电路221，进而可以侦测是否具有帧起始信号V S1。同时，控制电路230与数据驱动器210电连接，进而可以在侦测到帧起始信号V S1时，输出补偿信号至数据驱动器210。
基础数据电路212输出基础信号，当控制电路230未侦测到帧起始信号V S1时，数据驱动器210只根据基础信号输出数据信号。
补偿信号可以为一个补偿差值信号。此时，当控制电路230侦测到帧起始信号V S1时，数据驱动器210根据基础信号与补偿信号叠加的结果输出数据信号。由于补偿信号在基础信号的基础上做出了电压补偿，使得侦测到帧起始信号V S1时的数据信号的切换速度大于未侦测到帧起始信号V S1时的数据信号的切换速度。因此，在一帧开始阶段进行充电的第一行子像素110可以通过具有帧起始信号V S1时的较大的数据信号切换速度，实现短时间内到达既定目标充电电压的目的，进而有效改善第一行显示偏暗的问题。
当然补偿信号也可以为一个补偿全值信号。补偿全值信号的数值等于上述补偿差值信号的数值与基础信号的数值的加和。此时，当控制电路230侦测到帧起始信号V S1时，数据驱动器210只根据补偿信号输出数据信号，同样可以使得侦测到帧起始信号V S1时的数据信号的切换速度大于未侦测到帧起始信号V S1时的数据信号的切换速度， 进而有效改善第一行显示偏暗的问题。
综上所述，本申请提供的显示控制装置，当控制电路侦测到帧起始信号时，控制电路输出补偿信号至数据驱动器，使得侦测到帧起始信号时的数据信号的切换速度大于未侦测到帧起始信号时的数据信号的切换速度。帧起始信号位于一帧的开始。因此，在一帧开始阶段进行充电的第一行子像素可以通过具有帧起始信号时的较大的数据信号切换速度，实现短时间内到达既定目标充电电压的目的，进而有效改善第一行显示偏暗的问题。
以上实施例的各技术特征可以进行任意的组合，为使描述简洁，未对上述实施例中的各个技术特征所有可能的组合都进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。
以上所述实施例仅表达了本申请的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对发明专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干变形和改进，这些都属于本申请的保护范围。因此，本申请专利的保护范围应以所附权利要求为准。

Claims (20)

  1. 一种显示控制装置，包括:
    数据驱动器，设置为输出数据信号；
    时序控制器，包括时序输出电路，所述时序输出电路设置为输出帧起始信号，所述帧起始信号位于一帧的开始；
    控制电路，电连接所述时序输出电路与所述数据驱动器，设置为侦测是否具有所述帧起始信号并根据侦测结果输出补偿信号；
    当所述控制电路侦测到具有所述帧起始信号时，所述控制电路输出补偿信号至所述数据驱动器，使得侦测到所述帧起始信号时的数据信号的切换速度大于未侦测到所述帧起始信号时的数据信号的切换速度。
  2. 根据权利要求1所述的显示控制装置，其中，
    所述控制电路包括侦测电路与补偿电路；
    所述侦测电路电连接所述时序输出电路与所述补偿电路，设置为侦测是否具有所述帧起始信号；所述补偿电路电连接所述数据驱动器，设置为根据侦测结果输出补偿信号；
    当侦测电路侦测到所述帧起始信号时，所述补偿电路输出补偿信号至所述数据驱动器。
  3. 根据权利要求2所述的显示控制装置，其中，所述补偿电路包括补偿存储器与补偿处理器；
    所述补偿存储器中设置为存储所述补偿信号的数值；所述补偿处理器设置为读取所述存储器中的所述补偿信号的数值并输出所述补 偿信号。
  4. 根据权利要求3所述的显示控制装置，其中，所述补偿存储器位于所述时序控制器内。
  5. 根据权利要求4所述的显示控制装置，其中，所述补偿存储器为所述时序控制器内原有的存储器。
  6. 根据权利要求3所述的显示控制装置，其中，所述补偿电路位于所述时序控制器内。
  7. 根据权利要求3所述的显示控制装置，其中，所述控制电路位于所述时序控制器内。
  8. 根据权利要求3所述的显示控制装置，其中，所述控制电路位于所述数据驱动器内。
  9. 根据权利要求1所述的显示控制装置，其中，
    所述数据驱动器包括基础数据电路，设置为输出基数信号；
    当所述控制电路侦测到所述帧起始信号时，所述数据驱动器根据所述补偿信号与所述基础信号叠加的结果输出所述数据信号；
    当所述控制电路未侦测到所述帧起始信号时，所述数据驱动器根据所述基础信号输出所述数据信号。
  10. 根据权利要求1所述的显示控制装置，其中，所述数据驱动器包括基础数据电路，设置为输出基数信号；
    当所述控制电路侦测到所述帧起始信号时，所述数据驱动器根据所述补偿信号输出所述数据信号；
    当所述控制电路未侦测到所述帧起始信号时，所述数据驱动器根 据所述基础信号输出所述数据信号。
  11. 根据权利要求1所述的显示控制装置，其中，所述所述时序输出电路还设置为输出常规信号，所述常规信号位于同一帧内的所述帧起始信号之后；所述帧起始信号的电平与所述常规信号的电平不同。
  12. 根据权利要求11所述的显示控制装置，其中，所述帧起始信号的电平低于所述常规信号的电平。
  13. 根据权利要求12所述的显示控制装置，其中，所述帧起始信号的时长大于所述常规信号的时长。
  14. 根据权利要求11所述的显示控制装置，其中，所述帧起始信号的电平高于所述常规信号的电平。
  15. 根据权利要求14所述的显示控制装置，其中，所述帧起始信号的时长小于所述常规信号的时长。
  16. 根据权利要求15所述的显示控制装置，其中，显示控制装置还包括设置为输出扫描信号的扫描驱动器，所述帧起始信号以及所述常规信号为所述扫描驱动器的输入信号。
  17. 根据权利要求16所述的显示控制装置，其中，所述帧起始信号的时长为所述扫描驱动器在一帧内的第一行扫描信号的时长。
  18. 根据权利要求17所述的显示控制装置，其中，所述常规信号的时长为所述扫描驱动器在一帧内的第二行以及第二行以后的所有行扫描信号的时长之和。
  19. 一种显示控制装置，包括：
    扫描驱动器，设置为输出扫描信号；
    数据驱动器，设置为输出数据信号；
    时序控制器，包括时序输出电路，所述时序输出电路设置为输出所述扫描驱动器的输入信号；所述扫描驱动器的输入信号包括帧起始信号与常规信号，所述帧起始信号位于一帧的开始，所述常规信号位于同一帧内的所述帧起始信号之后，所述帧起始信号的电平高于所述常规信号的电平；
    控制电路，位于所述时序控制器内，电连接所述时序输出电路与所述数据驱动器，设置为侦测是否具有所述帧起始信号并根据侦测结果输出补偿信号；
    当所述控制电路侦测到所述帧起始信号时，所述控制电路输出补偿信号至所述数据驱动器，使得侦测到所述帧起始信号时的数据信号的切换速度大于未侦测到所述帧起始信号时的数据信号的切换速度。
  20. 一种显示设备，包括显示控制装置以及显示面板，
    显示控制装置包括:
    数据驱动器，设置为输出数据信号；
    时序控制器，包括时序输出电路，所述时序输出电路设置为输出帧起始信号，所述帧起始信号位于一帧的开始；
    控制电路，电连接所述时序输出电路与所述数据驱动器，设置为侦测是否具有所述帧起始信号并根据侦测结果输出补偿信号；
    当所述控制电路侦测到具有所述帧起始信号时，所述控制电路输出补偿信号至所述数据驱动器，使得侦测到所述帧起始信号时的数据 信号的切换速度大于未侦测到所述帧起始信号时的数据信号的切换速度；
    显示面板包括多行子像素以及多条数据线，所述数据线电连接所述数据驱动器与所述子像素。
PCT/CN2018/118002 2018-11-12 2018-11-28 显示控制装置以及显示设备 WO2020097986A1 (zh)

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Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110930925A (zh) * 2019-12-09 2020-03-27 上海天马有机发光显示技术有限公司 一种显示面板的驱动方法和显示面板
KR20210076341A (ko) * 2019-12-16 2021-06-24 엘지디스플레이 주식회사 디스플레이 장치, 데이터 구동 회로 및 데이터 구동 방법
CN117116196B (zh) * 2023-09-07 2024-07-19 重庆惠科金渝光电科技有限公司 显示补偿方法和显示面板

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101452676A (zh) * 2007-11-28 2009-06-10 瀚宇彩晶股份有限公司 像素驱动方法
CN104361876A (zh) * 2014-12-08 2015-02-18 京东方科技集团股份有限公司 一种驱动方法、驱动电路和显示装置
CN105390113A (zh) * 2015-12-15 2016-03-09 深圳市华星光电技术有限公司 液晶显示设备及数据信号补偿方法
CN105761690A (zh) * 2016-05-04 2016-07-13 深圳市华星光电技术有限公司 显示面板的驱动方法及包括其的显示装置
US20170123582A1 (en) * 2015-10-07 2017-05-04 Lg Display Co., Ltd. Display Device with Data Line Precharging at Boundary Between Touch Driving Period and Display Driving Period

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6140985A (en) * 1995-06-05 2000-10-31 Canon Kabushiki Kaisha Image display apparatus
US7170477B2 (en) * 2000-04-13 2007-01-30 Sharp Kabushiki Kaisha Image reproducing method, image display apparatus and picture signal compensation device
TW552573B (en) * 2001-08-21 2003-09-11 Samsung Electronics Co Ltd Liquid crystal display and driving method thereof
JP3893341B2 (ja) * 2001-09-28 2007-03-14 キヤノン株式会社 画像表示装置及び画像表示装置の調整方法
CN1265338C (zh) * 2001-11-21 2006-07-19 佳能株式会社 显示装置、其图像信号处理装置及驱动控制装置
JP2006072211A (ja) 2004-09-06 2006-03-16 Casio Comput Co Ltd 液晶表示装置及び液晶表示装置の駆動方法
JP2007072162A (ja) 2005-09-07 2007-03-22 Mitsubishi Electric Corp 表示装置
KR20070077840A (ko) * 2006-01-25 2007-07-30 삼성전자주식회사 표시 장치
JP2007212543A (ja) * 2006-02-07 2007-08-23 Sharp Corp 表示ユニットおよびそれを備えた表示装置
TW200739507A (en) * 2006-03-23 2007-10-16 Toshiba Matsushita Display Tec Liquid crystal display device
DE102006060049B4 (de) * 2006-06-27 2010-06-10 Lg Display Co., Ltd. Flüssigkristallanzeige und Ansteuerungsverfahren
KR101287477B1 (ko) * 2007-05-01 2013-07-19 엘지디스플레이 주식회사 액정표시장치
EP2157564A4 (en) * 2007-06-12 2012-01-18 Sharp Kk LIQUID CRYSTAL DISPLAY DEVICE, LIQUID CRYSTAL DISPLAY DEVICE CONTROL METHOD, AND TELEVISION RECEIVER
US8773336B2 (en) * 2008-09-05 2014-07-08 Ketra, Inc. Illumination devices and related systems and methods
CN102024438B (zh) 2010-12-24 2012-10-17 北京京东方光电科技有限公司 液晶显示器源极驱动装置和驱动方法
CN104503632B (zh) 2015-01-26 2018-01-26 京东方科技集团股份有限公司 缓冲单元、触控驱动电路、显示装置及其驱动方法
CN104952407B (zh) 2015-06-25 2018-01-12 南京中电熊猫液晶显示科技有限公司 一种液晶面板的源极驱动器及其驱动方法
US10726769B2 (en) 2015-08-20 2020-07-28 Mitsubishi Electric Corporation LED display device and drive device
CN107742502B (zh) 2017-11-30 2019-10-15 武汉天马微电子有限公司 一种显示面板、显示方法及显示装置
CN109243397B (zh) * 2018-11-12 2021-03-19 惠科股份有限公司 显示控制装置以及显示设备

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101452676A (zh) * 2007-11-28 2009-06-10 瀚宇彩晶股份有限公司 像素驱动方法
CN104361876A (zh) * 2014-12-08 2015-02-18 京东方科技集团股份有限公司 一种驱动方法、驱动电路和显示装置
US20170123582A1 (en) * 2015-10-07 2017-05-04 Lg Display Co., Ltd. Display Device with Data Line Precharging at Boundary Between Touch Driving Period and Display Driving Period
CN105390113A (zh) * 2015-12-15 2016-03-09 深圳市华星光电技术有限公司 液晶显示设备及数据信号补偿方法
CN105761690A (zh) * 2016-05-04 2016-07-13 深圳市华星光电技术有限公司 显示面板的驱动方法及包括其的显示装置

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