WO2019172123A1 - Wiring substrate and method for producing same - Google Patents
Wiring substrate and method for producing same Download PDFInfo
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- WO2019172123A1 WO2019172123A1 PCT/JP2019/008112 JP2019008112W WO2019172123A1 WO 2019172123 A1 WO2019172123 A1 WO 2019172123A1 JP 2019008112 W JP2019008112 W JP 2019008112W WO 2019172123 A1 WO2019172123 A1 WO 2019172123A1
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- WIPO (PCT)
- Prior art keywords
- wiring
- insulating layer
- layer
- wiring pattern
- magnetic layer
- Prior art date
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Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F17/00—Fixed inductances of the signal type
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F17/00—Fixed inductances of the signal type
- H01F17/04—Fixed inductances of the signal type with magnetic core
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F41/00—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
- H01F41/02—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets
- H01F41/04—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets for manufacturing coils
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
Definitions
- the present invention relates to a wiring board and a manufacturing method thereof.
- an inductor is mounted on an electronic device or the like and used as a passive element such as a voltage conversion member.
- a flexible inductor is proposed in which an anisotropic composite magnetic sheet obtained by dispersing a flat or needle-like soft magnetic metal powder in a resin material is laminated on the upper and / or lower surface of a coil.
- an anisotropic composite magnetic sheet obtained by dispersing a flat or needle-like soft magnetic metal powder in a resin material is laminated on the upper and / or lower surface of a coil.
- the anisotropic composite magnetic sheet is in direct contact with the coil. For this reason, there arises a problem that the wiring portions adjacent to each other in the plane direction constituting the coil are short-circuited via a large number of soft magnetic metal powders in the anisotropic composite magnetic sheet.
- the wiring part is not directly in contact with the anisotropic composite magnetic sheet by covering the wiring part with an insulating coverlay film.
- the wiring part 52 is disposed on the upper surface of the base insulating layer 51, then the wiring part 52 is covered with the coverlay film 53, and finally the magnetic sheet 54 is disposed from the upper side of the coverlay film 53. (See FIG. 15).
- the coverlay film 53 is disposed between the adjacent wiring portions 52 so that the wiring portions 52 are continuous. Therefore, a portion 55 where no soft magnetic metal powder is disposed exists in the thickness direction (vertical direction) between the adjacent wiring portions 52. As a result, a problem that inductance is reduced occurs.
- the present invention provides a wiring board capable of suppressing a short circuit between wiring parts and having good inductance, and a method for manufacturing the same.
- the present invention [1] includes a wiring forming step of forming a wiring pattern on one side in the thickness direction of the first insulating layer, an electrodeposition step of covering the wiring pattern with a second insulating layer by electrodeposition, And a magnetic layer arranging step of arranging a magnetic layer on one side in the thickness direction of the first insulating layer and the second insulating layer.
- the second insulating layer is coated on the wiring pattern by electrodeposition, so that the second insulating layer is placed between the wiring parts adjacent to each other in the plurality of wiring parts constituting the wiring pattern.
- the wiring pattern can be covered so as not to be continuous. Therefore, the magnetic layer can be disposed over the entire thickness direction between the wiring patterns (that is, between the adjacent wiring portions). Therefore, the inductance of the wiring board can be improved.
- the second insulating layer is coated on the wiring pattern by electrodeposition, so that the second insulating layer can be coated thinly and uniformly on the surface of the wiring pattern. Therefore, the distance between the magnetic layer and the wiring pattern can be made closer. Therefore, the inductance of the wiring board can be improved.
- the present invention [2] includes the method for manufacturing a wiring board according to [1], wherein the wiring forming step is a step of forming the wiring pattern by a subtractive method.
- the wiring board manufacturing method since a wiring pattern can be formed by a subtractive method, the wiring board can be manufactured in a shorter time compared to the additive method. In addition, a wiring board having a large wiring thickness can be manufactured, and a large current can flow.
- the present invention includes the step of supplying power to the wiring pattern through the through hole of the first insulating layer that overlaps the wiring pattern when the electrodeposition step is projected in the thickness direction. [1] Or the manufacturing method of the wiring board as described in [2] is included.
- This invention [4] contains the manufacturing method of the wiring board as described in [3] in which the said 1st insulating layer is provided with the positioning part for forming the said wiring pattern in the thickness direction one side of the said through-hole.
- the wiring pattern can be accurately formed on one side in the thickness direction of the through hole with the positioning portion as a mark. Therefore, the wiring pattern can be more reliably covered with the second insulating layer by supplying power from the through hole.
- the present invention [5] includes the method of manufacturing a wiring board according to any one of [1] to [4], wherein the wiring pattern includes a copper wiring.
- the wiring pattern is a copper wiring
- a wiring board having good conductivity and patternability can be manufactured.
- the present invention [6] includes a first insulating layer, a plurality of wiring portions arranged at predetermined intervals on one side in the thickness direction of the first insulating layer, and each of the plurality of wiring portions.
- a second insulating layer covering the wiring portions adjacent to each other in a predetermined direction so as not to be continuous, and one thickness direction of the first insulating layer on one side of the first insulating layer and the second insulating layer.
- the second insulating layer covering the plurality of wiring portions since the second insulating layer covering the plurality of wiring portions is provided, the wiring portions can be prevented from coming into contact with the magnetic layer, and a short circuit between the wiring portions can be suppressed.
- the second insulating layer covers a plurality of wiring portions so as not to be continuous between the wiring portions in a predetermined direction, and the magnetic layer is disposed on one surface in the thickness direction of the first insulating layer.
- the layers are arranged over the entire thickness direction between the wiring portions in the predetermined direction. Therefore, the inductance of the wiring board can be improved.
- the plurality of wiring portions are arranged on one side in the thickness direction of the common first insulating layer, and the second insulating layer has one side surface and a side surface in the thickness direction of the plurality of wiring portions.
- the wiring board according to [6] is covered.
- the plurality of wiring portions are arranged in a common first insulating layer, the plurality of wiring portions have a good positional accuracy in the thickness direction with respect to each other, And it is reliably supported by the 1st insulating layer.
- the present invention [8] includes the wiring board according to [6] or [7], wherein the first insulating layer has a through hole that overlaps the wiring portion when projected in the thickness direction.
- this wiring board power is supplied to the wiring portion through the through hole of the first insulating layer, so that the entire surface of the wiring portion on one side and the side in the thickness direction can be covered with the second insulating layer. Therefore, it can suppress more reliably that a wiring part contacts a magnetic layer.
- the thickness of the first insulating layer is in a predetermined range, it is possible to reduce the thickness of the wiring board while maintaining the mechanical strength of the inductance.
- the method for manufacturing a wiring board of the present invention can suppress a short circuit and can manufacture a wiring board with good inductance.
- the wiring board of the present invention can suppress a short circuit and has a good inductance.
- FIG. 1 shows a plan view of a first embodiment of an inductor of the present invention.
- 2A and 2B are cross-sectional views of FIG. 1
- FIG. 2A is a cross-sectional view along AA
- FIG. 2B is a cross-sectional view along BB
- 3A to 3F are cross-sectional views of the manufacturing process of the inductor shown in FIG. 1 (AA cross-sectional view of FIG. 1)
- FIG. 3A is a step of preparing a metal sheet
- FIG. Step of placing FIG. 3C shows a step of placing a metal thin film
- FIG. 3D shows a step of placing a support film
- FIG. 3E shows a step of forming a wiring pattern
- FIG. 3F shows a step of performing electrodeposition.
- FIG. 4G to 4J are cross-sectional views of the inductor manufacturing process subsequent to FIG. 3 (AA cross-sectional view of FIG. 1), FIG. 4G is a process of disposing the first magnetic layer, and FIG. 4H is a support film.
- FIG. 4I shows the step of removing the metal thin film, and FIG. 4J shows the step of disposing the adhesive layer and the second magnetic layer.
- 5A to 5F are cross-sectional views (sectional view taken along the line BB of FIG. 1) of the manufacturing process of the inductor shown in FIG. 1, FIG. 5A is a step of preparing a metal sheet, and FIG. Step of placing, FIG. 5C shows a step of placing a metal thin film, FIG. 5D shows a step of placing a support film, FIG.
- FIG. 5E shows a step of forming a wiring pattern
- FIG. 5F shows a step of performing electrodeposition.
- 6G to 6J are cross-sectional views (sectional view taken along the line BB of FIG. 1) of the inductor manufacturing process subsequent to FIG. 5,
- FIG. 6G is a step of arranging the first magnetic layer
- FIG. 6H is a support film.
- FIG. 6I shows the step of removing the metal thin film
- FIG. 6J shows the step of disposing the adhesive layer and the second magnetic layer.
- FIG. 7 shows a cross-sectional view of the usage pattern of the inductor shown in FIG. 8A and 8B are a first modification of the inductor manufacturing method according to the first embodiment (method of arranging the first diffusion prevention layer), and
- FIG. 8A is a process diagram of arranging the first diffusion prevention layer.
- FIG. 8B shows a cross-sectional view of the inductor obtained when the first diffusion prevention layer is arranged.
- 9A and 9B are a second modification of the inductor manufacturing method according to the first embodiment (method of disposing the second diffusion prevention layer), and
- FIG. 9A is a process diagram of disposing the second diffusion prevention layer.
- FIG. 9B shows a cross-sectional view of the inductor obtained when the second diffusion barrier layer is disposed.
- 10A to 10C are modified examples of the inductor according to the first embodiment.
- FIG. 10A is a meander shape in which the wiring pattern advances in the front-rear direction
- FIG. 10B is a meander in which the wiring pattern advances in the left-right direction.
- FIG. 10C shows a loop shape with a circular wiring pattern.
- 11A to 11E are sectional views (sectional view taken along the line AA in FIG. 13) of the manufacturing process of the inductor according to the second embodiment of the present invention.
- FIG. 11A is a process of preparing a metal sheet laminate
- FIG. FIG. 11C shows a step of forming a wiring pattern
- FIG. 11D shows a step of masking an electrodeposition lead
- FIG. 11E shows a step of performing electrodeposition.
- 12F to 12I are cross-sectional views of the inductor manufacturing process subsequent to FIG. 11, where FIG. 12F is a process of removing the masking sheet,
- FIG. 12G is a process of removing the electrodeposited leads, and
- FIG. 12I shows the step of arranging the adhesive layer and the second magnetic layer.
- 13A to 13C are plan views of the manufacturing process of the inductor according to the second embodiment of the present invention, in which FIG. 13A is a process of forming a wiring pattern, FIG. 13B is a process of masking the electrodeposition lead, and FIG. Indicates a step of performing electrodeposition.
- 14D to 14F are plan views of the inductor manufacturing process subsequent to FIG. 13, in which FIG. 14D is a process of removing the masking sheet, FIG. 14E is a process of removing the electrodeposition leads, and FIG. The process of arrange
- positioning a magnetic layer is shown.
- a sectional view of an inductor as a reference example is shown.
- the vertical direction of the paper surface is the front-back direction (first direction)
- the lower side of the paper surface is the front side (one side in the first direction)
- the upper side of the paper surface is the rear side (the other side in the first direction).
- the left-right direction on the paper surface is the left-right direction (second direction orthogonal to the first direction)
- the left side of the paper surface is the left side (second side in the second direction)
- the right side of the paper surface is the right side (the other side in the second direction).
- the paper thickness direction is the vertical direction (thickness direction, third direction orthogonal to the first direction and the second direction), the front side of the paper is the upper side (one side in the thickness direction, the third direction one side), and the back side of the paper is The lower side (the other side in the thickness direction, the other side in the third direction). Specifically, it conforms to the direction arrow in each figure.
- FIGS. 1 to 7 A first embodiment of a method for manufacturing an inductor 1 will be described with reference to FIGS. 1 to 7 as an example of a method for manufacturing a wiring board according to the present invention.
- the first embodiment of the method for manufacturing the inductor 1 is a method for manufacturing the inductor 1 shown in FIGS. 1 to 2B, and includes a metal sheet preparation step, a base insulating layer placement step, a conductor layer placement step, and a wiring formation step. And an electrodeposition step, a first magnetic layer placement step, a conductor layer removal step, and a second magnetic layer placement step.
- Metal sheet preparation process In the metal sheet preparation step, the metal sheet 10 is prepared as shown in FIGS. 3A and 5A.
- the metal sheet 10 is a member that becomes a wiring pattern 3 to be described later in the wiring forming process. That is, the metal sheet 10 is a raw material for the wiring pattern 3.
- the metal sheet 10 has a sheet shape extending in the front-rear direction and the left-right direction.
- Examples of the material of the metal sheet 10 include copper, silver, gold, nickel, and alloys containing them.
- the material of the metal sheet 10 is preferably copper.
- the thickness of the metal sheet 10 is, for example, 25 ⁇ m or more, preferably 50 ⁇ m or more, and for example, 300 ⁇ m or less, preferably 150 ⁇ m or less.
- the metal sheet 10 can also be prepared as a two-layer base material (such as a conductive sheet laminate 40 described later) as indicated by a virtual line together with the base insulating layer 2 described below.
- the base insulating layer 2 as an example of the first insulating layer is arranged below the metal sheet 10 as shown in FIGS. 3B and 5B. That is, the base insulating layer 2 having a plurality of through holes 6 and a plurality of alignment marks 7 as an example of a plurality of positioning portions is formed on the lower surface (the other surface in the thickness direction) of the metal sheet 10.
- a varnish of a photosensitive insulating material is prepared, and this varnish is applied to the entire lower surface of the metal sheet 10 and dried to form a base film.
- the base film is exposed through a photomask having a pattern corresponding to the through hole 6 and the alignment mark 7. Thereafter, the base film is developed and cured by heating if necessary.
- an etching resist having a pattern corresponding to the through hole 6 and the alignment mark 7 is disposed on the lower surface of the base insulating layer 2, and after etching the base insulating layer 2, the etching resist Remove.
- the through hole 6 and the alignment mark 7 are formed in the base insulating layer 2 using a laser.
- Examples of the insulating material for the base insulating layer 2 include organic materials such as polyimide, polysiloxane, epoxy resin, and fluorine resin. Preferably, polyimide is used.
- the through hole 6 is formed in the base insulating layer 2 at a position overlapping with the wiring portion 21 (described later) when projected in the thickness direction.
- the through-hole 6 has a substantially circular shape in plan view and a substantially rectangular shape in sectional view.
- the length (width) and the length in the front-rear direction of the through hole 6 are shorter than the length (width) and the length in the front-rear direction of the wiring part 21, respectively.
- the alignment mark 7 is an insulating portion formed by a mark hole 11 penetrating the insulating base layer 2 in the thickness direction.
- the alignment mark 7 is formed on the insulating base layer 2 at a position that does not overlap with the wiring pattern 3 when projected in the thickness direction.
- the alignment mark 7 has a substantially circular shape in plan view and a substantially rectangular shape in sectional view.
- the base insulating layer 2 having the through holes 6 and the alignment marks 7 is formed on the lower surface of the metal sheet 10.
- a metal thin film 12 as an example of a conductor layer is disposed below the insulating base layer 2. That is, the metal thin film 12 is formed on the entire lower surface of the base insulating layer 2.
- the metal thin film 12 is formed so that the upper surface (one surface in the thickness direction) of the metal thin film 12 is in contact with the lower surface of the metal sheet 10 in the through hole 6 and the alignment mark 7. Specifically, the surface (first exposed surface 13) of the metal sheet 10 exposed from the through hole 6, the surface (second exposed surface 14) of the metal sheet 10 exposed from the mark hole 11, and the base insulation. A metal thin film 12 is formed so as to cover the lower surface of the layer 2.
- Examples of the method for disposing the metal thin film 12 include dry methods such as sputtering, vacuum deposition, and ion plating, and wet methods such as electroless plating (electroless copper plating, electroless nickel plating, etc.).
- a dry method is mentioned, More preferably, a sputtering method is mentioned.
- a uniform thin film (specifically, a sputtered film) having good adhesion can be reliably disposed on the first exposed surface 13 and the second exposed surface 14.
- the metal thin film 12 can be selectively removed with certainty in a removing step described later.
- the material of the metal thin film 12 is a metal material that can selectively remove the metal thin film 12 in a removing step described later, and examples thereof include metals such as copper, chromium, and nichrome.
- the thickness of the metal thin film 12 is, for example, 10 nm or more, preferably 30 nm or more, and for example, 200 nm or less, preferably 100 nm or less.
- the wiring pattern 3 is formed on the upper side of the base insulating layer 2. That is, the subtractive method is performed on the metal sheet 10 to remove unnecessary portions from the metal sheet 10 to form the wiring pattern 3.
- a support film 15 is disposed on the lower surface of the metal thin film 12.
- Examples of the support film 15 include a separator film having slight adhesiveness that can be easily peeled off from the metal thin film 12 in a later step.
- the arrangement of the support film 15 can reliably support the metal sheet 10 and the base insulating layer 2 and can prevent the cover insulating layer 4 from being coated on the lower surface of the metal thin film 12 in the electrodeposition process described later.
- the subtractive method is performed. Specifically, a dry film resist 16 (see virtual line) having a pattern corresponding to the wiring pattern 3 (described later) is disposed on the metal sheet 10, and then an unnecessary metal sheet 10 other than the wiring pattern 3 is attached. The dry film resist 16 is finally removed by etching or peeling.
- the dry film resist 16 is disposed on the entire upper surface of the metal sheet 10, exposed and developed through a photomask having a pattern corresponding to the wiring pattern 3, and heated and cured as necessary.
- the dry film resist 16 remains so that the dry film resist 16 having a pattern remains at a position overlapping the through hole 6 when projected in the thickness direction. 16 is exposed and developed.
- Etching includes, for example, wet etching such as chemical etching.
- wet etching such as chemical etching.
- the upper part of the metal sheet 10 is more easily etched than the lower part, so that the wiring pattern 3 has a tapered shape in which a side sectional view shape extends downward.
- the first electrodeposit 17 having the support film 15, the metal thin film 12, the base insulating layer 2, and the wiring pattern 3 in order is obtained.
- the wiring pattern 3 is covered with a cover insulating layer 4 as an example of a second insulating layer by electrodeposition. That is, the cover insulating layer 4 made of an electrodeposition coating film is formed on the upper surface and side surfaces of the wiring pattern 3 by electrodeposition coating.
- the electrodeposition paint is applied to the surface of the wiring pattern 3 by immersing the first electrodeposition object 17 in the electrodeposition paint-containing liquid and subsequently applying an electric current to the first electrodeposition object 17.
- the deposited electrodeposition paint is dried.
- the electrodeposition coating film that is, the cover insulating layer 4 formed from the electrodeposition paint is coated on the surface (upper surface and side surface) of the wiring pattern 3.
- Examples of the electrodeposition paint include resins that are ionic in water and known or commercially available, such as acrylic resins, epoxy resins, Examples thereof include a polyimide resin or a mixture thereof.
- a lead wire (not shown) connected to an external power source is connected to the metal thin film 12.
- a direct current is applied from the first exposed surface 13 to the entire wiring pattern 3 via the lead wire and the metal thin film 12.
- an anionic electrodeposition coating that employs the first electrodeposit 17 (specifically, the wiring pattern 3) as a cathode, and a cationic electrodeposition that employs the first electrodeposit 17 as an anode. Any of painting may be sufficient.
- the drying temperature of the electrodeposition paint is, for example, 90 ° C. or more and 150 ° C. or less, and the drying time is, for example, 1 minute or more and 30 minutes or less.
- a cover insulating layer 4 (electrodeposition coating film) is formed on the upper surface and side surfaces of the wiring pattern 3.
- the surface of the wiring pattern 3 is cleaned by degreasing and pickling before electrodeposition.
- the electrodeposition paint is heat-cured by baking after electrodeposition.
- the heating temperature at the time of baking is, for example, 150 ° C. or more and 250 ° C. or less, and the heating time is, for example, 10 minutes or more and 5 hours or less.
- the first magnetic layer 5 as an example of the magnetic layer is arranged above the base insulating layer 2 and the cover insulating layer 4. That is, the first magnetic layer 5 is laminated on the upper surface and side surfaces of the insulating cover layer 4 and the upper surface of the insulating base layer 2 exposed from the insulating cover layer 4 so as to cover the upper surface and side surfaces thereof.
- the material of the first magnetic layer 5 examples include a magnetic composition (preferably a soft magnetic composition) disclosed in Japanese Patent Application Laid-Open No. 2014-189015.
- the material of the first magnetic layer 5 includes magnetic particles (preferably soft magnetic particles such as an Fe—Si—A1 alloy) and a resin (preferably a thermosetting resin such as an epoxy resin, Phenolic resin etc.).
- a semi-cured magnetic sheet formed from a magnetic composition is pressed against the upper surfaces of the base insulating layer 2 and the cover insulating layer 4, and thereafter or simultaneously with the pressing, The semi-cured magnetic sheet is cured by heating.
- a semi-cured magnetic sheet formed from a magnetic composition is pressed against the upper surfaces of the base insulating layer 2 and the cover insulating layer 4, and thereafter or simultaneously with the pressing, The semi-cured magnetic sheet is cured by heating.
- the first magnetic layer 5 is disposed on the upper surfaces of the base insulating layer 2 and the cover insulating layer 4.
- the support film 15 is removed from the metal thin film 12 by peeling as shown in FIGS. 4H and 6H.
- the metal thin film 12 is removed from the insulating base layer 2 by etching or peeling as shown in FIGS. 4I and 6I.
- the metal thin film 12 is removed by etching. Examples of the etching include the above-described wet etching.
- the first magnetic layer 5 is protected before the etching so as to protect the first magnetic layer 5 as necessary, as indicated by the phantom lines in FIGS. 4H and 6H.
- a protective sheet (masking sheet or the like) 46 is disposed on the entire upper surface of the substrate, and the protective sheet 46 is removed after etching.
- the second magnetic layer 18 is arranged below the base insulating layer 2 as shown in FIGS. 4J and 6J. That is, the second magnetic layer 18 is laminated on the lower surface of the base insulating layer 2 via the adhesive layer 19.
- the adhesive layer 19 is disposed on the upper surface of the second magnetic layer 18 to prepare a laminate of the adhesive layer 19 and the second magnetic layer 18.
- the material of the second magnetic layer 18 is the same as the material of the first magnetic layer 5.
- the second magnetic layer 18 can be produced by the method exemplified for the first magnetic layer 5.
- Examples of the material for the adhesive layer 19 include known or commercially available adhesive compositions and pressure-sensitive adhesive compositions, such as acrylic compositions, epoxy compositions, rubber compositions, and silicone compositions. It is done.
- Examples of the arrangement of the adhesive layer 19 include a method of applying an adhesive composition to the second magnetic layer 18 and a method of pressing an adhesive tape against the second magnetic layer 18.
- a laminate of the adhesive layer 19 and the second magnetic layer 18 is disposed on the lower surface of the base insulating layer 2 so that the adhesive layer 19 and the base insulating layer 2 are in contact with each other.
- the adhesive layer 19 is disposed on the lower surface of the base insulating layer 2 so that the insides of the through holes 6 and the mark holes 11 are filled with the adhesive layer 19.
- the adhesive layer 19 is arranged on the lower surface of the base insulating layer 2 by coating or the like from the viewpoint of good filling of the adhesive layer 19 into the holes, and then the second magnetic layer 18 can also be placed on the underside of the adhesive layer 19.
- a laminated body of the adhesive layer 19 and the second magnetic layer 18 is prepared and disposed on the lower surface of the base insulating layer 2.
- the inductor 1 has a substantially rectangular sheet shape extending in the front-rear direction and the left-right direction. As shown in FIGS. 2A and 2B, the inductor 1 includes a second magnetic layer 18, an adhesive layer 19, a base insulating layer 2, a wiring pattern 3, a cover insulating layer 4, and a first magnetic layer 5. Provide in this order in the thickness direction.
- the second magnetic layer 18 is a layer that imparts high inductance to the inductor 1.
- the second magnetic layer 18 is the lowest layer in the inductor 1.
- the second magnetic layer 18 has substantially the same shape as the base insulating layer 2 in plan view, and has a sheet shape extending in the front-rear direction and the left-right direction.
- the thickness of the second magnetic layer 18 is, for example, 10 ⁇ m or more, preferably 50 ⁇ m or more, and for example, 500 ⁇ m or less, preferably 300 ⁇ m or less.
- the adhesive layer 19 is a layer that bonds the second magnetic layer 18 and the base insulating layer 2 together.
- the adhesive layer 19 is disposed on the upper surface of the second magnetic layer 18. Specifically, the adhesive layer 19 is disposed between the second magnetic layer 18 and the base insulating layer 2 so as to be in contact with the upper surface of the second magnetic layer 18 and the lower surface of the base insulating layer 2. .
- the adhesive layer 19 is filled inside the through hole 6 and the mark hole 11 in the base insulating layer 2. That is, the upper surface of the adhesive layer 19 is in contact with the first exposed surface 13 of the wiring pattern 3 and the second exposed surface 14 of the first magnetic layer 5.
- the thickness (maximum thickness) of the adhesive layer 19 is, for example, 0.5 ⁇ m or more, preferably 1 ⁇ m or more, and for example, 10 ⁇ m or less, preferably 5 ⁇ m or less.
- the base insulating layer 2 is a layer that supports the wiring pattern 3.
- the base insulating layer 2 is disposed on the upper surface of the adhesive layer 19.
- a wiring pattern 3, a cover insulating layer 4, and a first magnetic layer 5 are disposed on the upper surface of the base insulating layer 2.
- the base insulating layer 2 has a sheet shape that is the same outer shape as the inductor 1.
- the base insulating layer 2 includes a through hole 6 and an alignment mark 7.
- the insulating base layer 2 has a thickness of, for example, 0.1 ⁇ m or more, preferably 0.5 ⁇ m or more, more preferably 1 ⁇ m or more, and for example, 15 ⁇ m or less, preferably 10 ⁇ m or less, more preferably 5 ⁇ m. It is as follows. If the thickness of the base insulating layer 2 is in the above range, the inductor 1 can be made thin while maintaining the mechanical strength of the inductance.
- the wiring pattern 3 is disposed on the upper surface of the base insulating layer 2.
- the wiring pattern 3 has a substantially rectangular loop shape in plan view.
- the wiring pattern 3 includes a plurality (two) of wiring portions 21 extending in the front-rear direction, a connection wiring portion 22 that connects the front ends of the plurality of wiring portions 21, and a plurality ( Two) terminal portions 23 are integrally provided.
- the plurality of wiring sections 21 include a first wiring section 21a and a second wiring section 21b that are arranged at intervals in the left-right direction (an example of a predetermined direction).
- Each of the plurality of wiring portions 21 has a substantially rectangular shape that extends in the front-rear direction in a plan view, and a substantially trapezoidal shape that has a tapered shape that extends downward in a side sectional view.
- the wiring pattern 3, in particular, the first wiring part 21 a and the second wiring part 21 b are arranged on the upper surface of the common base insulating layer 2. That is, the base insulating layer 2 that supports the first wiring portion 21a and the base insulating layer 2 that supports the second wiring portion 21b are continuous with each other.
- connection wiring part 22 is disposed on the front side of the first wiring part 21a and the second wiring part 21b, and connects the front ends thereof to each other. That is, the rear end edge of the left end portion of the connection wiring portion 22 is continuous with the front end edge of the first wiring portion 21a, and the front end edge of the right end portion of the connection wiring portion 22 is continuous with the front end edge of the second wiring portion 21b. .
- the connection wiring portion 22 has a substantially rectangular shape extending in the left-right direction in a plan view, and has a substantially trapezoidal shape having a tapered shape that expands downward in a side sectional view.
- the plurality (two) of terminal portions 23 are arranged at the rear end of the first wiring portion 21a and the rear end of the second wiring portion 21b so as to be continuous therewith.
- the length (width) in the left-right direction of the plurality of terminal portions 23 is shorter than the length (width) in the left-right direction of the wiring portion 21.
- the terminal part 23 has a substantially rectangular shape in plan view, and has a substantially trapezoidal shape having a tapered shape that expands downward in a side sectional view.
- the width (length in the left-right direction) of the wiring part 21 and the width (length in the front-rear direction) of the connection wiring part 22 are, for example, 25 ⁇ m or more, preferably 100 ⁇ m or more, and for example, 2000 ⁇ m or less, preferably 750 ⁇ m or less.
- the thickness of the wiring pattern 3 is the same as the thickness of the metal sheet 10 described above.
- the material of the wiring pattern 3 is the same as the material of the metal sheet 10, and preferably copper. If the wiring pattern 3 is a copper wiring formed of copper, since copper has good conductivity and patterning properties, the inductor 1 having good conductivity and fine patterning can be easily manufactured.
- the insulating cover layer 4 is an insulating layer that protects the wiring pattern 3.
- the insulating cover layer 4 is disposed on the insulating base layer 2 so as to cover the entire upper surface and side surfaces of the wiring pattern 3.
- the cover insulating layer 4 includes a first cover insulating portion 4a that covers the first wiring portion 21a, a second cover insulating portion 4b that covers the second wiring portion 21b, and a third cover insulating portion that covers the connection wiring portion 22. 4c and a plurality (two) of fourth cover insulating portions 4d that cover the plurality (two) of terminal portions 23 are integrally provided.
- the left fourth cover insulating portion 4d, the first cover insulating portion 4a, the third cover insulating portion 4c, the second cover insulating portion 4b, and the right fourth cover insulating portion 4d are arranged in this order. Continuous in the direction or front-rear direction.
- the first cover insulating portion 4a and the second cover insulating portion 4b are not directly connected to each other. That is, the insulating cover layer 4 is not formed so as to continue between the plurality of wiring portions 21 (the first wiring portion 21a and the second wiring portion 21b) adjacent to each other in the left-right direction. More specifically, the insulating cover layer 4 is not substantially present between the plurality of wiring portions 24 (however, the insulating cover layer 4 (4a, 4b) covering the side surface of the wiring portion 21 is excluded).
- the thickness of the insulating cover layer 4 is, for example, 0.5 ⁇ m or more, preferably 1 ⁇ m or more, and for example, 10 ⁇ m or less, preferably 7 ⁇ m or less. Thereby, the distance between the wiring pattern 3 and the first magnetic layer 5 can be made closer while the wiring pattern 3 and the first magnetic layer 5 are in contact with each other. Therefore, the inductance of the inductor 1 can be further improved.
- the first magnetic layer 5 is a layer that imparts high inductance to the inductor 1.
- the first magnetic layer 5 has substantially the same shape as the base insulating layer 2 in plan view, and has a sheet shape extending in the front-rear direction and the left-right direction.
- the first magnetic layer 5 is the uppermost layer in the inductor 1.
- the first magnetic layer 5 is disposed on the base insulating layer 2 and the cover insulating layer 4. Specifically, the first magnetic layer 5 is disposed on the upper surface of the base insulating layer 2 so as to cover the upper surface and side surfaces of the insulating cover layer 4.
- the first magnetic layer 5 exists over the entire vertical direction of the wiring portion 21 between the wiring portions 24.
- the first magnetic layer 5 exists from the upper surface of the base insulating layer 2 to a position higher than the wiring portion 21 in the wiring portion 24.
- the first magnetic layer 5 substantially fills the entire wiring portion 24.
- the wiring portion 21 (the first wiring portion 21a and the second wiring portion 21b) and the cover insulating layer 4 (the first cover insulating portion 4a and the second cover insulating portion 4b) covering the wiring portion 21 are configured.
- the member is a cover wiring part, only the first magnetic layer 5 exists between the cover wiring parts adjacent to each other in a side sectional view.
- the thickness of the first magnetic layer 5 is, for example, 10 ⁇ m or more, preferably 50 ⁇ m or more, and, for example, 500 ⁇ m or less, preferably 300 ⁇ m or less.
- the inductor 1 is not an electronic device to be described later, but is a component of the electronic device, that is, a component for manufacturing the electronic device, and does not include an electronic element (chip, capacitor, etc.) or a mounting substrate on which the electronic element is mounted. It is a device that can be distributed industrially and used by industry.
- the inductor 1 is mounted (embedded) in an electronic device, for example.
- the electronic device includes a mounting substrate and electronic elements (chip, capacitor, etc.) mounted on the mounting substrate.
- the inductor 1 is mounted on a mounting board.
- a plurality of vias 25 (through holes) penetrating the first magnetic layer 5 and the cover insulating layer 4 in the thickness direction are formed so that the terminal portions 23 are exposed.
- An insulation treatment is performed on the inner peripheral surface of 25.
- the conductive connection member 26 is disposed inside the via 25 so that one end of the connection member 26 is in contact with the upper surface of the terminal portion 23.
- the inductor 1 is mounted on the mounting substrate via the connection member 26, is electrically connected to other electronic devices, and functions as a passive element.
- a wiring forming process for forming the wiring pattern 3 on the upper side of the insulating base layer 2 an electrodeposition process for covering the wiring pattern 3 with the insulating cover layer 4 by electrodeposition, a base
- the cover insulating layer 4 is formed between the wiring portions 24 in which the plurality of wiring portions 21 (first wiring portion 21 a and second wiring portion 21 b) constituting the wiring pattern 3 are adjacent to each other.
- the wiring pattern 3 can be covered so as not to be continuous. Therefore, the first magnetic layer 5 can be disposed across the entire thickness direction between the wiring patterns 3 (that is, between the adjacent wiring portions 21). Therefore, the inductance of the inductor 1 can be improved.
- the cover insulating layer 4 can be covered thinly and uniformly on the surface of the wiring pattern 3. Therefore, the distance between the first magnetic layer 5 and the wiring pattern 3 can be made closer. Therefore, the inductance of the inductor 1 can be improved.
- the wiring pattern 3 is formed by a subtractive method in the wiring forming process.
- the wiring pattern 3 can be formed in a short time, and thus the inductor 1 can be manufactured. Further, the inductor 1 having a large wiring thickness can be easily manufactured, and a large current can flow.
- the electrodeposition process supplies power to the wiring pattern 3 through the through hole 6 of the base insulating layer 2 that overlaps the wiring pattern 3 when projected in the thickness direction (see FIG. 3F).
- the entire upper surface and side surfaces of the wiring pattern 3 can be covered with the insulating cover layer 4. That is, the upper surface and side surfaces of the wiring pattern 3 are completely covered with the insulating cover layer 4.
- the inductor 1 has an exposed side surface 48 (described later) where the magnetic layer and the wiring pattern 3 are in contact with each other. Insulating in a form is difficult.
- the contact between the magnetic layer and the wiring pattern 3 can be completely suppressed. As a result, the wiring pattern 3 can be more reliably suppressed from coming into contact with the first magnetic layer 5.
- the base insulating layer 2 includes the alignment mark 7.
- the wiring pattern 3 can be accurately formed above the through hole 6 with the alignment mark 7 as a mark. Therefore, the cover insulating layer 4 can be more reliably covered with the wiring pattern 3 by the power supply from the through hole 6.
- the inductor 1 obtained by this manufacturing method includes a base insulating layer 2, a plurality of wiring portions 21 that are spaced apart from each other in the left-right direction above the base insulating layer 2, and a plurality of wiring portions 21.
- the cover insulating layer 4 that covers each of the wiring portions adjacent to each other in the left-right direction so as not to be continuous, and the upper surface of the base insulating layer 2 and the cover insulating layer 4 are disposed so as to cover the upper surface of the base insulating layer 2.
- the first magnetic layer 5 is provided.
- the inductance of the inductor 1 can be made favorable.
- the plurality of wiring parts 21 are arranged above the common base insulating layer 2, and the cover insulating layer 4 covers the upper surfaces and side surfaces of the plurality of wiring parts 21.
- the plurality of wiring portions 21 have good positional accuracy in the thickness direction and are reliably supported by the base insulating layer 2.
- a step of arranging the first diffusion prevention layer 30 on the lower surface of the metal sheet 10 can be performed before the base insulating layer arranging step. That is, the first diffusion prevention layer 30 can be disposed on the lower surface of the metal sheet 10 and the upper surface of the base insulating layer 2.
- Examples of the material of the first diffusion preventing layer 30 include conductors such as nickel, nichrome, cobalt, and tantalum. From the viewpoint of enabling easy execution of plating during formation and soft etching during removal, and good workability, nickel is preferably used.
- the wiring pattern 3 in the inductor 1 has a lower wiring portion 31 formed from the first diffusion prevention layer 30. And a wiring main part 32 formed on the upper surface and formed from the metal sheet 10.
- the step of etching the first diffusion prevention layer 30 is performed in addition to the step of etching the metal sheet 10 due to the difference in the etching rates.
- the metal component (for example, copper ions) of the metal sheet 10 can be prevented from eroding the base insulating layer 2 and diffusing into the base insulating layer 2.
- the peel strength between the sheet 10 and the base insulating layer 2 can be improved.
- Second Modification As shown in FIG. 9A, in the wiring formation process, after the subtractive method, a process of disposing the second diffusion prevention layer 33 on the wiring pattern 3 formed from the metal sheet 10 may be performed. it can.
- Examples of the material of the second diffusion preventing layer 33 include a conductor such as nickel.
- the second diffusion preventing layer 33 for example, a plating treatment using a nickel bath may be used.
- the wiring pattern 3 in the inductor 1 includes a wiring main portion 32 formed from the metal sheet 10, and And a second diffusion preventing layer 33 covering the upper surface and side surfaces thereof.
- first modification and the second modification may be combined.
- the shape of the wiring pattern 3 is not limited to the above.
- the wiring pattern 3 may have a meander shape (meandering shape) that advances in the front-rear direction and the left-right direction.
- a plurality (five) of wiring portions 21 extending in the left-right direction and a plurality of (four) connection wirings connecting the left ends or the right ends of the plurality of wiring portions 21 are connected.
- the wiring part 22 and a plurality of terminal parts 23 disposed at both ends of the wiring pattern 3 are provided.
- the wiring pattern 3 may have a substantially circular loop shape in a plan view as shown in FIG. 10C, for example.
- the predetermined direction and the length of the wiring portion 21 adopt an arbitrary direction (for example, left and right direction, crossing direction) and an arbitrary length. be able to.
- a crossing direction a direction crossing both the front-rear direction and the left-right direction: oblique direction
- a plurality of (two) wiring portions 21 adjacent to each other in the crossing direction are hatched. It shows with.
- the wiring pattern 3 does not include the terminal portion 23 and may be configured by the wiring portion 21 and the connection wiring portion 22.
- the inductor 1 may not include the second magnetic layer 18 and the adhesive layer 19. From the viewpoint of providing higher inductance, the inductor 1 preferably includes the second magnetic layer 18 and the adhesive layer 19.
- the inductor 1 may not include the alignment mark 7 in the base insulating layer 2 by subsequent outer shape processing or the like.
- FIGS. 11A to 14F An example of a method for manufacturing a wiring board according to the present invention. Note that in the second embodiment, the same members and steps as those in the first embodiment described above are denoted by the same reference numerals, and detailed description thereof is omitted.
- the second embodiment of the method for manufacturing the inductor 1 includes a metal sheet laminate preparation step, a wiring formation step, a lead masking step, an electrodeposition step, a masking removal step, a lead removal step, and a first magnetic layer arrangement. And a second magnetic layer arranging step.
- Metal sheet laminate preparation process In the metal sheet laminate preparation step, as shown in FIG. 11A, a metal sheet laminate 40 including the metal sheet 10 and the base insulating layer 2 disposed on the entire lower surface thereof is prepared.
- the metal sheet 10 is the same as that in the first embodiment.
- the base insulating layer 2 is made of, for example, an inorganic material such as glass or ceramics, for example, an insulating material such as a composite material (glass epoxy) of an inorganic material and an organic material. Is mentioned.
- the metal sheet laminate 40 is preferably a copper clad laminate or the like.
- the conductor pattern 42 having the wiring pattern 3 and the electrodeposition leads 41 is formed on the upper side of the insulating base layer 2. That is, a subtractive method is performed on the metal sheet 10 to remove unnecessary portions from the metal sheet 10 to form the conductor pattern 42.
- a support film 15 is disposed on the lower surface of the base insulating layer 2.
- the subtractive method is performed.
- the subtractive method is the same as that in the first embodiment.
- the conductor pattern 42 includes a wiring pattern 3 and an electrodeposition lead 41.
- the electrodeposition lead 41 is continuous with the first lead portion 43 extending from the rear end edge of one (left side) terminal portion 23 of the wiring pattern 3 to the rear side, and the rear end edge of the first lead portion 43, and in the left-right direction. And a second lead portion 44 extending.
- the second electrodeposit 45 having the support film 15, the base insulating layer 2, and the conductor pattern 42 in order is obtained.
- the electrodeposition lead 41 is masked as shown in FIGS. 11D and 13B. That is, the upper surface and the side surface of the electrodeposition lead 41 are covered with the masking sheet 46.
- Examples of the masking sheet 46 include a separator film having slight adhesiveness.
- Electrodeposition process In the electrodeposition process, as shown in FIGS. 11E and 13C, the wiring pattern 3 is covered with the insulating cover layer 4 by electrodeposition.
- the masked second electrodeposition object 45 is immersed in the electrodeposition paint-containing liquid, and then an electric current is applied to the second electrodeposition object 45, whereby the electrodeposition paint is applied to the wiring pattern 3. Then, the deposited electrodeposition paint is dried.
- a lead wire (not shown) connected to an external power source is connected to the end of the second lead portion 44. Thereby, a direct current is applied to the whole wiring pattern 3 through the lead wire and the electrodeposition lead 41.
- the electrodeposition conditions are the same as in the first embodiment.
- a cover insulating layer 4 (electrodeposition coating film) is formed on the upper surface and side surfaces of the wiring pattern 3.
- the electrodeposited lead 41 is removed as shown in FIGS. 12G and 14E. That is, the electrodeposited lead 41 is removed from the conductor pattern 42 by etching.
- Etching includes, for example, the above-described wet etching.
- the insulating cover layer 4 is not covered on the side surface of the rear edge of the wiring pattern 3. That is, the wiring pattern 3 (specifically, the left terminal portion 23) has an exposed side surface 48 exposed from the cover insulating layer 4 on the side surface of the rear end edge.
- First magnetic layer arranging step In the first magnetic layer arranging step, the first magnetic layer 5 is arranged above the base insulating layer 2 and the cover insulating layer 4 as shown in FIGS. 12H and 14F.
- the first magnetic layer arranging step is the same as in the first embodiment.
- the support film 15 is removed from the base insulating layer 2 by peeling.
- the second intermediate body 49 including the insulating base layer 2, the wiring pattern 3, the insulating cover layer 4, and the first magnetic layer 5 in order is obtained.
- the exposed side surface 48 is in contact with the first magnetic layer 5.
- the second magnetic layer 18 is disposed below the base insulating layer 2. That is, the insulating cover layer 4 is disposed on the lower surface of the insulating base layer 2 via the adhesive layer 19.
- the second magnetic layer arranging step is the same as in the first embodiment.
- the inductor 1 includes a second magnetic layer 18, an adhesive layer 19, a base insulating layer 2, a conductor pattern 42, a cover insulating layer 4, and a first magnetic layer 5 in this order in the thickness direction. These members are the same as those of the first embodiment except for special mention.
- the base insulating layer 2 of the second embodiment does not include the through hole 6 and the alignment mark 7. That is, the entire lower surface of the base insulating layer 2 is in contact with the entire upper surface of the adhesive layer 19. Further, the adhesive layer 19 is not in contact with the wiring pattern 3 and the second magnetic layer 18.
- the exposed side surface 48 of one terminal portion 23 is in contact with the first magnetic layer 5.
- the manufacturing method of the inductor 1 according to the second embodiment and the inductor 1 manufactured therefrom have the same effects as the manufacturing method and the inductor 1 according to the first embodiment.
- modification of the second embodiment can be the same as the modification of the first embodiment.
- the inductor is mounted on, for example, an electronic device.
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- Manufacturing & Machinery (AREA)
- Coils Or Transformers For Communication (AREA)
- Manufacturing Cores, Coils, And Magnets (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
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Abstract
This method for producing a wiring substrate comprises: a wiring line formation step wherein a wiring pattern is formed on a surface of a first insulating layer, said surface being on one side in the thickness direction; an electrodeposition step wherein the wiring pattern is covered by a second insulating layer by means of electrodeposition; and a magnetic layer arrangement step wherein a magnetic layer is arranged on surfaces of the first insulating layer and the second insulating layer, said surfaces being on one side in the thickness direction.
Description
本発明は、配線基板およびその製造方法に関する。
The present invention relates to a wiring board and a manufacturing method thereof.
インダクタは、電子機器などに搭載されて、電圧変換部材などの受動素子として用いられることが知られている。
It is known that an inductor is mounted on an electronic device or the like and used as a passive element such as a voltage conversion member.
例えば、コイルの上面および/または下面に、扁平状または針状の軟磁性金属粉末を樹脂材料中に分散させてなる異方性複合磁性シートが積層された可撓性のインダクタが提案されている(例えば、特許文献1参照。)。
For example, a flexible inductor is proposed in which an anisotropic composite magnetic sheet obtained by dispersing a flat or needle-like soft magnetic metal powder in a resin material is laminated on the upper and / or lower surface of a coil. (For example, refer to Patent Document 1).
ところで、特許文献1のインダクタでは、コイルに異方性複合磁性シートが直接接触している。そのため、異方性複合磁性シート内の多数の軟磁性金属粉末を介して、コイルを構成する面方向に隣接する配線部同士が短絡する不具合が生じる。
Incidentally, in the inductor of Patent Document 1, the anisotropic composite magnetic sheet is in direct contact with the coil. For this reason, there arises a problem that the wiring portions adjacent to each other in the plane direction constituting the coil are short-circuited via a large number of soft magnetic metal powders in the anisotropic composite magnetic sheet.
そこで、配線部を絶縁性のカバーレイフィルムで被覆することにより、配線部が異方性複合磁性シートと直接接触しないようにすることが検討される。具体的には、ベース絶縁層51の上面に配線部52を配置し、次いで、カバーレイフィルム53で配線部52を被覆し、最後に、カバーレイフィルム53の上側から磁性シート54を配置する方法が挙げられる(図15参照)。
Therefore, it is considered that the wiring part is not directly in contact with the anisotropic composite magnetic sheet by covering the wiring part with an insulating coverlay film. Specifically, the wiring part 52 is disposed on the upper surface of the base insulating layer 51, then the wiring part 52 is covered with the coverlay film 53, and finally the magnetic sheet 54 is disposed from the upper side of the coverlay film 53. (See FIG. 15).
しかしながら、この方法では、隣接する配線部52の間に、それらの配線部52を連続するように、カバーレイフィルム53が配置される。そのため、隣接する配線部52の間には、厚み方向(上下方向)において、軟磁性金属粉末が配置されていない箇所55が存在する。その結果、インダクタンスが低減する不具合が生じる。
However, in this method, the coverlay film 53 is disposed between the adjacent wiring portions 52 so that the wiring portions 52 are continuous. Therefore, a portion 55 where no soft magnetic metal powder is disposed exists in the thickness direction (vertical direction) between the adjacent wiring portions 52. As a result, a problem that inductance is reduced occurs.
本発明は、配線部間の短絡を抑制することができ、インダクタンスが良好である配線基板およびその製造方法を提供する。
The present invention provides a wiring board capable of suppressing a short circuit between wiring parts and having good inductance, and a method for manufacturing the same.
本発明[1]は、第1絶縁層の厚み方向一方側に、配線パターンを形成する配線形成工程と、電着によって、前記配線パターンを第2絶縁層で被覆する電着工程と、前記第1絶縁層および前記第2絶縁層の厚み方向一方側に、磁性層を配置する磁性層配置工程と、を備える、配線基板の製造方法を含む。
The present invention [1] includes a wiring forming step of forming a wiring pattern on one side in the thickness direction of the first insulating layer, an electrodeposition step of covering the wiring pattern with a second insulating layer by electrodeposition, And a magnetic layer arranging step of arranging a magnetic layer on one side in the thickness direction of the first insulating layer and the second insulating layer.
この配線基板の製造方法では、電着によって配線パターンに第2絶縁層を被覆するので、配線パターンが磁性層に直接接触することを抑制することができる。そのため、配線パターンの短絡を抑制することができる。
In this method of manufacturing a wiring board, since the second insulating layer is coated on the wiring pattern by electrodeposition, it is possible to suppress the wiring pattern from directly contacting the magnetic layer. Therefore, a short circuit of the wiring pattern can be suppressed.
また、この配線基板の製造方法では、電着によって配線パターンに第2絶縁層を被覆するので、第2絶縁層を、配線パターンを構成する複数の配線部のそれぞれが互いに隣接する配線部間に連続しないように、配線パターンに被覆することができる。そのため、配線パターンの間(すなわち、隣接する配線部の間)において、厚み方向全体にわたって、磁性層を配置することができる。したがって、配線基板のインダクタンスを向上させることができる。
Further, in this method of manufacturing a wiring board, the second insulating layer is coated on the wiring pattern by electrodeposition, so that the second insulating layer is placed between the wiring parts adjacent to each other in the plurality of wiring parts constituting the wiring pattern. The wiring pattern can be covered so as not to be continuous. Therefore, the magnetic layer can be disposed over the entire thickness direction between the wiring patterns (that is, between the adjacent wiring portions). Therefore, the inductance of the wiring board can be improved.
また、この配線基板の製造方法では、電着によって配線パターンに第2絶縁層を被覆するので、配線パターンの表面に対して第2絶縁層を薄く均一に確実に被覆することができる。そのため、磁性層と配線パターンとの距離を近接させることができる。したがって、配線基板のインダクタンスを向上させることができる。
Also, in this method of manufacturing a wiring board, the second insulating layer is coated on the wiring pattern by electrodeposition, so that the second insulating layer can be coated thinly and uniformly on the surface of the wiring pattern. Therefore, the distance between the magnetic layer and the wiring pattern can be made closer. Therefore, the inductance of the wiring board can be improved.
本発明[2]は、前記配線形成工程が、サブトラクティブ法によって、前記配線パターンを形成する工程である、[1]に記載の配線基板の製造方法を含む。
The present invention [2] includes the method for manufacturing a wiring board according to [1], wherein the wiring forming step is a step of forming the wiring pattern by a subtractive method.
この配線基板の製造方法では、サブトラクティブ法によって配線パターンを形成することができるため、アディティブ法と比較して、短時間で、配線基板を製造することができる。また、配線厚みが厚い配線基板を製造することができ、大電流を流すことができる。
In this wiring board manufacturing method, since a wiring pattern can be formed by a subtractive method, the wiring board can be manufactured in a shorter time compared to the additive method. In addition, a wiring board having a large wiring thickness can be manufactured, and a large current can flow.
本発明[3]は、前記電着工程が、厚み方向に投影したときに前記配線パターンと重なる前記第1絶縁層の貫通穴を介して、前記配線パターンに給電する工程を含む、[1]または[2]に記載の配線基板の製造方法を含む。
The present invention [3] includes the step of supplying power to the wiring pattern through the through hole of the first insulating layer that overlaps the wiring pattern when the electrodeposition step is projected in the thickness direction. [1] Or the manufacturing method of the wiring board as described in [2] is included.
この配線基板の製造方法では、第1絶縁層の貫通穴を介して、配線パターンにその厚み方向他方面から給電するので、配線パターンの厚み方向一方面および側面の全面を第2絶縁層で被覆することができる。そのため、配線パターンが磁性層に接触することをより確実に抑制することができる。
In this method of manufacturing a wiring board, power is supplied to the wiring pattern from the other side in the thickness direction through the through hole of the first insulating layer, so that the entire surface of the wiring pattern in the thickness direction on one side and side is covered with the second insulating layer can do. Therefore, it can suppress more reliably that a wiring pattern contacts a magnetic layer.
本発明[4]は、前記第1絶縁層が、前記貫通穴の厚み方向一方側に前記配線パターンを形成するための位置決め部を備える、[3]に記載の配線基板の製造方法を含む。
This invention [4] contains the manufacturing method of the wiring board as described in [3] in which the said 1st insulating layer is provided with the positioning part for forming the said wiring pattern in the thickness direction one side of the said through-hole.
この配線基板の製造方法では、第1絶縁層が位置決め部を備えるので、位置決め部を目印にして、貫通穴の厚み方向一方側に、配線パターンを正確に形成することができる。そのため、貫通穴からの給電によって、より一層確実に、配線パターンを第2絶縁層で被覆することができる。
In this wiring board manufacturing method, since the first insulating layer includes the positioning portion, the wiring pattern can be accurately formed on one side in the thickness direction of the through hole with the positioning portion as a mark. Therefore, the wiring pattern can be more reliably covered with the second insulating layer by supplying power from the through hole.
本発明[5]は、前記配線パターンが、銅配線を備える、[1]~[4]のいずれか一項に記載の配線基板の製造方法を含む。
[5] The present invention [5] includes the method of manufacturing a wiring board according to any one of [1] to [4], wherein the wiring pattern includes a copper wiring.
この配線基板の製造方法では、配線パターンが、銅配線であるため、良好な導電性およびパターニング性を備える配線基板を製造することができる。
In this wiring board manufacturing method, since the wiring pattern is a copper wiring, a wiring board having good conductivity and patternability can be manufactured.
本発明[6]は、第1絶縁層と、前記第1絶縁層の厚み方向一方側において、所定方向において互いに間隔を隔てて配置される複数の配線部と、前記複数の配線部のそれぞれを、所定方向において互いに隣接する配線部間に連続しないように被覆する第2絶縁層と、前記第1絶縁層および前記第2絶縁層の厚み方向一方側において、前記第1絶縁層の厚み方向一方面を被覆するように配置される磁性層とを備える、配線基板を含む。
The present invention [6] includes a first insulating layer, a plurality of wiring portions arranged at predetermined intervals on one side in the thickness direction of the first insulating layer, and each of the plurality of wiring portions. A second insulating layer covering the wiring portions adjacent to each other in a predetermined direction so as not to be continuous, and one thickness direction of the first insulating layer on one side of the first insulating layer and the second insulating layer. A wiring board including a magnetic layer disposed to cover the surface.
この配線基板では、複数の配線部を被覆する第2絶縁層を備えるので、配線部が磁性層と接触することを抑制することができ、配線部同士の短絡を抑制することができる。また、第2絶縁層は、所定方向において配線部間に連続しないように複数の配線部を被覆しており、磁性層が、第1絶縁層の厚み方向一方面に配置されているので、磁性層は、所定方向における配線部間において、厚み方向全体にわたって配置されている。そのため、配線基板のインダクタンスを良好にすることができる。
In this wiring board, since the second insulating layer covering the plurality of wiring portions is provided, the wiring portions can be prevented from coming into contact with the magnetic layer, and a short circuit between the wiring portions can be suppressed. The second insulating layer covers a plurality of wiring portions so as not to be continuous between the wiring portions in a predetermined direction, and the magnetic layer is disposed on one surface in the thickness direction of the first insulating layer. The layers are arranged over the entire thickness direction between the wiring portions in the predetermined direction. Therefore, the inductance of the wiring board can be improved.
本発明[7]は、前記複数の配線部は、共通する前記第1絶縁層の厚み方向一方側に配置され、前記第2絶縁層は、前記複数の配線部の厚み方向一方面および側面を被覆する、[6]に記載の配線基板を含む。
In the present invention [7], the plurality of wiring portions are arranged on one side in the thickness direction of the common first insulating layer, and the second insulating layer has one side surface and a side surface in the thickness direction of the plurality of wiring portions. The wiring board according to [6] is covered.
この配線基板では、複数の配線部は、共通する一つの第1絶縁層に配置されているので、複数の配線部は、複数の配線部は、互いに、厚み方向の位置精度が良好であり、かつ、第1絶縁層に確実に支持されている。
In this wiring board, since the plurality of wiring portions are arranged in a common first insulating layer, the plurality of wiring portions have a good positional accuracy in the thickness direction with respect to each other, And it is reliably supported by the 1st insulating layer.
本発明[8]は、前記第1絶縁層が、厚み方向に投影したときに前記配線部と重なる貫通穴を有する、[6]または[7]に記載の配線基板を含む。
The present invention [8] includes the wiring board according to [6] or [7], wherein the first insulating layer has a through hole that overlaps the wiring portion when projected in the thickness direction.
この配線基板では、第1絶縁層の貫通穴を介して、配線部に給電されるので、配線部の厚み方向一方面および側面の全面を第2絶縁層で被覆することができる。そのため、配線部が磁性層に接触することをより確実に抑制することができる。
In this wiring board, power is supplied to the wiring portion through the through hole of the first insulating layer, so that the entire surface of the wiring portion on one side and the side in the thickness direction can be covered with the second insulating layer. Therefore, it can suppress more reliably that a wiring part contacts a magnetic layer.
本発明[9]は、前記第1絶縁層の厚みが、0.5μm以上、10μm以下である、[6]~[8]のいずれか一項に記載の配線基板を含む。
[9] The wiring board according to any one of [6] to [8], wherein the thickness of the first insulating layer is not less than 0.5 μm and not more than 10 μm.
この配線基板では、第1絶縁層の厚みが、所定の範囲であるので、インダクタンスの機械的強度を保ちつつ、配線基板の薄膜化を図ることができる。
In this wiring board, since the thickness of the first insulating layer is in a predetermined range, it is possible to reduce the thickness of the wiring board while maintaining the mechanical strength of the inductance.
本発明の配線基板の製造方法は、短絡を抑制することができ、インダクタンスが良好である配線基板を製造することができる。
The method for manufacturing a wiring board of the present invention can suppress a short circuit and can manufacture a wiring board with good inductance.
本発明の配線基板は、短絡を抑制することができ、インダクタンスが良好である。
The wiring board of the present invention can suppress a short circuit and has a good inductance.
図1において、紙面上下方向は、前後方向(第1方向)であって、紙面下側が前側(第1方向一方側)、紙面上側が後側(第1方向他方側)である。紙面左右方向は、左右方向(第1方向と直交する第2方向)であって、紙面左側が左側(第2方向一方側)、紙面右側が右側(第2方向他方側)である。紙面紙厚方向は、上下方向(厚み方向、第1方向および第2方向と直交する第3方向)であって、紙面手前側が上側(厚み方向一方側、第3方向一方側)、紙面奥側が下側(厚み方向他方側、第3方向他方側)である。具体的には、各図の方向矢印に準拠する。
In FIG. 1, the vertical direction of the paper surface is the front-back direction (first direction), the lower side of the paper surface is the front side (one side in the first direction), and the upper side of the paper surface is the rear side (the other side in the first direction). The left-right direction on the paper surface is the left-right direction (second direction orthogonal to the first direction), the left side of the paper surface is the left side (second side in the second direction), and the right side of the paper surface is the right side (the other side in the second direction). The paper thickness direction is the vertical direction (thickness direction, third direction orthogonal to the first direction and the second direction), the front side of the paper is the upper side (one side in the thickness direction, the third direction one side), and the back side of the paper is The lower side (the other side in the thickness direction, the other side in the third direction). Specifically, it conforms to the direction arrow in each figure.
<第1実施形態>
本発明の配線基板の製造方法の一例としてインダクタ1の製造方法の第1実施形態を、図1~図7を参照して説明する。 <First Embodiment>
A first embodiment of a method for manufacturing aninductor 1 will be described with reference to FIGS. 1 to 7 as an example of a method for manufacturing a wiring board according to the present invention.
本発明の配線基板の製造方法の一例としてインダクタ1の製造方法の第1実施形態を、図1~図7を参照して説明する。 <First Embodiment>
A first embodiment of a method for manufacturing an
インダクタ1の製造方法の第1実施形態は、図1~図2Bに示すインダクタ1の製造方法であって、金属シート用意工程と、ベース絶縁層配置工程と、導体層配置工程と、配線形成工程と、電着工程と、第1磁性層配置工程と、導体層除去工程と、第2磁性層配置工程とを順に備える。以下、各工程を詳述する。
The first embodiment of the method for manufacturing the inductor 1 is a method for manufacturing the inductor 1 shown in FIGS. 1 to 2B, and includes a metal sheet preparation step, a base insulating layer placement step, a conductor layer placement step, and a wiring formation step. And an electrodeposition step, a first magnetic layer placement step, a conductor layer removal step, and a second magnetic layer placement step. Hereinafter, each process is explained in full detail.
(金属シート用意工程)
金属シート用意工程では、図3Aおよび図5Aに示すように、金属シート10を用意する。 (Metal sheet preparation process)
In the metal sheet preparation step, themetal sheet 10 is prepared as shown in FIGS. 3A and 5A.
金属シート用意工程では、図3Aおよび図5Aに示すように、金属シート10を用意する。 (Metal sheet preparation process)
In the metal sheet preparation step, the
金属シート10は、配線形成工程によって、後述する配線パターン3となる部材である。すなわち、金属シート10は、配線パターン3の原料である。金属シート10は、前後方向および左右方向に延びるシート形状を有する。
The metal sheet 10 is a member that becomes a wiring pattern 3 to be described later in the wiring forming process. That is, the metal sheet 10 is a raw material for the wiring pattern 3. The metal sheet 10 has a sheet shape extending in the front-rear direction and the left-right direction.
金属シート10の材料としては、例えば、銅、銀、金、ニッケルまたはそれらを含む合金などが挙げられる。金属シート10の材料としては、好ましくは、銅が挙げられる。これにより、良好な導電性およびパターニング性を備えるインダクタ1を製造することができる。
Examples of the material of the metal sheet 10 include copper, silver, gold, nickel, and alloys containing them. The material of the metal sheet 10 is preferably copper. Thereby, the inductor 1 provided with favorable electroconductivity and patterning property can be manufactured.
金属シート10の厚みは、例えば、25μm以上、好ましくは、50μm以上であり、また、例えば、300μm以下、好ましくは、150μm以下である。これにより、大電流を流すインダクタ1を製造することができる。
The thickness of the metal sheet 10 is, for example, 25 μm or more, preferably 50 μm or more, and for example, 300 μm or less, preferably 150 μm or less. Thereby, the inductor 1 which flows a large current can be manufactured.
なお、金属シート10は、次に述べるベース絶縁層2とともに、仮想線で示すように、2層基材(後述する導電シート積層体40など)として用意することもできる。
In addition, the metal sheet 10 can also be prepared as a two-layer base material (such as a conductive sheet laminate 40 described later) as indicated by a virtual line together with the base insulating layer 2 described below.
(ベース絶縁層配置工程)
ベース絶縁層配置工程では、図3Bおよび図5Bに示すように、金属シート10の下側に、第1絶縁層の一例としてのベース絶縁層2を配置する。すなわち、金属シート10の下面(厚み方向他方面)に、複数の貫通穴6と、複数の位置決め部の一例としての複数のアライメントマーク7とを有するベース絶縁層2を形成する。 (Base insulating layer placement process)
In the base insulating layer arranging step, thebase insulating layer 2 as an example of the first insulating layer is arranged below the metal sheet 10 as shown in FIGS. 3B and 5B. That is, the base insulating layer 2 having a plurality of through holes 6 and a plurality of alignment marks 7 as an example of a plurality of positioning portions is formed on the lower surface (the other surface in the thickness direction) of the metal sheet 10.
ベース絶縁層配置工程では、図3Bおよび図5Bに示すように、金属シート10の下側に、第1絶縁層の一例としてのベース絶縁層2を配置する。すなわち、金属シート10の下面(厚み方向他方面)に、複数の貫通穴6と、複数の位置決め部の一例としての複数のアライメントマーク7とを有するベース絶縁層2を形成する。 (Base insulating layer placement process)
In the base insulating layer arranging step, the
具体的には、まず、感光性の絶縁性材料のワニスを用意し、このワニスを金属シート10の下面全面に塗布して乾燥させて、ベース皮膜を形成する。ベース皮膜を、貫通穴6およびアライメントマーク7に対応するパターンを有するフォトマスクを介して露光する。
その後、ベース皮膜を現像し、必要により加熱硬化する。 Specifically, first, a varnish of a photosensitive insulating material is prepared, and this varnish is applied to the entire lower surface of themetal sheet 10 and dried to form a base film. The base film is exposed through a photomask having a pattern corresponding to the through hole 6 and the alignment mark 7.
Thereafter, the base film is developed and cured by heating if necessary.
その後、ベース皮膜を現像し、必要により加熱硬化する。 Specifically, first, a varnish of a photosensitive insulating material is prepared, and this varnish is applied to the entire lower surface of the
Thereafter, the base film is developed and cured by heating if necessary.
また、2層基材として用意した場合には、貫通穴6およびアライメントマーク7に対応するパターンを有するエッチングレジストをベース絶縁層2の下面に配置し、ベース絶縁層2をエッチングした後に、エッチングレジストを除去する。または、レーザーを用いて貫通穴6およびアライメントマーク7をベース絶縁層2に形成する。
When the two-layer base material is prepared, an etching resist having a pattern corresponding to the through hole 6 and the alignment mark 7 is disposed on the lower surface of the base insulating layer 2, and after etching the base insulating layer 2, the etching resist Remove. Alternatively, the through hole 6 and the alignment mark 7 are formed in the base insulating layer 2 using a laser.
ベース絶縁層2の絶縁性材料としては、例えば、ポリイミド、ポリシロキサン、エポキシ系樹脂、フッ素系樹脂などの有機材料が挙げられる。好ましくは、ポリイミドが挙げられる。
Examples of the insulating material for the base insulating layer 2 include organic materials such as polyimide, polysiloxane, epoxy resin, and fluorine resin. Preferably, polyimide is used.
貫通穴6は、図1が参照されるように、ベース絶縁層2において、厚み方向に投影したときに配線部21(後述)と重複する位置に、形成する。貫通穴6は、平面視略円形状および断面視略矩形状を有する。貫通穴6の左右方向長さ(幅)および前後方向長さは、それぞれ、配線部21の左右方向長さ(幅)および前後方向長さよりも短い。
As shown in FIG. 1, the through hole 6 is formed in the base insulating layer 2 at a position overlapping with the wiring portion 21 (described later) when projected in the thickness direction. The through-hole 6 has a substantially circular shape in plan view and a substantially rectangular shape in sectional view. The length (width) and the length in the front-rear direction of the through hole 6 are shorter than the length (width) and the length in the front-rear direction of the wiring part 21, respectively.
アライメントマーク7は、ベース絶縁層2を厚み方向に貫通するマーク用穴11によって形成される絶縁部である。アライメントマーク7は、ベース絶縁層2において、厚み方向に投影したときに配線パターン3と重複しない位置に、形成する。アライメントマーク7は、平面視略円形状および断面視略矩形状を有する。
The alignment mark 7 is an insulating portion formed by a mark hole 11 penetrating the insulating base layer 2 in the thickness direction. The alignment mark 7 is formed on the insulating base layer 2 at a position that does not overlap with the wiring pattern 3 when projected in the thickness direction. The alignment mark 7 has a substantially circular shape in plan view and a substantially rectangular shape in sectional view.
これにより、貫通穴6およびアライメントマーク7を有するベース絶縁層2が、金属シート10の下面に形成される。
Thereby, the base insulating layer 2 having the through holes 6 and the alignment marks 7 is formed on the lower surface of the metal sheet 10.
(導体層配置工程)
導体層形成工程では、図3Cおよび図5Cに示すように、ベース絶縁層2の下側に、導体層の一例としての金属薄膜12を配置する。すなわち、ベース絶縁層2の下面全面に、金属薄膜12を形成する。 (Conductor layer placement process)
In the conductor layer forming step, as shown in FIGS. 3C and 5C, a metalthin film 12 as an example of a conductor layer is disposed below the insulating base layer 2. That is, the metal thin film 12 is formed on the entire lower surface of the base insulating layer 2.
導体層形成工程では、図3Cおよび図5Cに示すように、ベース絶縁層2の下側に、導体層の一例としての金属薄膜12を配置する。すなわち、ベース絶縁層2の下面全面に、金属薄膜12を形成する。 (Conductor layer placement process)
In the conductor layer forming step, as shown in FIGS. 3C and 5C, a metal
金属薄膜12の配置では、貫通穴6およびアライメントマーク7において、金属薄膜12の上面(厚み方向一方面)が金属シート10の下面と接触するように、金属薄膜12を形成する。具体的には、貫通穴6から露出する金属シート10などの表面(第1露出面13)、マーク用穴11から露出する金属シート10などの表面(第2露出面14)、および、ベース絶縁層2の下面を被覆するように、金属薄膜12を形成する。
In the arrangement of the metal thin film 12, the metal thin film 12 is formed so that the upper surface (one surface in the thickness direction) of the metal thin film 12 is in contact with the lower surface of the metal sheet 10 in the through hole 6 and the alignment mark 7. Specifically, the surface (first exposed surface 13) of the metal sheet 10 exposed from the through hole 6, the surface (second exposed surface 14) of the metal sheet 10 exposed from the mark hole 11, and the base insulation. A metal thin film 12 is formed so as to cover the lower surface of the layer 2.
金属薄膜12を配置する方法としては、例えば、スパッタリング法、真空蒸着法、イオンプレーティング法などの乾式方法、例えば、無電解めっき(無電解銅めっき、無電解ニッケルめっきなど)などの湿式方法が挙げられ、好ましくは、乾式法が挙げられ、より好ましくは、スパッタリング法が挙げられる。これにより、密着性が良好で均一な薄膜(具体的には、スパッタ膜)を第1露出面13および第2露出面14に確実に配置することができる。また、後述する除去工程で選択的に金属薄膜12を確実に除去ですることができる。
Examples of the method for disposing the metal thin film 12 include dry methods such as sputtering, vacuum deposition, and ion plating, and wet methods such as electroless plating (electroless copper plating, electroless nickel plating, etc.). Preferably, a dry method is mentioned, More preferably, a sputtering method is mentioned. Thereby, a uniform thin film (specifically, a sputtered film) having good adhesion can be reliably disposed on the first exposed surface 13 and the second exposed surface 14. In addition, the metal thin film 12 can be selectively removed with certainty in a removing step described later.
金属薄膜12の材料としては、後述する除去工程で選択的に金属薄膜12を除去できる金属材料であり、例えば、銅、クロム、ニクロムなどの金属が挙げられる。
The material of the metal thin film 12 is a metal material that can selectively remove the metal thin film 12 in a removing step described later, and examples thereof include metals such as copper, chromium, and nichrome.
金属薄膜12の厚みは、例えば、10nm以上、好ましくは、30nm以上であり、また、例えば、200nm以下、好ましくは、100nm以下である。
The thickness of the metal thin film 12 is, for example, 10 nm or more, preferably 30 nm or more, and for example, 200 nm or less, preferably 100 nm or less.
(配線形成工程)
配線形成工程では、ベース絶縁層2の上側に、配線パターン3を形成する。すなわち、金属シート10に対してサブトラクティブ法を実施して、金属シート10から不要な部分を除去して、配線パターン3を形成する。 (Wiring formation process)
In the wiring formation step, thewiring pattern 3 is formed on the upper side of the base insulating layer 2. That is, the subtractive method is performed on the metal sheet 10 to remove unnecessary portions from the metal sheet 10 to form the wiring pattern 3.
配線形成工程では、ベース絶縁層2の上側に、配線パターン3を形成する。すなわち、金属シート10に対してサブトラクティブ法を実施して、金属シート10から不要な部分を除去して、配線パターン3を形成する。 (Wiring formation process)
In the wiring formation step, the
まず、図3Dおよび図5Dに示すように、金属薄膜12の下面に、支持フィルム15を配置する。
First, as shown in FIGS. 3D and 5D, a support film 15 is disposed on the lower surface of the metal thin film 12.
支持フィルム15としては、例えば、後の工程において、金属薄膜12から容易に引き剥がすことができる微粘着性を有するセパレータフィルムが挙げられる。支持フィルム15の配置によって、金属シート10およびベース絶縁層2を確実に支持するとともに、後述する電着工程において、金属薄膜12の下面にカバー絶縁層4が被膜することを防止することができる。
Examples of the support film 15 include a separator film having slight adhesiveness that can be easily peeled off from the metal thin film 12 in a later step. The arrangement of the support film 15 can reliably support the metal sheet 10 and the base insulating layer 2 and can prevent the cover insulating layer 4 from being coated on the lower surface of the metal thin film 12 in the electrodeposition process described later.
次いで、図3Eおよび図5Eに示すように、サブトラクティブ法を実施する。具体的には、配線パターン3(後述)に対応するパターンを有するドライフィルムレジスト16(仮想線参照)を金属シート10の上に配置し、続いて、配線パターン3以外の不要な金属シート10を、エッチングによって除去し、最後に、ドライフィルムレジスト16を、エッチングまたは剥離などによって除去する。
Next, as shown in FIGS. 3E and 5E, the subtractive method is performed. Specifically, a dry film resist 16 (see virtual line) having a pattern corresponding to the wiring pattern 3 (described later) is disposed on the metal sheet 10, and then an unnecessary metal sheet 10 other than the wiring pattern 3 is attached. The dry film resist 16 is finally removed by etching or peeling.
パターンを有するドライフィルムレジスト16の配置方法では、金属シート10の上面全面にドライフィルムレジスト16を配置し、配線パターン3に対応するパターンを有するフォトマスクを介して露光および現像し、必要により加熱硬化させる。
In the method of disposing the dry film resist 16 having a pattern, the dry film resist 16 is disposed on the entire upper surface of the metal sheet 10, exposed and developed through a photomask having a pattern corresponding to the wiring pattern 3, and heated and cured as necessary. Let
この際、下側から検知装置でアライメントマーク7を認識することによって、厚み方向に投影したときに貫通穴6と重複する位置に、パターンを有するドライフィルムレジスト16が残存するように、ドライフィルムレジスト16を露光および現像する。
At this time, by recognizing the alignment mark 7 with a detection device from the lower side, the dry film resist 16 remains so that the dry film resist 16 having a pattern remains at a position overlapping the through hole 6 when projected in the thickness direction. 16 is exposed and developed.
エッチングとしては、例えば、化学エッチングなどのウェットエッチングが挙げられる。なお、ウェットエッチングの場合、金属シート10の上部が下部と比較して、エッチングされ易いため、配線パターン3は、側断面視形状が下側に向かって広がるテーパ形状を有する。
Etching includes, for example, wet etching such as chemical etching. In the case of wet etching, the upper part of the metal sheet 10 is more easily etched than the lower part, so that the wiring pattern 3 has a tapered shape in which a side sectional view shape extends downward.
これにより、支持フィルム15、金属薄膜12、ベース絶縁層2および配線パターン3を順に備える第1被電着体17を得る。
Thereby, the first electrodeposit 17 having the support film 15, the metal thin film 12, the base insulating layer 2, and the wiring pattern 3 in order is obtained.
(電着工程)
電着工程では、図3Fおよび図5Fに示すように、電着によって、配線パターン3を、第2絶縁層の一例としてのカバー絶縁層4で被覆する。すなわち、電着塗装によって、配線パターン3の上面および側面に、電着塗装膜からなるカバー絶縁層4を形成する。 (Electrodeposition process)
In the electrodeposition step, as shown in FIGS. 3F and 5F, thewiring pattern 3 is covered with a cover insulating layer 4 as an example of a second insulating layer by electrodeposition. That is, the cover insulating layer 4 made of an electrodeposition coating film is formed on the upper surface and side surfaces of the wiring pattern 3 by electrodeposition coating.
電着工程では、図3Fおよび図5Fに示すように、電着によって、配線パターン3を、第2絶縁層の一例としてのカバー絶縁層4で被覆する。すなわち、電着塗装によって、配線パターン3の上面および側面に、電着塗装膜からなるカバー絶縁層4を形成する。 (Electrodeposition process)
In the electrodeposition step, as shown in FIGS. 3F and 5F, the
具体的には、第1被電着体17を電着塗料含有液体に浸漬し、続いて、第1被電着体17に電流を印加することによって、配線パターン3の表面に電着塗料を析出させ、続いて、析出した電着塗料を乾燥させる。これにより、電着塗料から形成される電着塗装膜(すなわち、カバー絶縁層4)が、配線パターン3の表面(上面および側面)に被覆される。
Specifically, the electrodeposition paint is applied to the surface of the wiring pattern 3 by immersing the first electrodeposition object 17 in the electrodeposition paint-containing liquid and subsequently applying an electric current to the first electrodeposition object 17. Next, the deposited electrodeposition paint is dried. Thereby, the electrodeposition coating film (that is, the cover insulating layer 4) formed from the electrodeposition paint is coated on the surface (upper surface and side surface) of the wiring pattern 3.
電着塗料(すなわち、カバー絶縁層4の絶縁性材料)としては、例えば、水中でイオン性を有する樹脂であって、公知または市販のものが挙げられ、例えば、アクリル系樹脂、エポキシ系樹脂、ポリイミド系樹脂、または、それらの混合などが挙げられる。
Examples of the electrodeposition paint (that is, the insulating material of the cover insulating layer 4) include resins that are ionic in water and known or commercially available, such as acrylic resins, epoxy resins, Examples thereof include a polyimide resin or a mixture thereof.
第1被電着体17に電流を印加するには、外部電源に接続するリード線(図示せず)を金属薄膜12に接続する。これにより、リード線および金属薄膜12を介して、第1露出面13から配線パターン3全体に直流電流が印加される。
In order to apply a current to the first electrodeposit 17, a lead wire (not shown) connected to an external power source is connected to the metal thin film 12. As a result, a direct current is applied from the first exposed surface 13 to the entire wiring pattern 3 via the lead wire and the metal thin film 12.
電着塗装としては、第1被電着体17(具体的には、配線パターン3)を陰極として採用するアニオン型電着塗装、第1被電着体17を陽極として採用するカチオン型電着塗装のいずれであってもよい。
As the electrodeposition coating, an anionic electrodeposition coating that employs the first electrodeposit 17 (specifically, the wiring pattern 3) as a cathode, and a cationic electrodeposition that employs the first electrodeposit 17 as an anode. Any of painting may be sufficient.
電着塗料の乾燥温度は、例えば、90℃以上、150℃以下であり、また、乾燥時間は、例えば、1分以上、30分以下である。
The drying temperature of the electrodeposition paint is, for example, 90 ° C. or more and 150 ° C. or less, and the drying time is, for example, 1 minute or more and 30 minutes or less.
これにより、配線パターン3の上面および側面に、カバー絶縁層4(電着塗装膜)が形成される。
Thereby, a cover insulating layer 4 (electrodeposition coating film) is formed on the upper surface and side surfaces of the wiring pattern 3.
なお、必要に応じて、電着前に、脱脂および酸洗により、配線パターン3の表面を洗浄する。また、必要に応じて、電着後に、焼き付けにより、電着塗料を加熱硬化する。焼き付け時の加熱温度としては、例えば、150℃以上、250℃以下であり、また、加熱時間は、例えば、10分以上、5時間以下である。
If necessary, the surface of the wiring pattern 3 is cleaned by degreasing and pickling before electrodeposition. If necessary, the electrodeposition paint is heat-cured by baking after electrodeposition. The heating temperature at the time of baking is, for example, 150 ° C. or more and 250 ° C. or less, and the heating time is, for example, 10 minutes or more and 5 hours or less.
(第1磁性層配置工程)
第1磁性層配置工程では、図4Gおよび図6Gに示すように、ベース絶縁層2およびカバー絶縁層4の上側に、磁性層の一例としての第1磁性層5を配置する。すなわち、カバー絶縁層4の上面および側面、ならびに、カバー絶縁層4から露出するベース絶縁層2の上面を被覆するように、これらの上側に、第1磁性層5を積層する。 (First magnetic layer arranging step)
In the first magnetic layer arranging step, as shown in FIGS. 4G and 6G, the firstmagnetic layer 5 as an example of the magnetic layer is arranged above the base insulating layer 2 and the cover insulating layer 4. That is, the first magnetic layer 5 is laminated on the upper surface and side surfaces of the insulating cover layer 4 and the upper surface of the insulating base layer 2 exposed from the insulating cover layer 4 so as to cover the upper surface and side surfaces thereof.
第1磁性層配置工程では、図4Gおよび図6Gに示すように、ベース絶縁層2およびカバー絶縁層4の上側に、磁性層の一例としての第1磁性層5を配置する。すなわち、カバー絶縁層4の上面および側面、ならびに、カバー絶縁層4から露出するベース絶縁層2の上面を被覆するように、これらの上側に、第1磁性層5を積層する。 (First magnetic layer arranging step)
In the first magnetic layer arranging step, as shown in FIGS. 4G and 6G, the first
第1磁性層5の材料は、例えば、特開2014-189015号公報などに開示される磁性組成物(好ましくは、軟磁性組成物)などが挙げられる。具体的には、第1磁性層5の材料は、磁性粒子(好ましくは、軟磁性粒子、例えば、Fe-Si-A1合金など)および樹脂(好ましくは、熱硬化性樹脂、例えば、エポキシ樹脂、フェノール樹脂など)を有する。
Examples of the material of the first magnetic layer 5 include a magnetic composition (preferably a soft magnetic composition) disclosed in Japanese Patent Application Laid-Open No. 2014-189015. Specifically, the material of the first magnetic layer 5 includes magnetic particles (preferably soft magnetic particles such as an Fe—Si—A1 alloy) and a resin (preferably a thermosetting resin such as an epoxy resin, Phenolic resin etc.).
第1磁性層5を配置するには、例えば、磁性組成物から形成される半硬化状態の磁性シートをベース絶縁層2およびカバー絶縁層4の上面に対して押圧し、その後または押圧と同時に、半硬化状態の磁性シートを加熱硬化させる。詳しくは、特開2014-189015号公報が参照される。
In order to dispose the first magnetic layer 5, for example, a semi-cured magnetic sheet formed from a magnetic composition is pressed against the upper surfaces of the base insulating layer 2 and the cover insulating layer 4, and thereafter or simultaneously with the pressing, The semi-cured magnetic sheet is cured by heating. For details, refer to Japanese Unexamined Patent Application Publication No. 2014-189015.
これにより、第1磁性層5が、ベース絶縁層2およびカバー絶縁層4の上面に、配置される。
Thereby, the first magnetic layer 5 is disposed on the upper surfaces of the base insulating layer 2 and the cover insulating layer 4.
(導体層除去工程)
導体層除去工程では、金属薄膜12(導体層)を除去する。 (Conductor layer removal process)
In the conductor layer removing step, the metal thin film 12 (conductor layer) is removed.
導体層除去工程では、金属薄膜12(導体層)を除去する。 (Conductor layer removal process)
In the conductor layer removing step, the metal thin film 12 (conductor layer) is removed.
まず、支持フィルム15を、図4Hおよび図6Hに示すように、剥離により、金属薄膜12から除去する。
First, the support film 15 is removed from the metal thin film 12 by peeling as shown in FIGS. 4H and 6H.
次いで、金属薄膜12を、図4Iおよび図6Iに示すように、エッチングまたは剥離により、ベース絶縁層2から除去する。好ましくは、エッチングにより金属薄膜12を除去する。エッチングとしては、上記したウェットエッチングなどが挙げられる。
Next, the metal thin film 12 is removed from the insulating base layer 2 by etching or peeling as shown in FIGS. 4I and 6I. Preferably, the metal thin film 12 is removed by etching. Examples of the etching include the above-described wet etching.
金属薄膜12をエッチングにより除去する場合、必要に応じて、図4Hおよび図6Hの仮想線が参照されるように、エッチング前に、第1磁性層5を保護するために、第1磁性層5の上面全面に保護シート(マスキングシートなど)46を配置し、エッチング後に、保護シート46を除去する。
In the case where the metal thin film 12 is removed by etching, the first magnetic layer 5 is protected before the etching so as to protect the first magnetic layer 5 as necessary, as indicated by the phantom lines in FIGS. 4H and 6H. A protective sheet (masking sheet or the like) 46 is disposed on the entire upper surface of the substrate, and the protective sheet 46 is removed after etching.
これにより、ベース絶縁層2の下面、第1露出面13および第2露出面14が露出される。
Thereby, the lower surface of the base insulating layer 2, the first exposed surface 13 and the second exposed surface 14 are exposed.
(第2磁性層配置工程)
第2磁性層配置工程では、図4Jおよび図6Jに示すように、ベース絶縁層2の下側に、第2磁性層18を配置する。すなわち、ベース絶縁層2の下面に、接着剤層19を介して、第2磁性層18を積層する。 (Second magnetic layer arranging step)
In the second magnetic layer arranging step, the secondmagnetic layer 18 is arranged below the base insulating layer 2 as shown in FIGS. 4J and 6J. That is, the second magnetic layer 18 is laminated on the lower surface of the base insulating layer 2 via the adhesive layer 19.
第2磁性層配置工程では、図4Jおよび図6Jに示すように、ベース絶縁層2の下側に、第2磁性層18を配置する。すなわち、ベース絶縁層2の下面に、接着剤層19を介して、第2磁性層18を積層する。 (Second magnetic layer arranging step)
In the second magnetic layer arranging step, the second
まず、接着剤層19を第2磁性層18の上面に配置して、接着剤層19と第2磁性層18との積層体を用意する。
First, the adhesive layer 19 is disposed on the upper surface of the second magnetic layer 18 to prepare a laminate of the adhesive layer 19 and the second magnetic layer 18.
第2磁性層18の材料は、第1磁性層5の材料と同一である。第2磁性層18は、第1磁性層5で例示した方法で作製することができる。
The material of the second magnetic layer 18 is the same as the material of the first magnetic layer 5. The second magnetic layer 18 can be produced by the method exemplified for the first magnetic layer 5.
接着剤層19の材料としては、公知または市販の接着剤組成物および粘着剤組成物が挙げられ、例えば、アクリル系組成物、エポキシ系組成物、ゴム系組成物、シリコーン系組成物などが挙げられる。
Examples of the material for the adhesive layer 19 include known or commercially available adhesive compositions and pressure-sensitive adhesive compositions, such as acrylic compositions, epoxy compositions, rubber compositions, and silicone compositions. It is done.
接着剤層19の配置としては、接着剤組成物を第2磁性層18に塗布する方法、粘着テープを第2磁性層18に押圧する方法などが挙げられる。
Examples of the arrangement of the adhesive layer 19 include a method of applying an adhesive composition to the second magnetic layer 18 and a method of pressing an adhesive tape against the second magnetic layer 18.
次いで、接着剤層19と第2磁性層18との積層体を、接着剤層19およびベース絶縁層2が接触するように、ベース絶縁層2の下面に配置する。この際、接着剤層19は、貫通穴6およびマーク用穴11の内部が接着剤層19で充填されるように、ベース絶縁層2の下面に配置する。
Next, a laminate of the adhesive layer 19 and the second magnetic layer 18 is disposed on the lower surface of the base insulating layer 2 so that the adhesive layer 19 and the base insulating layer 2 are in contact with each other. At this time, the adhesive layer 19 is disposed on the lower surface of the base insulating layer 2 so that the insides of the through holes 6 and the mark holes 11 are filled with the adhesive layer 19.
なお、第2磁性層配置工程では、接着剤層19の穴への充填性が良好な観点から、ベース絶縁層2の下面に接着剤層19を塗布などにより配置し、次いで、第2磁性層18を接着剤層19の下面に配置することもできる。一方、生産性の観点からは、上記のように、接着剤層19と第2磁性層18との積層体を用意し、ベース絶縁層2の下面に配置する。
In the second magnetic layer arranging step, the adhesive layer 19 is arranged on the lower surface of the base insulating layer 2 by coating or the like from the viewpoint of good filling of the adhesive layer 19 into the holes, and then the second magnetic layer 18 can also be placed on the underside of the adhesive layer 19. On the other hand, from the viewpoint of productivity, as described above, a laminated body of the adhesive layer 19 and the second magnetic layer 18 is prepared and disposed on the lower surface of the base insulating layer 2.
これにより、インダクタ1が得られる。
Thereby, the inductor 1 is obtained.
(インダクタ)
インダクタ1は、図1に示すように、前後方向および左右方向に延びる略矩形シート形状を有する。インダクタ1は、図2A~Bに示すように、第2磁性層18と、接着剤層19と、ベース絶縁層2と、配線パターン3と、カバー絶縁層4と、第1磁性層5とを厚み方向にこの順で備える。 (Inductor)
As shown in FIG. 1, theinductor 1 has a substantially rectangular sheet shape extending in the front-rear direction and the left-right direction. As shown in FIGS. 2A and 2B, the inductor 1 includes a second magnetic layer 18, an adhesive layer 19, a base insulating layer 2, a wiring pattern 3, a cover insulating layer 4, and a first magnetic layer 5. Provide in this order in the thickness direction.
インダクタ1は、図1に示すように、前後方向および左右方向に延びる略矩形シート形状を有する。インダクタ1は、図2A~Bに示すように、第2磁性層18と、接着剤層19と、ベース絶縁層2と、配線パターン3と、カバー絶縁層4と、第1磁性層5とを厚み方向にこの順で備える。 (Inductor)
As shown in FIG. 1, the
第2磁性層18は、インダクタ1に高いインダクタンスを付与する層である。第2磁性層18は、インダクタ1における最下層である。第2磁性層18は、平面視においてベース絶縁層2と略同一形状を有し、前後方向および左右方向に延びるシート形状を有する。
The second magnetic layer 18 is a layer that imparts high inductance to the inductor 1. The second magnetic layer 18 is the lowest layer in the inductor 1. The second magnetic layer 18 has substantially the same shape as the base insulating layer 2 in plan view, and has a sheet shape extending in the front-rear direction and the left-right direction.
第2磁性層18の厚みは、例えば、10μm以上、好ましくは、50μm以上であり、また、例えば、500μm以下、好ましくは、300μm以下である。
The thickness of the second magnetic layer 18 is, for example, 10 μm or more, preferably 50 μm or more, and for example, 500 μm or less, preferably 300 μm or less.
接着剤層19は、第2磁性層18とベース絶縁層2とを接着する層である。接着剤層19は、第2磁性層18の上面に配置されている。具体的には、接着剤層19は、第2磁性層18とベース絶縁層2との間に、第2磁性層18の上面およびベース絶縁層2の下面に接触するように、配置されている。
The adhesive layer 19 is a layer that bonds the second magnetic layer 18 and the base insulating layer 2 together. The adhesive layer 19 is disposed on the upper surface of the second magnetic layer 18. Specifically, the adhesive layer 19 is disposed between the second magnetic layer 18 and the base insulating layer 2 so as to be in contact with the upper surface of the second magnetic layer 18 and the lower surface of the base insulating layer 2. .
接着剤層19は、ベース絶縁層2における貫通穴6およびマーク用穴11の内部に充填されている。すなわち、接着剤層19の上面は、配線パターン3の第1露出面13および第1磁性層5の第2露出面14に接触している。
The adhesive layer 19 is filled inside the through hole 6 and the mark hole 11 in the base insulating layer 2. That is, the upper surface of the adhesive layer 19 is in contact with the first exposed surface 13 of the wiring pattern 3 and the second exposed surface 14 of the first magnetic layer 5.
接着剤層19の厚み(最大厚み)は、例えば、0.5μm以上、好ましくは、1μm以上であり、また、例えば、10μm以下、好ましくは、5μm以下である。
The thickness (maximum thickness) of the adhesive layer 19 is, for example, 0.5 μm or more, preferably 1 μm or more, and for example, 10 μm or less, preferably 5 μm or less.
ベース絶縁層2は、配線パターン3を支持する層である。ベース絶縁層2は、接着剤層19の上面に配置されている。ベース絶縁層2の上面には、配線パターン3、カバー絶縁層4および第1磁性層5が配置されている。ベース絶縁層2は、インダクタ1と同一の外形形状であるシート形状を有する。ベース絶縁層2は、貫通穴6およびアライメントマーク7を備える。
The base insulating layer 2 is a layer that supports the wiring pattern 3. The base insulating layer 2 is disposed on the upper surface of the adhesive layer 19. A wiring pattern 3, a cover insulating layer 4, and a first magnetic layer 5 are disposed on the upper surface of the base insulating layer 2. The base insulating layer 2 has a sheet shape that is the same outer shape as the inductor 1. The base insulating layer 2 includes a through hole 6 and an alignment mark 7.
ベース絶縁層2の厚みは、例えば、0.1μm以上、好ましくは、0.5μm以上、より好ましくは、1μm以上であり、また、例えば、15μm以下、好ましくは、10μm以下、より好ましくは、5μm以下である。ベース絶縁層2の厚みが上記範囲であれば、インダクタンスの機械的強度を保ちつつ、インダクタ1の薄膜化を図ることができる。
The insulating base layer 2 has a thickness of, for example, 0.1 μm or more, preferably 0.5 μm or more, more preferably 1 μm or more, and for example, 15 μm or less, preferably 10 μm or less, more preferably 5 μm. It is as follows. If the thickness of the base insulating layer 2 is in the above range, the inductor 1 can be made thin while maintaining the mechanical strength of the inductance.
配線パターン3は、ベース絶縁層2の上面に配置されている。配線パターン3は、平面視略矩形状のループ形状を有する。
The wiring pattern 3 is disposed on the upper surface of the base insulating layer 2. The wiring pattern 3 has a substantially rectangular loop shape in plan view.
配線パターン3は、前後方向に延びる複数(2つ)の配線部21と、複数の配線部21の前端を接続する接続配線部22と、2つの配線部21の後端に配置される複数(2つ)の端子部23とを一体的に備える。
The wiring pattern 3 includes a plurality (two) of wiring portions 21 extending in the front-rear direction, a connection wiring portion 22 that connects the front ends of the plurality of wiring portions 21, and a plurality ( Two) terminal portions 23 are integrally provided.
複数の配線部21は、左右方向(所定方向の一例)に互いに間隔を隔てて配置される第1配線部21aおよび第2配線部21bを備える。複数の配線部21は、それぞれ、平面視において、前後方向に延びる略矩形状を有し、側断面視において、下側に向かって広がるテーパ形状を有する略台形形状を有する。
The plurality of wiring sections 21 include a first wiring section 21a and a second wiring section 21b that are arranged at intervals in the left-right direction (an example of a predetermined direction). Each of the plurality of wiring portions 21 has a substantially rectangular shape that extends in the front-rear direction in a plan view, and a substantially trapezoidal shape that has a tapered shape that extends downward in a side sectional view.
配線パターン3、特に、第1配線部21aおよび第2配線部21bは、共通する1枚のベース絶縁層2の上面に配置されている。すなわち、第1配線部21aを支持するベース絶縁層2と、第2配線部21bを支持するベース絶縁層2とは、互いに連続する。
The wiring pattern 3, in particular, the first wiring part 21 a and the second wiring part 21 b are arranged on the upper surface of the common base insulating layer 2. That is, the base insulating layer 2 that supports the first wiring portion 21a and the base insulating layer 2 that supports the second wiring portion 21b are continuous with each other.
接続配線部22は、第1配線部21aおよび第2配線部21bの前側に配置され、これらの前端を互いに接続する。すなわち、接続配線部22の左端部の後端縁は、第1配線部21aの前端縁と連続し、接続配線部22の右端部の前端縁は、第2配線部21bの前端縁と連続する。接続配線部22は、平面視において、左右方向に延びる略矩形状を有し、側断面視において、下側に向かって広がるテーパ形状を有する略台形形状を有する。
The connection wiring part 22 is disposed on the front side of the first wiring part 21a and the second wiring part 21b, and connects the front ends thereof to each other. That is, the rear end edge of the left end portion of the connection wiring portion 22 is continuous with the front end edge of the first wiring portion 21a, and the front end edge of the right end portion of the connection wiring portion 22 is continuous with the front end edge of the second wiring portion 21b. . The connection wiring portion 22 has a substantially rectangular shape extending in the left-right direction in a plan view, and has a substantially trapezoidal shape having a tapered shape that expands downward in a side sectional view.
複数(2つ)の端子部23は、第1配線部21aの後端および第2配線部21bの後端に、これらと連続するように配置されている。複数の端子部23の左右方向長さ(幅)は、配線部21の左右方向長さ(幅)よりも短い。端子部23は、平面視において、略矩形状を有し、側断面視において、下側に向かって広がるテーパ形状を有する略台形形状を有する。
The plurality (two) of terminal portions 23 are arranged at the rear end of the first wiring portion 21a and the rear end of the second wiring portion 21b so as to be continuous therewith. The length (width) in the left-right direction of the plurality of terminal portions 23 is shorter than the length (width) in the left-right direction of the wiring portion 21. The terminal part 23 has a substantially rectangular shape in plan view, and has a substantially trapezoidal shape having a tapered shape that expands downward in a side sectional view.
配線部21の幅(左右方向長さ)および接続配線部22の幅(前後方向長さ)は、それぞれ、例えば、25μm以上、好ましくは、100μm以上であり、また、例えば、2000μm以下、好ましくは、750μm以下である。
The width (length in the left-right direction) of the wiring part 21 and the width (length in the front-rear direction) of the connection wiring part 22 are, for example, 25 μm or more, preferably 100 μm or more, and for example, 2000 μm or less, preferably 750 μm or less.
配線パターン3の厚みは、上記した金属シート10の厚みと同一である。
The thickness of the wiring pattern 3 is the same as the thickness of the metal sheet 10 described above.
配線パターン3の材料は、金属シート10の材料と同一であり、好ましくは、銅が挙げられる。配線パターン3が銅から形成される銅配線であれば、銅が良好な導電性およびパターニング性を備えるため、良好な導電性および微細なパターニングを備えるインダクタ1を容易に製造することができる。
The material of the wiring pattern 3 is the same as the material of the metal sheet 10, and preferably copper. If the wiring pattern 3 is a copper wiring formed of copper, since copper has good conductivity and patterning properties, the inductor 1 having good conductivity and fine patterning can be easily manufactured.
カバー絶縁層4は、配線パターン3を保護する絶縁層である。カバー絶縁層4は、配線パターン3の上面全面および側面全面を被覆するように、ベース絶縁層2の上に配置されている。
The insulating cover layer 4 is an insulating layer that protects the wiring pattern 3. The insulating cover layer 4 is disposed on the insulating base layer 2 so as to cover the entire upper surface and side surfaces of the wiring pattern 3.
カバー絶縁層4は、第1配線部21aを被覆する第1カバー絶縁部4aと、第2配線部21bを被覆する第2カバー絶縁部4bと、接続配線部22を被覆する第3カバー絶縁部4cと、複数(2つ)の端子部23を被覆する複数(2つ)の第4カバー絶縁部4dとを一体的に備える。
The cover insulating layer 4 includes a first cover insulating portion 4a that covers the first wiring portion 21a, a second cover insulating portion 4b that covers the second wiring portion 21b, and a third cover insulating portion that covers the connection wiring portion 22. 4c and a plurality (two) of fourth cover insulating portions 4d that cover the plurality (two) of terminal portions 23 are integrally provided.
カバー絶縁層4において、左側の第4カバー絶縁部4d、第1カバー絶縁部4a、第3カバー絶縁部4c、第2カバー絶縁部4bおよび右側の第4カバー絶縁部4dは、この順に、左右方向または前後方向に連続する。
In the cover insulating layer 4, the left fourth cover insulating portion 4d, the first cover insulating portion 4a, the third cover insulating portion 4c, the second cover insulating portion 4b, and the right fourth cover insulating portion 4d are arranged in this order. Continuous in the direction or front-rear direction.
また、図2Aの断面視に示すように、カバー絶縁層4において、第1カバー絶縁部4aおよび第2カバー絶縁部4bは、直接的に互いに連続しない。すなわち、左右方向において互いに隣接する複数の配線部21(第1配線部21aおよび第2配線部21b)の間24を連続するようには、カバー絶縁層4は、形成していない。より具体的には、複数の配線部間24において、実質的に、カバー絶縁層4が存在しない(ただし、配線部21の側面を被覆するカバー絶縁層4(4a、4b)は除く)。
Further, as shown in the cross-sectional view of FIG. 2A, in the cover insulating layer 4, the first cover insulating portion 4a and the second cover insulating portion 4b are not directly connected to each other. That is, the insulating cover layer 4 is not formed so as to continue between the plurality of wiring portions 21 (the first wiring portion 21a and the second wiring portion 21b) adjacent to each other in the left-right direction. More specifically, the insulating cover layer 4 is not substantially present between the plurality of wiring portions 24 (however, the insulating cover layer 4 (4a, 4b) covering the side surface of the wiring portion 21 is excluded).
カバー絶縁層4の厚みは、例えば、0.5μm以上、好ましくは、1μm以上であり、また、例えば、10μm以下、好ましくは、7μm以下である。これにより、配線パターン3と第1磁性層5とが接触しながら、配線パターン3と第1磁性層5との距離を近接させることができる。したがって、インダクタ1のインダクタンスをより一層向上させることができる。
The thickness of the insulating cover layer 4 is, for example, 0.5 μm or more, preferably 1 μm or more, and for example, 10 μm or less, preferably 7 μm or less. Thereby, the distance between the wiring pattern 3 and the first magnetic layer 5 can be made closer while the wiring pattern 3 and the first magnetic layer 5 are in contact with each other. Therefore, the inductance of the inductor 1 can be further improved.
第1磁性層5は、インダクタ1に高いインダクタンスを付与する層である。第1磁性層5は、平面視においてベース絶縁層2と略同一形状を有し、前後方向および左右方向に延びるシート形状を有する。
The first magnetic layer 5 is a layer that imparts high inductance to the inductor 1. The first magnetic layer 5 has substantially the same shape as the base insulating layer 2 in plan view, and has a sheet shape extending in the front-rear direction and the left-right direction.
第1磁性層5は、インダクタ1における最上層である。第1磁性層5は、ベース絶縁層2およびカバー絶縁層4の上に配置されている。具体的には、第1磁性層5は、カバー絶縁層4の上面および側面を被覆するように、ベース絶縁層2の上面に配置されている。
The first magnetic layer 5 is the uppermost layer in the inductor 1. The first magnetic layer 5 is disposed on the base insulating layer 2 and the cover insulating layer 4. Specifically, the first magnetic layer 5 is disposed on the upper surface of the base insulating layer 2 so as to cover the upper surface and side surfaces of the insulating cover layer 4.
第1磁性層5は、配線部間24において、配線部21の上下方向全体にわたって、存在する。すなわち、配線部間24において、第1磁性層5は、ベース絶縁層2の上面から、配線部21よりも高い位置まで、存在する。また、第1磁性層5は、実質的に、配線部間24の全部を充填する。具体的には、配線部21(第1配線部21a、第2配線部21b)とそれを被覆するカバー絶縁層4(第1カバー絶縁部4a、第2カバー絶縁部4b)とから構成される部材をカバー配線部とした際に、互いに隣接するカバー配線部の間には、側断面視において、第1磁性層5のみが存在する。
The first magnetic layer 5 exists over the entire vertical direction of the wiring portion 21 between the wiring portions 24. In other words, the first magnetic layer 5 exists from the upper surface of the base insulating layer 2 to a position higher than the wiring portion 21 in the wiring portion 24. Further, the first magnetic layer 5 substantially fills the entire wiring portion 24. Specifically, the wiring portion 21 (the first wiring portion 21a and the second wiring portion 21b) and the cover insulating layer 4 (the first cover insulating portion 4a and the second cover insulating portion 4b) covering the wiring portion 21 are configured. When the member is a cover wiring part, only the first magnetic layer 5 exists between the cover wiring parts adjacent to each other in a side sectional view.
第1磁性層5の厚みは、例えば、10μm以上、好ましくは、50μm以上であり、また、例えば、500μm以下、好ましくは、300μm以下である。
The thickness of the first magnetic layer 5 is, for example, 10 μm or more, preferably 50 μm or more, and, for example, 500 μm or less, preferably 300 μm or less.
インダクタ1は、後述する電子機器ではなく、電子機器の一部品、すなわち、電子機器を作製するための部品であり、電子素子(チップ、キャパシタなど)や、電子素子を実装する実装基板を含まず、部品単独で流通し、産業上利用可能なデバイスである。
The inductor 1 is not an electronic device to be described later, but is a component of the electronic device, that is, a component for manufacturing the electronic device, and does not include an electronic element (chip, capacitor, etc.) or a mounting substrate on which the electronic element is mounted. It is a device that can be distributed industrially and used by industry.
このインダクタ1は、例えば、電子機器などに搭載される(組み込まれる)。図示しないが、電子機器は、実装基板と、実装基板に実装される電子素子(チップ、キャパシタなど)とを備える。そして、電子機器において、インダクタ1は、実装基板に実装される。
The inductor 1 is mounted (embedded) in an electronic device, for example. Although not shown, the electronic device includes a mounting substrate and electronic elements (chip, capacitor, etc.) mounted on the mounting substrate. In the electronic device, the inductor 1 is mounted on a mounting board.
具体的には、図7に示すように、端子部23が露出するように、第1磁性層5およびカバー絶縁層4を厚み方向に貫通する複数のビア25(貫通穴)を形成し、ビア25の内周面に絶縁処理を実施する。次いで、ビア25内部に、導電性の接続部材26を、接続部材26の一端が端子部23の上面と接触するように、配置する。インダクタ1は、接続部材26を介して実装基板に実装され、他の電子機器と電気的に接続され、受動素子として作用する。
Specifically, as shown in FIG. 7, a plurality of vias 25 (through holes) penetrating the first magnetic layer 5 and the cover insulating layer 4 in the thickness direction are formed so that the terminal portions 23 are exposed. An insulation treatment is performed on the inner peripheral surface of 25. Next, the conductive connection member 26 is disposed inside the via 25 so that one end of the connection member 26 is in contact with the upper surface of the terminal portion 23. The inductor 1 is mounted on the mounting substrate via the connection member 26, is electrically connected to other electronic devices, and functions as a passive element.
そして、このインダクタ1の製造方法では、ベース絶縁層2の上側に、配線パターン3を形成する配線形成工程と、電着によって、配線パターン3をカバー絶縁層4で被覆する電着工程と、ベース絶縁層2およびカバー絶縁層4の上側に、第1磁性層5を配置する第1磁性層配置工程とを備える。
In the method for manufacturing the inductor 1, a wiring forming process for forming the wiring pattern 3 on the upper side of the insulating base layer 2, an electrodeposition process for covering the wiring pattern 3 with the insulating cover layer 4 by electrodeposition, a base A first magnetic layer disposing step of disposing the first magnetic layer 5 on the insulating layer 2 and the cover insulating layer 4;
このため、配線パターン3が第1磁性層5に直接接触することを抑制することができる。したがって、配線パターン3の短絡を抑制することができる。
For this reason, it is possible to suppress the wiring pattern 3 from coming into direct contact with the first magnetic layer 5. Therefore, a short circuit of the wiring pattern 3 can be suppressed.
また、このインダクタ1の製造方法では、カバー絶縁層4を、配線パターン3を構成する複数の配線部21(第1配線部21a、第2配線部21b)のそれぞれが互いに隣接する配線部間24に連続しないように、配線パターン3に被覆することができる。そのため、配線パターン3の間24(すなわち、隣接する配線部21の間)において、厚み方向全体にわたって、第1磁性層5を配置することができる。したがって、インダクタ1のインダクタンスを向上させることができる。
Further, in the method for manufacturing the inductor 1, the cover insulating layer 4 is formed between the wiring portions 24 in which the plurality of wiring portions 21 (first wiring portion 21 a and second wiring portion 21 b) constituting the wiring pattern 3 are adjacent to each other. The wiring pattern 3 can be covered so as not to be continuous. Therefore, the first magnetic layer 5 can be disposed across the entire thickness direction between the wiring patterns 3 (that is, between the adjacent wiring portions 21). Therefore, the inductance of the inductor 1 can be improved.
また、このインダクタ1の製造方法では、配線パターン3の表面に対してカバー絶縁層4を薄く均一に確実に被覆することができる。そのため、第1磁性層5と配線パターン3との距離を近接させることができる。したがって、インダクタ1のインダクタンスを向上させることができる。
Further, in the method for manufacturing the inductor 1, the cover insulating layer 4 can be covered thinly and uniformly on the surface of the wiring pattern 3. Therefore, the distance between the first magnetic layer 5 and the wiring pattern 3 can be made closer. Therefore, the inductance of the inductor 1 can be improved.
また、このインダクタ1の製造方法では、配線形成工程において、サブトラクティブ法によって、配線パターン3を形成する。
Further, in the method for manufacturing the inductor 1, the wiring pattern 3 is formed by a subtractive method in the wiring forming process.
このため、アディティブ法と比較して、短時間で、配線パターン3を形成でき、ひいては、インダクタ1を製造することができる。また、配線厚みが厚いインダクタ1を容易に製造することができ、大電流を流すことができる。
Therefore, compared to the additive method, the wiring pattern 3 can be formed in a short time, and thus the inductor 1 can be manufactured. Further, the inductor 1 having a large wiring thickness can be easily manufactured, and a large current can flow.
また、このインダクタ1の製造方法では、電着工程が、厚み方向に投影したときに配線パターン3と重なるベース絶縁層2の貫通穴6を介して、配線パターン3に給電する(図3F参照)。
Further, in the method for manufacturing the inductor 1, the electrodeposition process supplies power to the wiring pattern 3 through the through hole 6 of the base insulating layer 2 that overlaps the wiring pattern 3 when projected in the thickness direction (see FIG. 3F). .
このため、配線パターン3の上面および側面の全面をカバー絶縁層4で被覆することができる。すなわち、配線パターン3の上面および側面が、完全にカバー絶縁層4で被覆される。
Therefore, the entire upper surface and side surfaces of the wiring pattern 3 can be covered with the insulating cover layer 4. That is, the upper surface and side surfaces of the wiring pattern 3 are completely covered with the insulating cover layer 4.
特に、後述する第2実施形態のインダクタ1の製造方法では、インダクタ1は、僅かではあるが磁性層と配線パターン3とが接触する露出側面48(後述)を有してしまい、これらを完全な形で絶縁することは困難である。一方、この第1実施形態のインダクタ1では、磁性層と配線パターン3との接触を完全に抑制することができる。その結果、配線パターン3が第1磁性層5に接触することをより確実に抑制することができる。
In particular, in the method of manufacturing the inductor 1 according to the second embodiment to be described later, the inductor 1 has an exposed side surface 48 (described later) where the magnetic layer and the wiring pattern 3 are in contact with each other. Insulating in a form is difficult. On the other hand, in the inductor 1 of the first embodiment, the contact between the magnetic layer and the wiring pattern 3 can be completely suppressed. As a result, the wiring pattern 3 can be more reliably suppressed from coming into contact with the first magnetic layer 5.
また、このインダクタ1の製造方法では、ベース絶縁層2が、アライメントマーク7を備える。
Further, in the method for manufacturing the inductor 1, the base insulating layer 2 includes the alignment mark 7.
このため、アライメントマーク7を目印にして、貫通穴6の上側に、配線パターン3を正確に形成することができる。したがって、貫通穴6からの給電によって、より一層確実に、配線パターン3にカバー絶縁層4を被覆することができる。
Therefore, the wiring pattern 3 can be accurately formed above the through hole 6 with the alignment mark 7 as a mark. Therefore, the cover insulating layer 4 can be more reliably covered with the wiring pattern 3 by the power supply from the through hole 6.
また、この製造方法によって得られるインダクタ1は、ベース絶縁層2と、ベース絶縁層2の上側において、左右方向において互いに間隔を隔てて配置される複数の配線部21と、複数の配線部21のそれぞれを左右方向において互いに隣接する配線部間24に連続しないように被覆するカバー絶縁層4と、ベース絶縁層2およびカバー絶縁層4の上側において、ベース絶縁層2の上面を被覆するように配置される第1磁性層5とを備える。
In addition, the inductor 1 obtained by this manufacturing method includes a base insulating layer 2, a plurality of wiring portions 21 that are spaced apart from each other in the left-right direction above the base insulating layer 2, and a plurality of wiring portions 21. The cover insulating layer 4 that covers each of the wiring portions adjacent to each other in the left-right direction so as not to be continuous, and the upper surface of the base insulating layer 2 and the cover insulating layer 4 are disposed so as to cover the upper surface of the base insulating layer 2. The first magnetic layer 5 is provided.
このため、配線部21が第1磁性層5と接触することを抑制することができ、配線部21同士の短絡を抑制することができる。また、第1磁性層5は、配線部間24において、厚み方向全体にわたって配置されているので、インダクタ1のインダクタンスを良好にすることができる。
For this reason, it can suppress that the wiring part 21 contacts the 1st magnetic layer 5, and can suppress the short circuit between wiring parts 21. FIG. Moreover, since the 1st magnetic layer 5 is arrange | positioned over the whole thickness direction in 24 between wiring parts, the inductance of the inductor 1 can be made favorable.
また、このインダクタ1では、複数の配線部21は、共通するベース絶縁層2の上側に配置され、カバー絶縁層4は、複数の配線部21の上面および側面を被覆する。
Further, in this inductor 1, the plurality of wiring parts 21 are arranged above the common base insulating layer 2, and the cover insulating layer 4 covers the upper surfaces and side surfaces of the plurality of wiring parts 21.
このため、複数の配線部21は、互いに、厚み方向の位置精度が良好であり、かつ、ベース絶縁層2に確実に支持されている。
For this reason, the plurality of wiring portions 21 have good positional accuracy in the thickness direction and are reliably supported by the base insulating layer 2.
(変形例)
以下の各変形例において、上記した一実施形態と同様の部材および工程については、同一の参照符号を付し、その詳細な説明を省略する。また、各変形例を適宜組み合わせることができる。さらに、各変形例は、特記する以外、一実施形態と同様の作用効果を奏することができる。 (Modification)
In the following modifications, members and processes similar to those in the above-described embodiment are denoted by the same reference numerals, and detailed description thereof is omitted. Moreover, each modification can be combined suitably. Furthermore, each modification can produce the same effects as those of the embodiment, unless otherwise specified.
以下の各変形例において、上記した一実施形態と同様の部材および工程については、同一の参照符号を付し、その詳細な説明を省略する。また、各変形例を適宜組み合わせることができる。さらに、各変形例は、特記する以外、一実施形態と同様の作用効果を奏することができる。 (Modification)
In the following modifications, members and processes similar to those in the above-described embodiment are denoted by the same reference numerals, and detailed description thereof is omitted. Moreover, each modification can be combined suitably. Furthermore, each modification can produce the same effects as those of the embodiment, unless otherwise specified.
第1変形例
図8Aに示すように、ベース絶縁層配置工程の前に、金属シート10の下面に第1拡散防止層30を配置する工程を実施することもできる。すなわち、金属シート10の下面およびベース絶縁層2の上面に、第1拡散防止層30を配置することもできる。 First Modified Example As shown in FIG. 8A, a step of arranging the firstdiffusion prevention layer 30 on the lower surface of the metal sheet 10 can be performed before the base insulating layer arranging step. That is, the first diffusion prevention layer 30 can be disposed on the lower surface of the metal sheet 10 and the upper surface of the base insulating layer 2.
図8Aに示すように、ベース絶縁層配置工程の前に、金属シート10の下面に第1拡散防止層30を配置する工程を実施することもできる。すなわち、金属シート10の下面およびベース絶縁層2の上面に、第1拡散防止層30を配置することもできる。 First Modified Example As shown in FIG. 8A, a step of arranging the first
第1拡散防止層30の材料としては、例えば、ニッケル、ニクロム、コバルト、タンタルなどの導体が挙げられる。形成時にめっきの実施および除去時にソフトエッチングの実施を可能として、加工性が良好である観点からは、好ましくは、ニッケルが挙げられる。
Examples of the material of the first diffusion preventing layer 30 include conductors such as nickel, nichrome, cobalt, and tantalum. From the viewpoint of enabling easy execution of plating during formation and soft etching during removal, and good workability, nickel is preferably used.
図8Aに示すように第1拡散防止層30を配置してインダクタ1を製造すると、図8Bに示すように、インダクタ1における配線パターン3は、第1拡散防止層30から形成される配線下部31と、その上面に配置され、金属シート10から形成される配線主部32とを備える。
When the first diffusion prevention layer 30 is disposed as shown in FIG. 8A and the inductor 1 is manufactured, as shown in FIG. 8B, the wiring pattern 3 in the inductor 1 has a lower wiring portion 31 formed from the first diffusion prevention layer 30. And a wiring main part 32 formed on the upper surface and formed from the metal sheet 10.
なお、この図8Aに示す製造方法では、配線形成工程において、各エッチング速度の違いから、金属シート10をエッチングする工程に加えて、第1拡散防止層30をエッチングする工程を実施する。
Note that, in the manufacturing method shown in FIG. 8A, in the wiring forming step, the step of etching the first diffusion prevention layer 30 is performed in addition to the step of etching the metal sheet 10 due to the difference in the etching rates.
この図8Aに示す製造方法では、金属シート10の金属成分(例えば、銅イオン)が、ベース絶縁層2を侵食して、ベース絶縁層2内部に拡散することを抑制することができるため、金属シート10とベース絶縁層2との剥離強度を向上させることができる。
In the manufacturing method shown in FIG. 8A, the metal component (for example, copper ions) of the metal sheet 10 can be prevented from eroding the base insulating layer 2 and diffusing into the base insulating layer 2. The peel strength between the sheet 10 and the base insulating layer 2 can be improved.
第2変形例
図9Aに示すように、配線形成工程において、サブトラクティブ法の実施後に、金属シート10から形成される配線パターン3に、第2拡散防止層33を配置する工程を実施することもできる。 Second Modification As shown in FIG. 9A, in the wiring formation process, after the subtractive method, a process of disposing the seconddiffusion prevention layer 33 on the wiring pattern 3 formed from the metal sheet 10 may be performed. it can.
図9Aに示すように、配線形成工程において、サブトラクティブ法の実施後に、金属シート10から形成される配線パターン3に、第2拡散防止層33を配置する工程を実施することもできる。 Second Modification As shown in FIG. 9A, in the wiring formation process, after the subtractive method, a process of disposing the second
第2拡散防止層33の材料としては、例えば、ニッケルなどの導体が挙げられる。
Examples of the material of the second diffusion preventing layer 33 include a conductor such as nickel.
第2拡散防止層33を配置するには、例えば、ニッケル浴を用いためっき処理などが挙げられる。
In order to arrange the second diffusion preventing layer 33, for example, a plating treatment using a nickel bath may be used.
図9Aに示すように第2拡散防止層33を配置してインダクタ1を製造すると、図9Bに示すように、インダクタ1における配線パターン3は、金属シート10から形成される配線主部32と、その上面および側面を被覆する第2拡散防止層33とを備える。
When the second diffusion prevention layer 33 is disposed as shown in FIG. 9A and the inductor 1 is manufactured, as shown in FIG. 9B, the wiring pattern 3 in the inductor 1 includes a wiring main portion 32 formed from the metal sheet 10, and And a second diffusion preventing layer 33 covering the upper surface and side surfaces thereof.
この図9Bに示す製造方法では、配線主部32からの金属成分(例えば、銅イオン)が、カバー絶縁層4および第1磁性層5に侵食することによって生じる短絡を抑制することができる。
In the manufacturing method shown in FIG. 9B, a short circuit caused by the metal component (for example, copper ions) from the wiring main part 32 eroding the cover insulating layer 4 and the first magnetic layer 5 can be suppressed.
また、第1変形例および第2変形例を組み合わせてもよい。
Further, the first modification and the second modification may be combined.
第3変形例
配線パターン3の形状は、上記に限定されない。配線パターン3は、例えば、図10Aおよび図10Bに示すように、前後方向および左右方向に向かって進むミアンダ形状(蛇行形状)を有していてもよい。 Third Modification The shape of thewiring pattern 3 is not limited to the above. For example, as shown in FIGS. 10A and 10B, the wiring pattern 3 may have a meander shape (meandering shape) that advances in the front-rear direction and the left-right direction.
配線パターン3の形状は、上記に限定されない。配線パターン3は、例えば、図10Aおよび図10Bに示すように、前後方向および左右方向に向かって進むミアンダ形状(蛇行形状)を有していてもよい。 Third Modification The shape of the
例えば、図10Aに示す配線パターン3では、左右方向に延びる複数(5つ)の配線部21と、複数の配線部21の左端部同士または右端部同士を連結する複数(4つ)の接続配線部22と、配線パターン3の両端部に配置される複数の端子部23とを備える。
For example, in the wiring pattern 3 shown in FIG. 10A, a plurality (five) of wiring portions 21 extending in the left-right direction and a plurality of (four) connection wirings connecting the left ends or the right ends of the plurality of wiring portions 21 are connected. Part 22 and a plurality of terminal parts 23 arranged at both ends of wiring pattern 3.
例えば、図10Bに示す配線パターン3では、前後方向に延びる複数(3つ)の配線部21と、複数の配線部21の前端部同士または後端部同士を連結する複数(2つ)の接続配線部22と、配線パターン3の両端部に配置される複数の端子部23とを備える。
For example, in the wiring pattern 3 shown in FIG. 10B, a plurality (three) of wiring portions 21 extending in the front-rear direction and a plurality (two) of connections connecting the front end portions or the rear end portions of the plurality of wiring portions 21. The wiring part 22 and a plurality of terminal parts 23 disposed at both ends of the wiring pattern 3 are provided.
また、配線パターン3は、例えば、図10Cに示すように、平面視略円形状のループ形状を有していてもよい。図10Cに示す配線パターン3では、所定方向に隣り合う配線部21において、所定方向および配線部21の長さは、任意の方向(例えば、左右方向、交差方向)および任意の長さを採用することができる。例えば、図10Cでは、所定方向として交差方向(前後方向および左右方向の両方と交差する方向:斜め方向)を採用した場合において、交差方向において互いに隣り合う複数(2つ)の配線部21をハッチングで示す。
Further, the wiring pattern 3 may have a substantially circular loop shape in a plan view as shown in FIG. 10C, for example. In the wiring pattern 3 shown in FIG. 10C, in the wiring portions 21 adjacent to each other in a predetermined direction, the predetermined direction and the length of the wiring portion 21 adopt an arbitrary direction (for example, left and right direction, crossing direction) and an arbitrary length. be able to. For example, in FIG. 10C, when a crossing direction (a direction crossing both the front-rear direction and the left-right direction: oblique direction) is adopted as the predetermined direction, a plurality of (two) wiring portions 21 adjacent to each other in the crossing direction are hatched. It shows with.
また、図示しないが、配線パターン3は、端子部23を備えず、配線部21および接続配線部22から構成されていてもよい。
Although not shown, the wiring pattern 3 does not include the terminal portion 23 and may be configured by the wiring portion 21 and the connection wiring portion 22.
第4実施例
図示しないが、インダクタ1は、第2磁性層18および接着剤層19を備えなくてもよい。より高いインダクタンスを備える観点から、好ましくは、インダクタ1は、第2磁性層18および接着剤層19を備える。 Fourth Example Although not shown, theinductor 1 may not include the second magnetic layer 18 and the adhesive layer 19. From the viewpoint of providing higher inductance, the inductor 1 preferably includes the second magnetic layer 18 and the adhesive layer 19.
図示しないが、インダクタ1は、第2磁性層18および接着剤層19を備えなくてもよい。より高いインダクタンスを備える観点から、好ましくは、インダクタ1は、第2磁性層18および接着剤層19を備える。 Fourth Example Although not shown, the
第5実施例
図示しないが、インダクタ1は、その後の外形加工などによって、ベース絶縁層2においてアライメントマーク7を備えなくてもよい。 Fifth Embodiment Although not shown, theinductor 1 may not include the alignment mark 7 in the base insulating layer 2 by subsequent outer shape processing or the like.
図示しないが、インダクタ1は、その後の外形加工などによって、ベース絶縁層2においてアライメントマーク7を備えなくてもよい。 Fifth Embodiment Although not shown, the
<第2実施形態>
本発明の配線基板の製造方法の一例としてインダクタ1の製造方法の第2実施形態を、図11A~図14Fを参照して説明する。なお、第2実施形態において、上記した第1実施形態と同様の部材および工程については、同一の参照符号を付し、その詳細な説明を省略する。 Second Embodiment
A second embodiment of a method for manufacturing aninductor 1 will be described with reference to FIGS. 11A to 14F as an example of a method for manufacturing a wiring board according to the present invention. Note that in the second embodiment, the same members and steps as those in the first embodiment described above are denoted by the same reference numerals, and detailed description thereof is omitted.
本発明の配線基板の製造方法の一例としてインダクタ1の製造方法の第2実施形態を、図11A~図14Fを参照して説明する。なお、第2実施形態において、上記した第1実施形態と同様の部材および工程については、同一の参照符号を付し、その詳細な説明を省略する。 Second Embodiment
A second embodiment of a method for manufacturing an
インダクタ1の製造方法の第2実施形態は、金属シート積層体用意工程と、配線形成工程と、リードマスキング工程と、電着工程と、マスキング除去工程と、リード除去工程と、第1磁性層配置工程と、第2磁性層配置工程とを備える。以下、各工程を詳述する。
The second embodiment of the method for manufacturing the inductor 1 includes a metal sheet laminate preparation step, a wiring formation step, a lead masking step, an electrodeposition step, a masking removal step, a lead removal step, and a first magnetic layer arrangement. And a second magnetic layer arranging step. Hereinafter, each process is explained in full detail.
(金属シート積層体用意工程)
金属シート積層体用意工程では、図11Aに示すように、金属シート10と、その下面全面に配置されるベース絶縁層2とを備える金属シート積層体40を用意する。 (Metal sheet laminate preparation process)
In the metal sheet laminate preparation step, as shown in FIG. 11A, ametal sheet laminate 40 including the metal sheet 10 and the base insulating layer 2 disposed on the entire lower surface thereof is prepared.
金属シート積層体用意工程では、図11Aに示すように、金属シート10と、その下面全面に配置されるベース絶縁層2とを備える金属シート積層体40を用意する。 (Metal sheet laminate preparation process)
In the metal sheet laminate preparation step, as shown in FIG. 11A, a
金属シート10は、第1実施形態と同一である。
The metal sheet 10 is the same as that in the first embodiment.
ベース絶縁層2の材料は、第1実施形態と同一の有機材料に加えて、例えば、ガラス、セラミックスなどの無機材料、例えば、無機材料と有機材料との複合材料(ガラスエポキシ)などの絶縁材料が挙げられる。
In addition to the same organic material as in the first embodiment, the base insulating layer 2 is made of, for example, an inorganic material such as glass or ceramics, for example, an insulating material such as a composite material (glass epoxy) of an inorganic material and an organic material. Is mentioned.
金属シート積層体40は、好ましくは、銅張積層板などが挙げられる。
The metal sheet laminate 40 is preferably a copper clad laminate or the like.
(配線形成工程)
配線形成工程では、ベース絶縁層2の上側に、配線パターン3および電着リード41を有する導体パターン42を形成する。すなわち、金属シート10に対してサブトラクティブ法を実施して、金属シート10から不要な部分を除去して、導体パターン42を形成する。 (Wiring formation process)
In the wiring formation step, theconductor pattern 42 having the wiring pattern 3 and the electrodeposition leads 41 is formed on the upper side of the insulating base layer 2. That is, a subtractive method is performed on the metal sheet 10 to remove unnecessary portions from the metal sheet 10 to form the conductor pattern 42.
配線形成工程では、ベース絶縁層2の上側に、配線パターン3および電着リード41を有する導体パターン42を形成する。すなわち、金属シート10に対してサブトラクティブ法を実施して、金属シート10から不要な部分を除去して、導体パターン42を形成する。 (Wiring formation process)
In the wiring formation step, the
まず、ベース絶縁層2の下面に、図11Bに示すように、支持フィルム15を配置する。
First, as shown in FIG. 11B, a support film 15 is disposed on the lower surface of the base insulating layer 2.
次いで、図11Cおよび図13Aに示すように、サブトラクティブ法を実施する。サブトラクティブ法を第1実施形態と同一である。
Next, as shown in FIGS. 11C and 13A, the subtractive method is performed. The subtractive method is the same as that in the first embodiment.
導体パターン42は、配線パターン3と、電着リード41とを備える。
The conductor pattern 42 includes a wiring pattern 3 and an electrodeposition lead 41.
電着リード41は、配線パターン3の一方(左側)の端子部23の後端縁から後側に延びる第1リード部43と、第1リード部43の後端縁と連続し、左右方向に延びる第2リード部44とを備える。
The electrodeposition lead 41 is continuous with the first lead portion 43 extending from the rear end edge of one (left side) terminal portion 23 of the wiring pattern 3 to the rear side, and the rear end edge of the first lead portion 43, and in the left-right direction. And a second lead portion 44 extending.
これにより、支持フィルム15、ベース絶縁層2および導体パターン42を順に備える第2被電着体45を得る。
Thereby, the second electrodeposit 45 having the support film 15, the base insulating layer 2, and the conductor pattern 42 in order is obtained.
(リードマスキング工程)
マスキング工程では、図11Dおよび図13Bに示すように、電着リード41をマスキングする。すなわち、電着リード41の上面および側面をマスキングシート46で被覆する。 (Lead masking process)
In the masking step, theelectrodeposition lead 41 is masked as shown in FIGS. 11D and 13B. That is, the upper surface and the side surface of the electrodeposition lead 41 are covered with the masking sheet 46.
マスキング工程では、図11Dおよび図13Bに示すように、電着リード41をマスキングする。すなわち、電着リード41の上面および側面をマスキングシート46で被覆する。 (Lead masking process)
In the masking step, the
マスキングシート46としては、例えば、微粘着性を有するセパレータフィルムが挙げられる。
Examples of the masking sheet 46 include a separator film having slight adhesiveness.
これにより、後述する電着工程で、電着リード41にカバー絶縁層4が被覆されることを防止し、後述するリードエッチング工程で、電着リード41を確実に除去することができる。
Thereby, it is possible to prevent the cover insulating layer 4 from being covered with the electrodeposited lead 41 in the electrodeposition process described later, and to reliably remove the electrodeposited lead 41 in the lead etching process described later.
(電着工程)
電着工程では、図11Eおよび図13Cに示すように、電着によって、配線パターン3をカバー絶縁層4で被覆する。 (Electrodeposition process)
In the electrodeposition process, as shown in FIGS. 11E and 13C, thewiring pattern 3 is covered with the insulating cover layer 4 by electrodeposition.
電着工程では、図11Eおよび図13Cに示すように、電着によって、配線パターン3をカバー絶縁層4で被覆する。 (Electrodeposition process)
In the electrodeposition process, as shown in FIGS. 11E and 13C, the
具体的には、マスキングされた第2被電着体45を電着塗料含有液体に浸漬し、続いて、第2被電着体45に電流を印加することによって、配線パターン3に電着塗料を析出させ、続いて、析出した電着塗料を乾燥させる。
Specifically, the masked second electrodeposition object 45 is immersed in the electrodeposition paint-containing liquid, and then an electric current is applied to the second electrodeposition object 45, whereby the electrodeposition paint is applied to the wiring pattern 3. Then, the deposited electrodeposition paint is dried.
第2被電着体45に電流を印加するには、外部電源に接続するリード線(図示せず)を第2リード部44の端部に接続する。これにより、リード線および電着リード41を介して、配線パターン3全体に直流電流が印加される。
In order to apply a current to the second electrodeposit 45, a lead wire (not shown) connected to an external power source is connected to the end of the second lead portion 44. Thereby, a direct current is applied to the whole wiring pattern 3 through the lead wire and the electrodeposition lead 41.
電着条件は、第1実施形態と同一である。
The electrodeposition conditions are the same as in the first embodiment.
これにより、配線パターン3の上面および側面に、カバー絶縁層4(電着塗装膜)が形成される。
Thereby, a cover insulating layer 4 (electrodeposition coating film) is formed on the upper surface and side surfaces of the wiring pattern 3.
(マスキング除去工程)
マスキング除去では、図12Fおよび図14Dに示すように、マスキングシート46を除去する。すなわち、電着リード41からマスキングシート46を剥離する。 (Masking removal process)
In the masking removal, the maskingsheet 46 is removed as shown in FIGS. 12F and 14D. That is, the masking sheet 46 is peeled from the electrodeposition lead 41.
マスキング除去では、図12Fおよび図14Dに示すように、マスキングシート46を除去する。すなわち、電着リード41からマスキングシート46を剥離する。 (Masking removal process)
In the masking removal, the masking
これにより、電着リード41の表面が露出される。
Thereby, the surface of the electrodeposition lead 41 is exposed.
(リード除去工程)
リード除去工程では、図12Gおよび図14Eに示すように、電着リード41を除去する。すなわち、エッチングにより、導体パターン42から電着リード41を除去する。 (Lead removal process)
In the lead removal step, theelectrodeposited lead 41 is removed as shown in FIGS. 12G and 14E. That is, the electrodeposited lead 41 is removed from the conductor pattern 42 by etching.
リード除去工程では、図12Gおよび図14Eに示すように、電着リード41を除去する。すなわち、エッチングにより、導体パターン42から電着リード41を除去する。 (Lead removal process)
In the lead removal step, the
エッチングとしては、例えば、上記したウェットエッチングが挙げられる。
Etching includes, for example, the above-described wet etching.
この際、配線パターン3は、カバー絶縁層4によって被覆されているため、エッチングにより除去されない。
At this time, since the wiring pattern 3 is covered with the insulating cover layer 4, it is not removed by etching.
これにより、支持フィルム15、ベース絶縁層2、配線パターン3およびカバー絶縁層4を順に備える第1中間体47を得る。
Thereby, the 1st intermediate body 47 provided with the support film 15, the base insulating layer 2, the wiring pattern 3, and the cover insulating layer 4 in order is obtained.
第1中間体47では、配線パターン3の後端縁の側面では、カバー絶縁層4が被覆されていない。すなわち、配線パターン3(具体的には、左側の端子部23)は、後端縁側面において、カバー絶縁層4から露出する露出側面48を有する。
In the first intermediate 47, the insulating cover layer 4 is not covered on the side surface of the rear edge of the wiring pattern 3. That is, the wiring pattern 3 (specifically, the left terminal portion 23) has an exposed side surface 48 exposed from the cover insulating layer 4 on the side surface of the rear end edge.
(第1磁性層配置工程)
第1磁性層配置工程では、図12Hおよび図14Fに示すように、ベース絶縁層2およびカバー絶縁層4の上側に、第1磁性層5を配置する。 (First magnetic layer arranging step)
In the first magnetic layer arranging step, the firstmagnetic layer 5 is arranged above the base insulating layer 2 and the cover insulating layer 4 as shown in FIGS. 12H and 14F.
第1磁性層配置工程では、図12Hおよび図14Fに示すように、ベース絶縁層2およびカバー絶縁層4の上側に、第1磁性層5を配置する。 (First magnetic layer arranging step)
In the first magnetic layer arranging step, the first
第1磁性層配置工程は、第1実施形態と同様である。
The first magnetic layer arranging step is the same as in the first embodiment.
この後、支持フィルム15を、剥離により、ベース絶縁層2から除去する。
Thereafter, the support film 15 is removed from the base insulating layer 2 by peeling.
これにより、ベース絶縁層2、配線パターン3、カバー絶縁層4および第1磁性層5を順に備える第2中間体49を得る。第2中間体49では、露出側面48は、第1磁性層5と接触する。
Thereby, the second intermediate body 49 including the insulating base layer 2, the wiring pattern 3, the insulating cover layer 4, and the first magnetic layer 5 in order is obtained. In the second intermediate body 49, the exposed side surface 48 is in contact with the first magnetic layer 5.
(第2磁性層配置工程)
第2磁性層工程では、図12Iに示すように、ベース絶縁層2の下側に、第2磁性層18を配置する。すなわち、ベース絶縁層2の下面に、接着剤層19を介して、カバー絶縁層4を配置する。 (Second magnetic layer arranging step)
In the second magnetic layer step, as shown in FIG. 12I, the secondmagnetic layer 18 is disposed below the base insulating layer 2. That is, the insulating cover layer 4 is disposed on the lower surface of the insulating base layer 2 via the adhesive layer 19.
第2磁性層工程では、図12Iに示すように、ベース絶縁層2の下側に、第2磁性層18を配置する。すなわち、ベース絶縁層2の下面に、接着剤層19を介して、カバー絶縁層4を配置する。 (Second magnetic layer arranging step)
In the second magnetic layer step, as shown in FIG. 12I, the second
第2磁性層配置工程は、第1実施形態と同様である。
The second magnetic layer arranging step is the same as in the first embodiment.
これにより、第2実施形態のインダクタ1が得られる。
Thereby, the inductor 1 of the second embodiment is obtained.
(インダクタ)
インダクタ1は、第2磁性層18と、接着剤層19と、ベース絶縁層2と、導体パターン42と、カバー絶縁層4と、第1磁性層5とを厚み方向にこの順で備える。これら部材は、第1実施形態の部材と特記する以外は、同一である。 (Inductor)
Theinductor 1 includes a second magnetic layer 18, an adhesive layer 19, a base insulating layer 2, a conductor pattern 42, a cover insulating layer 4, and a first magnetic layer 5 in this order in the thickness direction. These members are the same as those of the first embodiment except for special mention.
インダクタ1は、第2磁性層18と、接着剤層19と、ベース絶縁層2と、導体パターン42と、カバー絶縁層4と、第1磁性層5とを厚み方向にこの順で備える。これら部材は、第1実施形態の部材と特記する以外は、同一である。 (Inductor)
The
第2実施形態のベース絶縁層2は、貫通穴6およびアライメントマーク7を備えない。すなわち、ベース絶縁層2の下面全面は、接着剤層19の上面全面と接触する。また、接着剤層19は、配線パターン3および第2磁性層18と接触しない。
The base insulating layer 2 of the second embodiment does not include the through hole 6 and the alignment mark 7. That is, the entire lower surface of the base insulating layer 2 is in contact with the entire upper surface of the adhesive layer 19. Further, the adhesive layer 19 is not in contact with the wiring pattern 3 and the second magnetic layer 18.
第2実施形態のインダクタ1では、一方の端子部23の露出側面48は、第1磁性層5と接触する。
In the inductor 1 of the second embodiment, the exposed side surface 48 of one terminal portion 23 is in contact with the first magnetic layer 5.
第2実施形態のインダクタ1の製造方法およびそれから製造されるインダクタ1についても、第1実施形態の製造方法およびインダクタ1と同様の作用効果を奏する。
The manufacturing method of the inductor 1 according to the second embodiment and the inductor 1 manufactured therefrom have the same effects as the manufacturing method and the inductor 1 according to the first embodiment.
また、第2実施形態の変形例についても、第1実施形態の変形例と同様にすることができる。
Also, the modification of the second embodiment can be the same as the modification of the first embodiment.
なお、上記発明は、本発明の例示の実施形態として提供したが、これは単なる例示に過ぎず、限定的に解釈してはならない。当該技術分野の当業者によって明らかな本発明の変形例は、後記請求の範囲に含まれる。
Although the above invention has been provided as an exemplary embodiment of the present invention, this is merely an example and should not be construed as limiting. Variations of the present invention that are apparent to one of ordinary skill in the art are within the scope of the following claims.
インダクタは、例えば、電子機器などに搭載される。
The inductor is mounted on, for example, an electronic device.
1 インダクタ
2 ベース絶縁層
3 配線パターン
4 カバー絶縁層
5 第1磁性層
6 貫通穴
7 アライメントマーク
21 配線部
24 配線部間 DESCRIPTION OFSYMBOLS 1 Inductor 2 Base insulating layer 3 Wiring pattern 4 Cover insulating layer 5 1st magnetic layer 6 Through-hole 7 Alignment mark 21 Wiring part 24 Between wiring parts
2 ベース絶縁層
3 配線パターン
4 カバー絶縁層
5 第1磁性層
6 貫通穴
7 アライメントマーク
21 配線部
24 配線部間 DESCRIPTION OF
Claims (9)
- 第1絶縁層の厚み方向一方側に、配線パターンを形成する配線形成工程と、
電着によって、前記配線パターンを第2絶縁層で被覆する電着工程と、
前記第1絶縁層および前記第2絶縁層の厚み方向一方側に、磁性層を配置する磁性層配置工程と、
を備えることを特徴とする、配線基板の製造方法。 A wiring forming step of forming a wiring pattern on one side in the thickness direction of the first insulating layer;
An electrodeposition step of covering the wiring pattern with a second insulating layer by electrodeposition;
A magnetic layer disposing step of disposing a magnetic layer on one side in the thickness direction of the first insulating layer and the second insulating layer;
A method of manufacturing a wiring board, comprising: - 前記配線形成工程が、サブトラクティブ法によって、前記配線パターンを形成する工程であることを特徴とする、請求項1に記載の配線基板の製造方法。 The method for manufacturing a wiring board according to claim 1, wherein the wiring forming step is a step of forming the wiring pattern by a subtractive method.
- 前記電着工程が、厚み方向に投影したときに前記配線パターンと重なる前記第1絶縁層の貫通穴を介して、前記配線パターンに給電する工程を含むことを特徴とする、請求項1に記載の配線基板の製造方法。 2. The method of claim 1, wherein the electrodeposition step includes a step of supplying power to the wiring pattern through a through hole of the first insulating layer that overlaps the wiring pattern when projected in the thickness direction. Wiring board manufacturing method.
- 前記第1絶縁層が、前記貫通穴の厚み方向一方側に前記配線パターンを形成するための位置決め部を備えることを特徴とする、請求項3に記載の配線基板の製造方法。 The method for manufacturing a wiring board according to claim 3, wherein the first insulating layer includes a positioning portion for forming the wiring pattern on one side in the thickness direction of the through hole.
- 前記配線パターンが、銅配線を備えることを特徴とする、請求項1に記載の配線基板の製造方法。 2. The method of manufacturing a wiring board according to claim 1, wherein the wiring pattern includes a copper wiring.
- 第1絶縁層と、
前記第1絶縁層の厚み方向一方側において、所定方向において互いに間隔を隔てて配置される複数の配線部と、
前記複数の配線部のそれぞれを、所定方向において互いに隣接する配線部間に連続しないように被覆する第2絶縁層と、
前記第1絶縁層および前記第2絶縁層の厚み方向一方側において、前記第1絶縁層の厚み方向一方面を被覆するように配置される磁性層と
を備えることを特徴とする、配線基板。 A first insulating layer;
A plurality of wiring portions arranged at intervals in a predetermined direction on one side in the thickness direction of the first insulating layer;
A second insulating layer that covers each of the plurality of wiring portions so as not to be continuous between adjacent wiring portions in a predetermined direction;
A wiring board comprising: a magnetic layer disposed on one side in the thickness direction of the first insulating layer and the second insulating layer so as to cover one side in the thickness direction of the first insulating layer. - 前記複数の配線部は、共通する前記第1絶縁層の厚み方向一方側に配置され、
前記第2絶縁層は、前記複数の配線部の厚み方向一方面および側面を被覆することを特徴とする、請求項6に記載の配線基板。 The plurality of wiring portions are arranged on one side in the thickness direction of the common first insulating layer,
The wiring board according to claim 6, wherein the second insulating layer covers one surface and side surfaces in the thickness direction of the plurality of wiring portions. - 前記第1絶縁層は、厚み方向に投影したときに前記配線部と重なる貫通穴を有することを特徴とする、請求項6に記載の配線基板。 The wiring board according to claim 6, wherein the first insulating layer has a through hole that overlaps the wiring portion when projected in the thickness direction.
- 前記第1絶縁層の厚みが、0.5μm以上、10μm以下であることを特徴とする、請求項6に記載の配線基板。 The wiring board according to claim 6, wherein a thickness of the first insulating layer is not less than 0.5 μm and not more than 10 μm.
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