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WO2019010765A1 - 一种 amoled 像素驱动电路及像素驱动方法 - Google Patents

一种 amoled 像素驱动电路及像素驱动方法 Download PDF

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Publication number
WO2019010765A1
WO2019010765A1 PCT/CN2017/099381 CN2017099381W WO2019010765A1 WO 2019010765 A1 WO2019010765 A1 WO 2019010765A1 CN 2017099381 W CN2017099381 W CN 2017099381W WO 2019010765 A1 WO2019010765 A1 WO 2019010765A1
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WIPO (PCT)
Prior art keywords
thin film
film transistor
scan signal
capacitor
source
Prior art date
Application number
PCT/CN2017/099381
Other languages
English (en)
French (fr)
Inventor
陈小龙
Original Assignee
深圳市华星光电半导体显示技术有限公司
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Application filed by 深圳市华星光电半导体显示技术有限公司 filed Critical 深圳市华星光电半导体显示技术有限公司
Priority to KR1020207003595A priority Critical patent/KR102258240B1/ko
Priority to US15/572,794 priority patent/US10181289B1/en
Priority to EP17917403.2A priority patent/EP3654324A4/en
Priority to JP2020500110A priority patent/JP6882591B2/ja
Publication of WO2019010765A1 publication Critical patent/WO2019010765A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266—Details of drivers for scan electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/81—Anodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/82—Cathodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1216—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8051—Anodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G09G2300/0465—Improved aperture ratio, e.g. by size reduction of the pixel circuit, e.g. for improving the pixel density or the maximum displayable luminance or brightness
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0852—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor being a dynamic memory with more than one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0262—The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0223—Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G09G2320/045—Compensation of drifts in the characteristics of light emitting or modulating elements

Definitions

  • the present invention relates to the field of display technologies, and in particular, to an AMOLED pixel driving circuit and a pixel driving method.
  • OLED Organic Light Emitting Display
  • the display device has self-illumination, low driving voltage, high luminous efficiency, short response time, high definition and contrast, and nearly 180 °
  • the viewing angle and wide operating temperature range can realize many advantages such as flexible display and large-area full-color display, and become the most promising display device.
  • the traditional AMOLED pixel driver circuit is usually 2T1C. That is, two thin film transistors plus a capacitor structure convert the voltage into a current.
  • the existing 2T1C structure of the AMOLED pixel driving circuit includes the first thin film transistor T10. a second thin film transistor T20, a capacitor C10, and an organic light emitting diode D10.
  • the first thin film transistor T10 is a driving thin film transistor
  • the second thin film transistor T20 To switch the thin film transistor, the capacitor C10 is a storage capacitor.
  • the gate of the second thin film transistor T20 is connected to the scan signal Gate, and the source is connected to the data signal Data.
  • the drain is electrically connected to the gate of the first thin film transistor T10; the source of the first thin film transistor T10 is connected to the positive voltage of the power supply OVDD, and the drain is electrically connected to the organic light emitting diode D10
  • the anode of the organic light emitting diode D10 is connected to the power supply negative voltage OVSS.
  • One end of the capacitor C10 is electrically connected to the gate of the first thin film transistor T10, and the other end is electrically connected to the first thin film transistor.
  • the source of T10. When the 2T1C pixel driving circuit drives the AMOLED, the current flowing through the organic light emitting diode D10 satisfies:
  • I k ⁇ ( Vgs-Vth ) 2 ;
  • I is the current flowing through the organic light emitting diode D10
  • k is the intrinsic conduction factor of the driving thin film transistor
  • Vgs The voltage difference between the gate and the source of the first thin film transistor T10
  • Vth is the threshold voltage of the first thin film transistor T10, and it can be seen that the organic light emitting diode D10 flows.
  • the current is related to the threshold voltage of the driving thin film transistor.
  • the threshold voltage of the driving thin film transistor in each pixel driving circuit in the panel is different due to factors such as instability of the panel process. Even if an equal data voltage is applied to the driving thin film transistors in the respective pixel driving circuits, the current flowing into the organic light emitting diodes is made inconsistent, thereby affecting the uniformity of the display image quality.
  • the material of the thin film transistor may be aged and mutated, causing the threshold voltage of the driving thin film transistor to drift, and the aging degree of the thin film transistor material is different, and the threshold voltage drift of each driving thin film transistor The amount is also different, so that the panel display unevenness occurs, and the turn-on voltage of the driving thin film transistor rises, and the current flowing into the organic light emitting diode decreases, causing problems such as lower panel luminance and lower luminous efficiency.
  • the object of the present invention is to provide an AMOLED
  • the pixel driving circuit and the pixel driving method can improve the uniformity of the panel display, the brightness of the panel, and the luminous efficiency.
  • an AMOLED pixel driving circuit which includes:
  • the anode of the organic light emitting diode is connected to a positive voltage of the power source; one end of the second capacitor is connected to the positive voltage of the power source, and the other end of the second capacitor is electrically connected to one end of the first capacitor;
  • a gate of the fifth thin film transistor is connected to the first scan signal, a source of the fifth thin film transistor is connected to the positive voltage of the power source, and a drain of the fifth thin film transistor is respectively connected to the organic light emitting diode a cathode and a source of the third thin film transistor are electrically connected;
  • a gate of the third thin film transistor is connected to a second scan signal, and a drain of the third thin film transistor is respectively connected to a drain of the first thin film transistor and a drain of the second thin film transistor;
  • a gate of the second thin film transistor is connected to the first scan signal, and a source of the second thin film transistor is electrically connected to a node between the second capacitor and the first capacitor;
  • the gate of the first thin film transistor is electrically connected to a node between the second capacitor and the first capacitor, and the source of the first thin film transistor and the other end of the first capacitor are respectively The drain of the fourth thin film transistor and the drain of the sixth thin film transistor are electrically connected;
  • a gate of the sixth thin film transistor is connected to the second scan signal, and a source of the sixth thin film transistor is connected to a negative voltage of the power supply;
  • a gate of the fourth thin film transistor is connected to a third scan signal, and a source of the fourth thin film transistor is connected to a data voltage;
  • the first scan signal, the second scan signal, and the third scan signal are each generated by an external timing controller; the first thin film transistor, the second thin film transistor, the third thin film transistor, The fourth thin film transistor, the fifth thin film transistor, and the sixth thin film transistor are both N type thin film transistor.
  • the first thin film transistor, the second thin film transistor, the third thin film transistor, the fourth thin film transistor, the fifth thin film transistor, and the sixth thin film transistor are all low temperature polysilicon thin film transistors and oxides One of a semiconductor thin film transistor and an amorphous silicon thin film transistor.
  • the first scan signal, the second scan signal, and the third scan signal are combined to sequentially correspond to an initialization phase, a threshold voltage storage phase, and an illumination display phase;
  • the first scan signal and the second scan signal are both high, and the third scan signal is low;
  • the first scan signal and the third scan signal are both high, and the second scan signal is low;
  • the first scan signal and the third scan signal are both at a low potential, and the second scan signal is at a high potential.
  • an AMOLED pixel driving circuit which includes:
  • the anode of the organic light emitting diode is connected to a positive voltage of the power source; one end of the second capacitor is connected to the positive voltage of the power source, and the other end of the second capacitor is electrically connected to one end of the first capacitor;
  • a gate of the fifth thin film transistor is connected to the first scan signal, a source of the fifth thin film transistor is connected to the positive voltage of the power source, and a drain of the fifth thin film transistor is respectively connected to the organic light emitting diode a cathode and a source of the third thin film transistor are electrically connected;
  • a gate of the third thin film transistor is connected to a second scan signal, and a drain of the third thin film transistor is respectively connected to a drain of the first thin film transistor and a drain of the second thin film transistor;
  • a gate of the second thin film transistor is connected to the first scan signal, and a source of the second thin film transistor is electrically connected to a node between the second capacitor and the first capacitor;
  • the gate of the first thin film transistor is electrically connected to a node between the second capacitor and the first capacitor, and the source of the first thin film transistor and the other end of the first capacitor are respectively The drain of the fourth thin film transistor and the drain of the sixth thin film transistor are electrically connected;
  • a gate of the sixth thin film transistor is connected to the second scan signal, and a source of the sixth thin film transistor is connected to a negative voltage of the power supply;
  • a gate of the fourth thin film transistor is connected to a third scan signal, and a source of the fourth thin film transistor is connected to a data voltage.
  • the first thin film transistor, the second thin film transistor, the third thin film transistor, the fourth thin film transistor, the fifth thin film transistor, and the sixth thin film transistor are all low temperature polysilicon thin film transistors and oxides One of a semiconductor thin film transistor and an amorphous silicon thin film transistor.
  • the first scan signal, the second scan signal, and the third scan signal are each generated by an external timing controller.
  • the first thin film transistor, the second thin film transistor, the third thin film transistor, the fourth thin film transistor, the fifth thin film transistor, and the sixth thin film transistor are all N-type thin film transistors.
  • the first scan signal, the second scan signal, and the third scan signal are combined to sequentially correspond to an initialization phase, a threshold voltage storage phase, and an illumination display phase;
  • the first scan signal and the second scan signal are both high, and the third scan signal is low;
  • the first scan signal and the third scan signal are both high, and the second scan signal is low;
  • the first scan signal and the third scan signal are both at a low potential, and the second scan signal is at a high potential.
  • the first thin film transistor is a driving thin film transistor
  • the fifth thin film transistor is a switching thin film transistor
  • the invention also provides an AMOLED pixel driving method, which comprises the following steps:
  • the AMOLED pixel driving circuit includes:
  • the anode of the organic light emitting diode is connected to a positive voltage of the power source; one end of the second capacitor is connected to the positive voltage of the power source, and the other end of the second capacitor is electrically connected to one end of the first capacitor;
  • a gate of the fifth thin film transistor is connected to the first scan signal, a source of the fifth thin film transistor is connected to the positive voltage of the power source, and a drain of the fifth thin film transistor is respectively connected to the organic light emitting diode a cathode and a source of the third thin film transistor are electrically connected;
  • a gate of the third thin film transistor is connected to a second scan signal, and a drain of the third thin film transistor is respectively connected to a drain of the first thin film transistor and a drain of the second thin film transistor;
  • a gate of the second thin film transistor is connected to the first scan signal, and a source of the second thin film transistor is electrically connected to a node between the second capacitor and the first capacitor;
  • the gate of the first thin film transistor is electrically connected to a node between the second capacitor and the first capacitor, and the source of the first thin film transistor and the other end of the first capacitor are respectively The drain of the fourth thin film transistor and the drain of the sixth thin film transistor are electrically connected;
  • a gate of the sixth thin film transistor is connected to the second scan signal, and a source of the sixth thin film transistor is connected to a negative voltage of the power supply;
  • a gate of the fourth thin film transistor is connected to a third scan signal, and a source of the fourth thin film transistor is connected to a data voltage;
  • the first scan signal provides a high potential, the second and fifth thin film transistors are turned on; the second scan signal provides a high potential, and the third and sixth thin film transistors are turned on; The third scan signal provides a low potential, the fourth thin film transistor is turned off; the voltage of the gate of the first thin film transistor is equal to the positive voltage of the power supply, and the voltage of the source of the first thin film transistor is equal to the negative of the power supply Voltage;
  • the first scan signal provides a high potential, the second and fifth thin film transistors are turned on; the second scan signal provides a low potential, and the third and sixth thin film transistors are turned off;
  • the third scan signal provides a high potential, the fourth thin film transistor is turned on; the voltage of the source of the first thin film transistor is equal to the data voltage, and the voltage of the gate of the first thin film transistor is changed to Vd+Vth, wherein Vd is a data voltage, and Vth is a threshold voltage of the first thin film transistor;
  • the first scan signal provides a low potential, the second and fifth thin film transistors are turned off; the second scan signal provides a high potential, and the third and sixth thin film transistors are turned on; The third scan signal provides a low potential, the fourth thin film transistor is turned off; the organic light emitting diode emits light, and a current flowing through the organic light emitting diode is independent of a threshold voltage of the first thin film transistor.
  • AMOLED in the present invention In the pixel driving method, in the light emitting display stage, a voltage of a source of the first thin film transistor is changed to a negative voltage of the power supply, and a voltage of a gate of the first thin film transistor is changed to Vd+Vth+ ⁇ V So that the current flowing through the organic light emitting diode is independent of the threshold voltage of the first thin film transistor, wherein ⁇ V The influence of the voltage of the source of the first thin film transistor on the voltage of the gate of the first thin film transistor after the data voltage is changed to the negative voltage of the power supply.
  • the first thin film transistor, the second thin film transistor, the third thin film transistor, the fourth thin film transistor, the fifth thin film transistor, and the sixth thin film transistor are all low temperature polysilicon One of a thin film transistor, an oxide semiconductor thin film transistor, and an amorphous silicon thin film transistor.
  • the first scan signal, the second scan signal, and the third scan signal are each generated by an external timing controller.
  • the first thin film transistor is a driving thin film transistor
  • the fifth thin film transistor is a switching thin film transistor
  • the first thin film transistor, the second thin film transistor, the third thin film transistor, the fourth thin film transistor, the fifth thin film transistor, and the sixth thin film transistor are both N Thin film transistor.
  • AMOLED pixel driving circuit and pixel driving method of the present invention By improving the existing pixel driving circuit, the influence of the threshold voltage of the driving thin film transistor on the organic light emitting diode is eliminated, the display uniformity of the panel is improved, and the panel is avoided with the OLED.
  • the aging of the device causes problems such as reduced brightness and reduced luminous efficiency.
  • Figure 1 is a circuit diagram of a conventional 2T1C pixel driving circuit for AMOLED
  • FIG. 2 is a circuit diagram of a conventional 5T2C pixel driving circuit for AMOLED
  • Figure 3 is a circuit diagram of an existing 8T1C pixel driving circuit for AMOLED
  • FIG. 4 is a circuit diagram of an AMOLED pixel driving circuit of the present invention.
  • FIG. 5 is a timing diagram of an AMOLED pixel driving circuit of the present invention.
  • FIG. 6 is a schematic diagram of step 2 of the AMOLED pixel driving method of the present invention.
  • step 3 of the AMOLED pixel driving method of the present invention is a schematic diagram of step 3 of the AMOLED pixel driving method of the present invention.
  • FIG. 8 is a schematic diagram of step 4 of the AMOLED pixel driving method of the present invention.
  • AMOLED is generally used in the prior art.
  • the pixel driving circuit is improved to increase the thin film transistor and the corresponding control signal to compensate the threshold voltage of the driving thin film transistor, so that the current flowing through the organic light emitting diode is independent of the threshold voltage of the driving thin film transistor.
  • an existing AMOLED pixel driving circuit adopts a 5T2C structure, that is, a structure of five thin film transistors plus two capacitors, including a first thin film transistor T21 and a second thin film transistor T22
  • the specific connection mode of each component is: the gate of the first thin film transistor T21 is connected to the scan signal S11, the source is connected to the data signal, and the drain is electrically connected to the first node Q.
  • Second thin film transistor T22 The gate is connected to the scan signal S12, the source is electrically connected to the first node Q, and the drain is electrically connected to the anode of the organic light emitting diode D20.
  • One end of the first capacitor C20 is connected to the first node Q, and the other end is connected to the power supply positive voltage OVDD, and the second capacitor C21 One end is connected to the first node Q, the other end is electrically connected to the gate of the fifth thin film transistor T25 and the source of the fourth thin film transistor T24, and the drain of the fourth thin film transistor T24 is electrically connected to the second node P
  • the gate of the fourth thin film transistor T24 is connected to the second scan signal S12, and the source of the fifth thin film transistor T25 is connected to the power supply positive voltage OVDD, and the fifth thin film transistor T25
  • the drain is electrically connected to the second node P; the gate of the third thin film transistor T23 is connected to the light emitting signal EM, the source is electrically connected to the second node P, and the drain is electrically connected to the organic light emitting diode D20
  • the anode of the OLED, the cathode of the D20 is connected to the power supply negative voltage OVSS.
  • Vref is the reference voltage due to panel OLED
  • the non-uniformity causes the brightness of the OLED of each pixel to be inconsistent. If the Vref is too large, the OLED will emit light during the reset phase; if the Vref is too small, the above Data will be caused.
  • Writing and Emission Phase The potential at point A is too large, causing the driving TFT to be off, so the size of Vref is not constant.
  • FIG. 3 another existing AMOLED pixel driver circuit uses 8T1C.
  • the structure that is, the structure of eight thin film transistors plus one capacitor, including the first thin film transistor T31, the second thin film transistor T32, the third thin film transistor T33, and the fourth thin film transistor T34 , fifth thin film transistor T35 , sixth thin film transistor T36 , seventh thin film transistor T37 , eighth thin film transistor T38 , capacitor C30 and organic light emitting diode D30
  • the specific connection mode of each component is: the gate of the first thin film transistor T31 is connected to the scan signal S2, the source is connected to the reference voltage Vref, the drain is electrically connected to one end of the capacitor C30, and the seventh thin film transistor is connected.
  • the source of the T37, the other end of the capacitor C30 is connected to the source of the third thin film transistor T33 and the gate of the fifth thin film transistor T35, and the drain of the third thin film transistor T33 is connected to the fourth thin film transistor.
  • the source of T34 and the drain of the second thin film transistor T32, the gate of the second thin film transistor T32 is connected to the scan signal S1, and the source of the second thin film transistor T32 is connected to the voltage Vini. .
  • the gates of the third thin film transistor T33 and the fourth thin film transistor T34 are connected to the scan signal S2.
  • the drain of the fourth thin film transistor T34 is connected to the drain of the fifth thin film transistor T35 and the organic light emitting diode D30
  • the anode, the cathode of the organic light emitting diode D30 is connected to the negative voltage of the power supply VSS, and the source of the fifth thin film transistor T35 is connected to the drain of the eighth thin film transistor T38 and the seventh thin film transistor T37.
  • the drain of the seventh thin film transistor T37 is connected to the drain of the sixth thin film transistor T36, and the source of the sixth thin film transistor T36 is connected to the power supply positive voltage VDD, and the sixth thin film transistor T36
  • the gate of the gate and the seventh thin film transistor T37 are both connected to the scan signal S3
  • the gate of the eighth thin film transistor T38 is connected to the scan signal S2
  • the source of the eighth thin film transistor T38 is connected to the data voltage. Vdata.
  • the above 8T1C architecture can eliminate the Vth driving the TFT, the TFT used.
  • the large number of panels reduces the aperture ratio of the panel, thereby reducing the display brightness, and more TFTs cause parasitic capacitance and the like.
  • the architecture requires two additional power supplies, Vref and Vini. Therefore, there are more input sources.
  • FIG. 4 is a circuit diagram of the AMOLED pixel driving circuit of the present invention.
  • the AMOLED pixel driving circuit of the present invention includes a first thin film transistor T1 and a second thin film transistor.
  • T2 third thin film transistor T3, fourth thin film transistor T4, fifth thin film transistor T5, sixth thin film transistor T6, first capacitor C1, second capacitor C2, and organic light emitting diode D1.
  • the first thin film transistor T1 is a driving thin film transistor
  • the fifth thin film transistor T5 is a switching thin film transistor.
  • the anode of the organic light emitting diode D1 is connected to the power supply positive voltage OVDD;
  • the second capacitor One end of C2 is connected to a positive power supply voltage OVDD, and the other end of the second capacitor C2 is electrically connected to one end of the first capacitor C1;
  • the gate of the fifth thin film transistor T5 is connected to the first scan signal Scan1, and the fifth thin film transistor T5
  • the source is connected to the positive voltage OVDD of the power supply, and the drain of the fifth thin film transistor T5 is electrically connected to the cathode of the organic light emitting diode D1;
  • the gate of the third thin film transistor T3 is connected to the second scan signal Scan2, and the third thin film transistor T3
  • the source is electrically connected to the cathode of the organic light emitting diode, that is, the source of the third thin film transistor T3 is respectively connected to the cathode of the organic light emitting diode D1 and the fifth thin film transistor T5.
  • the drain is electrically connected.
  • a drain of the third thin film transistor T3 is respectively connected to a drain of the first thin film transistor T1 and a drain of the second thin film transistor T2;
  • the gate of the second thin film transistor T2 is connected to the first scan signal Scan1, and the second thin film transistor T2
  • the source is electrically connected to a node between the second capacitor C2 and the first capacitor C1.
  • the first thin film transistor T1 has a source electrically connected to the other end of the first capacitor C1;
  • the gate of the sixth thin film transistor T6 is connected to the second scan signal Scan2, and the sixth thin film transistor T6
  • the source is connected to the power supply negative voltage OVSS;
  • the drain of the sixth thin film transistor T6 is electrically connected to the drain of the first thin film transistor T1; that is, the sixth thin film transistor T6
  • the drains are electrically connected to the source of the first thin film transistor T1, the other end of the first capacitor C1, and the drain of the fourth thin film transistor T4, respectively.
  • the gate of the fourth thin film transistor T4 is connected to the third scan signal Scan3, and the fourth thin film transistor T4 The source is connected to the data voltage Vd; the drain of the fourth thin film transistor T4 is electrically connected to the source of the first thin film transistor T1. That is, the fourth thin film transistor T4 The drain is electrically connected to the source of the first thin film transistor T1, the drain of the sixth thin film transistor T6, and the other end of the first capacitor C1.
  • the first thin film transistor T1, the second thin film transistor T2, the third thin film transistor T3, and the fourth thin film transistor T4 are each one of a low temperature polysilicon thin film transistor, an oxide semiconductor thin film transistor, and an amorphous silicon thin film transistor.
  • the first scan signal Scan1, the second scan signal Scan2, and the third scan signal Scan3 Both are generated by an external timing controller.
  • the first thin film transistor T1, the second thin film transistor T2, the third thin film transistor T3, and the fourth thin film transistor T4 are both N-type thin film transistors.
  • the first scan signal Scan1, the second scan signal Scan2, and the third scan signal Scan3 Phase combination corresponding to an initialization phase, a threshold voltage storage phase, and an illumination display phase;
  • the present invention also provides an AMOLED
  • the pixel driving method includes the following steps:
  • the first scan signal Scan1 And the second scan signal Scan2 is high, and the third scan signal Scan3 is low;
  • the first scan signal Scan1 provides a high potential, so that the second and fifth thin film transistors T2, T5 turn on.
  • the second scan signal Scan2 provides a high potential such that the third and sixth thin film transistors T3, T6 are turned on.
  • the third scan signal Scan3 Providing a low potential, the fourth thin film transistor T4 is turned off, and OVDD charges the gate of the first thin film transistor T1 (referred to as g point for short) so that the gate Vg of the first thin film transistor The voltage is equal to the positive supply voltage OVDD.
  • OVSS charges the source of the first thin film transistor T1 (referred to as s point), so that the first thin film transistor T1
  • the voltage at the source Vs is equal to the negative supply voltage OVSS.
  • the organic light emitting diode D1 does not emit light, and this stage completes the g point and s. Initialization of the point potential.
  • the first scan signal Scan1 is during the threshold voltage storage phase, i.e., the period t1-t2 And the third scan signal Scan3 is high, and the second scan signal Scan2 is low.
  • the first scan signal Scan1 provides a high potential, so that the second and fifth thin film transistors T2, T5 Turning on, the second scan signal Scan2 provides a low potential, so that the third and sixth thin film transistors T3, T6 are turned off.
  • the third scan signal Scan3 Providing a high potential, the fourth thin film transistor T4 is turned on, so that the data voltage Vd charges the s point, and the voltage of the source Vs of the first thin film transistor T1 is equal to the data voltage Vd. .
  • the third thin film transistor T3 is turned off, so that the potential of the g point is discharged through the first and second thin film transistors T1 and T2 until the g point and the s The pinch between the dots is turned off when the threshold voltage Vth of the thin film transistor T1 is driven.
  • Vg-Vs Vth
  • Vg Vd+Vth
  • Vg is the g point voltage
  • Vs is the voltage at s
  • Vd is the data voltage
  • Vth is the threshold voltage of the first thin film transistor T1.
  • the organic light emitting diode D1 Since the fifth thin film transistor T5 is turned on, the organic light emitting diode D1 does not emit light, and the threshold voltage Vth is completed at this stage. The storage of the potential.
  • the first scan signal Scan1 is displayed during the illumination display phase, i.e., during the t2-t3 period.
  • the third scan signal Scan3 is both low, and the second scan signal Scan2 is high.
  • the first scan signal Scan1 provides a low potential, and the second and fifth thin film transistors T2 and T5 shut down.
  • the second scan signal Scan2 provides a high potential, and the third and sixth thin film transistors T3, T6 are turned on.
  • the third scan signal Scan3 provides a low potential, the fourth thin film transistor T4 is off. Since the fifth thin film transistor T5 is turned off, the organic light emitting diode D1 emits light, and the current flowing through the organic light emitting diode is independent of the threshold voltage of the first thin film transistor T1.
  • the g-point potential Vg can be obtained as follows:
  • Vg Vd + Vth + ⁇ V
  • ⁇ V (OVSS-Vd)*C1/(C1+C2) ;
  • ⁇ V is the first thin film transistor T1
  • the voltage of the source changes from the data voltage to the negative voltage of the power supply to the voltage of the gate of the first thin film transistor T1
  • C1 is the capacitance value of the first capacitor
  • C2 is the capacitance value of the second capacitor.
  • the current flowing through the organic light emitting diode D1 satisfies:
  • the current of the organic light emitting diode is independent of the threshold voltage Vth of the driving thin film transistor (T1), and the threshold voltage Vth is eliminated.
  • the effect on the organic light emitting diode thereby improving the uniformity of the panel display and the luminous efficiency.
  • the pixel driving circuit and the pixel driving method improve the existing pixel driving circuit, thereby eliminating the influence of the threshold voltage of the driving thin film transistor on the organic light emitting diode, improving the uniformity of the panel display, and avoiding the panel accompanying Problems such as reduced brightness and reduced luminous efficiency of aging of OLED devices.

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Abstract

一种AMOLED像素驱动电路及驱动方法，驱动电路包括第一薄膜晶体管（T1）、第二薄膜晶体管（T2）、第三薄膜晶体管（T3）、第四薄膜晶体管（T4）、第五薄膜晶体管（T5）、第六薄膜晶体管（T6）、第一电容（C1）、第二电容（C2）以及有机发光二极管（D1）；其中，有机发光二极管（D1）的阳极接入电源正电压（OVDD）；第二电容（C2）的一端接入电源正电压（OVDD），另一端与第一电容（C1）的一端电性连接；第五薄膜晶体管（T5）的栅极接入第一扫描信号（Scan1），源极接入电源正电压（OVDD），漏极与有机发光二极管（D1）的阴极电性连接；第三薄膜晶体管（T3）的栅极接入第二扫描信号（Scan2），源极与有机发光二极管（D1）的阴极电性连接，漏极分别与第一薄膜晶体管（T1）的漏极和第二薄膜晶体管（T2）的漏极连接；第二薄膜晶体管（T2）的栅极接入第一扫描信号Scan1，源极与第二电容（C2）和第一电容（C1）之间的节点电性连接；第一薄膜晶体管（T1）的栅极与第二电容（C2）和第一电容（C1）之间的节点电性连接，源极与第一电容（C1）的另一端电性连接；第六薄膜晶体管（T6）的栅极接入第二扫描信号（Scan2），源极接入电源负电压（OVSS），漏极与第一薄膜晶体管（T1）的漏极电性连接；第四薄膜晶体管（T4）的栅极接入第三扫描信号（Scan3），源极接入数据电压（Vd），漏极与第一薄膜晶体管（T1）的源极电性连接；可提高显示面板的均一性、面板的亮度及发光效率。

Description

一种 AMOLED 像素驱动电路及像素驱动方法 技术领域
本发明涉及显示技术领域，特别是涉及一种 AMOLED 像素驱动电路及像素驱动方法。
背景技术
有机发光二极管（ Organic Light Emitting Display ， OLED ）显示装置具有自发光、驱动电压低、发光效率高、响应时间短、清晰度与对比度高、近 180 °视角、使用温度范围宽，可实现柔性显示与大面积全色显示等诸多优点，成为最有发展潜力的显示装置。
传统的 AMOLED 像素驱动电路通常为 2T1C ，即两个薄膜晶体管加一个电容的结构，将电压变换为电流。
如图 1 所示，现有的 2T1C 结构的 AMOLED 像素驱动电路，包括第一薄膜晶体管 T10 、第二薄膜晶体管 T20 、电容 C10 及有机发光二极管 D10 ，所述第一薄膜晶体管 T10 为驱动薄膜晶体管，所述第二薄膜晶体管 T20 为开关薄膜晶体管，所述电容 C10 为存储电容。具体地，所述第二薄膜晶体管 T20 的栅极接入扫描信号 Gate ，源极接入数据信号 Data ，漏极电性连接第一薄膜晶体管 T10 的栅极；所述第一薄膜晶体管 T10 的源极接入电源正电压 OVDD ，漏极电性连接有机发光二极管 D10 的阳极；有机发光二极管 D10 的阴极接入电源负电压 OVSS 。电容 C10 的一端电性连接第一薄膜晶体管 T10 的栅极，另一端电性连接第一薄膜晶体管 T10 的源极。该 2T1C 像素驱动电路在对 AMOLED 进行驱动时，流过有机发光二极管 D10 的电流满足：
I=k ×（ Vgs-Vth ） 2 ；
其中， I 为流过有机发光二极管 D10 的电流， k 为驱动薄膜晶体管的本征导电因子， Vgs 为第一薄膜晶体管 T10 栅极和源极间的电压差， Vth 为第一薄膜晶体管 T10 的阈值电压，可见流过有机发光二极管 D10 的电流与驱动薄膜晶体管的阈值电压相关。
由于面板制程的不稳定性等因素，使得面板内每个像素驱动电路内的驱动薄膜晶体管的阈值电压产生差别。即使将相等的数据电压施加到各个像素驱动电路内的驱动薄膜晶体管，也会使得流入有机发光二极管的电流不一致，从而影响显示图像质量的均一性。且随着驱动薄膜晶体管的驱动时间的变长，薄膜晶体管的材料会出现老化、变异，导致驱动薄膜晶体管的阈值电压产生漂移，且薄膜晶体管材料的老化程度不同，各驱动薄膜晶体管的阈值电压漂移量也不同，从而出现面板显示不均的现象，同时会使驱动薄膜晶体管的开启电压上升，流入有机发光二极管的电流降低，导致面板亮度降低、发光效率下降等问题。
因此，有必要提供一种 AMOLED 像素驱动电路及像素驱动方法，以解决现有技术所存在的问题。
 技术问题
本发明的目的在于提供一种 AMOLED 像素驱动电路及像素驱动方法，能够提高面板显示的均一性、面板的亮度以及发光效率。
技术解决方案
为解决上述技术问题，本发明提供一种 AMOLED 像素驱动电路，其包括：
第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第五薄膜晶体管、第六薄膜晶体管、第一电容、第二电容以及有机发光二极管；
所述有机发光二极管的阳极接入电源正电压；所述第二电容的一端接入所述电源正电压，所述第二电容的另一端与所述第一电容的一端电性连接；
所述第五薄膜晶体管的栅极接入第一扫描信号，所述第五薄膜晶体管的源极接入所述电源正电压，所述第五薄膜晶体管的漏极分别与所述有机发光二极管的阴极以及所述第三薄膜晶体管的源极电性连接；
所述第三薄膜晶体管的栅极接入第二扫描信号，所述第三薄膜晶体管的漏极分别与所述第一薄膜晶体管的漏极和所述第二薄膜晶体管的漏极连接；
所述第二薄膜晶体管的栅极接入第一扫描信号，所述第二薄膜晶体管的源极与所述第二电容和所述第一电容之间的节点电性连接；
所述第一薄膜晶体管的栅极与所述第二电容和所述第一电容之间的节点电性连接，所述第一薄膜晶体管的源极分别与所述第一电容的另一端、所述第四薄膜晶体管的漏极以及所述第六薄膜晶体管的漏极电性连接；
所述第六薄膜晶体管的栅极接入第二扫描信号，所述第六薄膜晶体管的源极接入电源负电压；
所述第四薄膜晶体管的栅极接入第三扫描信号，所述第四薄膜晶体管的源极接入数据电压；
所述第一扫描信号、所述第二扫描信号以及所述第三扫描信号均通过外部时序控制器产生；所述第一薄膜晶体管、所述第二薄膜晶体管、所述第三薄膜晶体管、所述第四薄膜晶体管、所述第五薄膜晶体管以及所述第六薄膜晶体管均为 N 型薄膜晶体管。
在本发明的 AMOLED 像素驱动电路中， 所述第一薄膜晶体管、所述第二薄膜晶体管、所述第三薄膜晶体管、所述第四薄膜晶体管、所述第五薄膜晶体管以及所述第六薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管以及非晶硅薄膜晶体管中的一种。
在本发明的 AMOLED 像素驱动电路中， 所述第一扫描信号、第二扫描信号以及第三扫描信号相组合，先后对应于初始化阶段、阈值电压存储阶段以及发光显示阶段；
在所述初始化阶段，所述第一扫描信号和所述第二扫描信号都为高电位，所述第三扫描信号为低电位；
在所述阈值电压存储阶段，所述第一扫描信号和所述第三扫描信号都为高电位，所述第二扫描信号为低电位；
在所述发光显示阶段，所述第一扫描信号和所述第三扫描信号都为低电位，所述第二扫描信号为高电位。
为解决上述技术问题，本发明提供一种 AMOLED 像素驱动电路，其包括：
第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第五薄膜晶体管、第六薄膜晶体管、第一电容、第二电容以及有机发光二极管；
所述有机发光二极管的阳极接入电源正电压；所述第二电容的一端接入所述电源正电压，所述第二电容的另一端与所述第一电容的一端电性连接；
所述第五薄膜晶体管的栅极接入第一扫描信号，所述第五薄膜晶体管的源极接入所述电源正电压，所述第五薄膜晶体管的漏极分别与所述有机发光二极管的阴极以及所述第三薄膜晶体管的源极电性连接；
所述第三薄膜晶体管的栅极接入第二扫描信号，所述第三薄膜晶体管的漏极分别与所述第一薄膜晶体管的漏极和所述第二薄膜晶体管的漏极连接；
所述第二薄膜晶体管的栅极接入第一扫描信号，所述第二薄膜晶体管的源极与所述第二电容和所述第一电容之间的节点电性连接；
所述第一薄膜晶体管的栅极与所述第二电容和所述第一电容之间的节点电性连接，所述第一薄膜晶体管的源极分别与所述第一电容的另一端、所述第四薄膜晶体管的漏极以及所述第六薄膜晶体管的漏极电性连接；
所述第六薄膜晶体管的栅极接入第二扫描信号，所述第六薄膜晶体管的源极接入电源负电压；
所述第四薄膜晶体管的栅极接入第三扫描信号，所述第四薄膜晶体管的源极接入数据电压。
在本发明的 AMOLED 像素驱动电路中， 所述第一薄膜晶体管、所述第二薄膜晶体管、所述第三薄膜晶体管、所述第四薄膜晶体管、所述第五薄膜晶体管以及所述第六薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管以及非晶硅薄膜晶体管中的一种。
在本发明的 AMOLED 像素驱动电路中， 所述第一扫描信号、所述第二扫描信号以及所述第三扫描信号均通过外部时序控制器产生。
在本发明的 AMOLED 像素驱动电路中， 所述第一薄膜晶体管、所述第二薄膜晶体管、所述第三薄膜晶体管、所述第四薄膜晶体管、所述第五薄膜晶体管以及所述第六薄膜晶体管均为 N 型薄膜晶体管。
在本发明的 AMOLED 像素驱动电路中， 所述第一扫描信号、第二扫描信号以及第三扫描信号相组合，先后对应于初始化阶段、阈值电压存储阶段以及发光显示阶段；
在所述初始化阶段，所述第一扫描信号和所述第二扫描信号都为高电位，所述第三扫描信号为低电位；
在所述阈值电压存储阶段，所述第一扫描信号和所述第三扫描信号都为高电位，所述第二扫描信号为低电位；
在所述发光显示阶段，所述第一扫描信号和所述第三扫描信号都为低电位，所述第二扫描信号为高电位。
在本发明的 AMOLED 像素驱动电路中， 所述第一薄膜晶体管为驱动薄膜晶体管，所述第五薄膜晶体管为开关薄膜晶体管。
本发明还提供一种 AMOLED 像素驱动方法，其包括如下步骤：
提供 AMOLED 像素驱动电路；
进入初始化阶段；
进入阈值电压存储阶段；以及
进入发光显示阶段；
其中所述 AMOLED 像素驱动电路包括：
第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第五薄膜晶体管、第六薄膜晶体管、第一电容、第二电容以及有机发光二极管；
所述有机发光二极管的阳极接入电源正电压；所述第二电容的一端接入所述电源正电压，所述第二电容的另一端与所述第一电容的一端电性连接；
所述第五薄膜晶体管的栅极接入第一扫描信号，所述第五薄膜晶体管的源极接入所述电源正电压，所述第五薄膜晶体管的漏极分别与所述有机发光二极管的阴极以及所述第三薄膜晶体管的源极电性连接；
所述第三薄膜晶体管的栅极接入第二扫描信号，所述第三薄膜晶体管的漏极分别与所述第一薄膜晶体管的漏极和所述第二薄膜晶体管的漏极连接；
所述第二薄膜晶体管的栅极接入第一扫描信号，所述第二薄膜晶体管的源极与所述第二电容和所述第一电容之间的节点电性连接；
所述第一薄膜晶体管的栅极与所述第二电容和所述第一电容之间的节点电性连接，所述第一薄膜晶体管的源极分别与所述第一电容的另一端、所述第四薄膜晶体管的漏极以及所述第六薄膜晶体管的漏极电性连接；
所述第六薄膜晶体管的栅极接入第二扫描信号，所述第六薄膜晶体管的源极接入电源负电压；
所述第四薄膜晶体管的栅极接入第三扫描信号，所述第四薄膜晶体管的源极接入数据电压；
在所述初始化阶段，所述第一扫描信号提供高电位，所述第二、第五薄膜晶体管打开；所述第二扫描信号提供高电位，所述第三、第六薄膜晶体管打开；所述第三扫描信号提供低电位，所述第四薄膜晶体管关闭；所述第一薄膜晶体管的栅极的电压等于所述电源正电压，所述第一薄膜晶体管的源极的电压等于所述电源负电压；
在阈值电压存储阶段，所述第一扫描信号提供高电位，所述第二、第五薄膜晶体管打开；所述第二扫描信号提供低电位，所述第三、第六薄膜晶体管关闭；所述第三扫描信号提供高电位，所述第四薄膜晶体管打开；所述第一薄膜晶体管的源极的电压等于所述数据电压，所述第一薄膜晶体管的栅极的电压变化至 Vd+Vth ，其中 Vd 为数据电压， Vth 为所述第一薄膜晶体管的阈值电压；
在所述发光显示阶段，所述第一扫描信号提供低电位，所述第二、第五薄膜晶体管关闭；所述第二扫描信号提供高电位，所述第三、第六薄膜晶体管打开；所述第三扫描信号提供低电位，所述第四薄膜晶体管关闭；所述有机发光二极管发光，且流经所述有机发光二极管的电流与所述第一薄膜晶体管的阈值电压无关。
在本发明的 AMOLED 像素驱动方法中，在所述发光显示阶段，所述第一薄膜晶体管的源极的电压变化至所述电源负电压，所述第一薄膜晶体管的栅极的电压变化至 Vd+Vth+ δ V ，以使流经所述有机发光二极管的电流与所述第一薄膜晶体管的阈值电压无关，其中δ V 为所述第一薄膜晶体管的源极的电压由数据电压变化至电源负电压后对所述第一薄膜晶体管的栅极的电压产生的影响。
在本发明的 AMOLED 像素驱动方法中，所述第一薄膜晶体管、所述第二薄膜晶体管、所述第三薄膜晶体管、所述第四薄膜晶体管、所述第五薄膜晶体管以及所述第六薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管以及非晶硅薄膜晶体管中的一种。
在本发明的 AMOLED 像素驱动方法中，所述第一扫描信号、所述第二扫描信号及所述第三扫描信号均通过外部时序控制器产生。
在本发明的 AMOLED 像素驱动方法中，所述第一薄膜晶体管为驱动薄膜晶体管，所述第五薄膜晶体管为开关薄膜晶体管。
在本发明的 AMOLED 像素驱动方法中，所述第一薄膜晶体管、所述第二薄膜晶体管、所述第三薄膜晶体管、所述第四薄膜晶体管、所述第五薄膜晶体管以及所述第六薄膜晶体管均为 N 型薄膜晶体管。
 有益效果
本发明的 AMOLED 像素驱动电路及像素驱动方法， 通过对现有的像素驱动电路进行改进，从而消除了驱动薄膜晶体管的阈值电压对有机发光二极管的影响，提高了面板显示均匀性，此外还避免了面板随 OLED 器件的老化而出现的亮度降低、发光效率下降等问题。
附图说明
图 1 为现有用于 AMOLED 的 2T1C 像素驱动电路的电路图；
图 2 为现有用于 AMOLED 的 5T2C 像素驱动电路的电路图；
图 3 为现有用于 AMOLED 的 8T1C 像素驱动电路的电路图；
图 4 为本发明的 AMOLED 像素驱动电路的电路图；
图 5 为本发明的 AMOLED 像素驱动电路的时序图；
图 6 为本发明的 AMOLED 像素驱动方法的步骤 2 的示意图；
图 7 为本发明的 AMOLED 像素驱动方法的步骤 3 的示意图；
图 8 为本发明的 AMOLED 像素驱动方法的步骤 4 的示意图。
 本发明的最佳实施方式
以下各实施例的说明是参考附加的图式，用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语，例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。在图中，结构相似的单元是以相同标号表示。
针对驱动薄膜晶体管阈值电压漂移的问题，现有技术中一般会对 AMOLED 像素驱动电路进行改进，增加薄膜晶体管及相应的控制信号，以对驱动薄膜晶体管的阈值电压进行补偿，使有机发光二极管在发光时，流过其的电流与驱动薄膜晶体管的阈值电压无关。请参阅图 2 ，现有的一种 AMOLED 像素驱动电路采用 5T2C 的结构，也即五个薄膜晶体管加两个电容的结构，其包括第一薄膜晶体管 T21 、第二薄膜晶体管 T22 、第三薄膜晶体管 T23 、第四薄膜晶体管 T24 、第五薄膜晶体管 T25 、第一电容 C20 、第二电容 C21 及有机发光二极管 D20 ，具体各元件的连接方式为：第一薄膜晶体管 T21 的栅极接入扫描信号 S11 ，源极接入数据信号，漏极电性连接第一节点 Q 。第二薄膜晶体管 T22 的栅极接入扫描信号 S12 ，源极电性连接第一节点 Q ，漏极电性连接有机发光二极管 D20 的阳极。
第一电容 C20 的一端连接第一节点 Q ，另一端接入电源正电压 OVDD ，第二电容 C21 的一端连接第一节点 Q ，另一端电性连接第五薄膜晶体管 T25 的栅极以及第四薄膜晶体管 T24 的源极，第四薄膜晶体管 T24 的漏极电性连接第二节点 P ，第四薄膜晶体管 T24 的栅极接入第二扫描信号 S12 ，第五薄膜晶体管 T25 的源极接入电源正电压 OVDD ，第五薄膜晶体管 T25 的漏极电性连接第二节点 P ；第三薄膜晶体管 T23 的栅极接入发光信号 EM ，源极电性连接第二节点 P ，漏极电性连接有机发光二极管 D20 的阳极，有机发光二极管 D20 的阴极连接电源负电压 OVSS 。
上述 5T2C 架构虽然可以消除驱动 TFT 的 Vth ，但在 Data 写入 Writing 和 Emission 阶段 A 点的电位保持 Vdata+OVDD-Vth-Vref 不变； Vref 为参考电压，由于面板 OLED 的不均匀性导致各像素的有机发光二极管的亮度不一致，若 Vref 过大会使 OLED 在 reset 阶段发光；若 Vref 过小，会使上述 Data Writing 和 Emission 阶段 A 点的电位过大，导致驱动 TFT 处于截止状态，所以 Vref 的大小不恒定。
如图 3 所示，现有的另一种 AMOLED 像素驱动电路采用 8T1C 的结构，也即八个薄膜晶体管加一个电容的结构，包括第一薄膜晶体管 T31 、第二薄膜晶体管 T32 、第三薄膜晶体管 T33 、第四薄膜晶体管 T34 、第五薄膜晶体管 T35 、第六薄膜晶体管 T36 、第七薄膜晶体管 T37 、第八薄膜晶体管 T38 、电容 C30 及有机发光二极管 D30 ，具体各元件的连接方式为：第一薄膜晶体管 T31 的栅极接入扫描信号 S2 ，源极接入参考电压 Vref ，漏极电性连接电容 C30 的一端以及第七薄膜晶体管 T37 的源极，电容 C30 的另一端与第三薄膜晶体管 T33 的源极以及第五薄膜晶体管 T35 的栅极连接，第三薄膜晶体管 T33 的漏极连接第四薄膜晶体管 T34 的源极以及第二薄膜晶体管 T32 的漏极，第二薄膜晶体管 T32 的栅极接入扫描信号 S1 ，第二薄膜晶体管 T32 的源极接入电压 Vini 。第三薄膜晶体管 T33 和第四薄膜晶体管 T34 的栅极接入扫描信号 S2 。
第四薄膜晶体管 T34 的漏极连接第五薄膜晶体管 T35 的漏极和有机发光二极管 D30 的阳极，有机发光二极管 D30 的阴极接入电源负电压 VSS ，第五薄膜晶体管 T35 的源极连接第八薄膜晶体管 T38 的漏极以及第七薄膜晶体管 T37 的漏极，第七薄膜晶体管 T37 的源极与第六薄膜晶体管 T36 的漏极连接，第六薄膜晶体管 T36 的源极接入电源正电压 VDD ，第六薄膜晶体管 T36 的栅极和第七薄膜晶体管 T37 的栅极都接入扫描信号 S3 ，第八薄膜晶体管 T38 的栅极接入扫描信号 S2 ，第八薄膜晶体管 T38 的源极接入数据电压 Vdata 。
上述 8T1C 的架构虽然可以消除驱动 TFT 的 Vth ，但所用 TFT 的数量较多，会降低面板的开口率，从而降低显示亮度，且较多的 TFT 会产生寄生电容等问题。另一方面，该架构需要两个额外电源 Vref 和 Vini ，因此输入信号源较多。
请参照图 4 ，图 4 为本发明的 AMOLED 像素驱动电路的电路图。
如图 4 所示，本发明的 AMOLED 像素驱动电路包括 第一薄膜晶体管 T1 、第二薄膜晶体管 T2 、第三薄膜晶体管 T3 、第四薄膜晶体管 T4 、第五薄膜晶体管 T5 、第六薄膜晶体管 T6 、第一电容 C1 、第二电容 C2 以及有机发光二极管 D1 。其中所述第一薄膜晶体管 T1 为驱动薄膜晶体管，所述第五薄膜晶体管 T5 为开关薄膜晶体管。
具体各元件的连接方式如下：所述有机发光二极管 D1 的阳极接入电源正电压 OVDD ；所述第二电容 C2 的一端接入电源正电压 OVDD ，所述第二电容 C2 的另一端与所述第一电容 C1 的一端电性连接；
所述第五薄膜晶体管 T5 的栅极接入第一扫描信号 Scan1 ，所述第五薄膜晶体管 T5 的源极接入电源正电压 OVDD ，所述第五薄膜晶体管 T5 的漏极与所述有机发光二极管 D1 的阴极电性连接；
所述第三薄膜晶体管 T3 的栅极接入第二扫描信号 Scan2 ，所述第三薄膜晶体管 T3 的源极与所述有机发光二极管的阴极电性连接，也即所述第三薄膜晶体管 T3 的源极分别与所述有机发光二极管 D1 的阴极以及第五薄膜晶体管 T5 的漏极电性连接。所述第三薄膜晶体管 T3 的漏极分别与所述第一薄膜晶体管 T1 的漏极和所述第二薄膜晶体管 T2 的漏极连接；
所述第二薄膜晶体管 T2 的栅极接入第一扫描信号 Scan1 ，所述第二薄膜晶体管 T2 的源极与所述第二电容 C2 和所述第一电容 C1 之间的节点电性连接。
所述第一薄膜晶体管 T1 的栅极与所述第二电容 C2 和所述第一电容 C1 之间的节点电性连接，所述第一薄膜晶体管 T1 的源极与所述第一电容 C1 的另一端电性连接；
所述第六薄膜晶体管 T6 的栅极接入第二扫描信号 Scan2 ，所述第六薄膜晶体管 T6 的源极接入电源负电压 OVSS ；所述第六薄膜晶体管 T6 的漏极与所述第一薄膜晶体管 T1 的漏极电性连接；也即第六薄膜晶体管 T6 的漏极分别与所述第一薄膜晶体管 T1 的源极、第一电容 C1 的另一端以及第四薄膜晶体管 T4 的漏极电性连接。
所述第四薄膜晶体管 T4 的栅极接入第三扫描信号 Scan3 ，所述第四薄膜晶体管 T4 的源极接入数据电压 Vd ；所述第四薄膜晶体管 T4 的漏极与所述第一薄膜晶体管 T1 的源极电性连接。也即，所述第四薄膜晶体管 T4 的漏极与所述第一薄膜晶体管 T1 的源极、第六薄膜晶体管 T6 的漏极以及第一电容 C1 的另一端电性连接。
所述第一薄膜晶体管 T1 、第二薄膜晶体管 T2 、第三薄膜晶体管 T3 、第四薄膜晶体管 T4 、第五薄膜晶体管 T5 以及第六薄膜晶体管 T6 均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管以及非晶硅薄膜晶体管中的一种。
所述第一扫描信号 Scan1 、第二扫描信号 Scan2 以及第三扫描信号 Scan3 均通过外部时序控制器产生。
所述第一薄膜晶体管 T1 、第二薄膜晶体管 T2 、第三薄膜晶体管 T3 、第四薄膜晶体管 T4 、第五薄膜晶体管 T5 以及第六薄膜晶体管 T6 均为 N 型薄膜晶体管。
所述第一扫描信号 Scan1 、第二扫描信号 Scan2 、及第三扫描信号 Scan3 相组合，先后对应于一初始化阶段、一阈值电压存储阶段、及一发光显示阶段；
基于上述 AMOLED 像素驱动电路，本发明还提供一种 AMOLED 像素驱动方法，包括如下步骤：
S101 、提供一 AMOLED 像素驱动电路。
具体请参阅图 4 和上文。
S102 、进入初始化阶段。
结合图 5 和 6 ，在所述初始化阶段也即 t0-t1 时段，所述第一扫描信号 Scan1 和所述第二扫描信号 Scan2 都为高电位，所述第三扫描信号 Scan3 为低电位；
所述第一扫描信号 Scan1 提供高电位，使得所述第二、第五薄膜晶体管 T2 、 T5 打开。所述第二扫描信号 Scan2 提供高电位，使得所述第三、第六薄膜晶体管 T3 、 T6 打开。所述第三扫描信号 Scan3 提供低电位，所述第四薄膜晶体管 T4 关闭， OVDD 对第一薄膜晶体管 T1 的栅极（简称 g 点）充电，使得所述第一薄膜晶体管的栅极 Vg 的电压等于电源正电压 OVDD 。由于第六薄膜晶体管 T6 打开， OVSS 对第一薄膜晶体管 T1 的源极（简称 s 点）充电，使得所述第一薄膜晶体管 T1 的源极 Vs 的电压等于电源负电压 OVSS 。由于第五薄膜晶体管 T5 开启，因此有机发光二极管 D1 不发光，此阶段完成对 g 点和 s 点电位的初始化。
S103 、进入阈值电压存储阶段。
结合图 5 和 7 ，在该阈值电压存储阶段也即 t1-t2 时段，所述第一扫描信号 Scan1 和所述第三扫描信号 Scan3 都为高电位，所述第二扫描信号 Scan2 为低电位。
所述第一扫描信号 Scan1 提供高电位，使得所述第二、第五薄膜晶体管 T2 、 T5 打开，所述第二扫描信号 Scan2 提供低电位，使得所述第三、第六薄膜晶体管 T3 、 T6 关闭。所述第三扫描信号 Scan3 提供高电位，所述第四薄膜晶体管 T4 打开，使得数据电压 Vd 对 s 点充电，所述第一薄膜晶体管 T1 的源极 Vs 的电压等于数据电压 Vd 。由于第二薄膜晶体管 T2 开启，第三薄膜晶体管 T3 关闭，使得 g 点电位通过第一、二薄膜晶体管 T1 、 T2 进行放电，直到 g 点与 s 点的之间的夹压为驱动薄膜晶体管 T1 的阈值电压 Vth 时截止。
由于 Vg 与 Vs 之间满足下式：
Vg-Vs=Vth ；
其中 Vs=Vd ；
则有 Vg 为：
Vg=Vd+Vth ；
也即所述第一薄膜晶体管 T1 的栅极的电压变化至 Vd+Vth 。其中 Vg 为 g 点电压， Vs 为 s 点电压， Vd 为数据电压， Vth 为所述第一薄膜晶体管 T1 的阈值电压。
由于第五薄膜晶体管 T5 开启，因此有机发光二极管 D1 不发光，此阶段完成对阈值电压 Vth 电位的存储。
S104 、进入发光显示阶段。
结合图 5 和 8 ，在发光显示阶段也即 t2-t3 时段，所述第一扫描信号 Scan1 和所述第三扫描信号 Scan3 都为低电位，所述第二扫描信号 Scan2 为高电位。
所述第一扫描信号 Scan1 提供低电位，所述第二、第五薄膜晶体管 T2 、 T5 关闭。所述第二扫描信号 Scan2 提供高电位，所述第三、第六薄膜晶体管 T3 、 T6 打开。所述第三扫描信号 Scan3 提供低电位，所述第四薄膜晶体管 T4 关闭。由于第五薄膜晶体管 T5 关闭，有机发光二极管 D1 发光，且流经所述有机发光二极管的电流与所述第一薄膜晶体管 T1 的阈值电压无关。
具体地，由于第四薄膜晶体管 T4 关闭、第六薄膜晶体管 T6 打开，使得 s 点电位变为 Vs=OVSS ； T2 关闭。
由电容耦合定理可得 g 点电位 Vg 如下：
Vg=Vd+Vth+δV ；
其中 δV 如下：
δV=(OVSS-Vd)*C1/(C1+C2) ；
其中 δV 为所述第一薄膜晶体管 T1 的源极的电压由数据电压变化至电源负电压后对所述第一薄膜晶体管 T1 的栅极的电压产生的影响， C1 为第一电容的电容值， C2 为第二电容的电容值。
g 点与 s 点之间的夹压 Vgs ，此时变为如下：
Vgs=Vg-Vs =δV+Vth+Vd-OVSS ；
流过有机发光二极管 D1 的电流满足 ：
I=k(Vgs-Vth)2=k(Vd-OVSS+δV)2
结合上面的公式，得到最终流过有机发光二极管 D1 的电流 为：
I=k[(Vd-OVSS)*C2/(C1+C2)]2
可知有机发光二极管的电流与驱动薄膜晶体管 (T1) 的阈值电压 Vth 无关，消除了阈值电压 Vth 对有机发光二极管的影响，从而提高了面板显示的均匀性以及发光效率。
本发明的 AMOLED 像素驱动电路及像素驱动方法，通过对现有的像素驱动电路进行改进，从而消除了驱动薄膜晶体管的阈值电压对有机发光二极管的影响，提高了面板显示均匀性，此外还避免了面板随 OLED 器件的老化而出现的亮度降低、发光效率下降等问题。
综上所述，虽然本发明已以优选实施例揭露如上，但上述优选实施例并非用以限制本发明，本领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。

Claims (15)

  1. 一种 AMOLED 像素驱动电路，其包括：
    第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第五薄膜晶体管、第六薄膜晶体管、第一电容、第二电容以及有机发光二极管；
    所述有机发光二极管的阳极接入电源正电压；所述第二电容的一端接入所述电源正电压，所述第二电容的另一端与所述第一电容的一端电性连接；
    所述第五薄膜晶体管的栅极接入第一扫描信号，所述第五薄膜晶体管的源极接入所述电源正电压，所述第五薄膜晶体管的漏极分别与所述有机发光二极管的阴极以及所述第三薄膜晶体管的源极电性连接；
    所述第三薄膜晶体管的栅极接入第二扫描信号，所述第三薄膜晶体管的漏极分别与所述第一薄膜晶体管的漏极和所述第二薄膜晶体管的漏极连接；
    所述第二薄膜晶体管的栅极接入第一扫描信号，所述第二薄膜晶体管的源极与所述第二电容和所述第一电容之间的节点电性连接；
    所述第一薄膜晶体管的栅极与所述第二电容和所述第一电容之间的节点电性连接，所述第一薄膜晶体管的源极分别与所述第一电容的另一端、所述第四薄膜晶体管的漏极以及所述第六薄膜晶体管的漏极电性连接；
    所述第六薄膜晶体管的栅极接入第二扫描信号，所述第六薄膜晶体管的源极接入电源负电压；
    所述第四薄膜晶体管的栅极接入第三扫描信号，所述第四薄膜晶体管的源极接入数据电压；
    所述第一扫描信号、所述第二扫描信号以及所述第三扫描信号均通过外部时序控制器产生；所述第一薄膜晶体管、所述第二薄膜晶体管、所述第三薄膜晶体管、所述第四薄膜晶体管、所述第五薄膜晶体管以及所述第六薄膜晶体管均为 N 型薄膜晶体管。
  2. 如权利要求 1 所述的 AMOLED 像素驱动电路，其中所述第一薄膜晶体管、所述第二薄膜晶体管、所述第三薄膜晶体管、所述第四薄膜晶体管、所述第五薄膜晶体管以及所述第六薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管以及非晶硅薄膜晶体管中的一种。
  3. 如权利要求 1 所述的 AMOLED 像素驱动电路，其中所述第一扫描信号、第二扫描信号以及第三扫描信号相组合，先后对应于初始化阶段、阈值电压存储阶段以及发光显示阶段；
    在所述初始化阶段，所述第一扫描信号和所述第二扫描信号都为高电位，所述第三扫描信号为低电位；
    在所述阈值电压存储阶段，所述第一扫描信号和所述第三扫描信号都为高电位，所述第二扫描信号为低电位；
    在所述发光显示阶段，所述第一扫描信号和所述第三扫描信号都为低电位，所述第二扫描信号为高电位。
  4. 一种 AMOLED 像素驱动电路，其包括：
    第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第五薄膜晶体管、第六薄膜晶体管、第一电容、第二电容以及有机发光二极管；
    所述有机发光二极管的阳极接入电源正电压；所述第二电容的一端接入所述电源正电压，所述第二电容的另一端与所述第一电容的一端电性连接；
    所述第五薄膜晶体管的栅极接入第一扫描信号，所述第五薄膜晶体管的源极接入所述电源正电压，所述第五薄膜晶体管的漏极分别与所述有机发光二极管的阴极以及所述第三薄膜晶体管的源极电性连接；
    所述第三薄膜晶体管的栅极接入第二扫描信号，所述第三薄膜晶体管的漏极分别与所述第一薄膜晶体管的漏极和所述第二薄膜晶体管的漏极连接；
    所述第二薄膜晶体管的栅极接入第一扫描信号，所述第二薄膜晶体管的源极与所述第二电容和所述第一电容之间的节点电性连接；
    所述第一薄膜晶体管的栅极与所述第二电容和所述第一电容之间的节点电性连接，所述第一薄膜晶体管的源极分别与所述第一电容的另一端、所述第四薄膜晶体管的漏极以及所述第六薄膜晶体管的漏极电性连接；
    所述第六薄膜晶体管的栅极接入第二扫描信号，所述第六薄膜晶体管的源极接入电源负电压；
    所述第四薄膜晶体管的栅极接入第三扫描信号，所述第四薄膜晶体管的源极接入数据电压。
  5. 如权利要求 4 所述的 AMOLED 像素驱动电路，其中所述第一薄膜晶体管、所述第二薄膜晶体管、所述第三薄膜晶体管、所述第四薄膜晶体管、所述第五薄膜晶体管以及所述第六薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管以及非晶硅薄膜晶体管中的一种。
  6. 如权利要求 4 所述的 AMOLED 像素驱动电路，其中所述第一扫描信号、所述第二扫描信号以及所述第三扫描信号均通过外部时序控制器产生。
  7. 如权利要求 4 所述的 AMOLED 像素驱动电路，其中所述第一薄膜晶体管、所述第二薄膜晶体管、所述第三薄膜晶体管、所述第四薄膜晶体管、所述第五薄膜晶体管以及所述第六薄膜晶体管均为 N 型薄膜晶体管。
  8. 如权利要求 7 所述的 AMOLED 像素驱动电路，其中所述第一扫描信号、第二扫描信号以及第三扫描信号相组合，先后对应于初始化阶段、阈值电压存储阶段以及发光显示阶段；
    在所述初始化阶段，所述第一扫描信号和所述第二扫描信号都为高电位，所述第三扫描信号为低电位；
    在所述阈值电压存储阶段，所述第一扫描信号和所述第三扫描信号都为高电位，所述第二扫描信号为低电位；
    在所述发光显示阶段，所述第一扫描信号和所述第三扫描信号都为低电位，所述第二扫描信号为高电位。
  9. 如权利要求 4 所述的 AMOLED 像素驱动电路，其中所述第一薄膜晶体管为驱动薄膜晶体管，所述第五薄膜晶体管为开关薄膜晶体管。
  10. 一种 AMOLED 像素驱动方法，其包括：
    提供 AMOLED 像素驱动电路；
    进入初始化阶段；
    进入阈值电压存储阶段；以及
    进入发光显示阶段；
    其中所述 AMOLED 像素驱动电路包括：
    第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第五薄膜晶体管、第六薄膜晶体管、第一电容、第二电容以及有机发光二极管；
    所述有机发光二极管的阳极接入电源正电压；所述第二电容的一端接入所述电源正电压，所述第二电容的另一端与所述第一电容的一端电性连接；
    所述第五薄膜晶体管的栅极接入第一扫描信号，所述第五薄膜晶体管的源极接入所述电源正电压，所述第五薄膜晶体管的漏极分别与所述有机发光二极管的阴极以及所述第三薄膜晶体管的源极电性连接；
    所述第三薄膜晶体管的栅极接入第二扫描信号，所述第三薄膜晶体管的漏极分别与所述第一薄膜晶体管的漏极和所述第二薄膜晶体管的漏极连接；
    所述第二薄膜晶体管的栅极接入第一扫描信号，所述第二薄膜晶体管的源极与所述第二电容和所述第一电容之间的节点电性连接；
    所述第一薄膜晶体管的栅极与所述第二电容和所述第一电容之间的节点电性连接，所述第一薄膜晶体管的源极分别与所述第一电容的另一端、所述第四薄膜晶体管的漏极以及所述第六薄膜晶体管的漏极电性连接；
    所述第六薄膜晶体管的栅极接入第二扫描信号，所述第六薄膜晶体管的源极接入电源负电压；
    所述第四薄膜晶体管的栅极接入第三扫描信号，所述第四薄膜晶体管的源极接入数据电压；
    在所述初始化阶段，所述第一扫描信号提供高电位，所述第二、第五薄膜晶体管打开；所述第二扫描信号提供高电位，所述第三、第六薄膜晶体管打开；所述第三扫描信号提供低电位，所述第四薄膜晶体管关闭；所述第一薄膜晶体管的栅极的电压等于所述电源正电压，所述第一薄膜晶体管的源极的电压等于所述电源负电压；
    在阈值电压存储阶段，所述第一扫描信号提供高电位，所述第二、第五薄膜晶体管打开；所述第二扫描信号提供低电位，所述第三、第六薄膜晶体管关闭；所述第三扫描信号提供高电位，所述第四薄膜晶体管打开；所述第一薄膜晶体管的源极的电压等于所述数据电压，所述第一薄膜晶体管的栅极的电压变化至 Vd+Vth ，其中 Vd 为数据电压， Vth 为所述第一薄膜晶体管的阈值电压；
    在所述发光显示阶段，所述第一扫描信号提供低电位，所述第二、第五薄膜晶体管关闭；所述第二扫描信号提供高电位，所述第三、第六薄膜晶体管打开；所述第三扫描信号提供低电位，所述第四薄膜晶体管关闭；所述有机发光二极管发光，且流经所述有机发光二极管的电流与所述第一薄膜晶体管的阈值电压无关。
  11. 如权利要求 10 所述的 AMOLED 像素驱动方法，其中在所述发光显示阶段，所述第一薄膜晶体管的源极的电压变化至所述电源负电压，所述第一薄膜晶体管的栅极的电压变化至 Vd+Vth+ δ V ，以使流经所述有机发光二极管的电流与所述第一薄膜晶体管的阈值电压无关，其中δ V 为所述第一薄膜晶体管的源极的电压由数据电压变化至电源负电压后对所述第一薄膜晶体管的栅极的电压产生的影响。
  12. 如权利要求 10 所述的 AMOLED 像素驱动方法，其中所述第一薄膜晶体管、所述第二薄膜晶体管、所述第三薄膜晶体管、所述第四薄膜晶体管、所述第五薄膜晶体管以及所述第六薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管以及非晶硅薄膜晶体管中的一种。
  13. 如权利要求 10 所述的 AMOLED 像素驱动方法，其中所述第一扫描信号、所述第二扫描信号及所述第三扫描信号均通过外部时序控制器产生。
  14. 如权利要求 10 所述的 AMOLED 像素驱动方法，其中所述第一薄膜晶体管为驱动薄膜晶体管，所述第五薄膜晶体管为开关薄膜晶体管。
  15. 如权利要求 10 所述的 AMOLED 像素驱动方法，其中所述第一薄膜晶体管、所述第二薄膜晶体管、所述第三薄膜晶体管、所述第四薄膜晶体管、所述第五薄膜晶体管以及所述第六薄膜晶体管均为 N 型薄膜晶体管。
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